JP5589302B2 - Component built-in substrate and manufacturing method thereof - Google Patents

Description

  The present invention relates to a component-embedded substrate and a method for manufacturing the same, for example, a configuration for reducing the height, area, and cost of a component-embedded substrate used in a system-in-package or module.

  In recent years, along with demands for downsizing, high performance, and low prices for electronic devices, miniaturization of printed wiring boards, multilayering, and high-density mounting of electronic components have rapidly advanced. Development of a component-embedded substrate in which an electronic component such as a semiconductor chip is embedded in a multilayer circuit substrate is underway.

  This is because a build-up insulating material for a build-up substrate in which a component mounting area is opened after mounting the component on a thin core substrate, or a prepreg (glass fiber cloth-containing resin or carbon fiber cloth-containing resin B-stage state), etc. The mainstream is to laminate and harden these insulating materials (see, for example, Patent Document 1 or Patent Document 2).

  In this case, when the built-in component such as a semiconductor element mounted on the core substrate is embedded with the prepreg or the like having the component mounting portion opened, the surface and the side surface are embedded by the prepreg resin from the side surface and the prepreg resin from the upper surface. It will be.

  In addition, when not using a prepreg, it is also proposed to laminate | stack the mounting board | substrate which mounted the semiconductor chip via the frame-shaped resin board | substrate which provided the penetration pillar. In that case, in order to prevent deterioration of the reliability of the semiconductor chip due to deformation caused by heat and stress of the frame-shaped resin substrate, it is also proposed to cover the semiconductor chip with a resin having lower elasticity than the resin constituting the frame-shaped resin substrate. (For example, see Patent Document 3).

JP 2004-163722 A JP 2008-244191 A JP 2006-120935 A

  However, although the area of the high-density system-in-package or module is reduced by using the component-embedded substrate, there arises a new problem that the thickness of the system-in-package or module is increased.

  That is, when not only a thin semiconductor chip but also a tall electronic component such as a capacitor, resistor, or crystal oscillator is mounted on the surface mounting portion of the component-embedded substrate, the thickness of the system-in-package or module is increased by the tall electronic component. Become.

  When the component-embedded substrate is not used, the thickness can be reduced, but the area remains large, and it is a problem to achieve both reduction in the height of the system-in-package or module and reduction in area. Another possible method is to form a counterbore by machining after manufacturing the component-embedded board to lower the mounting height and reduce the height of the system-in-package or module. There is a problem of high cost.

  Therefore, the present inventor, as a method of not forming the “spot” after manufacturing the component-embedded substrate, is a method of bonding a printed board substrate in which an opening is formed in advance with an adhesive resin sheet, for example, a B-stage prepreg Tried.

  However, when the fluidity of the adhesive resin constituting the resin sheet is high, there is a problem that the adhesive resin flows out to the connection terminal region of the opening.

  Accordingly, an object of the present invention is to enable a system-in-package or module using a component-embedded substrate to have a low profile, a small area, and a low cost.

From one aspect of the present invention, there is provided a component built-in substrate having a terminal for connecting an external component to a layer lower than the substrate outermost surface mounting portion of the component built-in substrate on which the built-in component is mounted, and the terminal for connecting the external component The resin flow according to the test method of JIS standard C6521 of the resin constituting the fluid resin sheet constituting the lower layer of the surface mounting portion surrounding the exposed portion of the resin is less than 15%, and the resin for bonding of all other layers There is provided a component-embedded substrate that is a resin sheet having a lower resin fluidity than the sheet.

  According to another aspect of the present invention, there is provided a component-embedded substrate having a terminal for connecting the external component to a layer lower than the substrate top surface mounting portion of the component-embedded substrate on which the built-in component is mounted, At least a part of the portion in contact with the upper part and the side surface of the built-in component of the fluid resin sheet constituting the lower layer of the surface mounting portion surrounding the exposed portion of the terminal to be connected has fluidity before curing from the fluid resin sheet. Provided is a component-embedded substrate that contains a resin that becomes higher.

Further, from another viewpoint of the present invention, the mounting position of the built-in component in advance in a state where the first resin sheet for semi-curing bonding is superimposed on the fiber reinforced resin layer on which the circuit serving as the intermediate layer of the component built-in substrate is formed. Forming a first opening corresponding to the above and a fiber reinforced resin layer in which a circuit serving as a surface layer of the component-embedded substrate is formed, and has a lower fluidity than the resin constituting the first resin sheet. Forming a second opening for an external component in advance in a state where the second resin sheet for semi-curing bonding using a resin having a resin flow of less than 15% according to the test method of C6521 is stacked; method for manufacturing a component-embedded substrate and a step of pressing collectively stacking an intermediate layer forming the second surface layer to form an opening of and the first opening on the lower substrate mounted with the internal parts Provided.

Further, according to another aspect of the present invention, the mounting position of the built-in component is previously coped with a semi-cured bonding resin sheet superimposed on a fiber reinforced resin layer on which a circuit serving as an intermediate layer of the component built-in substrate is formed. A step of forming a first opening, and a second for external components in advance in a state where a semi-cured bonding resin sheet is superimposed on a fiber reinforced resin layer on which a circuit serving as a surface layer of the component-embedded substrate is formed. A step of providing a high fluidity resin having higher fluidity before curing than the resin sheet on the upper part of the built-in component, a surface layer on which the second opening is formed, and the first There is provided a method of manufacturing a component-embedded substrate including a step of collectively laminating and press-contacting an intermediate layer in which one opening is formed on a lower substrate on which the built-in component is mounted.

  According to the disclosed component-embedded substrate and the manufacturing method thereof, the adhesive resin does not flow out to the connection terminal region of the opening in the surface layer. In addition, by applying an adhesive resin sheet having a good resin embedding property or a resin having higher fluidity before curing than the resin sheet to the built-in component lid (upper part), it is applied to the component built-in substrate. A low-profile system-in-package or a module can be realized.

  Further, since the component-embedded substrate that does not require the “spot” step is used, it is possible to achieve both a reduction in height and a reduction in area in a high-density system-in-package or module at a low cost.

It is explanatory drawing of embodiment of this invention. It is explanatory drawing of a void generation | occurrence | production and a void countermeasure. It is explanatory drawing of the manufacturing process to the middle of the component built-in board | substrate of Example 1 of this invention. It is explanatory drawing of the manufacturing process after FIG. 3 of the component built-in board | substrate of Example 1 of this invention. It is explanatory drawing of the manufacturing process to the middle of the component built-in board | substrate of Example 2 of this invention. It is explanatory drawing of the manufacturing process after FIG. 5 of the component built-in board | substrate of Example 2 of this invention. It is explanatory drawing of the manufacturing process to the middle of the component built-in board | substrate of Example 3 of this invention. It is explanatory drawing of the manufacturing process after FIG. 7 of the component built-in board | substrate of Example 3 of this invention. It is explanatory drawing of the manufacturing process to the middle of the component built-in board | substrate of Example 4 of this invention. It is explanatory drawing of the manufacturing process after FIG. 9 of the component built-in board | substrate of Example 4 of this invention. It is explanatory drawing of the manufacturing process to the middle of the component built-in board | substrate of Example 5 of this invention. It is explanatory drawing of the manufacturing process after FIG. 11 of the component built-in board | substrate of Example 5 of this invention. It is explanatory drawing of the manufacturing process to the middle of the component built-in board | substrate of Example 6 of this invention. It is explanatory drawing of the manufacturing process after FIG. 13 of the component built-in board | substrate of Example 6 of this invention. It is explanatory drawing of the manufacturing process to the middle of the component built-in board | substrate of Example 7 of this invention. It is explanatory drawing of the manufacturing process after FIG. 15 of the component built-in board | substrate of Example 7 of this invention.

  Here, a component built-in substrate according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 is an explanatory view of an embodiment of the present invention, and as shown in FIG. 1 (a), double-sided copper comprising fiber reinforced resins 2, 8 such as glass fiber reinforced resin or carbon fiber reinforced resin for one layer. One intermediate layer 1 and one surface layer 7 on which wirings 3 and 9 are formed on both sides of the tension laminate are prepared. The intermediate layer 1 is provided with mounting parts 4 for mounting a high-profile surface mounting component.

  The intermediate layer 1 is a B-stage high fluidity first resin sheet 5 with a resin flow of 15% or more, and the surface layer 7 is a B-stage low fluidity second resin with a resin flow of less than 15%. A sheet 10 is pasted. The intermediate layer 1 has a built-in component mounting portion opened to form an opening 6, and the surface layer 7 has a mounting place for a tall, high-profile surface mounting component to be mounted after completion of the substrate. Form.

  Regarding the fluidity of the resin described here, a resin flow of less than 15% according to the test method of JIS standard C6521 is regarded as a low fluidity, and a resin flow of 15% or more in the same test is regarded as a high fluidity. The same shall apply hereinafter. In addition, the normal general prepreg has a resin flow of 20 to 40% in the same test. In addition, when the flowability of the resin is expressed by the melt viscosity at the time of heating, the low flowability means that the melt viscosity at the time of lamination is 50000 poise or more, and the high flowability means that the melt viscosity at the time of lamination is less than 20000 poise. Can do.

As a resin sheet having low resin fluidity, a thermosetting resin sheet such as an epoxy resin in which 70 wt% or more of an inorganic filler such as silica (SiO ₂ ), alumina (Al ₂ O ₃ ), and talc (MgSiO) is mixed, or When an inorganic filler is not contained, a thermoplastic resin sheet such as a polyimide resin can be selected. Further, a prepreg containing a glass cloth or carbon fiber cloth having a low resin content may be used.

  Next, a multi-layered core substrate 12 made of fiber reinforced resin 13 such as glass fiber reinforced resin or carbon fiber reinforced resin is prepared. For example, a built-in component 15 such as a bare chip is flip-chip mounted on the wiring 14 provided on the core substrate 12. As a flip-chip mounting method, a pressure welding method using a known NCP (Non Conductive Paste), an ultrasonic bonding method, a method using a solder ball, a method of attaching solder to an electrode, or the like can be used. In general, except for the pressure welding method using NCP, filling is performed with underfill after flip chip mounting. In the figure, the core substrate 12 is a three-layer laminated substrate in which two layers of fiber reinforced resin 13 are laminated, but the number of laminated layers is arbitrary.

  Next, as shown in FIG. 1B, the surface layer 7, the intermediate layer 1, and the core substrate 12 of the three parts are stacked and stacked together in an aligned state. The condition for batch lamination is selected from 2 to 7 MPa and 150 to 200 ° C. Thereafter, a predetermined position is processed with a drill to form a through hole. Next, through-hole plating is performed to form through vias, and a solder resist is formed to complete the component built-in substrate.

  The completed component-embedded substrate has less resin oozing out from the side surface at the mounting location of the surface mounting component, and prevents the resin derived from the second resin sheet from covering the already formed mounting component terminals 4 Can do. A low-profile surface mounting component 16 such as a bare chip is flip-chip mounted on the mounting portion of the surface layer 7 of the component-embedded substrate, and a mounting component terminal 4 exposed to the opening 11 has a capacitor or a crystal oscillator or the like. The back surface mounting component 17 is mounted.

  However, when the resin flow of the second resin sheet is too small, the resin derived from the second resin sheet does not flow up to the area of the mounting component terminals 4, but the lid portion (upper part) of the built-in component 15. In the case of using for this, there is a problem that a resin shortage occurs, so this situation will be described with reference to FIG.

  FIG. 2A is an explanatory diagram of void generation. When the resin flow of the second resin sheet is too small, resin shortage occurs in the upper part of the built-in component 15, and voids are formed in the cured resin layer 18 after curing. 19 may be formed.

  Therefore, as shown in FIG. 2B, a B-stage high-fluidity resin sheet 20 having a resin flow of 15% or more is attached to a position corresponding to the upper part of the built-in component 15. When the surface layer 7, the intermediate layer 1, and the core substrate 12 of the three parts are stacked and stacked together in a state of alignment with each other, the resin derived from the high-fluidity resin sheet 20 provides good top and side surfaces of the built-in component 15. The void will not be generated.

In addition, the formation of through holes and through vias is not essential, and as a method of not forming through holes and through vias, a method of using protruding silver paste bumps formed by a printing method to connect upper and lower wiring layers, that is, so-called “B ^The “ ² it” method (see JP-A-2005-328771, if necessary) may be used.

  Further, before forming the solder resist, a build-up multilayer wiring may be further formed using a known build-up process. In this case, instead of a dry film type insulating film, a relatively hard insulating resin sheet including glass cloth or the like may be used, and an opening may be provided at a position corresponding to a mounting position of a high-profile surface mounting component. .

  Further, instead of using the high fluidity resin sheet, a resin having higher fluidity may be applied to the upper part of the built-in component 15 such as a bare chip mounted on the core substrate 12 before curing than the fluidity resin sheet. As such a resin having high fluidity before curing, the melt viscosity before curing is preferably less than 20000 poise. For example, the resin is preferably an epoxy resin, a cyanate ester resin, or the like. Moreover, you may contain inorganic fillers, such as a silica, an alumina, and a talc.

  Based on the above, next, the manufacturing process of the component built-in substrate according to the first embodiment of the present invention will be described with reference to FIGS. First, as shown in FIG. 3A, for example, an intermediate layer in which wirings 23 and 33 are formed on both sides of a double-sided copper-clad laminate made of glass fiber reinforced resin 22 and 32 for one layer having a thickness of 0.1 mm. One sheet 21 and one surface layer 31 are prepared. A surface mounting terminal 24 is formed on the intermediate layer 21, and a pad 34 is formed simultaneously with the wiring 33 on the surface layer 31.

For example, a B-stage prepreg 25 having a resin flow of 40% and a thickness of 0.1 mm is attached to the intermediate layer 21. In the intermediate layer 21, a portion corresponding to the built-in component mounting portion is opened together with the prepreg 25 to form an opening 26. On the other hand, for example, a B-stage low-fluidity prepreg 35 having a resin flow of 1% and a thickness of 0.06 mm is attached to the surface layer 31.
In this surface layer 31, an opening 36 serving as a mounting place for a tall surface mounting component to be mounted after completion of the substrate is opened together with the low fluidity prepreg 35.

  For example, a three-layer laminated substrate 41 made of glass fiber reinforced resin 42 for two layers having a thickness of 0.2 mm is prepared as a core substrate. A pad 44 connected to the Au bump 46 provided on the Si semiconductor element 45 is formed on the three-layer laminated substrate 41 together with the wiring 43.

  For example, a Si semiconductor element 45 having a size of 5 × 5 mm and a thickness of 0.08 mm is joined to the three-layer laminated substrate 41 by a pressure welding method using NCP47 to form a component mounting core layer. The conditions of this pressure welding method are, for example, a temperature of 200 ° C. and a load per bump of 45 g. In addition, since NCP47 is used, an underfill process becomes unnecessary.

  Next, as shown in FIG. 3B, the intermediate layer 21 and the surface layer 31 are aligned and sequentially stacked on the three-layer laminated substrate 41 on which the Si semiconductor element 45 is mounted, for example, at 3 MPa and 180 ° C. Laminate all together. The prepreg 25 and the low fluidity prepreg 35 become the cured resin layers 27 and 37, respectively.

  Next, as shown in FIG. 4C, after a predetermined position is processed with a drill to form a through hole, through-hole plating is performed to form a through via 48.

  Next, as shown in FIG. 4D, after forming the solder resist 49 on both surfaces of the multilayer substrate, the wiring 33 and 43 exposed from the solder resist 49 are nickel-plated and then gold-plated (both not shown) The component-embedded substrate is completed by performing the surface treatment of).

  It was confirmed that the component-embedded board produced in this way had no resin oozing out from the side surface at the mounting location of the surface-mounted component, and prevented the resin from covering the surface-mounted terminal portion that had already been formed. .

  Further, when the cross section of the component built-in substrate was observed, no voids or the like due to the lack of resin were observed around the Si semiconductor element 45. This is because the B-stage low-fluidity prepreg 35 corresponding to the upper lid of the Si semiconductor element 45 has a resin flow of 1% and low fluidity, but the prepreg 25 of the intermediate layer 21 has a resin flow of 40%. Since the fluidity is high, it is considered that the resin could be supplied from the prepreg 25 of the intermediate layer 21 to the upper part of the Si semiconductor element 45.

  Next, with reference to FIG.5 and FIG.6, the manufacturing process of the component built-in board | substrate of Example 2 of this invention is demonstrated. First, as shown in FIG. 5A, for example, an intermediate layer in which wirings 23 and 33 are formed on both sides of a double-sided copper-clad laminate made of glass fiber reinforced resin 22 and 32 having a thickness of 0.1 mm. One sheet 21 and one surface layer 31 are prepared. A surface mounting terminal 24 is formed on the intermediate layer 21, and a pad 34 is formed simultaneously with the wiring 33 on the surface layer 31.

  For example, a B-stage prepreg 25 having a resin flow of 25% and a thickness of 0.06 mm is attached to the intermediate layer 21. In the intermediate layer 21, a portion corresponding to the built-in component mounting portion is opened together with the prepreg 25 to form an opening 26.

On the other hand, for example, a B-stage low-fluidity prepreg 35 having a resin flow of 1% and a thickness of 0.06 mm is attached to the surface layer 31. In this surface layer 31, an opening 36 serving as a mounting place for a tall surface mounting component to be mounted after completion of the substrate is opened together with the low fluidity prepreg 35.
Further, on the low-flow prepreg 35 of the B stage of the surface layer 31, for example, only in the region corresponding to the built-in component mounting portion, for example, the resin flow is 40% and the thermosetting of 0.04 mm thickness of the B stage. A high fluidity resin layer 38 made of an epoxy resin is attached.

  For example, a three-layer laminated substrate 41 made of glass fiber reinforced resin 42 for two layers having a thickness of 0.2 mm is prepared as a core substrate. A pad 44 connected to the Au bump 46 provided on the Si semiconductor element 45 is formed on the three-layer laminated substrate 41 together with the wiring 43.

  For example, a Si semiconductor element 45 having a size of 7 × 7 mm and a thickness of 0.09 mm is joined to the three-layer laminated substrate 41 by a pressure welding method using NCP47 to form a component mounting core layer. The conditions of this pressure welding method are, for example, a temperature of 200 ° C. and a load per bump of 45 g. In addition, since NCP47 is used, an underfill process becomes unnecessary.

  Next, as shown in FIG. 5B, the intermediate layer 21 and the surface layer 31 are aligned and sequentially stacked on the three-layer laminated substrate 41 on which the Si semiconductor element 45 is mounted, for example, at 3 MPa and 180 ° C. Laminate all together. The prepreg 25, the low fluidity prepreg 35, and the high fluidity resin layer 38 become the cured resin layers 27, 37, and 39, respectively.

  Next, as shown in FIG. 6C, after a predetermined position is processed with a drill to form a through hole, through hole plating is performed to form a through via 48.

  Next, as shown in FIG. 6D, after forming the solder resist 49 on both surfaces of the laminated substrate, the wiring 33 and 43 exposed from the solder resist 49 are nickel-plated and then gold-plated (both not shown) The component-embedded substrate is completed by performing the surface treatment of).

  It was confirmed that the component-embedded board produced in this way had no resin oozing out from the side surface at the mounting location of the surface-mounted component, and prevented the resin from covering the surface-mounted terminal portion that had already been formed. .

  Further, when the cross section of the component built-in substrate was observed, no voids or the like due to the lack of resin were observed around the Si semiconductor element 45. This is because the fluidity of the high fluidity resin layer 38 made of a thermosetting epoxy resin provided at a position corresponding to the Si semiconductor element 45 is high. It is thought that the resin could be supplied.

  Next, with reference to FIG.7 and FIG.8, the manufacturing process of the component built-in board | substrate of Example 3 of this invention is demonstrated. First, as shown in FIG. 7A, for example, an intermediate layer in which wirings 23 and 33 are formed on both sides of a double-sided copper-clad laminate made of glass fiber reinforced resin 22 and 32 having a thickness of 0.1 mm. One sheet 21 and one surface layer 31 are prepared. A surface mounting terminal 24 is formed on the intermediate layer 21, and a pad 34 is formed simultaneously with the wiring 33 on the surface layer 31. Further, the wirings 23 provided on the front and back of the intermediate layer 21 are connected in advance by through vias (not shown), and the wirings 33 provided on the front and back of the surface layer 31 are also connected in advance by through vias (not shown). . The through via referred to here may be formed by a protruding silver paste bump described later, or may be formed by plating after forming the through hole.

  A protruding silver paste bump 28 having an average height of, for example, 0.12 mm is formed in advance in the via portion on the surface of the intermediate layer 21, and a resin flow of, for example, 30 is provided on the back surface of the intermediate layer 21. A B-stage prepreg 25 having a thickness of 0.1 mm is attached. In the intermediate layer 21, a portion corresponding to the built-in component mounting portion is opened together with the prepreg 25 to form an opening 26.

  On the other hand, for example, a B-stage thermoplastic polyimide resin layer 51 having a resin flow of 2% and a thickness of 0.05 mm is attached to the surface layer 31. In the surface layer 31, an opening 36 serving as a mounting place for a tall surface mounting component to be mounted after completion of the substrate is opened together with the thermoplastic polyimide resin layer 51. Further, on the surface layer 31 of the B-stage thermoplastic polyimide resin layer 51, only on the region corresponding to the built-in component mounting portion, for example, the resin flow is 40% and the B-stage thermosetting is 0.05 mm thick. A sticky epoxy resin layer 52 is attached.

  Further, for example, a three-layer laminated substrate 61 made of two layers of glass fiber reinforced resin 62 having a thickness of 0.2 mm is prepared as a core substrate. A pad 64 connected to the Au bump 68 provided on the Si semiconductor element 67 is formed on the three-layer laminated substrate 61 together with the wiring 63. The three-layer laminated substrate 62 is also connected via vias with protruding silver paste bumps 65. The average height of the three-layer laminated substrate 61 on the component mounting side surface is 0.18 mm in advance, for example. The protruding silver paste bump 66 is formed in advance.

  For example, a Si semiconductor element 67 having a size of 6 × 6 mm and a thickness of 0.1 mm on which Au bumps 68 are formed is placed on the three-layer laminated substrate 61 and heated and soldered. Then, after filling an underfill material at, for example, 100 ° C., it is cured at 150 ° C. for 1 hour to form an underfill resin 69.

  Next, as shown in FIG. 7B, the intermediate layer 21 and the surface layer 31 are aligned and sequentially stacked on the three-layer laminated substrate 61 on which the Si semiconductor element 67 is mounted, for example, at 3 MPa and 200 ° C. Laminate all together. The prepreg 25, the thermoplastic polyimide resin layer 51, and the thermosetting epoxy resin layer 52 become the cured resin layers 27, 53, and 54, respectively.

  Further, the wiring 63 provided on the surface of the three-layer laminated substrate 61 and the wiring 23 provided on the back surface of the intermediate layer 21 are connected by silver paste bumps 66, and the wiring 23 provided on the surface of the intermediate layer 21 and the back surface of the surface layer 31. Are connected to the wiring 33 provided by the silver paste bump 28.

  Next, as shown in FIG. 8C, after forming the solder resist 70 on both surfaces of the laminated substrate, the wiring 33 and 63 exposed from the solder resist 70 are nickel-plated and then gold-plated (both not shown) The component-embedded substrate is completed by performing the surface treatment of).

  The produced component-embedded substrate of Example 3 has confirmed that the resin does not bleed out from the side surface at the mounting location of the surface-mounted component, and the resin prevents the surface-mounted terminal portion already formed from being covered. It was. Further, when the cross section of the component built-in substrate was observed, no voids or the like due to the lack of resin were observed around the Si semiconductor element 67.

  Next, with reference to FIG. 9 and FIG. 10, a manufacturing process of the component built-in substrate according to the fourth embodiment of the present invention will be described. First, as shown in FIG. 9A, for example, an intermediate layer in which wirings 23 and 33 are formed on both sides of a double-sided copper-clad laminate made of glass fiber reinforced resin 22 and 32 having a thickness of 0.1 mm. One sheet 21 and one surface layer 31 are prepared. A surface mounting terminal 24 is formed on the intermediate layer 21, and a pad 34 is formed simultaneously with the wiring 33 on the surface layer 31. Further, the wirings 23 provided on the front and back of the intermediate layer 21 are connected in advance by through vias (not shown), and the wirings 33 provided on the front and back of the surface layer 31 are also connected in advance by through vias (not shown). . The through via referred to here may be formed by a protruding silver paste bump described later, or may be formed by plating after forming the through hole.

  A protruding silver paste bump 28 having an average height of, for example, 0.12 mm is formed in advance in the via portion on the surface of the intermediate layer 21, and a resin flow of, for example, 30 is provided on the back surface of the intermediate layer 21. A B-stage prepreg 25 having a thickness of 0.1 mm is attached. In the intermediate layer 21, a portion corresponding to the built-in component mounting portion is opened together with the prepreg 25 to form an opening 26.

  On the other hand, a filler-containing thermosetting epoxy resin layer 55 containing, for example, 80% by weight of B stage silica filler having a resin flow of 2% and a thickness of 0.05 mm is attached to the surface layer 31. In the surface layer 31, an opening 36 serving as a mounting place for a tall surface mounting component to be mounted after completion of the substrate is opened together with a thermosetting epoxy resin layer 55 containing a filler. Further, on the B-stage filler-containing thermosetting epoxy resin layer 55 of the surface layer 31, for example, only in the region corresponding to the built-in component mounting portion, the resin flow is 40% and the B-stage thickness is 0.05 mm. The thermosetting epoxy resin layer 52 is affixed.

  Further, for example, a three-layer laminated substrate 61 made of two layers of glass fiber reinforced resin 62 having a thickness of 0.2 mm is prepared as a core substrate. A pad 64 connected to the Au bump 68 provided on the Si semiconductor element 67 is formed on the three-layer laminated substrate 61 together with the wiring 63. The three-layer laminated substrate 62 is also connected via vias with protruding silver paste bumps 65. The average height of the three-layer laminated substrate 61 on the component mounting side surface is 0.18 mm in advance, for example. The protruding silver paste bump 66 is formed in advance.

  For example, a Si semiconductor element 67 having a size of 6 × 6 mm and a thickness of 0.1 mm on which Au bumps 68 are formed is placed on the three-layer laminated substrate 61 and heated and soldered. Then, after filling an underfill material at, for example, 100 ° C., it is cured at 150 ° C. for 1 hour to form an underfill resin 69.

  Next, as shown in FIG. 9B, the intermediate layer 21 and the surface layer 31 are aligned and sequentially stacked on the three-layer laminated substrate 61 on which the Si semiconductor element 67 is mounted, for example, at 3 MPa and 170 ° C. Laminate all together. The prepreg 25, the thermosetting epoxy resin layer 52, and the filler-containing thermosetting epoxy resin layer 55 become the cured resin layers 27, 54, and 56, respectively.

  Further, the wiring 63 provided on the surface of the three-layer laminated substrate 61 and the wiring 23 provided on the back surface of the intermediate layer 21 are connected by silver paste bumps 66, and the wiring 23 provided on the surface of the intermediate layer 21 and the back surface of the surface layer 31. Are connected to the wiring 33 provided by the silver paste bump 28.

  Next, as shown in FIG. 10C, after forming the solder resist 70 on both surfaces of the laminated substrate, the wiring 33 and 63 exposed from the solder resist 70 are nickel-plated and then gold-plated (both not shown) The component-embedded substrate is completed by performing the surface treatment of).

  The fabricated component-embedded substrate of Example 4 has confirmed that there is no leakage of resin from the side surface at the mounting location of the surface-mounted component, and that the resin prevents the surface-mounted terminal portion already formed from being covered. It was. Further, when the cross section of the component built-in substrate was observed, no voids or the like due to the lack of resin were observed around the Si semiconductor element 67.

  Based on the above, the manufacturing process of the component built-in substrate according to the fifth embodiment of the present invention will be described next with reference to FIGS. First, as shown in FIG. 11 (a), for example, an intermediate layer in which wirings 23 and 33 are formed on both sides of a double-sided copper-clad laminate made of glass fiber reinforced resin 22 and 32 having a thickness of 0.1 mm. One sheet 21 and one surface layer 31 are prepared. A surface mounting terminal 24 is formed on the intermediate layer 21, and a pad 34 is formed simultaneously with the wiring 33 on the surface layer 31.

  For example, B-stage low-fluidity prepregs 71 and 72 having a resin flow of 3% and a thickness of 0.1 mm are attached to the intermediate layer 21 and the surface layer 31. In the intermediate layer 21, a portion corresponding to the built-in component mounting portion is opened together with the low fluidity prepreg 71 to form the opening 26. On the other hand, in the surface layer 31, an opening 36 serving as a mounting place for a tall surface mounting component to be mounted after completion of the substrate is opened together with the low fluidity prepreg 72.

  Further, for example, a three-layer laminate 41 made of glass fiber reinforced resin 42 for two layers having a thickness of 0.2 mm is prepared as a core substrate. A pad 44 connected to the Au bump 46 provided on the Si semiconductor element 45 is formed on the three-layer laminate 41 together with the wiring 43.

  For example, a Si semiconductor element 45 having a size of 5 × 5 mm and a thickness of 0.08 mm is joined to the three-layer laminate 41 by a pressure welding method using NCP47 to form a component mounting core layer. The conditions of this pressure welding method are, for example, a temperature of 200 ° C. and a load per bump of 45 g. In addition, since NCP47 is used, an underfill process becomes unnecessary.

  Next, after mounting the Si semiconductor element 45, for example, by using a potting method, the melt viscosity before curing is 4000 poise only on the upper part of the Si semiconductor element 45. Resin 73 is formed. In this case, the high fluidity resin 73 has a thickness of several μm to several tens of μm.

  Next, as shown in FIG. 11B, the intermediate layer 21 and the surface layer 31 are aligned with each other and sequentially stacked on the three-layer laminate 41 on which the Si semiconductor element 45 is mounted, for example, at 3 MPa and 180 ° C. Laminate all together. The low-fluidity prepregs 71 and 72 and the high-fluidity resin 73 become cured resin layers 81, 82, and 83, respectively.

  Next, as shown in FIG. 12C, after a predetermined position is processed with a drill to form a through hole, through-hole plating is performed to form a through via 48.

  Next, as shown in FIG. 12D, after forming the solder resist 49 on both surfaces of the laminated substrate, the wiring 33 and 43 exposed from the solder resist 49 are nickel-plated and then gold-plated (both not shown) The component-embedded substrate is completed by performing the surface treatment of).

  It was confirmed that the component-embedded board produced in this way had no resin oozing out from the side surface at the mounting location of the surface-mounted component, and prevented the resin from covering the surface-mounted terminal portion that had already been formed. .

  Further, when the cross section of the component built-in substrate was observed, no voids or the like due to the lack of resin were observed around the Si semiconductor element 45. Further, it is confirmed that the high fluidity resin 73 made of cyanate ester resin containing 40 wt% of silica filler applied to the upper part of the Si semiconductor element 45 can supply the resin to the upper part of the Si semiconductor element 45 and a part of the side surface. did.

  Next, with reference to FIG.13 and FIG.14, the manufacturing process of the component built-in board | substrate of Example 6 of this invention is demonstrated. First, as shown in FIG. 13A, for example, an intermediate layer in which wirings 23 and 33 are formed on both sides of a double-sided copper-clad laminate made of glass fiber reinforced resin 22 and 32 having a thickness of 0.1 mm. One sheet 21 and one surface layer 31 are prepared. A surface mounting terminal 24 is formed on the intermediate layer 21, and a pad 34 is formed simultaneously with the wiring 33 on the surface layer 31.

  For example, low-flow prepregs 74 and 75 of B stage having a resin flow of 1% and a thickness of 0.1 mm are attached to the intermediate layer 21 and the surface layer 31. Further, the opening portion 26 is formed in the intermediate layer 21 by opening a portion corresponding to the built-in component mounting portion together with the low fluidity prepreg 74. On the other hand, in the surface layer 31, an opening 36 serving as a mounting place for a tall surface mounting component to be mounted after completion of the substrate is opened together with the low fluidity prepreg 75.

  Further, on the low-flow prepreg 75 of the B stage of the surface layer 31, for example, only in the region corresponding to the built-in component mounting portion, for example, the resin flow is 40% and the thermosetting of 0.04 mm thickness of the B stage. A high fluidity resin layer 38 made of an epoxy resin is attached.

  Further, for example, a three-layer laminate 41 made of glass fiber reinforced resin 42 for two layers having a thickness of 0.2 mm is prepared as a core substrate. A pad 44 connected to the Au bump 46 provided on the Si semiconductor element 45 is formed on the three-layer laminate 41 together with the wiring 43.

  For example, a Si semiconductor element 45 having a size of 7 × 7 mm and a thickness of 0.09 mm is joined to the three-layer laminate 41 by a pressure welding method using NCP47 to form a component mounting core layer. The conditions of this pressure welding method are, for example, a temperature of 200 ° C. and a load per bump of 45 g. In addition, since NCP47 is used, an underfill process becomes unnecessary.

  Next, after mounting the Si semiconductor element 45, for example, by using a potting method, only the upper part of the Si semiconductor element 45 contains 20 wt% of silica filler and 5 wt% of alumina filler in which the melt viscosity before curing is 5000 poise. A highly fluid resin 76 made of an epoxy resin is formed. In this case, the thickness of the high fluidity resin 76 is several μm to several tens of μm.

  Next, as shown in FIG. 13B, the intermediate layer 21 and the surface layer 31 are aligned and sequentially stacked on the three-layer laminated plate 41 on which the Si semiconductor element 45 is mounted, for example, at 3 MPa and 200 ° C. Laminate all together. The low-fluidity prepregs 74 and 75 become the cured resin layers 84 and 85, and the high-fluidity resin layer 38 and the high-fluidity resin 76 are mixed to form the cured resin layer 86.

  Next, as shown in FIG. 14C, after a predetermined position is processed with a drill to form a through hole, through-hole plating is performed to form a through via 48.

  Next, as shown in FIG. 14D, after forming the solder resist 49 on both surfaces of the multilayer substrate, the wiring 33 and 43 exposed from the solder resist 49 are nickel-plated and then gold-plated (both not shown) The component-embedded substrate is completed by performing the surface treatment of).

  It was confirmed that the component-embedded board produced in this way had no resin oozing out from the side surface at the mounting location of the surface-mounted component, and prevented the resin from covering the surface-mounted terminal portion that had already been formed. .

  Further, when the cross section of the component built-in substrate was observed, no voids or the like due to the lack of resin were observed around the Si semiconductor element 45. Further, a high fluidity resin 76 made of an epoxy resin containing 20 wt% of silica filler and 5 wt% of alumina filler applied to the upper portion of the Si semiconductor element 45 has a resin on the upper portion and part of the side surface of the Si semiconductor element 45. It was confirmed that it could be supplied.

  Next, with reference to FIG.15 and FIG.16, the manufacturing process of the component built-in board | substrate of Example 7 of this invention is demonstrated. First, as shown in FIG. 15A, for example, an intermediate layer in which wirings 23 and 33 are formed on both sides of a double-sided copper-clad laminate made of glass fiber reinforced resin 22 and 32 having a thickness of 0.1 mm. One sheet 21 and one surface layer 31 are prepared.

  A surface mounting terminal 24 is formed on the intermediate layer 21, and a pad 34 is formed simultaneously with the wiring 33 on the surface layer 31. Further, the wirings 23 provided on the front and back of the intermediate layer 21 are connected in advance by through vias (not shown), and the wirings 33 provided on the front and back of the surface layer 31 are also connected in advance by through vias (not shown). . The through via here may be formed by a protruding silver paste bump described below, or may be formed by plating after forming the through hole.

  Protruding silver paste bumps 28 having an average height of, for example, 0.12 mm are formed in advance in the via portion on the surface of the intermediate layer 21, and the intermediate layer 21 and the surface layer 31 have, for example, a resin flow 2% and 0.1 mm thick B stage low flow prepregs 77 and 78 are attached. In the intermediate layer 21, a portion corresponding to the built-in component mounting portion is opened together with the low-fluidity prepreg 77 to form an opening portion 26. On the other hand, in the surface layer 31, an opening 36 serving as a mounting place for a tall surface mounting component to be mounted after completion of the substrate is opened together with the low fluidity prepreg 78.

  Further, for example, a three-layer laminate 61 made of two layers of glass fiber reinforced resin 62 having a thickness of 0.2 mm is prepared as a core substrate. On this three-layer laminated plate 61, pads 64 connected to Au bumps 68 provided on the Si semiconductor element 67 are formed together with wiring 63. The three-layer laminated board 62 is also connected via vias with protruding silver paste bumps 65, and the average height of the three-layer laminated board 61 on the component mounting side surface is, for example, 0.18 mm in advance. The protruding silver paste bump 66 is formed in advance.

  For example, a Si semiconductor element 67 having a size of 6 × 6 mm and a thickness of 0.1 mm on which Au bumps 68 are formed is placed on the three-layer laminated plate 61, and is heated and soldered. Then, after filling an underfill material at, for example, 100 ° C., it is cured at 150 ° C. for 1 hour to form an underfill resin 69.

  Next, after mounting the Si semiconductor element 67 and curing the underfill, for example, using a potting method, a cyanate ester resin containing 30 wt% of silica filler in which the melt viscosity before curing is 3500 poise only on the upper part of the Si semiconductor element 67 A high fluidity resin 79 is formed. In this case, the thickness of the high fluidity resin 79 is several μm to several tens of μm.

  Next, as shown in FIG. 15B, the intermediate layer 21 and the surface layer 31 are aligned with each other on the three-layer laminated plate 61 on which the Si semiconductor element 67 is mounted, and sequentially stacked, for example, at 3 MPa and 200 ° C. Laminate all together. The low-fluidity prepregs 77 and 78 and the high-fluidity resin 79 become cured resin layers 87, 88, and 89, respectively.

  Further, the wiring 63 provided on the surface of the three-layer laminated substrate 61 and the wiring 23 provided on the back surface of the intermediate layer 21 are connected by silver paste bumps 66, and the wiring 23 provided on the surface of the intermediate layer 21 and the back surface of the surface layer 31. Are connected to the wiring 33 provided by the silver paste bump 28.

  Next, as shown in FIG. 16C, after forming the solder resist 70 on both surfaces of the multilayer substrate, the wiring 33 and 63 exposed from the solder resist 70 are nickel-plated and then gold-plated (both are not shown) The component-embedded substrate is completed by performing the surface treatment of).

  The manufactured component-embedded substrate of Example 7 has confirmed that the resin does not bleed out from the side surface at the mounting location of the surface-mounted component and prevents the resin from covering the surface-mounted terminal portion that has already been formed. It was. Further, when the cross section of the component built-in substrate was observed, no voids or the like due to the lack of resin were observed around the Si semiconductor element 67.

Here, the following supplementary notes are disclosed with respect to the embodiments of the present invention including Examples 1 to 7.
(Supplementary note 1) A component-embedded substrate having a terminal for connecting an external component to a lower layer than the substrate outermost surface mounting portion of the component-embedded substrate on which the built-in component is mounted, and an exposed portion of the terminal connecting the external component The resin flow by the test method of JIS standard C6521 of the resin constituting the flowable resin sheet constituting the lower layer of the surrounding surface mounting part is less than 15%, and the resin flow is less than the resin sheet for bonding of all other layers. A component-embedded substrate that is a resin sheet with low fluidity.
(Supplementary note 2) The component-embedded substrate according to supplementary note 1, wherein at least a part of a side surface of the built-in component is covered with a resin having higher fluidity than the low-fluidity resin sheet.
(Supplementary note 3) A component-embedded substrate having a terminal for connecting an external component to a lower layer than the substrate outermost surface mounting portion of the component-embedded substrate on which the built-in component is mounted, and an exposed portion of the terminal connecting the external component A high fluidity resin having higher fluidity before curing than the fluidity resin sheet is formed on a part of the fluidity resin sheet constituting the lower layer of the surrounding surface mounting portion and in contact with the upper and side surfaces of the built-in component. The component-embedded board included.
(Supplementary note 4) The component-embedded substrate according to supplementary note 3, wherein at least one of the fluid resin sheet and the high fluid resin includes an inorganic substance.
(Additional remark 5) The 1st opening corresponding to the mounting position of a built-in component beforehand in the state which piled up the 1st resin sheet for semi-curing bonding on the fiber reinforced resin layer which formed the circuit used as the intermediate | middle layer of a component built-in board | substrate. And a fiber reinforced resin layer on which a circuit serving as a surface layer of the component-embedded substrate has a lower fluidity than the first resin sheet, and a resin flow by a test method of JIS standard C6521 is less than 15% Forming a second opening for an external component in a state where a second resin sheet for semi-curing bonding using the resin is stacked, a surface layer having the second opening formed thereon, and And a step of collectively laminating and pressing the intermediate layer having the first opening on the lower substrate on which the built-in component is mounted.
(Supplementary note 6) The component built-in according to supplementary note 5, in which a third resin sheet having a higher fluidity than the second resin sheet is partially pasted at a position facing the built-in component of the second resin sheet. A method for manufacturing a substrate.
(Additional remark 7) The manufacturing method of the component built-in board of Additional remark 5 or Additional remark 6 whose said 2nd resin sheet is either a thermosetting resin sheet or a thermoplastic resin sheet.
(Supplementary Note 8) First opening corresponding to mounting position of built-in component is formed in advance in a state where a semi-cured bonding resin sheet is overlapped on a fiber reinforced resin layer on which a circuit serving as an intermediate layer of the component built-in substrate is formed. And a step of forming a second opening for an external component in advance in a state where a semi-cured bonding resin sheet is superimposed on a fiber reinforced resin layer on which a circuit serving as a surface layer of the component-embedded substrate is formed. And a step of providing a high fluidity resin having higher fluidity before curing than the resin sheet on the built-in component, and a surface layer in which the second opening is formed and the first opening. And a step of collectively laminating and pressing the intermediate layer on the lower substrate on which the built-in component is mounted.
(Additional remark 9) The manufacturing method of the component built-in board of Additional remark 8 which affixed the 2nd resin sheet whose fluidity | liquidity is higher than the said resin sheet partially in the position facing the said internal component of the said resin sheet.

DESCRIPTION OF SYMBOLS 1 Intermediate layer 2 Fiber reinforced resin 3 Wiring 4 Terminal 5 for mounting components 1st resin sheet 6 Opening part 7 Surface layer 8 Fiber reinforced resin 9 Wiring 10 2nd resin sheet 11 Opening part 12 Core substrate 13 Fiber reinforced resin 14 Wiring 15 Built-in component 16 Low-profile surface mount component 17 High-profile surface mount component 18 Cured resin layer 19 Void 20 High fluidity resin sheet 21 Intermediate layer 22 Glass fiber reinforced resin 23 Wiring 24 Surface mount terminal 25 Prepreg 26 Opening 27 Cured resin layer 28 Silver paste bump 31 Surface layer 32 Glass fiber reinforced resin 33 Wiring 34 Pad 35 Low fluidity prepreg 36 Opening 37 Cured resin layer 38 High fluidity resin layer 39 Cured resin layer 41, 61 Three-layer laminated substrate 42, 62 Glass fiber Reinforced resin 43, 63 Wiring 44, 64 Pad 45, 67 Si semiconductor element 46, 68 Au bump 47 NC
48 through vias 49, 70 solder resist 51 thermoplastic polyimide resin layer 52 thermosetting epoxy resin layer 53 cured resin layer 54 cured resin layer 55 filled thermosetting epoxy resin layer 56 cured resin layer 65, 66 silver paste bump 69 underfill Resin 71, 72, 74, 75, 77, 78 Low fluidity prepreg 73, 76, 79 High fluidity resin 81, 82, 83, 84, 85, 86, 87, 88, 89 Cured resin layer

Claims (7)

A component-embedded substrate having a terminal for connecting an external component to a lower layer than the substrate outermost surface mounting portion of the component-embedded substrate on which the built-in component is mounted,
The resin flow by the test method of JIS standard C6521 of the resin constituting the flowable resin sheet constituting the lower layer of the surface mounting portion surrounding the exposed portion of the terminal connecting the external component is less than 15%, and other A component-embedded substrate, which is a resin sheet having a lower resin fluidity than all layers of bonding resin sheets.   The component built-in board according to claim 1, wherein at least a part of the side surface of the built-in component is covered with a resin having higher fluidity than the low-fluidity resin sheet. A component-embedded substrate having a terminal for connecting an external component to a lower layer than the substrate outermost surface mounting portion of the component-embedded substrate on which the built-in component is mounted,
Hardened from the fluid resin sheet to a part of the fluid resin sheet constituting the lower layer of the surface mounting portion surrounding the exposed portion of the terminal connecting the external component and in contact with the upper and side surfaces of the built-in component A component-embedded board that contains a high-fluidity resin with high fluidity before. A first opening corresponding to a mounting position of a built-in component is formed in advance in a state where a semi-cured first resin sheet for bonding is superimposed on a fiber reinforced resin layer on which a circuit serving as an intermediate layer of the component built-in substrate is formed. And a fiber reinforced resin layer on which a circuit serving as a surface layer of the component-embedded substrate is formed, and a resin having a flowability lower than that of the first resin sheet and a resin flow of less than 15% according to a test method of JIS standard C6521 is used. Forming a second opening for an external component in advance in a state where the second resin sheet for semi-curing bonding that has been overlapped,
A step of pressing collectively stacking an intermediate layer forming the second surface layer to form an opening of and the first opening on the lower substrate mounted with the internal components,
A method of manufacturing a component-embedded substrate having 5. The component-embedded substrate according to claim 4 , wherein a third resin sheet having a higher fluidity than the second resin sheet is partially attached to a position of the second resin sheet facing the built-in component. Method. The second resin sheet, component-embedded board fabrication method according to claim 4 or claim 5 is any one of a resin sheet of a thermosetting resin sheet or a thermoplastic. Forming a first opening corresponding to a mounting position of a built-in component in a state in which a semi-cured bonding resin sheet is superimposed on a fiber reinforced resin layer on which a circuit serving as an intermediate layer of the component built-in substrate is formed;
Forming a second opening for an external component in advance in a state where a semi-cured resin sheet for bonding is superimposed on a fiber reinforced resin layer on which a circuit serving as a surface layer of the component-embedded substrate is formed;
Providing a high-fluidity resin having higher fluidity before curing than the resin sheet on the built-in component;
A step of laminating and pressing the surface layer in which the second opening is formed and the intermediate layer in which the first opening is formed on a lower substrate on which the built-in component is mounted;
A method of manufacturing a component-embedded substrate having

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