JP5557180B2 - Manufacturing method of semiconductor light emitting device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor light emitting device, and a semiconductor light emitting device substrate and a semiconductor light emitting device obtained thereby.

  As a semiconductor light emitting device such as a light emitting diode (LED) or a semiconductor laser (LD), multiple quantum devices in which a quantum well layer composed of an n-type GaN layer, an InGaN layer, and a barrier layer composed of a GaN layer are alternately stacked on a sapphire substrate. Those having a structure in which a well layer (Multi Quantum Wells: MQWs) and a p-type GaN layer are sequentially laminated are mass-produced.

  In such a semiconductor light emitting device, in the GaN layer whose crystal growth surface is the (0001) plane (c-plane), as shown in FIG. 10, a Ga atom plane containing only Ga atoms and an N atom plane containing only N atoms are used. Have a crystal structure that is alternately stacked in the c-axis direction, that is, the layer thickness direction, and Ga atoms and N atoms have different electronegativity, so that the Ga atom plane is slightly positive. The N atomic plane is slightly negatively charged, and as a result, spontaneous polarization occurs in the c-axis direction (layer thickness direction). Further, when heterogeneous semiconductor layers are heteroepitaxially grown on the GaN layer, compressive strain or tensile strain is generated in the GaN crystal based on the difference in lattice constant, and piezoelectric polarization (piezo polarization) occurs in the c-axis direction in the GaN crystal. (See Patent Documents 1 and 2).

  In the multi-quantum well layer, in addition to the spontaneous polarization caused by the fixed charge in the InGaN quantum well layer, the piezo polarization generated by the compressive strain applied to the InGaN quantum well layer is superimposed. A polarization electric field will be generated. Here, the spontaneous polarization works in the −c plane direction and the piezo polarization works in the + c plane direction, but the piezo polarization is overwhelmingly large in the InGaN well layer. Due to the influence, problems such as a decrease in light emission efficiency (particularly light emission efficiency in the green region) and a peak wavelength shift of light emission accompanying an increase in necessary injection current occur. The cause of this problem is the quantum confined Stark effect, in which the wave function of electrons and holes in the quantum well layer is spatially separated due to the polarization electric field and the emission probability is drastically reduced. : QCSE).

JP 2008-53593 A JP 2008-53594 A

  As a means for solving the above problem, it is conceivable to use a substrate having an InGaN crystal growth surface. First, however, there is no InGaN bulk substrate. Also, when InGaN is grown on a GaN substrate whose principal surface is the (0001) plane, InGaN becomes a very rough crystal surface having many dislocations due to a large difference in lattice constants, and the film thickness is 1 μm. The crystal cannot be grown more than that. Further, when an LED structure is fabricated on a GaN substrate whose main surface can ignore the polarization of the (1-100) plane or the (11-20) plane, the light emission efficiency is the (0001) plane. It is smaller than one having InGaN grown on a certain GaN substrate.

  The objective of this invention is providing the manufacturing method of the novel semiconductor light-emitting device which forms the 2nd semiconductor layer different from that on the 1st semiconductor layer.

The method for manufacturing a semiconductor light emitting device of the present invention uses a substrate having a first semiconductor layer made of a GaN layer having a principal surface that is a c-plane and an exposed crystal growth surface different from the principal surface. Forming a second semiconductor layer composed of an InGaN layer on the first semiconductor layer by growing InGaN from the exposed crystal growth surface of the first semiconductor layer;
A plurality of mask layers are provided on the base substrate in stripes on the base substrate, and undoped GaN is crystal-grown starting from the main surface of the base substrate exposed with a width of 1 to 10 μm from the mask layer, and the first semiconductor layer Produced by forming
In the second semiconductor layer, a facet inclined with respect to the main surface of the first semiconductor layer in the substrate is used as the crystal growth surface, and InGaN is grown from the crystal growth surface as a starting point. It is formed to develop in the normal direction ,
By epitaxial growth on the second semiconductor layer, a multiple quantum well layer in which quantum well layers made of InGaN layers and barrier layers made of GaN layers are alternately stacked is formed .

The substrate for a semiconductor light emitting device of the present invention is
A substrate having a first semiconductor layer made of a GaN layer, the principal surface of which is a c-plane and a crystal growth surface different from the principal surface is exposed;
A second semiconductor layer composed of an InGaN layer formed on the first semiconductor layer by causing InGaN to grow from the exposed crystal growth surface of the first semiconductor layer of the substrate;
With
The substrate is provided with a plurality of mask layers in a stripe shape on the base substrate, and undoped GaN is grown from the main surface of the base substrate exposed with a width of 1 to 10 μm from the mask layer, whereby the first semiconductor A layer is formed,
The second semiconductor layer has a facet inclined with respect to the main surface of the first semiconductor layer in the substrate as the crystal growth surface, and InGaN grows from the crystal growth surface as a starting point. It is formed so as to progress in the normal direction.

Another semiconductor light emitting device substrate of the present invention is:
InGaN crystal growth starts from the exposed crystal growth surface of the first semiconductor layer in the substrate having the first semiconductor layer made of a GaN layer having a main surface of the c-plane and a crystal growth surface different from the main surface exposed. A second semiconductor layer made of an InGaN layer is formed on the first semiconductor layer, and the first and second semiconductor layers are separated from the substrate;
The substrate is provided with a plurality of mask layers in a stripe shape on the base substrate, and undoped GaN is grown from the main surface of the base substrate exposed with a width of 1 to 10 μm from the mask layer, whereby the first semiconductor A layer is formed,
The second semiconductor layer has a facet inclined with respect to the main surface of the first semiconductor layer in the substrate as the crystal growth surface, and InGaN grows from the crystal growth surface as a starting point. It is formed so as to progress in the normal direction.

The semiconductor light emitting device of the present invention is
A substrate having a first semiconductor layer made of a GaN layer, the principal surface of which is a c-plane and a crystal growth surface different from the principal surface is exposed;
A second semiconductor layer formed on the first semiconductor layer by causing InGaN to grow from the exposed crystal growth surface of the first semiconductor layer of the substrate;
A multiple quantum well layer formed by epitaxial growth on the second semiconductor layer, wherein a quantum well layer made of an InGaN layer and a barrier layer made of a GaN layer are alternately stacked;
With
The substrate is provided with a plurality of mask layers in a stripe shape on the base substrate, and undoped GaN is grown from the main surface of the base substrate exposed with a width of 1 to 10 μm from the mask layer, whereby the first semiconductor A layer is formed,
The second semiconductor layer has a facet inclined with respect to the main surface of the first semiconductor layer in the substrate as the crystal growth surface, and InGaN grows from the crystal growth surface as a starting point. It is formed so as to progress in the normal direction.

Another semiconductor light emitting device of the present invention is:
InGaN crystal growth starts from the exposed crystal growth surface of the first semiconductor layer in the substrate having the first semiconductor layer made of a GaN layer having a main surface of the c-plane and a crystal growth surface different from the main surface exposed. A semiconductor substrate in which a second semiconductor layer is formed on the first semiconductor layer, and the first and second semiconductor layers are separated from the substrate ;
A multiple quantum well layer formed by epitaxially growing on the second semiconductor layer of the semiconductor substrate, wherein a quantum well layer made of an InGaN layer and a barrier layer made of a GaN layer are alternately stacked;
With
The substrate is provided with a plurality of mask layers in a stripe shape on the base substrate, and undoped GaN is grown from the main surface of the base substrate exposed with a width of 1 to 10 μm from the mask layer, whereby the first semiconductor A layer is formed,
The second semiconductor layer has a facet inclined with respect to the main surface of the first semiconductor layer in the substrate as the crystal growth surface, and InGaN grows from the crystal growth surface as a starting point. It is formed so as to progress in the normal direction.

  According to the present invention, a semiconductor different from the semiconductor constituting the first semiconductor layer is hetero-growth starting from an exposed crystal growth surface different from the c-plane main surface of the first semiconductor layer of the substrate, whereby the first A second semiconductor layer is formed on one semiconductor layer, that is, the second semiconductor layer is formed by lateral crystal growth from the crystal growth surface. Such a method for manufacturing a semiconductor light-emitting element is a novel one that has not existed before.

(A) is sectional drawing of each board | substrate of the structural example 1 and (b) is the structural example 2. FIG. (A) is the explanatory view showing the formation of the second semiconductor layer using the respective substrates of the structural example 1 and (b) the structural example 2. It is sectional drawing and the top view of the board | substrate of 1st Embodiment. (A)-(d) is explanatory drawing which shows the preparatory process of the board | substrate of 1st Embodiment. It is explanatory drawing which shows the crystal growth of InGaN of 1st Embodiment. (A)-(d) is explanatory drawing which shows the manufacturing process of the semiconductor light-emitting device of 1st Embodiment. It is sectional drawing of the semiconductor light-emitting device of 1st Embodiment. It is sectional drawing of the board | substrate of 2nd Embodiment. It is explanatory drawing which shows the preparatory process of the board | substrate of 2nd Embodiment. It is a schematic diagram which shows a GaN crystal.

  Hereinafter, embodiments will be described with reference to FIGS.

(Summary of Embodiment)
The summary of the method for manufacturing the semiconductor light emitting device L according to this embodiment will be described with reference to FIGS.

  In the method for manufacturing the semiconductor light emitting device L according to the present embodiment, a substrate 10 for forming the semiconductor light emitting device L as shown in FIGS. 1A and 1B is used. 1A shows the substrate 10 of Configuration Example 1, and FIG. 1B shows the substrate 10 of Configuration Example 2. The substrate 10 has a first semiconductor layer 12, and the first semiconductor layer 12 has a crystal growth surface 12b different from the c-plane main surface 12a exposed. Here, the “main surface” in the present application means the main surface of the substrate or the surface of the semiconductor layer parallel to the main surface.

  As the substrate 10, for example, a substrate having a configuration in which the first semiconductor layer 12 is provided on the base substrate 11 can be cited. The substrate 10 may have a configuration in which the base substrate 11 and the first semiconductor layer 12 are formed of the same semiconductor and are formed of a single semiconductor as a whole. For example, the substrate 10 has a thickness of 0.3 to 3.0 mm and a diameter of 50 to 300 mm, although it varies depending on the diameter. In the case of the substrate 10 having a diameter of 50 mm, 5000 to 12000 semiconductor light emitting elements L can be formed on one substrate 10.

Examples of the base substrate 11 include a sapphire substrate and a GaN substrate. Of these, a sapphire substrate which is a single crystal substrate having a corundum structure of Al ₂ O ₃ is preferable from the viewpoint of versatility. The main surface of the sapphire substrate as the base substrate 11 may be an a-plane <{11-20} plane>, a c-plane <{0001} plane>, or a crystal plane with another plane orientation. . The main surface of the sapphire substrate may be a miscut surface in which the a-axis is inclined at a predetermined angle (for example, 45 °, 60 °, or a slight angle within several degrees) with respect to the normal direction of the main surface. . That is, the sapphire substrate may be a miscut substrate. The plane directions of the a-plane, c-plane, and m-plane are orthogonal to each other.

  Examples of the first semiconductor layer 12 include a GaN layer, an InGaN layer, an AlGaN layer, an InN layer, and an AlN layer. The main surface 12a of the first semiconductor layer 12 is a c-plane <{0001} plane>. The thickness of the first semiconductor layer 12 is, for example, 0.5 to 10 μm.

  As the surface-exposed crystal growth surface 12b different from the main surface 12a of the first semiconductor layer 12, the first surface on the side surface of the recess 13 formed on the substrate 10 as in the configuration example 1 shown in FIG. An exposed surface of the semiconductor layer 12 may be mentioned. In this case, it is preferable that the recessed part 13 is comprised by the groove 13 formed so that it may extend on the board | substrate 10 from a viewpoint that the uniform crystal growth surface 12b is exposed.

  The concave groove 13 may be a U-shaped groove, a V-shaped groove, or a trapezoidal groove as long as it has a side surface. The concave groove 13 has, for example, a groove opening width of 0.5 to 10 μm, a groove depth of 0.75 to 100 μm, and an angle formed with respect to the main surface 12a of the groove side surface of 70 to 120 °. However, this angle is not limited as long as the crystal growth of the semiconductor forming the second semiconductor layer 14 described later can be performed from the exposed surface of the first semiconductor layer 12 on the side surface. Moreover, when the concave groove 13 has a bottom surface, the groove depth is preferably 1.5 times or more the groove opening width from the viewpoint of suppressing semiconductor crystal growth from the bottom surface.

  Only one groove 13 may be formed, or a plurality of grooves 13 may be formed so as to extend in parallel with each other. In the latter case, the interval between the concave grooves 13 is, for example, 1 to 100 μm.

  The crystal growth surface 12b on the side surface of the groove 13 may be, for example, a (11-20) plane, a (1-100) plane, a (1-101) plane, or a crystal plane with another plane orientation. May be.

  The first semiconductor layer 12 is preferably covered with the crystal growth blocking layer 15 from the viewpoint of preventing crystal growth from the main surface 12a portion and allowing crystal growth only from the crystal growth surface 12b. When the main surface 12a portion of the first semiconductor layer 12 is exposed, crystal growth from the main surface 12a portion is prevented by selecting a growth condition that does not cause crystal growth from the main surface 12a portion. Can do.

Examples of the crystal growth prevention layer 15 include oxide films and nitride films such as Si, Ti, Ta, and Zr, specifically, SiO ₂ films, SiN _x films, SiO _1-x N _x films, and TiO _2. Examples thereof include a film and a ZrO ₂ film. The thickness of the crystal growth preventing layer 15 is, for example, 0.01 to 3 μm. The crystal growth prevention layer 15 can be formed by a method such as vacuum deposition, sputtering, or CVD (Chemical Vapor Deposition). The crystal growth blocking layer 15 may be composed of a single layer or a plurality of layers.

  In the substrate 10 of the above configuration example 1 having the concave groove 13 and the crystal growth prevention layer 15, after the first semiconductor layer 12 is grown on the base substrate 11 and the crystal growth prevention layer 15 is formed thereon, the concave groove is formed. 13 is formed by patterning a photoresist in which only a portion to be formed is an opening, and the crystal growth blocking layer 15 and the first semiconductor layer 12 are dried by reactive ion etching (RIE) or the like using the photoresist as an etching resist. It can be manufactured by etching or wet etching.

  The surface-exposed crystal growth surface 12b different from the main surface 12a of the first semiconductor layer 12 is formed by crystal growth on the substrate 10 as in the configuration example 2 shown in FIG. A facet inclined with respect to the main surface 12a of the first semiconductor layer 12 constituted by a plurality of protrusions 17 having a triangular cross section can be mentioned. In this case, the main surface 12 a of the first semiconductor layer 12, that is, the surface of the first semiconductor layer 12 is a plane including the tops of the plurality of protrusions 17.

  The facet crystal growth surface 12b may be, for example, a (11-22) plane, or a crystal plane of another plane orientation.

  The substrate 10 having the first semiconductor layer 12 constituted by the plurality of protrusions 17 having a triangular cross section is provided with a plurality of mask layers 18 in stripes on the base substrate 11, and the base substrate 11 exposed from between the mask layers 18. It can be produced by crystal growth of the semiconductor constituting the first semiconductor layer 12 starting from the main surface.

As the mask layer 18, for example, an oxide film or a nitride film such as Si, Ti, Ta, or Zr, specifically, a SiO ₂ film, a SiN _x film, a SiO _1-x N _x film, a TiO ₂ film, Examples thereof include a ZrO ₂ film. The mask layer 18 has a thickness of, for example, 0.01 to 3 μm and a width of 1 to 10 μm. An interval between the mask layers 18, that is, an exposed width of the base substrate 11 is, for example, 1 to 10 μm. The mask layer 18 can be formed by, for example, a method such as vacuum deposition, sputtering, or CVD (Chemical Vapor Deposition). The mask layer 18 may be composed of a single layer or a plurality of layers.

  In the method for manufacturing the semiconductor light emitting device L according to this embodiment, as shown in FIGS. 2A and 2B corresponding to FIGS. 1A and 1B, the first semiconductor layer 12 of the substrate 10 is used. The second semiconductor layer 14 is formed on the first semiconductor layer 12 by growing a semiconductor different from the semiconductor constituting the first semiconductor layer 12 from the exposed crystal growth surface 12b.

  As the 2nd semiconductor layer 14 comprised with a semiconductor different from the semiconductor which comprises the 1st semiconductor layer 12, an InGaN layer, an AlGaN layer, etc. are mentioned, for example. The thickness of the second semiconductor layer 14 is, for example, 2 to 20 μm. In the case of the configuration example 1, a cavity may remain in the groove 13 after the second semiconductor layer 14 is formed. The second semiconductor layer 14 is preferably flattened by polishing or the like when the surface is not flattened by facets or the like.

  According to the manufacturing method of the semiconductor light emitting element L according to the above-described embodiment, the first semiconductor layer 12 is formed starting from the surface-exposed crystal growth surface 12b different from the main surface 12a of the first semiconductor layer 12 of the substrate 10. A semiconductor different from the constituting semiconductor is hetero-growth, thereby forming the second semiconductor layer 14 on the first semiconductor layer 12, that is, the second semiconductor layer 14 is formed by lateral crystal growth from the crystal growth surface 12b. Form. Such a method for manufacturing the semiconductor light emitting device L is a novel method that has not been conventionally used.

  The substrate 10 on which the second semiconductor layer 14 thus obtained is crystal-grown can be used as a substrate for a semiconductor light emitting device. In this case, if the surface is not flattened by the growth mode, the template can be obtained by flattening by polishing or the like. A semiconductor light emitting element L can be manufactured by growing a light emitting layer thereon and further providing an electrode. Further, by using a semiconductor substrate in which the first and second semiconductor layers 12 and 14 or the second semiconductor layer 14 are separated from the substrate 10 as a substrate for a semiconductor light emitting device, a light emitting layer is grown thereon, and an electrode is further provided. The semiconductor light emitting element L can also be manufactured.

(First embodiment)
A specific method for manufacturing the semiconductor light emitting device L according to the first embodiment will be described.

  In the following description, a method for forming a semiconductor layer includes metal organic vapor phase epitaxy (MOVPE), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (Hydride). (Vapor Phase Epitaxy: HVPE). Among these, the metal-organic vapor phase epitaxy is the most common. Therefore, a method for forming a semiconductor layer using the metal-organic vapor phase epitaxy will be described.

  The MOVPE apparatus used for forming the semiconductor layer is mainly composed of a substrate transport system, a substrate heating system, a gas supply system, and a gas exhaust system, all of which are electronically controlled. The substrate heating system is composed of a thermocouple, a resistance heater, and a carbon or SiC susceptor provided thereon. A quartz tray with a substrate set on the susceptor is transported to grow a semiconductor layer. These substrate heating systems are installed in a quartz double tube equipped with a water cooling mechanism or in a stainless steel reaction vessel, and a carrier gas and various source gases are supplied into the double tube or reaction vessel. In particular, when a stainless steel reaction vessel is used, a quartz flow channel is used to realize a laminar gas flow on the substrate.

Examples of the carrier gas include H ₂ and N ₂ . An example of the group V element supply source is NH ₃ . Examples of the group III element supply source include trimethylgallium (TMG), trimethylindium (TMI), trimethylaluminum (TMA), and the like. Examples of the n-type doping element supply source include SiH ₄ (silane), Si ₂ H ₆ (disilane), and GeH ₄ (germane). Examples of the p-type doping element supply source include Cp ₂ Mg (biscyclopentadienyl magnesium).

<Preparation of substrate>
The substrate 10 having the u-GaN layer 12 with the crystal growth surface 12b different from the main surface 12a exposed on the side surface of the groove 13 as shown in FIG.

−Preparation of base substrate−
In the method for manufacturing the semiconductor light emitting element L according to the first embodiment, the sapphire substrate 11 whose main surface is the (11-20) plane (a plane) or the (0001) plane (c plane) is prepared as the base substrate 11.

-Formation of u-GaN layer-
First, after setting the sapphire substrate 11 on the quartz tray, the sapphire substrate 11 is heated to 1050 to 1150 ° C., the pressure in the reaction vessel is set to 10 to 100 kPa, and the carrier is placed in the flow channel installed in the reaction vessel. The sapphire substrate 11 is thermally cleaned by circulating H ₂ as a gas and maintaining the state for several minutes.

Next, the temperature of the sapphire substrate 11 is set to 1050 to 1150 ° C., the pressure in the reaction vessel is set to 10 to 100 kPa, and the carrier gas H ₂ is circulated in the reaction vessel at a flow rate of 10 L / min. A group element supply source (NH ₃ ) and a group III element supply source 1 (TMG) are flowed so that the respective supply amounts are 0.1 to 5 L / min and 50 to 150 μmol / min.

  At this time, as shown in FIG. 4A, undoped GaN grows on the sapphire substrate 11, and the u-GaN layer 12 having the main surface 12 a as the c-plane as the first semiconductor layer 12 on the sapphire substrate 11. (Undoped GaN layer) is formed. Before forming the u-GaN layer 12, it is preferable to form a low-temperature buffer layer having a thickness of about 20 to 30 nm on the sapphire substrate 11.

-SiO ₂ film of -
Subsequently, as shown in FIG. 4B, the SiO ₂ film 15 is formed on the u-GaN layer 12 as the crystal growth blocking layer 15 by a method such as vacuum deposition, sputtering, or CVD (Chemical Vapor Deposition). Form.

-Formation of concave grooves-
Then, as shown in FIG. 4C, the photoresist 16 is patterned on the SiO ₂ film 15 so that only the portion where the groove is to be formed becomes an opening, and as shown in FIG. By performing dry etching or wet etching such as reactive ion etching (RIE) on the SiO ₂ film 15 and the u-GaN layer 12 using the resist 16 as an etching resist, a plurality of U-shaped concave grooves are obtained. After forming 13 so as to be arranged in parallel with a space between each other, the photoresist 16 is removed.

  Examples of the direction in which the groove 13 extends include the m-axis direction or the a-axis direction of the u-GaN layer 12. In the former case, the u-GaN layer 12 exposed on the side surface of the groove 13 is the (11-20) plane, and in the latter case, the u-GaN layer 12 exposed on the side surface of the groove 13 is (1-100). ) Surface. These (11-20) planes or (1-100) planes become crystal growth planes 12b.

<Formation of semiconductor layer>
-Formation of u-InGaN layer-
After setting the substrate 10 prepared above on the quartz tray so that the u-GaN layer 12 side faces upward, the substrate 10 is heated to 700 to 1000 ° C. and the pressure in the reaction vessel is set to 10 k to 100 kPa, The substrate 10 is thermally cleaned by circulating H ₂ as a carrier gas in a flow channel installed in the reaction vessel and holding the state for several minutes.

Next, the temperature of the substrate 10 is set to 1050 to 1150 ° C., the pressure in the reaction vessel is set to 10 to 100 kPa, and the carrier gas H ₂ is circulated in the reaction vessel at a flow rate of 10 L / min, The element supply source (NH ₃ ), the group III element supply source 1 (TMG), and the group III element supply source 2 (TMI) are supplied at 0.5 to 20 L / min, 10 to 150 μmol / min, and It is made to flow so that it may become 10-150 micromol / min.

At this time, as shown in FIG. 5, since the main surface 12a portion of the u-GaN layer 12 is covered with the SiO ₂ film 15, InGaN crystal growth does not occur, whereas the surface-exposed u-GaN layer 12, undoped InGaN is heteroepitaxially grown from the crystal growth surface 12b as a starting point, and the crystal growth proceeds in the normal direction of the main surface 12a. As shown in FIG. A u-InGaN layer 14 (undoped InGaN layer) whose growth direction is the c-axis is formed as a second semiconductor layer 14 on 12.

  Conventionally, when InGaN crystal is grown starting from the c-plane of GaN, although depending on the In composition, InGaN with an In composition of 10% has very many defects even at a thickness of about 500 nm, and the surface flatness is poor. It was. However, as described above, by growing InGaN heteroepitaxially starting from the crystal growth surface 12b different from the main surface 12a of the u-GaN layer 12, a u-InGaN layer having a thickness of 10 μm or more in the normal direction of the main surface 12a. 14 can be formed.

  In the conventional method, InGaN has a large number of dislocations caused by the difference in lattice constant between GaN and InGaN on the main surface, and has poor surface flatness. However, as described above, since InGaN is heteroepitaxially grown from the crystal growth surface 12b different from the main surface 12a of the u-GaN layer 12, there are few dislocations extending in the main surface direction. There are few dislocations to appear.

  Note that an n-type InGaN layer may be formed on the u-GaN layer 12 instead of the u-InGaN layer 14.

-Formation of n-type InGaN layer-
First, when the facet structure remains and the surface of the u-InGaN layer 14 is not flat, the base substrate 11 on which the u-InGaN layer 14 is formed is once taken out of the reaction vessel and subjected to treatment such as surface polishing, thereby Is flattened so that the crystal can be regrown.

The pressure in the reaction vessel is 10 k to 100 kPa, and the carrier gas H ₂ is 5 to 15 L / min in the reaction vessel (hereinafter, the gas flow rate is a value in a standard state (0 ° C., 1 atm)). In this flow, a group V element supply source (NH ₃ ), a group III element supply source 1 (TMG), a group III element supply source 2 (TMI), and an n-type doping element supply source (SiH ₄ ). Are supplied so that the respective supply amounts are 0.5 to 20 L / min, 10 to 150 μmol / min, 10 to 150 μmol / min, and 5 to 20 μmol / min.

  At this time, as shown in FIG. 6B, the n-type InGaN is epitaxially grown continuously to the c-plane like the u-InGaN layer 14 in succession to the u-InGaN layer 14 and is formed on the upper layer side. An n-type InGaN layer 21 is formed. The layer thickness of the n-type InGaN layer 21 on the upper layer side is about 2 to 10 μm.

  Note that when an n-type InGaN layer is formed on the u-GaN layer 12 instead of the u-InGaN layer 14, this layer is not necessarily formed.

-Formation of multiple quantum well layers-
The temperature of the substrate 10 is set to about 650 to 800 ° C., the pressure in the reaction vessel is set to 10 to 100 kPa, and the carrier gas N ₂ is circulated in the reaction vessel at a flow rate of ₅ to 15 L / min. Group element supply source (NH ₃ ), Group III element supply source 1 (TMG), and Group III element supply source 2 (TMI) are supplied at 0.1 to 5 L / min, 5 to 15 μmol / min, respectively. And 2 to 30 μmol / min. At this time, InGaN is continuously grown on the n-type InGaN layer 21 and epitaxially grown so that the main surface is a c-plane, similarly to the n-type InGaN layer 21 and the u-InGaN layer 14, thereby forming an InGaN layer 22a (well layer). Is done. The layer thickness of the InGaN layer 22a is 1 to 10 nm.

Next, a group V element supply source (NH ₃ ) and a group III element supply source (TMG) are flowed so that the respective supply amounts are 0.1 to 5 L / min and 5 to 15 μmol / min. At this time, GaN is grown epitaxially so that the main surface becomes a c-plane, like the InGaN layer 22a, the n-type InGaN layer 21, and the u-InGaN layer 14, continuously from the InGaN layer 22a. ) Is formed. The layer thickness of the GaN layer 22b is 5 to 20 nm.

  Then, the same operation as described above is repeated alternately to form the multiple quantum well layer 22 by alternately forming InGaN layers 22a and GaN layers 22b as shown in FIG. 6C. The emission wavelength of the multiple quantum well layer 22 depends on the InN mixed crystal ratio of the InGaN layer 22a, and the higher the InN mixed crystal ratio, the longer the emission wavelength.

  In order to prevent current leakage from the active layer to the p-type GaN layer 23 described later, a current blocking layer made of p-type AlGaInN may be inserted after the active layer is formed.

-Formation of p-type GaN layer-
The temperature of the substrate 10 is set to 900 to 1100 ° C., the pressure in the reaction vessel is set to 10 to 100 kPa, and the carrier gas H ₂ is circulated in the reaction vessel at a flow rate of ₅ to 15 L / min. Group element supply source (NH ₃ ), Group III element supply source (TMG), and p-type doping element supply source (Cp ₂ Mg) are respectively supplied in amounts of 0.1 to 5 L / min, 50 to 150 μmol / min, And 0.03 to 30 μmol / min.

  At this time, as shown in FIG. 6D, GaN is epitaxially grown continuously on the multiple quantum well layer 22 to form a p-type GaN layer 23. The p-type GaN layer 23 has a thickness of about 100 nm.

  The p-type GaN layer 23 may be composed of a plurality of layers having different doping element concentrations.

<Formation of semiconductor light emitting device>
As shown in FIG. 7, after the n-type InGaN layer 21 is exposed by partially reactive ion etching the substrate 10 on which the semiconductor layer is formed, vacuum deposition, sputtering, CVD (Chemical Vapor Deposition), etc. By the method, an n-type electrode 24 and a p-type electrode 25 are formed on the n-type InGaN layer 21 and the p-type GaN layer 23, respectively.

  Here, examples of the electrode material of the n-type electrode 24 include a laminated structure such as Ti / Al, Ti / Al / Mo / Au, and Hf / Au, or an alloy. Examples of the p-type electrode 25 include a laminated structure such as Pd / Pt / Au, Ni / Au, and Pd / Mo / Au, an alloy, or an oxide-based transparent conductive material such as ITO (indium tin oxide). It is done.

  The substrate 10 is cleaved to be divided into rectangular plate-like semiconductor light emitting elements L. Each semiconductor light emitting element L is about 300 × 300 μm.

  The semiconductor light emitting device L manufactured as described above includes the substrate 10 having the u-GaN layer 12 in which the crystal growth surface 12b different from the main surface 12a is exposed, and the crystal in which the u-GaN layer 12 of the substrate 10 is exposed. A growth surface 12b is used as a starting point to provide a u-InGaN layer 14 formed on the u-GaN layer 12 by crystal growth of InGaN. For example, it is used as a GaN-based light emitting diode or a GaN-based semiconductor laser. . Alternatively, the u-InGaN layer 14 may be separated from the substrate 10 to form an InGaN substrate, and a semiconductor layer may be formed thereon to constitute the semiconductor light emitting element L.

  The semiconductor light emitting device L manufactured as described above has the u-InGaN layer 14 and the n-type InGaN layer 21 whose principal surfaces advantageous for reducing the piezo effect are c-planes. A decrease in luminous efficiency can be suppressed. In particular, when the multiple quantum well layer 22 is a green light emitting layer (light emitting layer having an emission wavelength of about 520 nm) having a high InN mixed crystal ratio of the InGaN layer 22a, it is strongly affected by piezo polarization, so that a remarkable effect can be obtained. it can.

(Second Embodiment)
A specific method for manufacturing the semiconductor light emitting device L according to the second embodiment will be described. In the second embodiment, the process for forming the semiconductor layer and the process for forming the semiconductor light emitting element L are the same as those in the first embodiment.

<Preparation of substrate>
The substrate 10 having the u-GaN layer 12 with the facets of the protrusions 17 on the surface of the substrate 10 as shown in FIG. 8 exposed as a crystal growth surface 12b different from the main surface 12a is prepared as follows.

−Preparation of base substrate−
In the method for manufacturing the semiconductor light emitting device L according to the second embodiment, the GaN substrate 11 whose main surface is the (0001) plane (c plane) is prepared as the base substrate.

-Formation of mask layer-
First, as shown in FIG. 9, the SiO ₂ film 18 is formed as a plurality of mask layers 18 in a stripe shape on the GaN substrate 11 by, for example, a method such as vacuum deposition, sputtering, or CVD (Chemical Vapor Deposition).

Examples of the direction in which the striped SiO ₂ film 18 extends include the m-axis direction or the a-axis direction of the GaN substrate 11.

-Facet formation-
Then, after setting the GaN substrate 11 provided with the mask layer 18 on the quartz tray so that the mask layer 18 faces upward, the GaN substrate 11 is heated to 1050 to 1150 ° C. and the pressure in the reaction vessel is set to 10 to 100 kPa. and then, also, and H ₂ is passed through as a carrier gas flow in a channel which is installed in the reaction vessel, and thermal cleaning the GaN substrate 11 by holding the state for several minutes.

Next, the temperature of the GaN substrate 11 is set to 900 to 1050 ° C., the pressure in the reaction vessel is set to 10 to 100 kPa, and carrier gases H ₂ and N ₂ are circulated in the reaction vessel at a flow rate of 5 to 10 L / min, respectively. Then, a group V element supply source (NH ₃ ) and a group III element supply source 1 (TMG) are caused to flow therethrough so that the respective supply amounts are 0.1 to 5 L / min and 50 to 150 μmol / min. . As long as facets are formed as a result, the above-described crystal growth conditions are not necessarily required.

At this time, GaN crystal grew from the GaN substrate 11 exposed between the mask layers 18 as a starting point, and was formed as a first semiconductor layer 12 on the GaN substrate 11 by a plurality of protrusions 17 each having a triangular cross section. The u-GaN layer 12 whose main surface 12a is the c-plane is formed. And the facet inclined with respect to the main surface 12a of each protrusion 17 becomes the crystal growth surface 12b. For example, when the extending direction of the striped SiO ₂ film 18 is the m-axis direction of the GaN substrate 11, each protrusion 17 is also formed to extend in the same direction, and the facet becomes the (11-22) plane.

  INDUSTRIAL APPLICATION This invention is useful about the manufacturing method of a semiconductor light-emitting device, the board | substrate for semiconductor light-emitting devices obtained by it, and a semiconductor light-emitting device.

L Semiconductor light emitting element 10 Substrate 11 Base substrate (sapphire substrate, GaN substrate)
12 First semiconductor layer (u-GaN layer)
12a Main surface 12b Crystal growth surface 13 Concave portion (concave groove)
14 Second semiconductor layer (u-InGaN layer)
15 Crystal growth prevention layer (SiO ₂ film)
22 Multiple quantum well layer 22a InGaN layer (quantum well layer)
22b GaN layer (barrier layer)

Claims (10)

A substrate having a first semiconductor layer made of a GaN layer, the principal surface of which is a c-plane and a crystal growth surface different from the principal surface is exposed, and the crystal growth surface of the first semiconductor layer of the substrate is an origin A method of manufacturing a semiconductor light emitting device, wherein a second semiconductor layer made of an InGaN layer is formed on the first semiconductor layer by growing InGaN as a crystal,
A plurality of mask layers are provided on the base substrate in stripes on the base substrate, and undoped GaN is crystal-grown starting from the main surface of the base substrate exposed with a width of 1 to 10 μm from the mask layer, and the first semiconductor layer Produced by forming
In the second semiconductor layer, a facet inclined with respect to the main surface of the first semiconductor layer in the substrate is used as the crystal growth surface, and InGaN is grown from the crystal growth surface as a starting point. It is formed to develop in the normal direction ,
A method for manufacturing a semiconductor light emitting device, wherein a multiple quantum well layer is formed by alternately growing a quantum well layer made of an InGaN layer and a barrier layer made of a GaN layer by epitaxial growth on the second semiconductor layer . In the manufacturing method of the semiconductor light-emitting device according to claim 1 ,
A method for producing a semiconductor light emitting device, wherein the multiple quantum well layer is a green light emitting layer. In the manufacturing method of the semiconductor light-emitting device according to claim 1 or 2 ,
A method for manufacturing a semiconductor light emitting device, wherein a process of planarizing a surface of the second semiconductor layer is performed before forming the multiple quantum well layer. The method for manufacturing a semiconductor light emitting element according to any one of claims 1 to 3,
A method of manufacturing a semiconductor light emitting device, wherein the first and second semiconductor layers or the second semiconductor layer is separated from the substrate. In the manufacturing method of the semiconductor light-emitting device according to claim 1,
A method for manufacturing a semiconductor light emitting device, wherein the thickness of the second semiconductor layer is 2 to 20 μm. In the manufacturing method of the semiconductor light emitting element according to any one of claims 1 to 5,
A method for manufacturing a semiconductor light emitting device, wherein the facet of the crystal growth surface is a (11-22) plane. A substrate having a first semiconductor layer made of a GaN layer, the principal surface of which is a c-plane and a crystal growth surface different from the principal surface is exposed;
A second semiconductor layer composed of an InGaN layer formed on the first semiconductor layer by causing InGaN to grow from the exposed crystal growth surface of the first semiconductor layer of the substrate;
A substrate for a semiconductor light emitting device comprising:
The substrate is provided with a plurality of mask layers in a stripe shape on the base substrate, and undoped GaN is grown from the main surface of the base substrate exposed with a width of 1 to 10 μm from the mask layer, whereby the first semiconductor A layer is formed,
The second semiconductor layer has a facet inclined with respect to the main surface of the first semiconductor layer in the substrate as the crystal growth surface, and InGaN grows from the crystal growth surface as a starting point. A substrate for a semiconductor light emitting element, which is formed so as to extend in a normal direction. InGaN crystal growth starts from the exposed crystal growth surface of the first semiconductor layer in the substrate having the first semiconductor layer made of a GaN layer having a main surface of the c-plane and a crystal growth surface different from the main surface exposed. A semiconductor light emitting device substrate comprising a semiconductor substrate in which a second semiconductor layer comprising an InGaN layer is formed on the first semiconductor layer, and the first and second semiconductor layers are separated from the substrate;
The substrate is provided with a plurality of mask layers in a stripe shape on the base substrate, and undoped GaN is grown from the main surface of the base substrate exposed with a width of 1 to 10 μm from the mask layer, whereby the first semiconductor A layer is formed,
The second semiconductor layer has a facet inclined with respect to the main surface of the first semiconductor layer in the substrate as the crystal growth surface, and InGaN grows from the crystal growth surface as a starting point. A substrate for a semiconductor light emitting element, which is formed so as to extend in a normal direction. A substrate having a first semiconductor layer made of a GaN layer, the principal surface of which is a c-plane and a crystal growth surface different from the principal surface is exposed;
A second semiconductor layer formed on the first semiconductor layer by causing InGaN to grow from the exposed crystal growth surface of the first semiconductor layer of the substrate;
A multiple quantum well layer formed by epitaxial growth on the second semiconductor layer, wherein a quantum well layer made of an InGaN layer and a barrier layer made of a GaN layer are alternately stacked;
A semiconductor light emitting device comprising:
The substrate is provided with a plurality of mask layers in a stripe shape on the base substrate, and undoped GaN is grown from the main surface of the base substrate exposed with a width of 1 to 10 μm from the mask layer, whereby the first semiconductor A layer is formed,
The second semiconductor layer has a facet inclined with respect to the main surface of the first semiconductor layer in the substrate as the crystal growth surface, and InGaN grows from the crystal growth surface as a starting point. A semiconductor light emitting device formed so as to extend in the normal direction. InGaN crystal growth starts from the exposed crystal growth surface of the first semiconductor layer in the substrate having the first semiconductor layer made of a GaN layer having a main surface of the c-plane and a crystal growth surface different from the main surface exposed. A semiconductor substrate in which a second semiconductor layer is formed on the first semiconductor layer, and the first and second semiconductor layers are separated from the substrate ;
A multiple quantum well layer formed by epitaxially growing on the second semiconductor layer of the semiconductor substrate, wherein a quantum well layer made of an InGaN layer and a barrier layer made of a GaN layer are alternately stacked;
A semiconductor light emitting device comprising:
The substrate is provided with a plurality of mask layers in a stripe shape on the base substrate, and undoped GaN is grown from the main surface of the base substrate exposed with a width of 1 to 10 μm from the mask layer, whereby the first semiconductor A layer is formed,
The second semiconductor layer has a facet inclined with respect to the main surface of the first semiconductor layer in the substrate as the crystal growth surface, and InGaN grows from the crystal growth surface as a starting point. A semiconductor light emitting device formed so as to extend in the normal direction.

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