JP5497311B2 - IC with resistance measurement function, IC-mounted panel, and resistance measurement method - Google Patents

Description

  The present invention relates to an IC with a resistance measurement function, an IC-mounted panel, and a resistance measurement method for measuring a resistance value related to a data input line to an IC (Integrated Circuit) while being mounted on a panel substrate.

  When the data input line to the IC mounted on the panel substrate is checked visually or by inference using an optical microscope, the actual resistance value cannot be obtained.

  For example, Patent Document 1 discloses a wiring pattern provided on a circuit board, and a driving circuit electrically connected to the wiring pattern, which relates to a technique for measuring resistance related to a data input line to an IC mounted on a panel board. An electro-optical panel is described that includes a measurement unit that measures connection resistance with an IC inside the driving IC.

  As a prior art document related to the present invention, for example, Patent Document 2 describes a regulator output voltage measurement circuit for measuring the output voltage of a regulator built in an IC chip. Also, for example, Non-Patent Document 1 describes an IC having a bidirectional communication means that implements an I2C (Inter-Integrated Circuit) interface standard.

JP 2004-219155 A JP 2008-309628 A

Philips Semiconductors, “I2C Bus Specification”, ver. 2.1, January 2000, p. 6-13

  For example, the resistance related to the data input line to the liquid crystal driving IC mounted on the liquid crystal display panel is composed of the resistance (wiring resistance) of the data input wiring provided on the liquid crystal display panel and a part of the data input wiring. It is represented by the sum of the connection resistance between the IC connection pad and the IC. Even with such an IC that performs both analog processing and digital processing, such as a liquid crystal driving IC, the resistance related to the data input line to the IC can be more accurately and simply mounted on the panel substrate. It is desirable to be able to measure.

  For example, in Patent Document 1, as a connection resistance measurement function, a connection resistance measurement circuit also serves as a part of an input / output terminal of a driving IC, and between the connection resistance measurement circuit and the input / output circuit to the driving IC. An example is shown in which two input / output circuits are configured by providing a changeover switch and connecting two input / output terminals.

  However, in the configuration described in Patent Document 1, since the connection resistance is measured by connecting two input / output terminals, the obtained connection resistance value is a resistance for two lines, and is determined for each input terminal. An accurate resistance value cannot be obtained. Therefore, there is a problem that it is impossible to determine which terminal causes the connection failure.

  Note that the regulator output voltage measurement circuit described in Patent Document 2 has a Hi-Z (high impedance) input / output circuit at the time of measurement, and is short-circuited by using a switch circuit inside the regulator output terminal and the IC so that the potential is the same. In order to prevent the current from flowing between the terminals and improve the measurement accuracy of the regulator output voltage, the resistance value of the resistor related to the data input line to the IC mounted on the panel substrate can be simplified. It's not about measuring.

  In addition, in an IC having bidirectional communication means that implements the I2C interface standard as described in Non-Patent Document 1, a method of analogizing a resistance value by using a communication line in a pseudo manner is conceivable. There are the following problems.

  FIG. 7 is an explanatory diagram showing a timing chart of the I2C interface standard described in Non-Patent Document 1. FIG. 8 is a block diagram showing a circuit configuration example for realizing data transfer according to the I2C interface standard. As shown in FIGS. 7 and 8, in an IC that implements the I2C interface standard, when data is transferred from the master side device to the slave side device, an ACK signal indicating that the slave side has received data is mastered. There is a timing to transmit to the side. At this timing, the slave side is in transmission mode and the master side is in reception mode.

  FIG. 9 is a logic circuit diagram schematically showing resistors on the data signal line on the slave side in the I2C interface standard described above. In FIG. 9, a resistor R1 is a wiring resistance according to SDA (Serial Data Line). The resistor R2 is a wiring resistance related to SCL (Serial Clock Line) (GND wiring resistance at the time of ACK). As shown in FIG. 9, if the data signal line of the IC on the slave side is used in a pseudo manner, it is possible to calculate the resistance value of R1 + R2 at the time of ACK, but the problem is that it can only be measured at a limited timing. There is. In addition, since measurement is performed in the driving state as described above, the reference level fluctuates depending on the internal circuit operation, so that there is a problem that an accurate resistance value cannot be obtained even when SCL is connected to the reference voltage.

  Accordingly, an object of the present invention is to easily and more accurately measure a resistance value of a resistor related to a data input line to an IC mounted on a panel substrate.

  An IC with a resistance measurement function according to the present invention includes a wiring resistance of a wiring that forms a data input line to the IC when mounted on a panel, and a connection portion (for example, a portion where the data input line is connected to the IC). IC with a resistance measurement function for measuring the input line resistance represented by the sum of the connection resistance with the IC at the IC connection pad), and the control voltage for switching to the resistance measurement mode for measuring the input line resistance is When input, switch circuits (for example, switch circuits 51-1 to 51-51) that connect all data input circuits (for example, data input circuits 33-1 to 33-n) to a processing block that performs logic processing to a reference voltage. -N) and a control circuit (for example, the measurement control circuit 54) for stopping the analog processing are provided.

  In addition, the resistance measurement function-equipped IC provides a control signal for deactivating a charge pump unit (for example, the charge pump unit 41) that generates a drive voltage for a processing block that performs analog processing by a control circuit that stops analog processing. A circuit that inputs to the charge pump unit may be used.

  Further, the IC mounting panel according to the present invention includes a wiring resistance of a wiring that forms a data input line to the IC mounted on the panel, and a connection resistance between the data input line and the IC at a connection portion where the data input line is connected to the IC. When the control voltage for switching to the resistance measurement mode for measuring the input line resistance is input, the panel mounted on the IC for measuring the input line resistance represented by the sum of An IC (for example, driving IC 12) provided with a switch circuit for connecting all data input circuits to a reference voltage and a control circuit for stopping analog processing is mounted, and a plurality of reference voltages provided in the IC One reference voltage connection wiring (for example, connection wiring 131b) is connected to the connection terminal, and the reference voltage connection wiring is provided in the IC. The wiring resistance is lower than the data wiring (for example, the connection wiring 131a) connected to the data input terminal which is a terminal connected to any of the data input circuits, and the switch circuit is When a control voltage for switching to the resistance measurement mode for measuring the input line resistance is input, a data input terminal (for example, a data line constituting the data input line to be measured is connected in the IC (for example, Any one of the logic data connection terminals 32-1 to 32-n) is electrically connected to at least one of the plurality of reference voltage connection terminals (for example, the reference voltage connection terminal 34).

  In addition, the resistance measuring method according to the present invention includes a wiring resistance of a wiring that forms a data input line to the IC when mounted on a panel, and a connection between the data input line and the IC at a connection portion where the data input line is connected to the IC. A resistance measurement method for measuring an input line resistance represented by a sum of resistances, wherein all data input circuits to a processing block that performs logic processing inside the IC are used as a reference voltage. A predetermined control voltage is input to a control pin for controlling a switch circuit to be connected and a control circuit for stopping analog processing, and all data input circuits are connected to a reference voltage and analog processing is stopped to perform measurement. After providing an external resistor on the target data input line, apply the specified power supply voltage and measure the voltage on the target data input line , From the value of the measured voltage and the value of the applied power supply voltage, by using the resistance of the external resistor, characterized by deriving a resistance value of the input line resistance.

  According to the present invention, when a control voltage for switching to the resistance measurement mode is input to the IC mounted on the panel substrate, the switch that connects all the data input circuits to the processing block that performs logic processing to the reference voltage Since the circuit and the control circuit for stopping the analog processing are provided, the digital processing and the analog processing can be inactivated during the inspection. Therefore, by measuring the panel terminal voltage V of each data input line by giving a known output voltage V0 and an external resistance Rt in that state, the resistance value of the resistance related to the data input line to the IC mounted on the panel substrate is obtained. It can be measured easily and more accurately.

It is explanatory drawing which shows an example of an IC mounting panel. It is explanatory drawing which shows the usage example of bump of drive IC12 which concerns on this invention. It is a block diagram which shows the circuit structural example inside the drive IC12 which concerns on this invention. 4 is an explanatory diagram illustrating an example of input / output lines and pin arrangement of a charge pump unit 41. FIG. 3 is an explanatory diagram showing a circuit configuration example of a charge pump unit 41. FIG. It is explanatory drawing which shows the connection state of the input data line in a measurement mode. It is explanatory drawing which shows the timing chart of a certain I2C interface specification. FIG. 8 is a block diagram illustrating a circuit configuration example for realizing data transfer according to the I2C interface standard illustrated in FIG. 7. FIG. 8 is a logic circuit diagram schematically showing resistors on the data signal line on the slave side in the I2C interface standard shown in FIG. 7.

  Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. FIG. 1 is an explanatory view showing an example of an IC mounting panel. The IC mounting panel shown in FIG. 1 has a driving IC 12 on a panel substrate (for example, a glass substrate) 11 constituting a part of the liquid crystal display panel 10 and a connecting portion 13 for connecting to the driving IC 12 from outside the panel. And are arranged.

  The driving IC 12 is provided with a plurality of bumps 121 for inputting / outputting control signals and data signals, supplying power, and the like with the integrated circuit formed in the driving IC 12. Each bump 121 is electrically connected to the IC connection pad 132 on the connection wiring 131 having the connection portion 13 as one end point, so that control signals and data signals can be input from the outside of the panel via the connection portion 13. Provides output and power supply.

  FIG. 2 is an explanatory view showing a usage example of the bumps of the driving IC 12 according to the present invention. Bumps related to power supply (logic processing power supply, analog processing power supply, VSS connection, etc.) provided in the driving IC 12 are multi-bumps (a plurality of bumps are combined into one bump as shown in FIG. It refers to a form used for wiring connection) and is preferably provided at multiple locations. In the example shown in FIG. 2, the connection wiring 131a for data input is connected to one bump 121, whereas the connection wiring 131b for VSS connection has a wiring width wider than that of the connection wiring 131a. The bumps 121 are connected.

  FIG. 3 is a block diagram showing a circuit configuration example inside the driving IC 12 according to the present invention. As shown in FIG. 3, the driving IC 12 includes, as components for driving the liquid crystal, a charge pump unit 41, a logic unit 42, a level conversion unit 43, a liquid crystal output unit 44, and a liquid crystal driving voltage connection. Terminals (liquid crystal output pins) 37-1 to 37-m, an analog processing power supply connection terminal (analog power supply pin) 36, a logic processing power supply connection terminal (logic power supply pin) 35, and a reference voltage connection terminal (VSS connection). Pin) 34 and logic data connection terminals (data input pins) 32-1 to 32-n. In the example shown in FIG. 3, only one VSS connection pin 34 is shown, but a plurality of VSS connection pins 34 are provided.

  Furthermore, in the present embodiment, the switch circuits 51-1 to 51-n are provided on the data input circuits 33-1 to 33-n to the logic unit 42, and the switch circuits 51-1 to 51-n and the charge pump unit 41. Includes control circuits 53 and 54 for measurement and a control pin 31 for inputting a control signal. Further, a logic conversion circuit 52 that converts the control voltage input to the control pin 31 to a control signal corresponding to each measurement control circuit 53, 54 by performing predetermined level conversion as necessary, and outputs the control signal. May be included.

  For example, when the switch circuits 51-1 to 51-n are designed to enter the measurement mode when a high-level control voltage is input, the user wants to switch to the measurement mode by inputting a low-level control voltage. In this case, the logic conversion circuit 52 converts the voltage level input from the user and outputs it to the measurement control circuit 53, thereby inputting the control signals corresponding to the switch circuits 51-1 to 51-n.

  The charge pump unit 41 is a circuit that generates internal power necessary for the driving IC. More specifically, a driving voltage for liquid crystal is generated for the liquid crystal output unit 44 that performs analog processing. In the present embodiment, when a predetermined voltage is input, the charge pump unit 41 has a function of stopping the operation (at least the drive voltage generating operation). The function of stopping the operation of the charge pump unit 41 will be described later.

  The logic unit 42 processes various signals such as input video signals and control signals, and outputs the signals to the liquid crystal output unit 44 via the level conversion unit 43 as control signals to the liquid crystal output unit 44 as necessary. .

  The level conversion unit 43 converts the level of the control signal from the logic unit 42 into the drive voltage level of the liquid crystal output unit 44.

  The liquid crystal output unit 44 sets a potential for driving the liquid crystal cell to the transparent electrode corresponding to each pixel in accordance with a control signal from the logic unit 42.

  The switch circuits 51-1 to 51-n perform switch switching so that the data input circuits 33-1 to 33-n to the logic unit 42 are connected to the reference voltage VSS when a predetermined voltage is input. It is. In this embodiment, when a control voltage is input to the control pin 31, it is input as a control signal to all the switch circuits 51-1 to 51-n via the logic conversion circuit 52 and the measurement control circuit 53. By this control signal, all the switch circuits 51-1 to 51-n are turned on, and all the data input circuits 33-1 to 33-n are connected to the reference voltage VSS. By connecting all the data input circuits 33-1 to 33-n to the reference voltage VSS, the data signal is prevented from being input to the logic unit 42 and the inside of the IC is digitally inactivated including malfunction caused by noise. .

  The reference voltage VSS is a common reference voltage for both the circuit operation system and the measurement system, and may be referred to as a ground (GND). Note that the reference voltage VSS only needs to flow from V0 to VSS in relation to the external voltage V0 connected at the time of measurement.

  When a control voltage is input to the control pin 31, it is input as a control signal to the charge pump unit 41 via the logic conversion circuit 52 and the measurement control circuit 54. The charge pump unit 41 is deactivated by this control signal. The control signal for deactivating the charge pump unit 41 may be, for example, a control signal for stopping clock oscillation. Further, for example, it may be a control signal that keeps resetting so as not to cancel the reset signal. By disabling the charge pump unit 41, power supply necessary for analog processing is not performed, and the inside of the IC can be disabled in an analog manner.

  FIG. 4 is an explanatory diagram illustrating an example of input / output lines and pin arrangement of the charge pump unit 41. FIG. 5 is an explanatory diagram showing a circuit configuration example of the charge pump unit 41. As shown in FIG. 4, the charge pump unit 41 includes a SHDN signal on the input line as a control signal for deactivating the charge pump unit 41. Further, as shown in FIG. 5, the charge pump unit 41 includes a start switch control circuit unit 41a, a CR oscillation circuit unit 41b, and a charge pump circuit unit 41c. In this embodiment, when the ¬SHDN signal is at a low level, the start switch control circuit unit 41a stops the start signal to the CR oscillation circuit unit 41b and stops it so that the charge pump unit 41c does not output a clock. It has become. That is, the circuit configuration stops the oscillation of the clock when the −SHDN signal is at the low level.

  In the present embodiment, regarding the ON / OFF logic of the control voltage input to the control pin 31, an example in which the logic conversion circuit 52 is provided so as to switch to the measurement mode with the ON / OFF logic desired by the user is shown. The ON / OFF logic based on the control voltage level input to the control pin 31, the ON / OFF logic of the control signal for the switch circuits 51-1 to 51-n, and the ON / OFF logic of the control signal for the charge pump unit 41 are provided. If they match, the logic conversion circuit 52 can be omitted.

  Next, the resistance measuring method according to the present invention will be described. The resistance measurement method according to the present invention is performed as follows using the panel substrate 11 on which the driving IC 12 described above is mounted. The panel substrate 11 is provided with an inspection control pad connected to the control pin 31 of the driving IC 12, and a switch to the measurement mode is connected to the end of the wiring. After the power is turned on, the control voltage is input to the control pin 31 by switching to the measurement mode using the changeover switch, and provided in the data input circuits 33-1 to 33-n connected to the data input pins 32-1 to 32-n. The switch circuits 51-1 to 51-n are turned on and connected to the reference voltage VSS, and a control signal for stopping oscillation of the clock signal is input to the charge pump unit 41. As a result, all internal operations (digital processing and analog processing) of the IC are deactivated only by supplying power to the IC, and an increase or fluctuation in the reference potential is eliminated.

  Then, an external resistance Rt is provided on a data input line (hereinafter referred to as a measurement target line) whose resistance value is to be measured, and then the voltage V on the measurement target line is measured. FIG. 6 is an explanatory diagram showing a connection state of data input lines in the measurement mode.

  As shown in FIG. 6, the known output voltage connected to one end of the external resistor is V0, the connection resistance value between the IC connection pad 132 and the IC bump 121 on the connection wiring 131a of the measurement target line is Rc1, The wiring resistance of the connection wiring 131a is Rl1, and the connection resistance value between the IC connection pad 132 on the VSS connection wiring 131b connected by the switch circuit provided in the data input circuit connected to the bump 121 and the bump 121 of the IC is Rc2. When the wiring resistance of the connection wiring 131b is Rl2, the voltage (panel terminal voltage) V at the measurement point is expressed by the following equation (1).

V = V0 * (Rl1 + Rc1 + Rl2 + Rc2) / ((Rt + Rl1 + Rc1 + Rl2 + Rc2)) (1)
However, Rl1 >> Rl2, Rc1 >> Rc2

  Note that since the VSS side wiring width is thicker than the V0 side data wiring width and the wiring resistance is low, and the number of bumps used for the VSS wiring is larger than the number of bumps used for the data wiring, the expression (1) The wiring resistance Rl2 and the connection resistance Rc2 can be generalized to the following formula (2) under the condition that the wiring resistance Rl1 and the connection resistance Rc1 on the V0 side are sufficiently small. In Equation (2), Rl represents the wiring resistance of the measurement target line, and Rc represents the connection resistance between the measurement target line and the IC.

V = V0 * Rt / (Rc + Rl + Rt) (2)
→ Rl + Rc = V0 * Rt / V-Rt (3)

  Since Expression (3) is derived from Expression (2), the resistance value (connection resistance value Rc + wiring resistance value Rl) related to the input data line can be easily obtained.

  As described above, according to the present embodiment, the known output voltage V0 and the external resistance are reduced by setting all the data input circuits to the reference voltage VSS (for example, 0 potential) by the switch and stopping the internal operation at the time of inspection. By simply giving the Rt and measuring the panel terminal voltage V of each data input line, the connection state and wiring state of each data input pin can be easily identified by the numerical value of the resistance value, and the module quality can be easily and reliably grasped. Is possible.

  Even if an abnormal value appears, it can be easily discarded or repaired by using a numerical standard. In addition, since the measurement can be performed with the IC mounted, the situation after aging can be quantified and the reliability condition can be set.

  In this embodiment, the case where the IC mounting panel is a panel substrate constituting a part of the liquid crystal display panel has been described as an example. However, the panel substrate constituting a part of the organic EL display panel may be used. Further, the IC mounting panel is not limited to the display panel, and may be any panel substrate as long as the circuit substrate is mounted with an IC. Further, the mounted IC is not limited to the driving IC.

  The present invention can be suitably applied to a device (for example, a liquid crystal display device) in which an IC that performs both analog processing and digital processing is mounted on a panel substrate.

10 Liquid crystal display panel 11 Panel substrate 12 Driving IC
121 Bump 13 Connection part 131 Connection line 131a Data input connection line 131b VSS connection connection line 132 IC connection pad 31 Control pin 32-1 to 32-n Logic data connection terminal (data input pin)
33-1 to 33-n Data input circuit 34 Reference voltage connection terminal (VSS connection pin)
35 Power connection terminal for logic processing (logic power supply pin)
36 Analog processing power supply connection terminal (analog power supply pin)
37-1 to 37-m Liquid crystal drive voltage connection terminal (liquid crystal output pin)
41 charge pump unit 42 logic unit 43 level conversion unit 44 liquid crystal output unit 51-1 to 51-n switch circuit 52 logic conversion circuit 53, 54 measurement control circuit

Claims (4)

It is represented by the sum of the wiring resistance of the wiring that forms the data input line to the IC when mounted on the panel and the connection resistance with the IC at the connection portion where the data input line is connected to the IC. An IC with a resistance measurement function for measuring input line resistance,
When a control voltage for switching to the resistance measurement mode for measuring the input line resistance is input, a switch circuit that connects all data input circuits to a processing block that performs logic processing to a reference voltage, and analog processing is stopped. An IC with a resistance measuring function, characterized in that a control circuit is provided. 2. The resistance according to claim 1, wherein the control circuit that stops the analog processing is a circuit that inputs a control signal that deactivates a charge pump unit that generates a drive voltage for a processing block that performs analog processing to the charge pump unit. IC with measurement function. The input represented by the sum of the wiring resistance of the wiring forming the data input line to the IC mounted on the panel and the connection resistance with the IC at the connection portion where the data input line is connected to the IC IC mounting panel for measuring line resistance,
When a control voltage for switching to the resistance measurement mode for measuring the input line resistance is input, a switch circuit that connects all data input circuits to a processing block that performs logic processing to a reference voltage, and analog processing is stopped. It is equipped with an IC equipped with a control circuit,
One reference voltage connection wiring is connected to a plurality of reference voltage connection terminals provided in the IC,
The reference voltage connection wiring has a lower wiring resistance than a data wiring connected to a data input terminal which is a terminal provided in the IC and connected to one of the data input circuits. Formed,
When a control voltage indicating that the switch circuit is switched to a resistance measurement mode for measuring the input line resistance is input, data wiring constituting a data input line to be measured is connected in the IC. An IC-mounted panel, wherein a data input terminal is electrically connected to at least one of the plurality of reference voltage connection terminals. It is represented by the sum of the wiring resistance of the wiring that forms the data input line to the IC when mounted on the panel and the connection resistance with the IC at the connection portion where the data input line is connected to the IC. A resistance measurement method for measuring input line resistance,
Control for controlling a switch circuit for connecting all data input circuits to a processing block for performing logic processing inside the IC to a reference voltage and a control circuit for stopping analog processing provided in the IC Input a predetermined control voltage to the pin, connect all data input circuits to the reference voltage and stop analog processing,
After providing an external resistor on the data input line to be measured, apply a predetermined power supply voltage, measure the voltage on the data input line to be measured,
A resistance measurement method comprising: deriving a resistance value of the input line resistance from the measured voltage value using the value of the applied power supply voltage and the resistance value of the external resistance.

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