JP5198326B2 - Resistance measuring device - Google Patents

Description

  The present invention relates to a resistance measuring device that measures a resistance value of a circuit to be measured.

  As this type of resistance measuring apparatus, a resistance measuring apparatus disclosed in Patent Document 1 below is known. This resistance measuring device is a transformer for injection that clips a connection conductor of a measurement circuit network and injects into the measurement circuit a current of a second frequency that can be distinguished from the current of the first frequency flowing in the measurement circuit network (measurement object). And a detection transformer for detecting the two kinds of currents flowing through the measurement circuit network by clipping them to the connecting conductor, and a frequency selective amplifier circuit for extracting a second frequency component from the output of the detection transformer, A rectifying and amplifying circuit for rectifying and amplifying the signal output from the frequency selective amplifier circuit, and an indicator driven by the signal output from the rectifying and amplifying circuit, and the injection transformer is an output of the oscillator A voltage supplied to the injection coil so that the voltage induced in the feedback coil is controlled to a constant value. Variable It is configured to include a Unishi was feedback loop. In this resistance measuring apparatus, the injection voltage obtained by dividing the voltage induced in the feedback coil by the ratio of the number of windings of the feedback coil to the number of connection wires (number of clips, one) of the measurement network is also a constant value. Therefore, the resistance value of the resistor connected to the detection transformer is detected by detecting the voltage generated in the resistor connected to the detection transformer due to the current flowing in the detection transformer. Based on the voltage generated in this resistor, the voltage generated in the feedback coil, the number of turns of the injection transformer and the number of turns of the detection transformer, the value of the resistance element connected to the measurement network (measured resistance) is measured. It is possible to do.

Japanese Examined Patent Publication No. 2-7031 (page 1-4, Fig. 2)

  However, the above resistance measuring apparatus has the following problems. That is, in this type of resistance measuring device, the rectifying and amplifying circuit that generates the signal supplied to the indicator is usually configured as a DC amplifying circuit, and the signal output from the frequency selective amplifier circuit (the resistance value of the measuring circuit network). (A signal containing a DC component proportional to) is DC amplified and supplied to the indicator. However, in the configuration employing DC amplification, there arises a problem that the dynamic reserve is deteriorated and noise resistance is lowered. In addition, it is necessary to use an operational amplifier having a small offset as an operational amplifier for constituting the rectifying and amplifying circuit. However, since such an operational amplifier is expensive, there is a problem that the apparatus cost is increased.

  The present invention has been made to solve such problems, and a main object of the present invention is to provide a resistance measuring device that can avoid deterioration of dynamic reserve and increase in device cost.

  In order to achieve the above object, a resistance measuring apparatus according to claim 1, wherein a voltage injection unit for injecting an inspection AC signal into a circuit to be measured by applying an AC voltage to an injection coil, and injection of the inspection AC signal Based on the voltage value of the injected alternating current signal for inspection and the measured current value of the alternating current, the current measuring unit that detects and measures the alternating current flowing through the circuit to be measured due to the detection coil A resistance measuring device including a processing unit for calculating a resistance value of a circuit to be measured, wherein the voltage injection unit intermittently executes the application of the AC voltage and is synchronized with the applied AC voltage. A reference signal generation unit configured to generate a quantified signal and output the signal as a reference signal, wherein the current measurement unit converts a current flowing in the detection coil due to the injection of the inspection AC signal into a voltage signal; Strange A synchronous detection circuit that synchronously detects the voltage signal using the reference signal, a DC removal circuit that integrates a detection output signal output from the synchronous detection circuit and removes a DC component to output an AC component; and An AC amplifier circuit for amplifying the AC component is provided to measure the current value of the AC current.

  The resistance measurement device according to claim 2 is the resistance measurement device according to claim 1, wherein the reference signal generation unit includes a comparator that generates the binarized signal based on the applied AC voltage. ing.

  In the resistance measuring device according to the first aspect, the voltage injection unit intermittently executes the application of the AC voltage to the injection coil, thereby generating the AC signal for inspection in the circuit to be measured. Further, the reference signal generation unit generates a binarized signal synchronized with the applied AC voltage and outputs it as a reference signal. In the current measurement unit, the current-voltage conversion circuit converts the current flowing in the detection coil due to the injection of the AC signal for inspection into a voltage signal, and the synchronous detection circuit synchronizes the voltage signal with the reference signal. The DC removal circuit detects the DC component included in the detection output signal output from the synchronous detection circuit and outputs an AC component, and the AC amplifier circuit amplifies and outputs the AC component.

  Therefore, according to this resistance measuring apparatus, unlike the configuration employing DC amplification, the voltage signal necessary for measurement of the detected current flowing in the circuit to be measured is AC-amplified as an AC signal by the AC amplification unit. The deterioration of the reserve can be avoided, and the decrease in noise resistance can also be avoided. Further, when configuring the AC amplifying unit, it is not necessary to use an expensive operational amplifier with a small offset as in the case of DC amplification, so that the cost of the current measuring unit and thus the resistance measuring device can be reduced.

  Further, according to the resistance measuring apparatus of the second aspect, since the reference signal generating unit is configured by including the comparator that generates the binarized signal based on the AC voltage, the binary value can be obtained from the AC voltage with a simple configuration. Can be generated reliably.

1 is a configuration diagram showing a configuration of a resistance measuring device 1. FIG. FIG. 4 is a circuit diagram of a current measurement unit 42 excluding an LPF 68, an HPF 69, an AC amplification unit 70, and an A / D conversion unit 71. FIG. 6 is a waveform diagram for explaining the operation of a current measuring unit 42. 4 is a flowchart for explaining resistance measurement processing by the resistance measuring apparatus 1;

  Embodiments of a resistance measuring device according to the present invention will be described below with reference to the accompanying drawings.

  First, the configuration of the resistance measuring apparatus 1 according to the present invention will be described with reference to the drawings.

  A resistance measuring device 1 shown in FIG. 1 includes a clamp portion 2 and a device main body portion 4 connected to the clamp portion 2 via a cable 3 and measures a resistance value Rx of a resistance (loop resistance) of a measurement target circuit 5. It is configured to be possible.

  As shown in FIG. 1, the clamp unit 2 includes an injection clamp unit 11, a detection clamp unit 21, and a housing 31. As an example, in this example, the injection clamp unit 11 includes a first annular core 12 divided into two parts, and a first winding 13 (known number of turns) as an injection coil wound around the first annular core 12. : N1). The detection clamp unit 21 includes a second annular core 22 divided into two parts, and a second winding 23 wound around the second annular core 22 (detection coil (known number of turns: N2) in the present invention). )have. The injection clamp part 11 and the detection clamp part 21 are housed together in a clamp-type resin housing 31 whose tip can be freely opened and closed. The two annular cores 22 are configured to open and close simultaneously. With this configuration, each of the first annular core 12 and the second annular core 22 that are in the open state can be obtained by introducing the wiring 5a that constitutes a part of the circuit to be measured 5 inside the housing 31 in the open state. The wiring 5a is also introduced inside, and in this state, the housing 31 is closed, so that the wiring 5a is simultaneously clamped by the closed first annular core 12 and the second annular core 22, that is, the clamp The wiring 2a is clamped by the part 2. In this case, the wiring 5 a functions as a one-turn winding in the first annular core 12 and the second annular core 22.

  As shown in FIG. 1, the apparatus body 4 includes a voltage injection unit 41, a current measurement unit 42, a processing unit 43, an output unit 44, and a reference signal generation unit 45. The voltage injection unit 41 includes a triangular wave generation unit 51, a low-pass filter (hereinafter also referred to as “LPF”) 52, a power amplification unit 53, and an injection clamp unit 11. In this case, the triangular wave generation unit 51 is configured to include a D / A converter as an example, and is based on the triangular wave generation data Ds output from the processing unit 43 at regular time intervals T2 with a constant time interval T1. As shown in FIG. 1, a triangular wave signal Ss (step wave) is generated intermittently (according to other expressions, intermittently) and output. The LPF 52 receives the triangular wave signal Ss and mainly passes its fundamental frequency component (frequency f, about 100 Hz in this example), and attenuates the level of, for example, three times or more harmonic components, as shown in FIG. An alternating voltage (pseudo sine wave signal) Va is converted and output.

  In this example, the power amplifying unit 53 is configured as a class D amplifier, for example, and amplifies the AC voltage Va with a predetermined amplification factor, and an AC voltage V1 having a predetermined voltage value (voltage effective value in this example). And the generated AC voltage V1 is applied to the first winding 13 of the injection clamp unit 11. In this case, since the triangular wave signal Ss is a signal generated intermittently as described above, the power amplifier 53 also generates the AC voltage V1 intermittently and applies it to the first winding 13.

  For example, the power amplifying unit 53 compares the sawtooth signal and the AC voltage Va with a signal generation circuit that generates a sawtooth signal having a constant frequency, and compares the sawtooth signal with the AC voltage Va to obtain a pulse width proportional to the amplitude of the AC voltage Va. A PWM signal generation circuit that generates a pulse signal (PWM signal) having a predetermined period in which (duty ratio) changes, a class D power amplification circuit that amplifies the power of the PWM signal, and an output signal from the class D power amplification circuit And a low-pass filter circuit that generates an AC voltage V1 by performing a filtering process. As a result, a test AC signal Vx having a predetermined frequency f and a predetermined voltage effective value is injected into the measurement target circuit 5 via the injection clamp unit 11. In this case, since the wiring 5a functions as a one-turn winding in the first annular core 12 as described above, the voltage value of the test AC signal Vx injected into the circuit to be measured 5 turns the AC voltage V1. A voltage value (Vx = V1 / N1) obtained by dividing by the number N1 is obtained. Since the wiring 5a functions as a one-turn winding in the second annular core 22, the detection clamp unit 21 detects the alternating current Ix flowing through the circuit to be measured 5, and the detection current (the main current is supplied to the second winding 23). In the present invention, the current I1 (= Ix / N2) flowing through the detection coil is output.

  The current measurement unit 42 includes a detection clamp unit 21, a first amplification unit 61, a first bandpass filter (hereinafter also referred to as “first BPF”) 62, a first switching unit 63, a second amplification unit 64, and a second bandpass. Filter (hereinafter also referred to as “second BPF”) 65, second switching unit 66, third amplification unit 67, low-pass filter (hereinafter also referred to as “LPF”) 68, high-pass filter (hereinafter also referred to as “HPF”) 69 The AC amplifying unit 70 and the A / D converting unit 71 are configured so that the detection clamp unit 21 can detect the AC current Ix and measure the current value.

  In this case, the first amplifying unit 61 functions as a current-voltage conversion circuit in the present invention, is connected to one end of the second winding 23, and converts the detection current I1 generated at this one end into the first voltage signal Vb1. And output. For example, as shown in FIG. 2, the first amplifying unit 61 includes a first operational amplifier 61a, resistors 61b, 61c, 61d, and a first capacitor 61e. In this case, the first operational amplifier 61a has an inverting input terminal directly connected to one end of the second winding 23, a resistor 61b connected as a feedback resistor between the inverting input terminal and the output terminal, and a non-inverting input terminal. Is grounded through the resistor 61c (an example in which a reference voltage (ground) is input), and the input detection current I1 is converted into a voltage signal Vb (a signal whose amplitude changes in proportion to the current value of the detection current I1). And output. The first capacitor 61e is disposed downstream of the first operational amplifier 61a (in this example, one end thereof is directly connected to the output terminal of the first operational amplifier 61a), and the DC component contained in the voltage signal Vb is reduced. Remove. The other end of the first capacitor 61e is grounded via a resistor 61d. As a result, the voltage signal Vb from which the DC component is removed in the first capacitor 61e is defined as the first voltage signal Vb1, which is an AC signal whose DC level is regulated to the ground potential (zero volts) and changes around zero volts. 1 is output from the amplifying unit 61.

  The first BPF 62 removes (filters) the harmonic component of the AC voltage Va included in the input first voltage signal Vb1, and outputs the first voltage signal Vb2. Specifically, the first BPF 62 selectively (mainly, the fundamental frequency component of the AC voltage Va included in the first voltage signal Vb1 (the component of the frequency f, which is also the fundamental frequency component of the test AC signal Vx)). ) The first voltage signal Vb2 is output by passing it through. The first switching unit 63 is composed of, for example, an analog switch, and functions as a synchronous detection circuit in the present invention. The first switching unit 63 is synchronized with the reference voltage Sr output from the reference signal generation unit 45 (in synchronization with the AC voltage Va (in phase)) As shown in FIG. 3, the first voltage signal Vb2 and a second voltage signal Vc2 (described later) output from the second BPF 65 are switched by half a cycle and output in synchronization with the pulse signal having a duty ratio of 0.5. (Synchronous detection is performed). Thus, the first switching unit 63 generates a positive polarity signal (synchronous detection signal) Vd that is a pulsating signal composed of the positive side waveform of the first voltage signal Vb2 and the positive side waveform of the second voltage signal Vc2. Output.

  The second amplifying unit 64 functions as a current-voltage conversion circuit in the present invention, is connected to the other end of the second winding 23, and converts the detection current I1 generated at the other end into the second voltage signal Vc1. Output. Further, as shown in FIG. 2 as an example, the second amplifying unit 64 includes a second operational amplifier 64a, resistors 64b, 64c, 64d, and a second capacitor 64e, and is configured in the same manner as the first amplifying unit 61. Yes. In this case, the second operational amplifier 64a has an inverting input terminal directly connected to the other end of the second winding 23, a resistor 64b connected as a feedback resistor between the inverting input terminal and the output terminal, and a non-inverting input. The terminal is grounded via the resistor 64c (an example in which a reference voltage (ground) is input), and the input detection current I1 is changed to a voltage signal Vc (the amplitude changes in proportion to the current value of the detection current I1 and the voltage Converted to a signal having a polarity opposite to that of the signal Vb). The second capacitor 64e is disposed after the second operational amplifier 64a (in this example, one end thereof is directly connected to the output terminal of the second operational amplifier 64a), and the DC component contained in the voltage signal Vc is reduced. Remove. The other end of the second capacitor 64e is grounded via a resistor 64d. As a result, the voltage signal Vc from which the DC component is removed in the second capacitor 64e is defined as the second voltage signal Vc1 which is an AC signal whose center level is zero volts with the DC level defined as the ground potential (zero volts). 2 is output from the amplifying unit 64. Here, the detection current I1 generated at the other end of the second winding 23 has a phase inverted from that of the detection current I1 generated at one end. Therefore, the second operational amplifier 64a converts the input detection current I1 into a voltage signal Vc whose phase is inverted from that of the voltage signal Vb and outputs the voltage signal Vc. As a result, the second amplifying unit 64 generates and outputs the second voltage signal Vc1, which is an AC signal that changes around zero volts and whose phase is inverted from that of the first voltage signal Vb1.

  The second BPF 65 is configured as a band-pass filter similar to the first BPF 62, and removes the harmonic component of the AC voltage Va included in the input second voltage signal Vc1 (filtering process) to obtain the second voltage. Output as signal Vc2. The second switching unit 66 has the same configuration as the first switching unit 63, functions as a synchronous detection circuit in the present invention, and synchronizes with the reference signal Sr, and as shown in FIG. 3, the first voltage signal Vb2 And the second voltage signal Vc2 are switched by half a cycle and output (synchronous detection), thereby generating a pulsating signal composed of a negative waveform of the first voltage signal Vb2 and a negative waveform of the second voltage signal Vc2. A certain negative polarity signal (synchronous detection signal) Ve is generated and output.

  The third amplifying unit 67 functions as a synchronous detection circuit in the present invention together with the switching units 63 and 66, and inputs the positive signal Vd and the negative signal Ve, and finally calculates the difference between these signals Vd and Ve. Output as a synchronous detection signal (detection output signal in the present invention) Vf. In this example, as shown in FIG. 2, for example, the third amplifying unit 67 includes an operational amplifier 67a, a resistor 67b connected between the first switching unit 63 and the non-inverting input terminal of the operational amplifier 67a, 2 a resistor 67c connected between the switching unit 66 and the inverting input terminal of the operational amplifier 67a, a resistor 67d connected between the inverting input terminal and the output terminal of the operational amplifier 67a, and a non-inverting input of the operational amplifier 67a. A resistor 67e connected between the terminal and a reference voltage (ground in this example) is provided to constitute a differential amplifier. With this configuration, as shown in FIG. 3, the third amplifying unit 67 generates a differential signal that is a pulsating flow signal having a positive waveform in synchronization with the positive signal Vd and the negative signal Ve, as shown in FIG. , Ve is calculated and generated and output as a synchronous detection signal Vf. Since the synchronous detection signal Vf is generated as described above based on the voltage signals Vb and Vc whose amplitude is proportional to the current value of the detection current I1, the amplitude of the synchronous detection signal Vf itself is the current of the detection current I1. It is proportional to the value.

  The LPF 68 includes a low-pass filter in which the cutoff frequency fc1 is set to a frequency slightly higher than 1 / (T1 + T2). In this example, as an example, both T1 and T2 are defined as 0.5 sec (seconds), and therefore the cutoff frequency fc1 is defined as 10 Hz that is slightly higher than 1 Hz. For this reason, the LPF 68 functions as an integrator with respect to the synchronous detection signal Vf having a frequency twice the frequency f (100 Hz in this example) of the AC voltage Va, and as shown in FIG. A voltage signal Vg approximating the envelope is generated and output. The HPF 69 includes a high-pass filter in which the cutoff frequency fc2 is set to a frequency sufficiently lower than 1 / (T1 + T2). In this example, as an example, the cut-off frequency fc2 is defined as 0.1 Hz which is sufficiently lower than 1 Hz. For this reason, as shown in FIG. 3, the HPF 69 removes the DC component included in the voltage signal Vg and outputs the AC component as the voltage signal Vh. With the above configuration, the LPF 68 and the HPF 69 function as a DC removal circuit in the present invention, and execute integration and DC component removal for the synchronous detection signal Vf. The AC amplifier 70 includes an operational amplifier and is configured as an AC amplifier circuit according to the present invention. The AC amplifier 70 receives the voltage signal Vh, amplifies it with a predetermined amplification factor, and outputs the voltage signal Vi. The A / D converter 71 converts the voltage signal Vi into digital data and outputs it as current data Di. In this case, the amplitude (Vmax−Vmin described later) of the voltage signal Vi indicated by the current data Di is data representing the amplitude of the detection current I1. The amplitude of the alternating current Ix flowing through the measurement target circuit 5 is uniquely determined based on the amplitude of the detection current I1 and the specification of the detection clamp unit 21. For this reason, it can be said that the current measurement unit 42 also executes the measurement of the alternating current Ix flowing through the measurement target circuit 5 together with the measurement of the detection current I1.

  The reference signal generation unit 45 includes a comparator 81 and a D-type flip-flop (hereinafter also referred to as “DFF”) 82, and functions as a comparator according to the present invention as a whole. Based on the AC voltage V 1, the reference signal (in the present invention) A binary signal Sr is generated and output. Specifically, the comparator 81 is configured as a hysteresis type as an example in the present example while the comparison voltage value Vref is defined as zero volts. With this configuration, the comparator 81 compares the alternating voltage V1 that is a pseudo sine wave signal with the comparison voltage value Vref, so that the polarity is inverted at the zero cross of the alternating voltage V1 and the duty ratio is 0.5. The pulse signal is converted into a primary binarized signal Sr0 (a signal generated by binarizing the AC voltage V1 before the reference signal Sr as the final binarized signal. Hereinafter, simply referred to as “binarized signal Sr0”. Generated) and output. Further, since the comparator 81 is a hysteresis type, when the voltage value of the AC voltage V1 exceeds the comparison voltage value Vref, the comparison voltage value Vref is lower than zero volts, so that noise superimposed on the AC voltage V1. As a result, unnecessary inversion of the polarity of the binarized signal Sr0 can be avoided. As a result, the influence of noise is reduced and the measurement accuracy of the resistance value Rx is further improved. The DFF 82 synchronizes the binarized signal Sr0 input to the D input terminal with the reference clock CLK input to the clock terminal CK (the rising and falling edges of the binarized signal Sr0 are the rising (or rising) of the reference clock CLK. The reference signal Sr as the final binarized signal is output. When the phase shift of the detection current I1 with respect to the AC voltage V1 is small, the binarized signal Sr0 may be supplied to the switching units 63 and 66 as the final binarized signal instead of the reference signal Sr for operation. Therefore, a configuration in which the DFF 82 is omitted may be employed.

  The processing unit 43 includes a CPU and a memory (both not shown), and executes a resistance measurement process. The output unit 44 includes a monitor device as an example, and displays the result of the resistance measurement process.

  Next, the resistance measurement process 100 by the resistance measurement apparatus 1 will be described with reference to FIG.

  In the resistance measurement process 100, the processing unit 43 first executes an injection process for injecting an inspection AC signal Vx having a predetermined frequency f into the measurement target circuit 5 (step 101). Specifically, in this injection process, the processing unit 43 causes the voltage injection unit 41 to start generating the AC voltage Va, and therefore an internal clock that is sufficiently higher than the reference clock CLK (the reference clock CLK is the internal clock). The output of the triangular wave generation data Ds for generating the triangular wave signal Ss to the voltage injecting unit 41 is started in synchronization with. As a result, in the voltage injection unit 41, the triangular wave generation unit 51 starts generating the triangular wave signal Ss synchronized with the reference clock CLK, and outputs the generated triangular wave signal Ss, and the LPF 52 converts the triangular wave signal Ss into the AC voltage Va. To do. The power amplifying unit 53 performs a class D amplification operation, amplifies the input AC voltage Va with a predetermined amplification factor to generate an AC voltage V1 having a predetermined voltage effective value, and generates the generated AC voltage V1. Apply to the first winding 13 of the injection clamp unit 11. As a result, the inspection AC signal Vx (frequency f) is injected from the injection clamp unit 11 into the measurement target circuit 5. For this reason, the alternating current Ix of the frequency f flows through the measurement target circuit 5 due to the injection of the inspection alternating signal Vx.

  Further, the processing unit 43 starts outputting the reference clock CLK to the reference signal generating unit 45 as the output of the triangular wave generating data Ds to the voltage injecting unit 41 is started. In the reference signal generation unit 45, the comparator 81 compares the AC voltage V1 with the comparison voltage value Vref, thereby reversing the polarity at the zero cross of the AC voltage V1 and having a duty ratio of 0.5. The generation of Sr0 is started. Further, the DFF 82 starts a process of outputting the binarized signal Sr0 as the reference signal Sr in synchronization with the reference clock CLK. Accordingly, the supply of the reference signal Sr (see FIG. 2) is started from the reference signal generation unit 45 to the switching units 63 and 66 of the current measurement unit 42.

  In a state where the inspection AC signal Vx having the frequency f is intermittently injected into the measurement target circuit 5, the current measurement unit 42 detects the alternating current Ix generated intermittently and generates current data Di. Execute. Specifically, in the current measurement unit 42, the detection clamp unit 21 detects the alternating current Ix that flows intermittently in the measurement target circuit 5, and outputs the detection current I 1 from the second winding 23. The second amplifying units 61 and 64 convert the detected current I1 into first and second voltage signals Vb1 and Vc1 and output them. In this case, the current measuring unit 42 is different from the conventional configuration (the configuration in which the second winding 23 as a detection coil is used at a single end and a resistor for current detection is connected in series). Since each end of the line 23 is connected to the inverting input terminals of the operational amplifiers 61a and 64a, there is no need for a current detection resistor (shunt resistor) that may cause a decrease in gain or a deterioration in frequency characteristics. Therefore, good frequency characteristics are ensured while maintaining a sufficient detection gain.

  Next, the first and second BPFs 62 and 65 remove the harmonic components contained in the corresponding voltage signals Vb1 and Vc1, and output them as the first and second voltage signals Vb2 and Vc2, respectively. 66 generates and outputs a positive polarity signal Vd and a negative polarity signal Ve by switching the first and second voltage signals Vb2 and Vc2 in synchronization with the reference signal Sr. In this case, the reference signal Sr is output via the DFF 82 of the reference signal generation unit 45. For this reason, even if the phase of the AC voltage V1 with respect to the reference clock CLK changes due to changes in temperature or humidity, if the amount of change is within one cycle of the reference clock CLK, the reference signal Sr is The rise and fall are forcibly synchronized by the DFF 82 with the rise (or fall) of the reference clock CLK. Therefore, the phase shift of the reference signal Sr with respect to the reference clock CLK due to changes in temperature and humidity is greatly reduced, that is, the fluctuation of the duty ratio of the reference signal Sr is greatly reduced. Therefore, each switching unit 63, 66 can stably switch the first and second voltage signals Vb2, Vc2 based on the reference signal Sr. As a result, the positive polarity signal Vd and the negative polarity by each switching unit 63, 66 The accuracy of the generation of the sex signal Ve is increased. Even if the normal mode noise is included in the detection current I1, the normal mode noise is removed by the switching operation for the signals Vb2 and Vc2 synchronized with the reference signal Sr by the switching units 63 and 66. .

  Subsequently, the third amplifying unit 67 calculates the difference between the positive polarity signal Vd and the negative polarity signal Ve to generate a synchronous detection signal Vf, and the LPF 68 integrates the synchronous detection signal Vf and outputs a voltage signal Vg. Further, the HPF 69 removes the DC component from the voltage signal Vg and outputs it as the voltage signal Vh. In this case, the first amplifying unit 61 and the second amplifying unit 64 connected to each end of the second winding 23 are connected to the detection current I1 generated at the end of the second winding 23 to which each is connected. Based on this, the first voltage signal Vb1 and the second voltage signal Vc1 whose phases are inverted are output, and the third amplifying unit 67 performs filtering processing on these signals Vb1 and Vc1 (in this example, the BPFs 62 and 65). The synchronous detection signal Vf is generated by calculating the difference between the positive signal Vd and the negative signal Ve generated by the switching units 63 and 66 based on the signals Vb2 and Vc2). For this reason, even if common mode noise is superimposed on the detection current I1, the noise is canceled by the third amplifying unit 67 performing the difference calculation.

  Next, the AC amplification unit 70 amplifies the voltage signal Vh to an amplitude corresponding to the input rating of the A / D conversion unit 71, and outputs it as a voltage signal Vi. In this case, when the voltage signal Vi is generated, the voltage signal Vh is an AC signal and the AC amplification unit 70 is configured to amplify the AC signal, so that the dynamic reserve is prevented from deteriorating unlike the configuration employing DC amplification. Also, a reduction in noise resistance is avoided. Furthermore, since it is not necessary to use an expensive operational amplifier with a small offset as in the case of direct current amplification, an increase in the cost of the current measuring unit 42 and thus the resistance measuring apparatus 1 is avoided. Subsequently, the A / D conversion unit 71 converts the voltage signal Vi into digital data and outputs the digital data to the processing unit 43 as current data Di.

  Next, the processing unit 43 executes a calculation process for calculating the resistance value Rx of the measurement target circuit 5 when the frequency is f (step 102). Specifically, in this calculation process, the processing unit 43 first calculates the amplitude of the detected current I1 based on the current data Di. In this case, since the current data Di is the waveform data of the voltage signal Vi in FIG. 3, the processing unit 43 recognizes the minimum value Vmin of the current data Di as a zero level, and the maximum value Vmax and the minimum value of the waveform data. The amplitude of the detection current I1 is calculated on the assumption that the difference (Vmax−Vmin) from Vmin is a value corresponding to the amplitude of the detection current I1. Further, the processing unit 43 calculates the current effective value of the detection current I1 from the calculated amplitude and the fact that the AC voltage V1 applied to the first winding 13 of the injection clamp unit 11 is a pseudo sine wave signal. calculate. Next, the effective voltage value of the inspection AC signal Vx is calculated based on the effective voltage value of the AC voltage V1 and the number of turns (N1) of the first winding 13, and the calculated effective current value of the detected current I1 and the second Based on the number of turns (N2) of the winding 23, the current value of the alternating current Ix (current effective value in this example) is calculated. Subsequently, the processing unit 43 calculates the resistance value Rx of the measurement target circuit 5 when the frequency of the test AC signal Vx is f based on the calculated effective values of the test AC signal Vx and the AC current Ix. At the same time, the calculated resistance value Rx is stored in the memory in correspondence with the frequency f. In this example, as an example, when calculating the resistance value Rx, the processing unit 43 calculates the resistance value Rx a plurality of times, calculates an average of these values (moving average as an example), and calculates the final resistance value Rx. To do. Thereby, the calculation process of the resistance value Rx is completed. Finally, the processing unit 43 causes the output unit 44 to output the calculated resistance value Rx (step 103). Thereby, the resistance measurement process is completed.

  As described above, in the resistance measuring apparatus 1, the voltage injection unit 41 intermittently executes the application of the AC voltage V <b> 1 to the first winding 13, whereby the test AC signal Vx is input into the measurement target circuit 5. Generate. The reference signal generation unit 45 including the comparator 81 generates a binarized signal synchronized with the AC voltage V1 and outputs it as the reference signal Sr. Further, the current measuring unit 42 converts the detection current I1 flowing in the second winding 23 due to the injection of the inspection AC signal Vx into the voltage signals Vb2 and Vc2, and converts the voltage signals Vb2 and Vc2 into the reference signal Sr. Is used to generate a synchronous detection signal Vf, integrate the synchronous detection signal Vf, remove the DC component, output an AC component voltage signal Vh, and further amplify the voltage signal Vh. Thus, the detection current I1 (that is, the alternating current Ix proportional to the detection current I1) is measured.

  Therefore, according to this resistance measuring apparatus 1, the DC amplification is performed by AC-amplifying the voltage signal Vh required for measurement of the detection current I1 (that is, measurement of the AC current Ix) as an AC signal by the AC amplifier 70. Unlike the configuration employed, it is possible to avoid the deterioration of the dynamic reserve, and it is also possible to avoid the decrease in noise resistance. Further, when the AC amplifying unit 70 is configured, it is not necessary to use an expensive operational amplifier having a small offset as in the case of DC amplifying, so that the cost of the current measuring unit 42 and thus the resistance measuring apparatus 1 can be reduced. it can.

  Moreover, according to this resistance measuring apparatus 1, since the reference signal generation unit 45 is configured including the comparator 81, the binarized signal can be reliably generated from the AC voltage with a simple configuration.

  In addition, this invention is not limited to said structure. For example, in the above configuration, the capacitors 61e and 64e are respectively arranged at the subsequent stage of the operational amplifiers 61a and 64a. However, when the offset voltages of the operational amplifiers 61a and 64a are extremely small, the capacitors 61e and 64e are disposed. It can also be set as the structure which does not. In this configuration, the resistors 61d and 64d can be made unnecessary. In addition, the configuration using the first and second PFs 62 and 65 for improving the measurement accuracy of the resistance value Rx has been described above. However, when the required measurement accuracy can be ensured, the first and second BPFs 62 and 65 are disposed. It is also possible to adopt a configuration that does not. Further, the power amplifying unit 53 can be configured by a class A or class AB amplifier instead of the class D amplifier. In the reference signal generation unit 45, the DFF 82 is used when synchronizing the binarized signal Sr0 with the reference clock CLK. However, it can be synchronized using various digital circuits other than the DFF. Further, although the hysteresis type comparator 81 is used, a comparator having no hysteresis can also be used.

  Further, as an example of the configuration in which the first voltage signal Vb2 and the second voltage signal Vc2 are synchronously detected by the reference signal Sr, the configuration using the switching units 63 and 66 has been described above, but the synchronous detection using a multiplier is described above. It is also possible to adopt a configuration that does this. In addition, the example in which the resistance value Rx is calculated based on the voltage effective value as the voltage value of the test AC signal Vx and the current effective value as the current value of the AC current Ix has been described above. The current value is not limited to the effective current value. Specifically, a configuration in which the resistance value Rx is calculated based on the voltage average value as the voltage value of the AC signal Vx for inspection and the current average value as the current value of the AC current Ix, or the voltage of the AC signal Vx for inspection A configuration for calculating the resistance value Rx based on the peak-to-peak value (voltage amplitude) as the value and the peak-to-peak value (current amplitude) as the current value of the alternating current Ix, and the voltage value of the inspection AC signal Vx It is also possible to adopt a configuration in which the resistance value Rx is calculated on the basis of the voltage peak value and the current peak value as the current value of the alternating current Ix.

  In addition, the configuration in which the reference signal generation unit 45 including the comparator 81 and the DFF 82 generates the reference signal Sr based on the AC voltage V1 output from the power amplification unit 53 has been described above. However, the triangular wave output from the triangular wave generation unit 51 A configuration in which the reference signal generation unit 45 generates the reference signal Sr based on either the signal Ss or the AC voltage (pseudo sine wave signal) Va output from the LPF 52 may be employed. Further, the reference signal generation unit 45 that generates the reference signal Sr is configured by using the comparator 81 so that the binarized signal Sr0 can be reliably generated from the AC voltage V1 with a simple configuration. Is limited to the comparator 81 as long as the input value (voltage value of the alternating voltage v1) is compared with the threshold value (comparison voltage value Vref) and the comparison result (binarized signal Sr0) is output. Instead, various circuits can be employed. Further, instead of the DFF 72, a configuration using a JK flip-flop, an RS flip-flop, or the like can be adopted.

  In addition, as an example, a triangular wave generation unit 51 is provided with a D / A converter, and the triangular wave generation data Ds output from the processing unit 43 at a predetermined time interval T1 with a predetermined time interval T2 is shown in FIG. As described above, the configuration for generating and outputting the triangular wave signal Ss intermittently (that is, intermittently) has been described above, but a counter that counts up the counter value in synchronization with the reference clock CLK together with the D / A converter. It is also possible to adopt a configuration in which the triangular wave generation unit 51 is configured, this counter is operated intermittently, and the D / A converter converts the counter value into an analog signal, thereby generating the triangular wave signal Ss. . Furthermore, it is possible to employ a configuration in which a triangular wave signal Ss is generated by using a DDS (Direct Digital Synthesizer, not shown) for the triangular wave generator 51.

  In addition, the configuration in which the triangular wave generation unit 51 and the reference signal generation unit 45 are provided separately from the processing unit 43 has been described above, but the processing is performed by a DSP (Digital Signal Processor) including at least a CPU, an A / D converter, and a D / A converter. By configuring the unit 43, a configuration in which at least one generation unit of the triangular wave generation unit 51 and the reference signal generation unit 45 is included in the processing unit 43 may be employed. In this configuration, the CPU repeats the counting operation of the up-counting operation, the down-counting operation, and the up-down-counting operation synchronized with the reference clock CLK, and outputs the count value to the D / A converter. Thus, the triangular wave generation unit 51 can be configured. Alternatively, the waveform data can be stored in a memory provided inside or outside the DSP, and the waveform data can be read out by the CPU and output to the D / A converter. For the reference signal generation unit 45, the CPU detects the timing at which the count value crosses the intermediate value with reference to the intermediate value between the start value and the end value in the counting operation, and synchronizes with the detected timing. Thus, a signal that repeats rising and falling alternately can be generated as the reference signal Sr.

DESCRIPTION OF SYMBOLS 1 Resistance measuring device 5 Measurement object circuit 13 1st winding (injection coil)
23 Second winding (detection coil)
41 voltage injection unit 42 current measurement unit 43 processing unit 45 reference signal generation unit 61 first amplification unit 63 first switching unit 64 second amplification unit 66 second switching unit 67 third amplification unit 68 LPF
69 HPF
70 AC Amplifier 81 Comparator 82 DFF
I1 Detection current Ix AC current Rx Resistance Sr Reference signal Sr0 Binary signal Ss Triangular wave signal V1 AC voltage Vx Inspection AC signal

Claims (2)

A voltage injection unit that injects an inspection AC signal into the measurement target circuit by applying an AC voltage to the injection coil, and an AC current that flows through the measurement target circuit due to the injection of the inspection AC signal is detected by the detection coil A current measuring unit that measures the current value of the circuit to be measured and a processing unit that calculates a resistance value of the circuit to be measured based on the voltage value of the injected alternating current signal for inspection and the measured current value of the alternating current A measuring device,
The voltage injection unit intermittently executes the application of the AC voltage,
A reference signal generating unit that generates a binarized signal synchronized with the applied AC voltage and outputs it as a reference signal,
The current measurement unit includes a current-voltage conversion circuit that converts a current flowing in the detection coil due to injection of the inspection AC signal into a voltage signal, and a synchronous detection circuit that synchronously detects the voltage signal using the reference signal A DC removal circuit that integrates the detection output signal output from the synchronous detection circuit and removes the direct current component to output an alternating current component, and an alternating current amplification circuit that amplifies the alternating current component, and the current of the alternating current A resistance measuring device that measures values.   The resistance measurement apparatus according to claim 1, wherein the reference signal generation unit includes a comparator that generates the binarized signal based on the applied AC voltage.

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