JP5196976B2 - 表面実装用の圧電デバイス - Google Patents
表面実装用の圧電デバイス Download PDFInfo
- Publication number
- JP5196976B2 JP5196976B2 JP2007310136A JP2007310136A JP5196976B2 JP 5196976 B2 JP5196976 B2 JP 5196976B2 JP 2007310136 A JP2007310136 A JP 2007310136A JP 2007310136 A JP2007310136 A JP 2007310136A JP 5196976 B2 JP5196976 B2 JP 5196976B2
- Authority
- JP
- Japan
- Prior art keywords
- mounting
- container body
- piezoelectric
- lead pin
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
- Oscillators With Electromechanical Resonators (AREA)
Description
表面実装デバイス例えば表面実装発振器は小型・軽量であることから、各種の電子機器に周波数や時間の基準源として内蔵される。近年では、表面実装発振器は多種多様のデジタル制御機器に内蔵され、このようなものの一つに遊技台としてのパチンコ台への設置が検討されている。
第4図は一従来例を説明する図で、同図(a)は表面実装発振器の断面図、同図(b)は同底面図、同図(c)は水晶片の平面図である。
しかしながら、上記構成の表面実装発振器は、例えばセット基板に対して表面実装であるため、パチンコ台に取り付けたセット基板の表面上からの取り外しが比較的に容易となる。したがって、現行では、第5図(正面図)に示したようにリードピン(リード端子)9を有する金属ベース10にICチップや水晶振動子等を配置して金属カバー11を被せたリードピン型の水晶発振器が採用される。
本発明はリードピン型として兼用できる表面実装発振器を提供することを目的とする。
本発明の請求項2では、請求項1において、前記貫通孔の内周面及び前記外底面の反対面には、前記外部端子と電気的に接続した金属膜を有する。これにより、半田を用いた場合のリードピンとの接合強度を高められる。
上記実施形態ではパチンコ等の遊技台を対象として説明したが、必要に応じて各種の用途に適用できる。表面実装デバイスは表面実装発振器として説明したが、圧電材としての水晶片等のみを収容して密閉封入した表面実装振動子にも適用でき、圧電材としての水晶を収容した圧電デバイスであれば適用できる。
Claims (4)
- 最下位層の外底面に実装端子を有した積層セラミックからなる容器本体内に少なくとも圧電片を密閉封入した表面実装用の圧電デバイスにおいて、前記容器本体の前記最下位層が前記最下位層に対する上位層の平面外形よりも外形形状が大きい突出部を有し、前記突出部の外底面に前記実装端子を有するとともにリードピンが挿入される貫通孔を有することを特徴とする表面実装用の圧電デバイス。
- 請求項1において、前記貫通孔の内周面及び前記外底面の反対面に、前記実装端子と電気的に接続する金属膜を有する表面実装用の圧電デバイス。
- 請求項1において、前記リードピンが、一端側を釘頭状とした表面実装用の圧電デバイス。
- 請求項1において、前記容器本体が、内壁に段部を形成した凹部を有し、前記凹部の底面にICチップが固着され、かつ、前記段部に前記圧電片が保持される表面実装用の圧電デバイス。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007310136A JP5196976B2 (ja) | 2007-11-30 | 2007-11-30 | 表面実装用の圧電デバイス |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007310136A JP5196976B2 (ja) | 2007-11-30 | 2007-11-30 | 表面実装用の圧電デバイス |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009135745A JP2009135745A (ja) | 2009-06-18 |
JP5196976B2 true JP5196976B2 (ja) | 2013-05-15 |
Family
ID=40867203
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007310136A Expired - Fee Related JP5196976B2 (ja) | 2007-11-30 | 2007-11-30 | 表面実装用の圧電デバイス |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5196976B2 (ja) |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5472696A (en) * | 1977-11-21 | 1979-06-11 | Citizen Watch Co Ltd | Package for super miniature size piezoelectric oscillator |
JPS6079758A (ja) * | 1983-10-06 | 1985-05-07 | Fuji Electric Co Ltd | 半導体装置 |
JPH0533566U (ja) * | 1991-10-04 | 1993-04-30 | 日本電気株式会社 | 集積回路部品実装構造 |
JP3129058B2 (ja) * | 1993-09-08 | 2001-01-29 | 富士電機株式会社 | 半導体装置のパッケージ |
JP3025617U (ja) * | 1995-10-04 | 1996-06-21 | 株式会社シンエイ・ハイテック | 表面実装型振動子用の気密性器体 |
JP2001060842A (ja) * | 1999-08-23 | 2001-03-06 | Fujimaru Kogyo Kk | 小型電子部品 |
JP4571012B2 (ja) * | 2005-05-25 | 2010-10-27 | 日本電波工業株式会社 | 台座付水晶振動子 |
-
2007
- 2007-11-30 JP JP2007310136A patent/JP5196976B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2009135745A (ja) | 2009-06-18 |
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