JP5148655B2 - Information processing apparatus and information processing apparatus control method - Google Patents

Description

  The present invention relates to an information processing apparatus that switches execution / non-execution of a high pixel conversion process and a control method for the information processing apparatus.

  In recent years, full HD TVs with 1920 × 1080 pixels are not uncommon. However, there are few full HD content. In view of this, a conventional high-definition conversion process is performed on content such as a DVD with SD image quality to convert it to HD image quality, and the content is viewed on a full HD television.

  Japanese Patent Application Laid-Open No. 2004-133620 acquires standard information of designated content, inquires of a user whether or not to perform up-conversion according to the standard information, and performs up-conversion based on the result and records the content in a recording unit. Is disclosed.

JP 2008-153865 A

  By the way, there are several methods for performing the high pixel conversion processing. For example, there are a bicubic method and a bilinear method. The bicubic method has a higher processor load than the bilinear method.

  Currently, it is difficult to perform the bicubic method in real time on a personal computer. In view of this, it is conceivable that a high-speed processor different from the processor on which the operating system, applications, and the like are executed will take over the high pixel conversion processing using the bicubic method.

  On the other hand, since whether or not to prefer the image after the high pixel conversion processing depends largely on the user's preference, a request to compare by dynamically switching between execution / non-execution of the high pixel conversion processing while reproducing a moving image There is also.

  An object of the present invention is to provide an information processing apparatus capable of dynamically performing execution / non-execution switching of a high pixel conversion process and a control method for the information processing apparatus.

The information processing apparatus according to one embodiment of the invention, encoded in the first decoding means for decoding the video data and the video data high pixel decoded video data by said first decoding means Switching between execution and non-execution of high pixel conversion means for performing high pixel conversion processing, second decoding means for decoding the encoded video data, and high pixel conversion processing running and user interface means, during the decoding processing of the video data being the encoded, of the high pixelated conversion process in said high pixel means in response to an input to the user interface to provide a user interface for If the you switch to non-execution, is the coded according unit for managing video data being the encoded Characterized in that it comprises a switching means for switching a supply destination of the video data to the second decoding means

  An information processing apparatus control method according to an example of the present invention includes a decoding unit for decoding encoded video data, and a high pixel conversion for converting the decoded video data into high pixel video data. A method of controlling an information processing apparatus having a pixel increasing means for performing conversion processing, comprising: a user interface for switching between execution and non-execution of the pixel conversion processing; and the encoded video During the data decoding process, execution and non-execution of the high pixel conversion processing in the high pixel conversion means are switched according to an input to the user interface.

  According to the present invention, it is possible to dynamically switch execution / non-execution of a high pixel conversion process when executing a high pixel conversion process of video data using a processor.

The perspective view which shows the notebook type personal computer as a reproducing | regenerating apparatus concerning one Embodiment of this invention. The block diagram which shows the system configuration | structure of the personal computer shown in FIG. The block diagram which shows the system configuration | structure of the multimedia processor shown in FIG. Explanatory drawing of the hierarchical structure of the video object of a DVD video system, and the data content of a navigation pack. Structure explanatory drawing of a video, an audio, and a sub-picture pack. The figure which shows the reproduction | regeneration control panel displayed on LCD in order to perform operation etc. for switching to up-conversion / non-up-conversion. The block diagram which shows the structure of the DVD application performed with CPU. The block diagram for demonstrating the module for performing the up-conversion / non-up-conversion switching process concerning one Embodiment of this invention. The figure which shows the case where a user instruct | indicates up-conversion from the state which is reproducing | regenerating with the SD image quality which is not up-converted, and reproduces | regenerates. The figure which shows the case where a user instruct | indicates non-up-conversion from the state which is reproducing | regenerating by HD image quality which is upconverting, and reproduces | regenerates by SD image quality which is not upconverted. 5 is a flowchart showing a processing procedure of a supply destination switching module 601.

  Embodiments of the present invention will be described below with reference to the drawings.

  First, the configuration of a playback apparatus according to an embodiment of the present invention will be described with reference to FIG. 1 and FIG. The playback device of this embodiment is realized by, for example, a notebook portable personal computer 10 that functions as an information processing device.

  The personal computer 10 can record and reproduce video content data (audio visual content data) such as broadcast program data and video data input from an external device. That is, the personal computer 10 has a television (TV) function for viewing and recording broadcast program data broadcast by a television broadcast signal. This TV function is realized by, for example, a TV application program installed in the personal computer 10 in advance. The TV function also has a function of recording video data input from an external AV device, and a function of reproducing recorded video data and recorded broadcast program data.

  FIG. 1 is a perspective view of the computer 10 with the display unit opened. The computer 10 includes a computer main body 11 and a display unit 12. The display unit 12 incorporates a display device including a TFT-LCD (Thin Film Transistor Liquid Crystal Display) 17. The number of pixels of the LCD is 1920 × 1080 full HD specifications.

  The display unit 12 is attached to the computer main body 11 so as to be rotatable between an open position where the upper surface of the computer main body 11 is exposed and a closed position covering the upper surface of the computer main body 11. The computer main body 11 has a thin box-shaped housing, and has a keyboard 13 on its upper surface, a power button 14 for powering on / off the computer 10, an input operation panel 15, a touch pad 16, and a speaker. 18A, 18B, etc. are arranged.

  The input operation panel 15 is an input device that inputs an event corresponding to a pressed button, and includes a plurality of buttons for starting a plurality of functions. These button groups also include operation button groups for controlling TV functions (viewing, recording, and reproduction of recorded broadcast program data / video data). In addition, a remote control unit interface unit 20 for executing communication with a remote control unit for remotely controlling the TV function of the computer 10 is provided on the front surface of the computer main body 11. The remote control unit interface unit 20 includes an infrared signal receiving unit and the like.

  On the right side of the computer main body 11, for example, an antenna terminal 19 for TV broadcasting is provided. Further, on the back surface of the computer main body 11, for example, an external display connection terminal corresponding to the HDMI (high-definition multimedia interface) standard is provided. The external display connection terminal is used to output video data (moving image data) included in video content data such as broadcast program data to an external display.

  Next, the system configuration of the computer 10 will be described with reference to FIG.

  As shown in FIG. 2, the computer 10 includes a CPU 101, a north bridge 102, a main memory 103, a south bridge 104, a graphics processing unit (GPU) 105, a video memory (VRAM) 105A, a sound controller 106, a BIOS- ROM 109, LAN controller 110, hard disk drive (HDD) 111, DVD drive 112, multimedia processor 113, memory 113A, wireless LAN controller 114, IEEE 1394 controller 115, embedded controller / keyboard controller IC (EC / KBC) 116, and TV A tuner 117 and the like are provided.

  The CPU 101 is a processor that controls the operation of the computer 10 and executes various application programs such as an operating system (OS) 201 and a DVD application program 202 that are loaded from the hard disk drive (HDD) 111 to the main memory 103. . The DVD application program 202 is software for playing a DVD loaded in the DVD drive 112. The CPU 101 also executes a BIOS (Basic Input Output System) stored in the BIOS-ROM 109. The BIOS is a program for hardware control.

  The north bridge 102 is a bridge device that connects the local bus of the CPU 101 and the south bridge 104. The north bridge 102 also includes a memory controller that controls access to the main memory 103. The north bridge 102 also has a function of executing communication with the GPU 105 via a PCI EXPRESS standard serial bus or the like.

  The GPU 105 is a display controller that controls the LCD 17 used as a display monitor of the computer 10. A display signal generated by the GPU 105 is sent to the LCD 17. The GPU 105 can also send a digital video signal to the external display device 1 via the HDMI control circuit 3 and the HDMI terminal 2.

  The HDMI terminal 2 is the above-described external display connection terminal. The HDMI terminal 2 can send an uncompressed digital video signal and a digital audio signal to the external display device 1 such as a television with a single cable. The HDMI control circuit 3 is an interface for sending a digital video signal to the external display device 1 called an HDMI monitor via the HDMI terminal 2.

  The south bridge 104 controls each device on an LPC (Low Pin Count) bus and each device on a PCI (Peripheral Component Interconnect) bus. The south bridge 104 includes an IDE (Integrated Drive Electronics) controller for controlling the hard disk drive (HDD) 111 and the DVD drive 112. Further, the south bridge 104 has a function of executing communication with the sound controller 106.

  Furthermore, a multimedia processor 113 is connected to the south bridge 104 via a PCI EXPRESS (PCIe) standard serial bus or the like.

  The memory 113A is used as a working memory for the multimedia processor 113. As shown in FIG. 3, the multimedia processor 113 includes an MPEG-2 decoding circuit 301 provided for decoding compressed and encoded video data, four arithmetic cores 311 to 314 and the like on one chip. It is installed. Each of the arithmetic cores 311 to 314 has high media processing performance and high performance versus power consumption. When the DVD application program 202 plays a DVD, the MPEG-2 decoding circuit 301 decodes the DVD video data. Further, the four arithmetic cores 311 to 314 perform an inter-progressive conversion (IP conversion) process on the video data having a pixel number of 720 × 480 decoded by the decoding circuit 301. The four arithmetic cores 311 to 314 perform a high pixel conversion process for converting SD image quality video data having a pixel number of 720 × 480 into an HD image quality having a number of pixels of 1920 × 1080. The bicubic method (third-order convolution interpolation method (CC method)) is used for the high pixel conversion processing by the multimedia processor 113. A large amount of calculation is required to execute the high pixel conversion processing using the bicubic method. In this embodiment, the arithmetic cores 311 to 314 of the multimedia processor 113, which is a dedicated processor different from the CPU 101, are used as back-end processors, and the high-pixel conversion processing is executed by the multimedia processor 113. Therefore, the high pixel conversion processing can be executed without increasing the load on the CPU 101.

  Note that the DVD application program 202 includes a decoding module that is executed by the CPU 101 to decode video data. When decoded using the decoding module of the DVD application program 202, the video data decoded to display the video data on the LCD 17 has an SD image quality of 720 × 480 pixels using the high pixel conversion function of the GPU 105. The video data is converted to an HD image quality with a pixel count of 1920 × 1080. The high pixel conversion function of the GPU 105 is lighter (less calculation) than the bicubic method (third-order convolution interpolation method (CC method)), but the high pixel conversion processing is performed by the bilinear method with poor image quality.

  Here, the GPU 105 performs the high pixel conversion processing by the bilinear method when the number of pixels of the video data input to the GPU 105 is different from the number of pixels to be output from the LCD 17 or the HDMI terminal 2. If the number of pixels to be output matches the number of pixels input to the GPU 105, the GPU 105 does not perform the high pixel conversion processing.

  The user can select whether the multimedia processor 113 performs decoding and high pixel conversion, or the combination of the DVD application program 202 and the GPU 105 performs decoding and high pixel conversion. Hereinafter, the case where the multimedia processor 113 performs decoding and high pixel conversion is referred to as up-conversion by the multimedia processor 113.

  The sound controller 106 is a sound source device, and outputs audio data to be reproduced to the speakers 18A and 18B or the HDMI control circuit 3.

  The wireless LAN controller 114 is a wireless communication device that performs wireless communication of, for example, IEEE 802.11 standard. The IEEE 1394 controller 115 executes communication with an external device via an IEEE 1394 standard serial bus.

  The embedded controller / keyboard controller IC (EC / KBC) 116 is a one-chip microcomputer in which an embedded controller for power management and a keyboard controller for controlling the keyboard (KB) 13 and the touch pad 16 are integrated. . The embedded controller / keyboard controller IC (EC / KBC) 116 has a function of powering on / off the computer 10 in accordance with the operation of the power button 14 by the user. Further, the embedded controller / keyboard controller IC (EC / KBC) 116 has a function of executing communication with the remote control unit interface unit 20.

  The TV tuner 117 is a receiving device that receives broadcast program data broadcast by a television (TV) broadcast signal, and is connected to the antenna terminal 19. The TV tuner 117 is realized as a digital TV tuner capable of receiving digital broadcast program data such as terrestrial digital TV broadcast. The TV tuner 117 also has a function of capturing video data input from an external device.

Here, a data structure defined in the DVD video system and its management information will be described.
FIG. 4 shows a hierarchical structure of video objects (VOB). A VOB corresponds to one title and is also called a video title set. This corresponds to, for example, the recording of one movie title. A video object is divided into a plurality of cells and managed in order to manage the reproduction of the video object. Here, one cell is set to include a plurality of video object units (VOBU). A VOBU is a unit that takes 0.4 to 1.0 seconds of video playback time. One VOBU includes a navigation pack (NV_PCK), a plurality of video packs (V_PCK), a plurality of audio packs (A_PCK), and a plurality of sub-picture packs (SP_PCK).

  One NV_PCK is arranged at the head of one VOBU. NV_PCK is control data that is referred to when reproducing data of the VOBU to which the NV_PCK belongs. NV_PCK includes data search information (DSI) and picture control information (PCI).

  PCI indicates the start presentation time and end presentation time of the VOBU. PCI indicates non-seamless angle information, and has a VOBU address to be reproduced next to each angle when a video stream (angle) to be reproduced is switched. It also has highlight information, and includes the start presentation time, end presentation time, button display position information, etc. of the highlight information.

  The DSI includes, as general information, an NV_PCK system clock including the DSI, a VOBU end address, a VOBU reference (I) picture end address, and the like. As seamless playback information (SML_PBI), the category of VOBU, the end address of an interleave unit (unit delimited as a multi-angle switching unit), the size and start address of the next interleave unit to be jumped, and the start of the video in the VOB And an end address. Further, as seamless angle information (SML_AGLI), the address and size of the next destination interleave unit are prepared for the number of angles. Further, VOBU search information (VOBU_SRI) is prepared as information used for special playback such as frame advance and reverse feed, and the head addresses of a plurality of VOBUs before and after this VOBU are described. Furthermore, the audio and sub-picture addresses to be synchronized at the position of the VOBU when jumping are also described as synchronization information (SYNC).

  FIG. 5 shows a pack configuration of a video pack, an audio pack, and a sub-picture pack. A pack header is provided in the pack, and a system clock reference (SCR) is described in the pack header. This SCR is described in the VOBU including the I picture. This SCR is used to reset a system clock generator in the playback device and set a reference time. Further, a packet header is added following the pack header. A presentation time stamp (PTS) is described in the packet header. This PTS is always described in the VOBU including the I picture. Subsequently, video data, audio data, or sub-picture data exists. One pack length is defined as 2048 bytes.

  As described above, a presentation time stamp (PTS) is described in each pack. By performing playback processing in combination with this PTS and time information obtained from the system clock in the playback device, video and audio are recorded. Sub-picture reproduction synchronization can be obtained.

  The video object unit (VOBU) includes a group of pictures (GOP) so as not to be divided. A group of pictures (GOP) is composed of an I picture and a B picture, and this data sequence is divided into video packs. GOP is the smallest unit of video data management in MPEG-2. Since the decoder performs reproduction processing in units of GOP, if a part of the GOP is missing, the GOP cannot be decoded correctly.

  This apparatus uses different decoders for up-conversion and non-up-conversion. Therefore, in order to switch between up-conversion and non-up-conversion, in order to switch the decoder, the decoder must be switched so as not to divide the GOP. Therefore, it is necessary to make corrections and switch the decoder at the boundary between adjacent GOPs. Therefore, in this apparatus, when the user performs an operation for switching between up-conversion and non-up-conversion, the decoder is switched at a boundary between adjacent GOPs.

  FIG. 6 shows a playback control panel 400 displayed on the LCD 17 in order for the user to perform an operation for switching up-conversion / non-up-conversion. The playback control panel 400 includes a play button 401 for playing a disc, a stop button 402 for stopping playback, a pause button 403 for pausing playback, a fast forward button 404 for fast-forward playback, Fast rewind button 405 for fast rewind playback, forward slow playback button 406 for slow forward playback, next chapter button 407 for playback from the beginning of the next chapter, from the beginning of the previous chapter Previous chapter button 408 for playback, one-touch replay button 409 for playback from about 10 seconds before the current playback position, one-touch skip button 410 for playback after about 30 seconds from the current playback position, chapter, title Repeat to play and cancel Button 411, audio switching button 412 for switching the playback language, subtitle switching button 413 for switching the subtitle language, drive / folder specifying button 414 for specifying the drive / folder, angle switching button for switching the angle 415, eject button 418 for ejecting the disc from the drive, return button 419 for returning to the original, menu button 420 for displaying the menu, top menu button 421 for displaying the top menu, and temporarily turning off the sound volume A mute button 422 and a chapter / title search button 423 for chapter search or title search. The playback control panel also has an up-conversion switching button 431 and an up-conversion state display area 432.

  When the user moves the pointer on the up-conversion switching button 431 and presses the left button, switching between up-conversion / non-up-conversion is performed. In the up-conversion, the characters “up-convert” are displayed in the up-conversion status display area 432. In the up-conversion state display area 432, “up-conversion” is not displayed during non-up-conversion.

  Next, FIG. 7 shows the configuration of the DVD application program 202 executed by the CPU 101 of this apparatus for reproduction. This player software uses a technology called DirectShow that is executed in a Windows (registered trademark) environment, which is an operating system made by Microsoft, in order to reproduce content. DirectShow is a collection of filters with various functions. In order to reproduce a moving image, a filter graph is constructed by combining a plurality of filters selected from a filter library having a plurality of filters.

  DVD data reproduced by the DVD drive 112 is sent to the navigation filter 501. The navigation filter 501 separates the video pack (V_PCK), the sub-picture pack (SP_PCK), and the audio pack (A_PCK). The navigation filter 501 passes the audio pack (A_PCK) to the audio decoder filter 511. The navigation filter 501 passes the video pack (V_PCK) and the sub-picture pack (SP_PCK) to the video decoder filter.

  The audio decoder filter 511 decompresses the compressed audio information and converts it into uncompressed audio data, and passes the audio data to the audio rate converter filter 512. The audio rate converter filter 512 converts the audio data into an appropriate sampling rate and passes it to the DirectShow renderer 513. The DirectShow renderer 513 synthesizes the received audio data with audio data generated by other software or the like operating on the computer, and passes it to the audio driver 514. The audio driver 514 controls the sound controller 106 to output audio from the speakers 18A and 18B.

  In the video decoder filter 521, when the data of the line 21 is included, the data of the line 21 is passed to the line 21 decoder filter 522. The video decoder filter 521 decompresses the video pack (V_PCK) and the sub-picture pack (SP_PCK) using an internal decoder module or the multimedia processor 113. When a video pack (V_PCK) is expanded by the multimedia processor 113, inter-progressive conversion (IP conversion) and high pixel conversion are performed on the video data expanded by the multimedia processor. The expanded video data is sent to the extended video renderer 523. The mixer 523A in the extended video renderer 523 executes processing such as mixing of video and sub-pictures, displaying subtitles, and the like. The video data mixed by the mixer 523A is subjected to image quality enhancement processing by the image quality enhancement engine 523B. The video data subjected to the high image quality processing is passed to the display driver 524. The display driver 524 controls the GPU 105 and displays an image on the LCD 17.

  The player shell / user interface 531 performs processing related to display on the playback control panel 400. In addition, the player shell / user interface 531 notifies the DirectShow 532 of a command corresponding to the button operated by the user via the graph manager 532. The DirectShow 532 controls the navigation filter 501, the audio decoder filter 511, and the video decoder filter 521 in accordance with the notified command.

Next, a configuration for switching up-conversion / non-up-conversion will be described.
FIG. 8 is a diagram for explaining a module for executing up-conversion / non-up-conversion switching processing according to an embodiment of the present invention.

  As shown in FIG. 8, it comprises a player shell / user interface 531, a navigation filter 501, a video decoder filter 521, a multimedia processor 113, an extended video renderer 523, a display driver 524, and the like.

  The switching request issue module 611 in the player shell / user interface 531 issues a switching request to the video decoder filter 521 when the user operates the up-conversion switching button 431.

  The video decoder filter 521 includes a providing destination switching module 601, a software (SW) decoding module 602, a hardware (HW) decoding module 603, and the like. The providing destination switching module 601 passes the compressed video data supplied from the navigation filter 501 to one of the software decoding module 602 and the hardware decoding module 603.

  When the supply destination switching module 601 detects the switching supply issued by the switching request issuing module 611, the providing destination switching module 601 converts the compressed video data passed to one of the software decoding module 602 and the hardware decoding module 603 into the software decoding module 602 and It starts passing to the other side of the hardware decoding module 603.

  The software decoding module 602 decompresses the received video data to generate uncompressed video data, and passes the generated video data to the extended video renderer 523.

  The hardware decoding module 603 passes the received video data compressed by the MPEG-2 system to the multimedia processor 113. The multimedia processor 113 decodes the received video coder using the MPEG-2 decoding circuit 301, and generates interlaced video data with a resolution of 720 × 480 or 720 × 576. The multimedia processor 113 performs IP conversion and CC processing (up-conversion processing using the bicubic method) on the video data decoded using the arithmetic cores 311 to 314, and the resolution is 1920 × 1080 and YUV. Generate video data for the focusing mat. Then, the multimedia processor 113 returns the upconverted video data to the hardware decoding module 603. The hardware decoding module 603 passes the returned video data to the extended video renderer 523.

  As shown in FIGS. 9 and 10, the providing destination switching module 601 is configured so that the software decode module 602 and the hardware are detected from video data separated by adjacent GOPs after the user instructs up-conversion / non-up-conversion switching. It starts passing to the other side of the decoding module 603. FIG. 9 shows a case where the user instructs up-conversion from a state where reproduction is performed with SD image quality that is not up-converted, and up-conversion is performed. FIG. 10 shows a case where the user instructs non-up-conversion from the state where playback is performed with the HD image quality being up-converted, and playback is performed with the SD image quality not being up-converted.

Next, the processing procedure of the providing destination switching module 601 will be described with reference to the flowchart of FIG.
The provision destination switching module 601 determines whether or not a switching request has been received (step S11). If it is determined that the switching request has been received (Yes in step S11), the providing destination switching module 601 executes processing for detecting PTS. When the PTS is detected (Yes in step S12), the providing destination switching module 601 determines whether the compressed video data has been provided to the software decoding module 602 (step S13). If it is determined that the data has been provided to the software decoding module 602 (Yes in step S13), the providing destination switching module 601 switches the providing destination of the compressed video data to the hardware decoding module 603 (step S14). If it is determined that it is not provided to the software decoding module 602 (Yes in step S13), the providing destination switching module 601 switches the providing destination of the compressed video data to the software decoding module 602 (step S15).

  In the computer 10, a decoding circuit is installed in the multimedia processor 113, and the compressed video data is sent to the multimedia processor 113, so that the decoded video data is sent to the multimedia processor 113. The amount of data transmitted to the media processor 113 can be reduced.

  Further, it is possible to dynamically switch execution / non-execution of the up-conversion process by switching the transfer destination of the video data compressed at the boundary of adjacent VOBUs.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. Further, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, you may combine suitably the component covering different embodiment.

  DESCRIPTION OF SYMBOLS 101 ... CPU, 113 ... Multimedia processor, 202 ... DVD application program, 301 ... Decoding circuit, 311 to 314 ... Calculation core, 431 ... Up-conversion switching button, 432 ... Up-conversion status display area, 501 ... Navigation filter, 521 ... Video decoder filter, 523 ... extended video renderer, 523A ... mixer, 523B ... high image quality engine, 524 ... display driver, 611 ... switching request issuing module, 601 ... destination switching module, 602 ... software decoding module, 603 ... hardware Decode module.

Claims (10)

First decoding means for decoding the encoded video data;
High pixel means for performing high pixel conversion processing for converting the video data decoded by the first decoding means into video data having high pixels;
Second decoding means for decoding the encoded video data;
User interface means for providing a user interface for switching between execution and non-execution of the high pixel conversion processing;
During the decoding process of the video data being the encoded, the case where the execution of the high pixelated conversion process in said high pixel means in response to an input to the user interface you switch to non-execution, is the coded An information processing apparatus comprising: switching means for switching a destination of the encoded video data to the second decoding means in accordance with a unit for managing the video data being recorded . First decoding means for decoding the encoded video data;
High pixel means for performing high pixel conversion processing for converting the video data decoded by the first decoding means into video data having high pixels;
Second decoding means for decoding the encoded video data;
User interface means for providing a user interface for switching between execution and non-execution of the high pixel conversion processing;
If the during the decoding of the encoded which the video data, you switch to perform the non-execution of the high-pixelated conversion processing before Kidaka pixel means in response to an input to the user interface, the coded An information processing apparatus comprising: switching means for switching a destination of the encoded video data to the first decoding means in accordance with a unit for managing the video data being encoded . Said switching means during said decoding encoded by that video data, when said from the execution of the high pixelated conversion process in said high pixel means in response to an input to the user interface switch between the non-execution Switching the destination of the encoded video data to the second decoding means according to a unit for managing the encoded video data ;
The information processing apparatus according to claim 2. A CPU for executing the switching means;
The information processing apparatus according to claim 1, further comprising: a hardware processor that is provided separately from the CPU that executes the high pixel conversion processing. The information processing apparatus according to claim 1, wherein the switching unit switches between execution and non-execution of the high pixel conversion processing after input to the user interface. High performing a first decoding means for decoding video data encoded, said first converting the decoded video data to the high pixel video data by the decoding means high pixel conversion process A method for controlling an information processing apparatus, comprising: a pixilating unit; and a second decoding unit for decoding the encoded video data ,
Providing a user interface for switching between execution and non-execution of the high pixel conversion processing;
During the decoding process of the video data being the encoded, the case where the execution of the high pixelated conversion process in said high pixel means in response to an input to the user interface you switch to non-execution, is the coded A control method for an information processing apparatus, wherein the destination of the encoded video data is switched to the second decoding means according to a unit for managing the video data being recorded . High performing a first decoding means for decoding video data encoded, said first converting the decoded video data to the high pixel video data by the decoding means high pixel conversion process A method for controlling an information processing apparatus, comprising: a pixilating unit; and a second decoding unit for decoding the encoded video data ,
Providing a user interface for switching between execution and non-execution of the high pixel conversion processing;
During the decoding process of the video data being the encoded, the case where in response to an input to the user interface you switch to perform the non-execution of the high-pixelated conversion process in said high pixel means, is the encoded A control method for an information processing apparatus, wherein the destination of the encoded video data is switched to the first decoding means according to a unit for managing the video data being recorded . During the decoding process of the video data being the encoded, the case where the execution of the high pixelated conversion process in said high pixel means in response to an input to the user interface you switch to non-execution, is the coded The information processing apparatus control method according to claim 7, wherein a destination of the encoded video data is switched to the second decoding means in accordance with a unit for managing the video data being recorded . 8. The high pixel conversion processing is executed on a hardware processor provided separately from a CPU for switching between execution and non-execution of the high pixel conversion processing. The control method of the information processing apparatus of any one of Claims 1. The information processing apparatus control method according to claim 6, wherein execution and non-execution of the high pixel conversion processing are switched after input to the user interface.

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