JP5142849B2 - Film forming apparatus and film forming method - Google Patents

Description

  The present invention relates to a film forming apparatus and a film forming method for forming an alloy film containing a low melting point metal such as solder on a substrate constituting a semiconductor device having an electric circuit by a sputtering method.

  Conventionally, when a solder layer of an alloy (Ag—Sn—Pb alloy) containing tin (Sn) and lead (Pb) as a main component and containing silver (Ag) is formed in a semiconductor device having an electric circuit, a vacuum is used. A vapor deposition apparatus has been used (see, for example, Patent Documents 1 and 2).

  For example, in a power device having an energization path (electric circuit) in the thickness direction of the substrate, a back electrode is provided on the back surface of the substrate. For example, an Al film as a first conductive film, a Ti film as a second conductive film, a Ni film as a third conductive film, and an Au film or an Ag film as a fourth conductive film are formed on the back surface of the Si substrate. Then, an Ag—Sn—Pb alloy film is formed as a solder layer on the fourth conductive film.

  In the formation of the back electrode, the substrate on which the first to fourth conductive films are laminated in a magnetron sputtering apparatus is once taken out into the atmosphere and transferred to a vacuum evaporation apparatus to form a solder layer. Note that the fourth conductive film (Au film or Ag film) is provided as an antioxidant film that prevents oxidation by the atmosphere when the substrate is transferred from the sputtering apparatus to the vacuum evaporation apparatus.

[Reason for using vacuum deposition to form a solder layer]
In such a conventional technique, the solder layer is formed by the vacuum evaporation apparatus for the following reason. First, when an alloy containing a low melting point metal such as Pb, such as a solder layer of an Ag—Sn—Pb alloy, is to be formed by a DC sputtering apparatus, a low melting point having a high vapor pressure due to an increase in substrate temperature. The metal will evaporate. The solder layer and the target used for film formation are mainly composed of Sn and Pb, but since Pb is a low melting point metal, the degree of liberation of Pb sputtered on the substrate is higher than that of Sn. Therefore, the sputtering rate of the low melting point metal is lower than that of the other metals, and the composition is between the metal composition (target composition) of the alloy target and the metal composition (film composition) of the formed alloy film. Deviation occurs. Such a composition ratio shift does not occur in a vacuum deposition apparatus.

  Furthermore, since the solder layer is generally formed thick (for example, 10 μm or more), it is necessary to use a film forming method having a high film forming rate for forming the solder layer. However, if an attempt is made to form such a thick film with a DC sputtering apparatus, the temperature of the substrate rises, and Pb and Sn sputtered on the substrate are liberated, resulting in a decrease in the deposition rate. Such rate reduction does not occur in vacuum deposition. In addition, when forming with an RF sputtering apparatus, the film-forming rate of a solder layer is generally lower than that of a vacuum evaporation apparatus.

In a DC sputtering apparatus, if the substrate is cooled by using an electrostatic chuck, the deposition rate can be improved, but the composition ratio of the solder layer due to the fact that the sputtering rate of Pb is lower than that of Sn. The gap cannot be improved.
Japanese Patent No. 2910783 JP-A-7-51886

  In the above conventional technique, since the substrate must be moved from the sputtering apparatus to the vacuum evaporation apparatus when forming the laminated structure of the electrodes, a fourth conductive film as an antioxidant film, which is originally unnecessary, is formed. Yes. Since Au or Ag is used as the material of the antioxidant film, the cost has been very high due to the recent increase in the price of precious metals. In addition, since the solder layers are formed by vacuum deposition, a person sets them one by one in a dedicated holder. At this time, since thin wafers have been developed in recent years, there has been a problem of substrate damage due to handling mistakes.

  For this reason, an alloy film containing a low-melting-point metal such as a solder layer can be formed at a high film formation rate without causing a composition shift by a sputtering apparatus, like the first conductive film to the third conductive film. It is desirable to do so.

  The present invention has been made in order to solve such a conventional problem, and an alloy film containing a low-melting-point metal such as solder can be formed without causing a shift in the contained metal composition and reducing the film formation rate. It is an object of the present invention to provide a film forming apparatus and a film forming method that can form a film without causing the film to form.

In the film forming apparatus of the present invention, a cathode electrode provided with an alloy target containing lead (Pb) or tin (Sn) and an anode electrode provided with a substrate are arranged opposite to each other in a space having a reduced pressure atmosphere. A film forming apparatus for forming an alloy film containing the Pb or Sn on one surface of the substrate by a sputtering method,
Power supply means for applying a DC pulse voltage to the cathode electrode;
Temperature control means for cooling the substrate below the melting point of the alloy film;
At least.
In the present invention, a cathode electrode provided with an alloy target containing a low-melting point metal (Pb or Sn) and an anode electrode provided with a substrate are disposed opposite to each other in a reduced-pressure atmosphere. A film forming apparatus for forming an alloy film containing the low-melting-point metal on the surface by a sputtering method, comprising at least power supply means for applying a DC pulse voltage to the cathode electrode.

Further, in the film forming method of the present invention, a cathode electrode provided with an alloy target containing lead (Pb) or tin (Sn) and an anode electrode provided with a substrate are arranged opposite to each other in a space having a reduced pressure atmosphere. A film forming method using a film forming apparatus for forming an alloy film containing Pb or Sn on one surface of the substrate by a sputtering method,
Applying a DC pulse voltage to the cathode electrode;
The temperature of the substrate during film formation is maintained below the melting point of the alloy film.
According to the present invention, a cathode electrode provided with an alloy target containing silver (Ag), tin (Sn), and lead (Pb) and an anode electrode provided with a substrate are arranged opposite to each other in a reduced-pressure atmosphere. A film forming method using a film forming apparatus for forming an alloy film containing Ag, Sn, and Pb on one surface of the substrate by a sputtering method, wherein a DC pulse voltage is applied to the cathode electrode. Can

  According to the present invention, an alloy film containing a low-melting-point metal is formed by DC pulse sputtering in which a DC pulse voltage is applied to the cathode electrode. There is an effect that an alloy film containing a low melting point metal can be formed without lowering. Thus, for example, the first conductive film, the second conductive film, the third conductive film, and the solder layer can be stacked without exposing the substrate to the atmosphere even once. Therefore, it is not necessary to provide the fourth conductive film which has been conventionally provided as the antioxidant film, the cost of the noble metal (Au or Ag) used as the fourth conductive film can be reduced, and the fourth conductive film is formed. It is possible to reduce trouble and damage of the substrate.

  Hereinafter, the present invention will be described in detail with reference to the drawings. However, the present invention is not limited thereto, and various modifications can be made without departing from the gist of the present invention.

Embodiment 1
FIG. 1 is a schematic cross-sectional view of a semiconductor device in which a back electrode is formed by the sputtering apparatus of Embodiment 1 of the present invention. In FIG. 1, the semiconductor device 10 includes a substrate 11, an electric circuit 12, a first conductive film 13, a second conductive film 14, a third conductive film 15, and a solder layer 16. In the semiconductor 10, the first conductive film 13, the second conductive film 14, the third conductive film 15, and the solder layer 16 constitute a back electrode 17.

  A semiconductor device 10 in FIG. 1 has an electric circuit 12 on one surface (front surface) of a substrate 11 and inside the substrate 11, and a back electrode 17 on the other surface (back surface, film-formed surface) of the substrate 11. have. The back electrode 17 is formed by laminating a first conductive film 13, a second conductive film 14, a third conductive film 15, and a solder layer 16 in this order on the back surface of the substrate 11. As described above, for example, a power device is a semiconductor device having an electrode provided on the back surface of a substrate.

  The substrate 11 is, for example, a silicon (Si) substrate. The first conductive film 13 is, for example, an aluminum (Al) film or an Al film containing Si (Si—Al film), and functions as a p-type Si diffusion layer on the back surface of the substrate. The second conductive film 14 is, for example, a titanium (Ti) film, and functions as a barrier layer that prevents diffusion of the third conductive film metal. The third conductive film 15 is, for example, a nickel (Ni) film or a Ni film (V—Ni film) containing vanadium (V), and functions as a film that improves the adhesion to the solder layer 16. The solder layer 16 is formed using an alloy target (Ag—Sn—Pb alloy target) containing tin (Sn) and lead (Pb) as main components and containing silver (Ag).

  FIG. 2 is a schematic plan view showing the configuration of the sputtering apparatus according to the first embodiment of the present invention, which is for stacking the back electrode 17 on the semiconductor device 10. In FIG. 2, a sputtering apparatus 100 includes a substrate (wafer) transfer chamber T0, four sputtering chambers S0, S1, S2, and S3 for performing sputtering processing, a load lock chamber L / UL, and a substrate transfer machine. T1. Here, the sputtering chamber S3 is a sputtering chamber in which the solder layer 16 is formed. The sputtering apparatus 100 is, for example, a magnetron sputtering apparatus.

  In the sputtering apparatus 100 of FIG. 2, the transfer chamber T0 has a handler H0. The handler H0 moves while holding the substrate, and conveys the substrate between the sputtering chambers or between the sputtering chamber and the load lock chamber L / UL. The transfer machine T1 includes a handler H1 and substrate (wafer) cassettes C1 and C2. The handler H1 moves while holding the substrate, carries the substrate set in the cassette into the load lock chamber L / UL, carries out the sputtered substrate from the load lock chamber L / UL, and returns it to the cassette.

  In the sputtering apparatus 100, between the transfer chamber T0 and the sputter chambers S0, S1, S2, and S3, between the transfer chamber T0 and the load lock chamber L / UL, and between the load lock chamber L / UL and the transfer machine T1. Further, each is provided with a valve mechanism so that the degree of vacuum and the atmosphere between the chambers can be shut off.

[Formation of solder layer by DC pulse sputtering and electrostatic chuck in sputtering apparatus 100]
In such a sputtering apparatus 100, in the sputtering chamber S3, the solder layer 16 is formed on the substrate 11 by DC pulse sputtering in which a DC pulse voltage is applied to the electrodes instead of a DC voltage (DC voltage). In the sputtering chamber S3, a temperature control unit is provided in the electrostatic chuck on which the substrate 11 is set, and the solder layer 16 is formed by the electrostatic chuck while suppressing the temperature rise of the substrate 11. A temperature control unit provided in the electrostatic chuck can adjust and control the temperature of the substrate 11, and cools the substrate 11 to maintain a predetermined temperature during the sputtering process.

[DC sputtering power supply unit]
FIG. 3 is a schematic block diagram showing the configuration of a DC pulse power supply unit that applies a DC pulse voltage to the electrodes arranged in the sputtering chamber S3. In FIG. 3, the DC pulse power supply unit 50 includes a DC power supply 51, an OFF pulse power supply 52, an applied voltage generation unit 53, and a control unit 54. Since the DC pulse power supply unit 50 can also be used as a DC power supply unit, it can also be used as a power supply unit that applies a voltage to the electrodes in the other sputtering chambers S0, S1, and S2.

  The output voltage of the DC pulse power supply unit 50 is applied to the cathode electrode 60 in the sputtering chamber S3. The anode electrode 70 in the sputtering chamber S3 is grounded. Therefore, the potential Ea of the anode electrode 70 is a reference potential (0 potential), and the potential Ek of the cathode electrode 60 is an output potential of the DC pulse power supply unit 50.

[DC pulse]
FIG. 4 is a time chart for explaining the output voltage waveform of the DC pulse power supply unit 50. (a) is a DC pulse voltage applied to the electrode during DC pulse sputtering, and (b) is a DC voltage applied to the electrode during DC sputtering. is there.

  As shown in FIG. 4A, the cycle of the DC pulse generated by the DC pulse power supply unit 50 is t0, and within this cycle t0, the period t1 is the DC pulse OFF period, and the remaining period t2 is This is the ON period of the DC pulse. In the ON period t2, the cathode potential Ek is a negative potential Ek1, but in the OFF period t1, the cathode potential Ek is a positive or zero OFF pulse potential Ek0 (the potential Ek0 is a positive potential in FIG. 4A). On the other hand, as shown in FIG. 4B, when the DC pulse power supply unit 50 is caused to function as a DC power supply, the cathode potential Ek becomes a negative fixed potential Ek2.

  The operation of the DC pulse power supply unit 50 in FIG. 3 will be described. The DC power source 51 generates a negative potential Ek1 according to the peak value control signal transmitted from the control unit 54, and the OFF pulse power source 52 generates an OFF pulse potential (positive potential) according to the peak value control signal transmitted from the control unit 54. Or 0 potential) Ek0, and outputs these potentials Ek1 and Ek0 to the applied voltage generator 53, respectively. Note that the values of the potentials Ek1 and Ek0 can be variably set by the peak value control signal.

  The applied voltage generation unit 53 switches and outputs the potential Ek1 during the ON period t2 and the potential Ek0 during the OFF period t1 in accordance with the switching control signal transmitted from the control unit 54. As a result, the DC pulse Ek (see FIG. 4A) is applied to the cathode electrode 60. The OFF duty ratio t1 / t0 of the DC pulse Ek can be variably set, for example, between 0% and 50% by the switching control signal. In FIG. 4A, the OFF duty ratio t1 / t0 is set to 20%, but it is desirable to set the OFF duty ratio t1 / t0 within the range of 10% to 30%. Also, the frequency (1 / t0) of the DC pulse Ek can be variably set, for example, between 50 Hz and 250 Hz by the switching control signal.

  On the other hand, when the DC pulse power supply unit 50 is used as a DC power supply, the applied voltage generation unit 53 continues only the potential Ek2 (see FIG. 4B) generated by the DC power supply 51, and applies the cathode applied potential Ek. Output as.

[Procedure for Forming Back Electrode 17 in Sputtering Apparatus 100]
(Board loading)
First, the Si substrate (wafer) 11 having the electric circuit 12 is set in the cassette C1 in the transfer machine T1. After the load lock chamber L / UL is vented and the valve mechanism with the transfer machine T1 is opened, the substrate 11 set in the cassette C1 is moved from the cassette C1 to the load lock chamber L / UL by the handler H1. Transport to.

  Next, the valve mechanism between the load lock chamber L / UL and the transfer machine T1 is closed, and the load lock chamber L / UL is evacuated to 10e-3 Pa. Then, the valve mechanism between the load lock chamber L / UL and the transfer chamber T0 is opened, and the substrate 11 is carried into the transfer chamber T0 by the handler H0 in the transfer chamber T0, and the valve between the load lock chamber L / UL and the load lock chamber L / UL. Close the mechanism.

(Deposition of first conductive film 13, sputtering chamber S0)
Next, the valve mechanism between the transfer chamber T0 and the sputtering chamber S0 is opened, and the substrate 11 is transferred from the transfer chamber T0 into the sputtering chamber S0 by the handler H0. In the sputtering chamber S0, an Al film or a Si—Al film to be the first conductive film 13 is formed. DC sputtering (magnetron) using an Al target or an Si-Al alloy target in a reduced pressure atmosphere in which the deposition pressure in the sputtering chamber S0 is 0.1 Pa to 1.0 Pa and the argon (Ar) flow rate is 5 sccm to 50 sccm. A 200 nm to 1 μm thick Al film or Si—Al film is formed by sputtering. Then, after the film formation, the valve mechanism between the transfer chamber T0 is opened, and the Si substrate 11 having the first conductive film 13 formed on the back surface (film formation surface) is transferred from the sputtering chamber S0 to the transfer chamber by the handler H0. Return to T0 and close the valve mechanism between the sputtering chamber S0.

(Deposition of second conductive film 14, sputtering chamber S1)
Next, the valve mechanism between the transfer chamber T0 and the sputtering chamber S1 is opened, and the Si substrate 11 is transferred from the transfer chamber T0 into the sputtering chamber S1 by the handler H0. Then, a Ti film to be the second conductive film 14 is formed in the sputtering chamber S1. In a reduced pressure atmosphere in which the deposition pressure in the sputtering chamber S1 is 0.1 Pa to 1.0 Pa and the Ar flow rate is 5 sccm to 50 sccm, a Ti target is used to form a film with a thickness of 20 nm to 200 nm by DC sputtering (magnetron sputtering). A Ti film is formed. Then, after the film formation is completed, the valve mechanism between the transfer chamber T0 is opened, and the Si substrate 11 in which the first conductive film 13 and the second conductive film 14 are stacked on the back surface (film formation surface) is moved by the handler H0. The sputter chamber S1 returns to the transfer chamber T0 and the valve mechanism between the sputter chamber S1 is closed.

(Deposition of third conductive film 15, sputtering chamber S2)
Next, the valve mechanism between the transfer chamber T0 and the sputtering chamber S2 is opened, and the Si substrate 11 is transferred from the transfer chamber T0 into the sputtering chamber S2 by the handler H0. Then, in the sputtering chamber S2, a Ni film or a V-Ni film to be the third conductive film 15 is formed. Using a Ni target or a V-Ni alloy target in a reduced pressure atmosphere with a deposition pressure of 0.1 Pa to 1.0 Pa and an Ar flow rate of 5 sccm to 50 sccm by DC sputtering (magnetron sputtering). A Ni film or a V-Ni film having a thickness of 200 nm to 800 nm is formed. Then, after the film formation, the valve mechanism between the transfer chamber T0 is opened, and the first conductive film 13, the second conductive film 14, and the third conductive film 15 are stacked on the back surface (film formation surface). The substrate 11 is returned from the sputtering chamber S2 to the transfer chamber T0 by the handler H0, and the valve mechanism between the substrate 11 and the sputtering chamber S2 is closed.

(Deposition of solder layer 16, sputtering chamber S3)
Next, the valve mechanism between the transfer chamber T0 and the sputtering chamber S3 is opened, and the Si substrate 11 is transferred from the transfer chamber T0 into the sputtering chamber S3 by the handler H0. Then, in the sputtering chamber S3, the solder layer 16 containing Ag containing Sn and Pb as main components is formed. Using a solder target (Ag—Sn—Pb alloy target) of an Ag—Sn—Pb alloy in a reduced pressure atmosphere in which the deposition pressure in the sputtering chamber S3 is 0.1 Pa to 1.0 Pa and the Ar flow rate is 5 sccm to 50 sccm. Then, a 10 μm to 15 μm thick solder layer is formed by DC pulse sputtering (magnetron sputtering). After the film formation, the valve mechanism between the transfer chamber T0 is opened, and the first conductive film 13, the second conductive film 14, the third conductive film 15, and the solder layer 16 are provided on the back surface (film formation surface). The stacked Si substrate 11 is returned from the sputtering chamber S3 to the transfer chamber T0 by the handler H0, and the valve mechanism with the sputtering chamber S3 is closed. Thus, the sputter film formation of the back electrode 17 (see FIG. 1) of the semiconductor device 10 is completed.

  In the DC pulse sputtering for forming the solder layer 16, the DC pulse OFF duty t1 / t0 (see FIG. 4) was set to 20%, and the DC pulse frequency 1 / t0 was set to 250 kHz. In addition, by cooling the Si substrate 11 by the temperature control unit of the electrostatic chuck, a solder layer was formed while maintaining the temperature of the Si substrate 11 at 150 ° C. or lower. In the Ag—Sn—Pb alloy target, the wt% ratio of Sn and Pb as main components is Sn: Pb = 60: 40, and an alloy target (Sn—Pb (60:60) added with 3% by weight of Ag is added thereto. 40) -Ag (97: 3) wt% target) was used. The Ag—Sn—Pb alloy target is provided on the surface on the anode electrode 70 side of the cathode electrode 60 (see FIG. 3) in the sputtering chamber S3. Further, the Si substrate 11 is provided on the surface on the cathode electrode 60 side of the anode electrode 70 (see FIG. 3) with the back surface, which is the film formation surface, facing the cathode electrode 60 side.

(Unloading the deposited substrate)
Thereafter, the valve mechanism between the load lock chamber L / UL is opened, the Si substrate 11 on which the back electrode 17 is formed is unloaded from the transfer chamber T0 by the handler H0, and between the transfer chamber T0 and the load lock chamber L / UL. Close the valve mechanism. Then, after venting the load lock chamber L / UL and opening a valve mechanism with the transfer machine T1, the Si substrate 11 in the load lock chamber L / UL is removed by the handler H1 of the transfer machine T1. Return to cassette C2.

[Characteristics of solder layer]
FIG. 5 shows a solder layer formed by the sputtering apparatus 100 of the first embodiment using an Ag—Sn—Pb alloy target (solder formed by DC pulse sputtering while cooling the substrate by the temperature control unit of the electrostatic chuck). It is a figure which shows the metal composition part of the film thickness direction of a layer. FIG. 6 shows a solder layer formed by the sputtering apparatus 100 of the first embodiment using an Ag—Sn—Pb alloy target (deposition by DC pulse sputtering while the substrate is cooled by the temperature control unit of the electrostatic chuck). 2 is a cross-sectional SEM photograph of the solder layer). The SEM photograph of FIG. 6 is a photograph of the solder layer 16 at a film thickness position of about 3 μm from the surface of the lower third conductive film 15. Moreover, the magnification of the SEM photograph of FIG. 6 is 5000 times. Therefore, the particle size of the solder layer 16 is about 1 μm.

  5 and 6, a Sn-Pb (60:40) -Ag (97: 3) wt% target was used as an Ag-Sn-Pb alloy target serving as a solder layer. The DC pulse OFF duty t1 / t0 (see FIG. 4) was set to 20%, the DC pulse frequency 1 / t0 was set to 250 kHz, and the DC pulse power (power during the ON period t2) was set to 350 W. . The Ar flow rate was set to 20 sccm.

  FIG. 7 is a diagram showing a comparison of the metal composition of the solder layer when the solder layer is formed by the DC pulse sputtering of the first embodiment and the conventional DC sputtering using a Sn—Pb—Ag alloy target. (A) is the case of DC pulse sputtering film formation, and (b) is the case of DC sputtering film formation. The metal composition in FIG. 7 is the composition of the solder layer at a film thickness position of about 10 μm from the surface of the lower third conductive film 15.

  The film formation conditions for DC pulse sputtering film formation in FIG. 7A are magnetron sputtering using an electrostatic chuck, Sn—Pb (60:40) -Ag (97: 3) wt% target, Ar flow rate: 20 sccm, DC pulse OFF duty t1 / t0: 20%, DC pulse frequency 1 / t0: 250 kHz, DC pulse power (power during ON period t2): 350 W. Further, the film formation conditions for DC sputtering film formation in FIG. 7B are magnetron sputtering using an electrostatic chuck, Sn—Pb (60:40) -Ag (97: 3) wt% target, Ar flow rate: 20 sccm. DC power: 300 W. That is, the difference in the film forming conditions is only the power source (DC pulse power source, steady DC power source, and power source power).

(Metal composition)
First, FIGS. 7A and 7B are compared. For a Sn—Pb—Ag alloy target containing 58.2 wt% Sn and 38.8 wt% Pb, the solder layer formed by the conventional DC sputtering contains 81.8 wt% Sn, but 15% Pb. It contains only 0 wt%. Therefore, even if the substrate is cooled by the temperature control unit of the electrostatic chuck, the sputter rate of Pb, which is a low melting point metal, is significantly reduced (see FIG. 7B).

  On the other hand, the solder layer formed by DC pulse sputtering contains 66.7 wt% Sn and 32.1 wt% Pb. Therefore, when compared with the Sn—Pb—Ag alloy target, the content of Pb, which is a low melting point metal, is slightly decreased, and the Pb sputtering rate is slightly decreased as compared with that of Sn (FIG. 7A). )reference). However, in the solder layer formed by DC pulse sputtering, the content of Pb, which is a low melting point metal, is about twice that of conventional DC sputtering, and the decrease in the sputtering rate of Pb, which is a low melting point metal, can be drastically suppressed. Is done. Thus, it can be seen that the composition ratio of Sn and Pb can be close to the composition ratio of the target by using DC pulse discharge instead of steady DC discharge.

  Further, as shown in FIG. 5, with respect to a Sn—Pb—Ag alloy target containing 58.2 wt% Sn and 38.8 wt% Pb, in the solder layer by DC pulse sputtering, the base film (third conductive film) Almost constant Sn and Pb compositions are shown at positions of film thicknesses of 1 μm, 5 μm, and 9 μm with respect to the surface. Therefore, although the content of Pb, which is a low melting point metal, is slightly lower than that of the Sn—Pb—Ag alloy target, it is considered that the Pb sputtering rate has little film thickness dependency. In conventional DC sputtering, the composition ratio of Pb, which is a low melting point metal, decreases as the film thickness increases. Thus, it can be understood that the composition ratio of Sn and Pb can be made close to the composition ratio of the target without depending on the film thickness by using the DC pulse discharge instead of the steady DC discharge.

(resistance)
In FIG. 6, it can be seen that Sn, Pb (, Ag) is sputtered at a high density without a gap in the solder layer formed by DC pulse sputtering. Therefore, the resistance value of the solder layer by DC pulse sputtering is considered to be equal to or lower than that of the solder layer formed by vacuum deposition.

  A solder layer formed by DC pulse sputtering can have a lower resistivity than a solder layer having a composition shifted by DC sputtering. In a 365 nm thick solder layer formed by DC sputtering, the sheet resistance was 0.596 Ω / □ and the specific resistance (resistivity) was 22 μΩ · cm. On the other hand, in a solder layer having a film thickness of 393 nm formed by DC pulse sputtering, the sheet resistance was 0.466Ω / □ and the specific resistance (resistivity) was 18 μΩ · cm.

(In-plane uniformity)
A sputtering apparatus is generally suitable for forming a film on a substrate having a larger area than a vacuum evaporation apparatus, and can form a film with high film thickness uniformity. The diameter of Si wafers that are currently mainstream is 8 inches, which is a large diameter. For this reason, when the solder layer is formed by DC sputtering, the in-plane uniformity of the film thickness can be made higher than when the film is formed by vacuum deposition. Also for the DC pulse sputtering of the sputtering apparatus 100 of the present invention, it is considered that a solder layer having higher film thickness uniformity than that of the vacuum deposition apparatus can be formed.

(Adhesion)
In sputter deposition, it is generally possible to form a lower layer metal film or a film having higher adhesion to the substrate than vacuum deposition deposition. And the solder layer formed by DC sputtering has higher adhesion to the base film than the solder layer formed by vacuum deposition. For this reason, it is considered that even a solder layer formed by DC pulse sputtering can have an adhesiveness equal to or higher than that formed by vacuum deposition.

[Cooling the substrate]
In general, DC sputtering has a higher sputtering rate than RF sputtering, but when the temperature of the substrate rises, the metal adhering to the substrate is easily released, so the sputtering rate is lowered. Therefore, if the substrate is cooled, the metal adhering to the substrate becomes difficult to be released, so that a decrease in the sputtering rate can be suppressed. In the DC pulse sputtering of the solder layer according to the first embodiment, since the substrate is cooled during the DC pulse OFF period t1 (see FIG. 4) and the temperature rise of the substrate can be suppressed, the decrease in the sputtering rate can be suppressed. It is possible to secure a higher sputtering rate than RF sputtering.

  Furthermore, in the DC pulse sputtering of the solder layer of the first embodiment, the substrate is cooled by the temperature control unit of the electrostatic chuck, and the substrate temperature is maintained at a predetermined temperature of 150 ° C. or lower, so that the sputtering rate is reduced. It can be effectively suppressed. Here, the reason why the substrate temperature is set to 150 ° C. or less is that the melting point of general solder is 150 ° C., and the solder of the thin film evaporates when the temperature reaches 150 ° C. or more.

  As described above, according to the first embodiment of the present invention, the solder layer 16 containing the low melting point metal Pb is formed by DC pulse sputtering in which a DC pulse voltage is applied to the cathode electrode. Since it is possible to form a film without causing a shift in the contained metal composition and without lowering the film formation rate, the back electrode 17 can be formed without exposing the substrate 11 to the atmosphere in one sputtering apparatus. The first conductive film 13, the second conductive film 14, the third conductive film 15, and the solder layer 16 can be stacked and formed in the conventional technique when the substrate is exposed to the atmosphere for forming the solder layer. It is not necessary to provide the fourth conductive film that was necessary as an antioxidant film. As a result, it is possible to reduce the labor and damage of the substrate when the substrate is taken out of the sputtering apparatus and set in the vacuum deposition apparatus for forming the solder layer, and the precious metal used as the metal material of the fourth conductive film The cost of (Au or Ag) can be reduced.

Embodiment 2
FIG. 8 is a schematic cross-sectional view of a semiconductor device in which a back electrode is formed by the sputtering apparatus according to the second embodiment of the present invention. In FIG. 8, the semiconductor device 20 includes a substrate 11, an electric circuit 12, a second conductive film 14, a third conductive film 15, and a solder layer 16. In the semiconductor 20, the second conductive film 14, the third conductive film 15, and the solder layer 16 constitute a back electrode 27. In FIG. 8, the same components as those in FIG.

  Some semiconductor devices do not require a diffusion layer such as p-type Si on the back electrode. The semiconductor device 20 in FIG. 8 has a configuration in which the first conductive film 13 functioning as a diffusion layer such as p-type Si is not provided on the back electrode in the semiconductor device 10 in FIG.

  FIG. 9 is a schematic plan view showing the configuration of the sputtering apparatus according to the second embodiment of the present invention, which is for laminating the back electrode 27 on the semiconductor device 20. In FIG. 9, a sputtering apparatus 100 includes a substrate (wafer) transfer chamber T0, three sputtering chambers S1, S2, and S3 for performing sputtering processing, a load lock chamber L / UL, and a substrate transfer device T1. It has. Here, the sputtering chamber S3 is a sputtering chamber in which the solder layer 16 is formed. The sputtering apparatus 200 is, for example, a magnetron sputtering apparatus. In FIG. 9, the same components as those in FIG.

  That is, the sputtering apparatus 200 of FIG. 9 is configured such that the sputtering chamber S0 in which the first conductive film is formed by sputtering is not provided in the sputtering apparatus 100 of Embodiment 1 (see FIG. 2).

[Procedure for Forming Back Electrode 27 in Sputtering Apparatus 200]
(Board loading)
First, the Si substrate (wafer) 11 having the electric circuit 12 is set in the cassette C1 in the transfer machine T1. After the load lock chamber L / UL is vented and the valve mechanism with the transfer machine T1 is opened, the substrate 11 set in the cassette C1 is moved from the cassette C1 to the load lock chamber L / UL by the handler H1. Transport to.

  Next, the valve mechanism between the load lock chamber L / UL and the transfer machine T1 is closed, and the load lock chamber L / UL is evacuated to 10e-3 Pa. Then, the valve mechanism between the load lock chamber L / UL and the transfer chamber T0 is opened, and the substrate 11 is carried into the transfer chamber T0 by the handler H0 in the transfer chamber T0, and the valve between the load lock chamber L / UL and the load lock chamber L / UL. Close the mechanism.

(Deposition of second conductive film 14, sputtering chamber S1)
Next, the valve mechanism between the transfer chamber T0 and the sputtering chamber S1 is opened, and the Si substrate 11 is transferred from the transfer chamber T0 into the sputtering chamber S1 by the handler H0. Then, a Ti film to be the second conductive film 14 is formed in the sputtering chamber S1. In a reduced pressure atmosphere in which the deposition pressure in the sputtering chamber S1 is 0.1 Pa to 1.0 Pa and the Ar flow rate is 5 sccm to 50 sccm, a Ti target is used to form a film with a thickness of 20 nm to 200 nm by DC sputtering (magnetron sputtering). A Ti film is formed. Then, after the film formation is completed, the valve mechanism between the transfer chamber T0 is opened, and the Si substrate 11 in which the first conductive film 13 and the second conductive film 14 are stacked on the back surface (film formation surface) is moved by the handler H0. The sputter chamber S1 returns to the transfer chamber T0 and the valve mechanism between the sputter chamber S1 is closed.

(Deposition of third conductive film 15, sputtering chamber S2)
Next, the valve mechanism between the transfer chamber T0 and the sputtering chamber S2 is opened, and the Si substrate 11 is transferred from the transfer chamber T0 into the sputtering chamber S2 by the handler H0. Then, in the sputtering chamber S2, a Ni film or a V-Ni film to be the third conductive film 15 is formed. Using a Ni target or a V-Ni alloy target in a reduced pressure atmosphere with a deposition pressure of 0.1 Pa to 1.0 Pa and an Ar flow rate of 5 sccm to 50 sccm by DC sputtering (magnetron sputtering). A Ni film or a V-Ni film having a thickness of 200 nm to 800 nm is formed. Then, after the film formation, the valve mechanism between the transfer chamber T0 is opened, and the first conductive film 13, the second conductive film 14, and the third conductive film 15 are stacked on the back surface (film formation surface). The substrate 11 is returned from the sputtering chamber S2 to the transfer chamber T0 by the handler H0, and the valve mechanism between the substrate 11 and the sputtering chamber S2 is closed.

(Deposition of solder layer 16, sputtering chamber S3)
Next, the valve mechanism between the transfer chamber T0 and the sputtering chamber S3 is opened, and the Si substrate 11 is transferred from the transfer chamber T0 into the sputtering chamber S3 by the handler H0. Then, in the sputtering chamber S3, the solder layer 16 containing Ag containing Sn and Pb as main components is formed. In a reduced pressure atmosphere in which the film forming pressure in the sputtering chamber S3 is 0.1 Pa to 1.0 Pa and the Ar flow rate is 5 sccm to 50 sccm, an Ag—Sn—Pb alloy target is used to perform DC pulse sputtering (magnetron sputtering). A solder layer having a thickness of 10 μm to 15 μm is formed. After the film formation, the valve mechanism between the transfer chamber T0 is opened, and the first conductive film 13, the second conductive film 14, the third conductive film 15, and the solder layer 16 are provided on the back surface (film formation surface). The stacked Si substrate 11 is returned from the sputtering chamber S3 to the transfer chamber T0 by the handler H0, and the valve mechanism with the sputtering chamber S3 is closed. Thus, the sputter film formation of the back electrode 27 (see FIG. 8) of the semiconductor device 20 is completed.

  In the DC pulse sputtering for forming the solder layer 16, the DC pulse OFF duty t1 / t0 (see FIG. 4) was set to 20%, and the DC pulse frequency 1 / t0 was set to 250 kHz. In addition, by cooling the Si substrate 11 by the temperature control unit of the electrostatic chuck, a solder layer was formed while maintaining the temperature of the Si substrate 11 at 150 ° C. or lower. As the Ag—Sn—Pb alloy target, an Sn—Pb (60:40) -Ag (97: 3) wt% target was used.

(Unloading the deposited substrate)
Thereafter, the valve mechanism between the load lock chamber L / UL is opened, the Si substrate 11 on which the back electrode 17 is formed is unloaded from the transfer chamber T0 by the handler H0, and between the transfer chamber T0 and the load lock chamber L / UL. Close the valve mechanism. Then, after venting the load lock chamber L / UL and opening a valve mechanism with the transfer machine T1, the Si substrate 11 in the load lock chamber L / UL is removed by the handler H1 of the transfer machine T1. Return to cassette C2.

  As described above, according to the second embodiment of the present invention, the solder layer 16 containing the low melting point metal Pb is formed by DC pulse sputtering in which a DC pulse voltage is applied to the cathode electrode. 1 can be obtained without causing a shift in the metal composition contained in the solder layer 16 and without lowering the deposition rate, so that the substrate 11 can be formed in one sputtering apparatus. The second conductive film 14, the third conductive film 15, and the solder layer 16 constituting the back electrode 27 can be laminated without being exposed to the atmosphere even once. It is not necessary to provide the fourth conductive film, which is necessary as an antioxidant film when the substrate is exposed to the atmosphere.

Embodiment 3
FIG. 10 is a schematic plan view showing the configuration of the sputtering apparatus according to the third embodiment of the present invention, which is used for laminating the back electrode 17 on the semiconductor device 10 of FIG. In FIG. 10, a sputtering apparatus 300 includes a substrate (wafer) transfer chamber T0, three sputtering chambers S1, S2, and S3 for performing sputtering processing, a load lock chamber L / UL, and a substrate transfer device T1. It has. Here, the sputtering chamber S1 has three sputtering compartments S1-0, S1-1, and S1-2, and different targets can be provided in the respective sputtering compartments. Therefore, a maximum of three different targets can be provided in the sputtering chamber S1. However, when sputtering is performed in any one of the compartments, sputtering cannot be performed in the other two compartments. The sputter compartment S1-0 is a sputter chamber for forming the first conductive film 13, and the sputter compartment S1-1 is a sputter chamber for forming the second conductive film 14. The sputtering chamber S3 is a sputtering chamber in which the solder layer 16 is formed. The sputtering apparatus 300 is a magnetron sputtering apparatus, for example.

  In the sputtering apparatus 300 of FIG. 10, the transfer chamber T0, the sputtering chamber, and the load lock chamber L / UL are separated by a valve mechanism like the sputtering apparatus 100 of FIG. 2 and the sputtering apparatus 200 of FIG. Unlike the cluster type sputtering equipment, the transfer chamber T0 and the sputter chamber, the load lock chamber L / UL, the sputter chamber, and the sputter chamber and the load lock chamber L / UL are connected with a predetermined conductance. It has a configuration. Similarly, the sputter chamber S1 has a configuration in which the sputter chambers are connected to each other with a predetermined conductance. However, the sputtering chamber S3 in which the solder layer 16 is formed becomes a private chamber partitioned from the transfer chamber T0 and other sputtering chambers during sputtering.

  In the sputtering apparatus 300 of FIG. 10, the transfer chamber T0 has a handler H0. The handler H0 rotates while holding the substrate, and conveys the substrate between the sputtering chambers or between the sputtering chamber and the loading / unloading chamber L / UL. The transfer machine T1 includes a handler H1 and substrate (wafer) cassettes C1 and C2. The handler H1 moves while holding the substrate, carries the substrate set in the cassette into the load lock chamber L / UL, carries out the sputtered substrate from the load lock chamber L / UL, and returns it to the cassette.

[Formation of solder layer by DC pulse sputtering and electrostatic chuck in sputtering apparatus 300]
In such a sputtering apparatus 300, in the sputtering chamber S3, the solder layer 16 is formed on the substrate 11 by DC pulse sputtering in which a DC pulse voltage is applied to the electrodes instead of a DC voltage (DC voltage). In the sputtering chamber S3, a temperature control unit is provided in the electrostatic chuck on which the substrate 11 is set, and the solder layer 16 is formed by the electrostatic chuck while suppressing the temperature rise of the substrate 11. A temperature control unit provided in the electrostatic chuck can adjust and control the temperature of the substrate 11, and cools the substrate 11 to maintain a predetermined temperature during the sputtering process. The configuration of the DC pulse power supply unit that applies a DC pulse voltage to the cathode electrode of the sputtering chamber S3 is the same as that of the DC pulse power supply unit 50 of FIG.

[Procedure for Forming Back Electrode 17 in Sputtering Apparatus 300]
(Board loading)
First, the Si substrate (wafer) 11 having the electric circuit 12 is set in the cassette C1 in the transfer machine T1. After the load lock chamber L / UL is vented and the valve mechanism with the transfer machine T1 is opened, the substrate 11 set in the cassette C1 is moved from the cassette C1 to the load lock chamber L / UL by the handler H1. Transport to.

  Next, the valve mechanism between the load lock chamber L / UL and the transfer machine T1 is closed, and the load lock chamber L / UL is evacuated to 10e-3 Pa. The substrate 11 is transferred from the load lock chamber L / UL to the sputter compartment S1-0 in the sputter chamber S1 by the handler H0 in the transfer chamber T0.

(Deposition of first conductive film 13, sputtering chamber S0)
Next, an Al film or Si—Al film to be the first conductive film 13 is formed in the sputtering compartment S1-0. DC sputtering (magnetron sputtering) using an Al target or an Si-Al alloy target in a reduced pressure atmosphere with a deposition pressure of 0.1 Pa to 1.0 Pa and an Ar flow rate of 5 sccm to 50 sccm in the sputtering compartment S1-0. ) To form an Al film or Si—Al film having a thickness of 200 nm to 1 μm. After the film formation is completed, the Si substrate 11 having the first conductive film 13 formed on the back surface (film formation surface) is transferred from the sputtering chamber S1-0 to the sputtering chamber S1-1 in the same sputtering chamber S1 by the handler H0. Transport.

(Deposition of second conductive film 14, sputtering chamber S1)
Next, a Ti film to be the second conductive film 14 is formed in the sputtering compartment S1-1. In a reduced pressure atmosphere in which the deposition pressure in the sputtering chamber S1 is 0.1 Pa to 1.0 Pa and the Ar flow rate is 5 sccm to 50 sccm, a Ti target is used to form a film with a thickness of 20 nm to 200 nm by DC sputtering (magnetron sputtering). A Ti film is formed. After the film formation is completed, the Si substrate 11 in which the first conductive film 13 and the second conductive film 14 are stacked on the back surface (film formation surface) is transferred from the sputtering compartment S1-1 to the sputtering chamber S2 by the handler H0. .

(Deposition of third conductive film 15, sputtering chamber S2)
Next, a Ni film or a V-Ni film to be the third conductive film 15 is formed in the sputtering chamber S2. Using a Ni target or a V-Ni alloy target in a reduced pressure atmosphere with a deposition pressure of 0.1 Pa to 1.0 Pa and an Ar flow rate of 5 sccm to 50 sccm by DC sputtering (magnetron sputtering). A Ni film or a V-Ni film having a thickness of 200 nm to 800 nm is formed. After the film formation, the Si substrate 11 in which the first conductive film 13, the second conductive film 14, and the third conductive film 15 are stacked on the back surface (film formation surface) is sputtered from the sputtering chamber S2 by the handler H0. Transfer to chamber S3.

(Deposition of solder layer 16, sputtering chamber S3)
Next, the sputtering chamber S3 is partitioned from the transfer chamber T0 and other sputtering chambers to become a private chamber. Then, in the sputtering chamber S3, the solder layer 16 containing Ag containing Sn and Pb as main components is formed. In a reduced pressure atmosphere in which the film forming pressure in the sputtering chamber S3 is 0.1 Pa to 1.0 Pa and the Ar flow rate is 5 sccm to 50 sccm, an Ag—Sn—Pb alloy target is used to perform DC pulse sputtering (magnetron sputtering). A solder layer having a thickness of 10 μm to 15 μm is formed. After film formation is completed, the partition between the sputtering chamber S3, the transfer chamber T0, and other sputtering chambers is released, and the first conductive film 13, the second conductive film 14, and the third conductive film 15 are formed on the back surface (film formation surface). The Si substrate 11 on which the solder layer 16 is laminated is transferred from the sputtering chamber S3 to the load lock chamber L / UL by the handler H0. Thus, the sputter film formation of the back electrode 17 (see FIG. 1) of the semiconductor device 10 is completed.

  In the DC pulse sputtering for forming the solder layer 16, the DC pulse OFF duty t1 / t0 (see FIG. 4) was set to 20%, and the DC pulse frequency 1 / t0 was set to 250 kHz. In addition, by cooling the Si substrate 11 by the temperature control unit of the electrostatic chuck, a solder layer was formed while maintaining the temperature of the Si substrate 11 at 150 ° C. or lower. As the Ag—Sn—Pb alloy target, an Sn—Pb (60:40) -Ag (97: 3) wt% target was used. The Ag—Sn—Pb alloy target is provided on the surface on the anode electrode 70 side of the cathode electrode 60 (see FIG. 3) in the sputtering chamber S3. Further, the Si substrate 11 is provided on the surface on the cathode electrode 60 side of the anode electrode 70 (see FIG. 3) with the back surface, which is the film formation surface, facing the cathode electrode 60 side.

(Unloading the deposited substrate)
Thereafter, the load lock chamber L / UL is vented to open the valve mechanism with the transfer machine T1, and then the Si substrate 11 in the load lock chamber L / UL is removed by the handler H1 of the transfer machine T1. Return to cassette C2.

  As described above, according to the third embodiment of the present invention, the solder layer 16 containing the low melting point metal Pb is formed by DC pulse sputtering in which a DC pulse voltage is applied to the cathode electrode. 1 can be obtained without causing a shift in the metal composition contained in the solder layer 16 and without lowering the deposition rate, so that the substrate 11 can be formed in one sputtering apparatus. The first conductive film 13, the second conductive film 14, the third conductive film 15, and the solder layer 16 constituting the back electrode 17 can be laminated without being exposed to the atmosphere even once. There is no need to provide the fourth conductive film, which is necessary as an antioxidant film when the substrate for solder layer formation is exposed to the atmosphere.

  Furthermore, by using the sputtering apparatus 300 in which a plurality of sputtering chambers are connected with a predetermined conductance, it is not necessary to open and close the valve mechanism as in the case of the cluster type sputtering apparatus. Can be formed.

Embodiment 4
FIG. 11 is a schematic plan view showing the configuration of the sputtering apparatus according to the fourth embodiment of the present invention, which is used for laminating the back electrode 27 on the semiconductor device 20 of FIG. In FIG. 11, a sputtering apparatus 400 includes a substrate (wafer) transfer chamber T0, three sputtering chambers S1, S2, and S3 for performing sputtering processing, a load lock chamber L / UL, and a substrate transfer device T1. It has. Here, the sputtering chamber S3 is a sputtering chamber in which the solder layer 16 is formed. The sputtering apparatus 400 is, for example, a magnetron sputtering apparatus. In FIG. 11, the same components as those in FIG. 10 are denoted by the same reference numerals.

  The sputtering chamber S1 of the sputtering apparatus 400 does not include the sputtering compartments S1-0, S1-1, and S1-2 like the sputtering chamber S1 (see FIG. 10) of the sputtering apparatus 300 of the third embodiment. In other words, the sputtering apparatus 400 of FIG. 11 does not include the sputtering compartment S1-0 in which the first conductive film 13 is formed by sputtering in the sputtering chamber S1 in the sputtering apparatus 300 of Embodiment 3 (see FIG. 10). The chamber S1 has a single chamber configuration for forming the second conductive film 14 by sputtering.

[Procedure for Forming Back Electrode 27 in Sputtering Apparatus 400]
(Board loading)
First, the Si substrate (wafer) 11 having the electric circuit 12 is set in the cassette C1 in the transfer machine T1. After the load lock chamber L / UL is vented and the valve mechanism with the transfer machine T1 is opened, the substrate 11 set in the cassette C1 is moved from the cassette C1 to the load lock chamber L / UL by the handler H1. Transport to.

  Next, the valve mechanism between the load lock chamber L / UL and the transfer machine T1 is closed, and the load lock chamber L / UL is evacuated to 10e-3 Pa. Then, the substrate 11 is transferred from the load lock chamber L / UL to the sputtering chamber S1 by the handler H0 in the transfer chamber T0.

(Deposition of second conductive film 14, sputtering chamber S1)
Next, a Ti film to be the second conductive film 14 is formed in the sputtering chamber S1. In a reduced pressure atmosphere in which the deposition pressure in the sputtering chamber S1 is 0.1 Pa to 1.0 Pa and the Ar flow rate is 5 sccm to 50 sccm, a Ti target is used to form a film with a thickness of 20 nm to 200 nm by DC sputtering (magnetron sputtering). A Ti film is formed. After the film formation is completed, the Si substrate 11 having the second conductive film 14 laminated on the back surface (film formation surface) is transferred from the sputtering chamber S1 to the sputtering chamber S2 by the handler H0.

(Deposition of third conductive film 15, sputtering chamber S2)
Next, a Ni film or a V-Ni film to be the third conductive film 15 is formed in the sputtering chamber S2. Using a Ni target or a V-Ni alloy target in a reduced pressure atmosphere with a deposition pressure of 0.1 Pa to 1.0 Pa and an Ar flow rate of 5 sccm to 50 sccm by DC sputtering (magnetron sputtering). A Ni film or a V-Ni film having a thickness of 200 nm to 800 nm is formed. After the film formation, the Si substrate 11 in which the first conductive film 13, the second conductive film 14, and the third conductive film 15 are stacked on the back surface (film formation surface) is sputtered from the sputtering chamber S2 by the handler H0. Transfer to chamber S3.

(Deposition of solder layer 16, sputtering chamber S3)
Next, the sputtering chamber S3 is partitioned from the transfer chamber T0 and other sputtering chambers to become a private chamber. Then, in the sputtering chamber S3, the solder layer 16 containing Ag containing Sn and Pb as main components is formed. In a reduced pressure atmosphere in which the film forming pressure in the sputtering chamber S3 is 0.1 Pa to 1.0 Pa and the Ar flow rate is 5 sccm to 50 sccm, an Ag—Sn—Pb alloy target is used to perform DC pulse sputtering (magnetron sputtering). A solder layer having a thickness of 10 μm to 15 μm is formed. After film formation is completed, the partition between the sputtering chamber S3, the transfer chamber T0, and other sputtering chambers is released, and the second conductive film 14, the third conductive film 15, and the solder layer 16 are laminated on the back surface (film formation surface). The formed Si substrate 11 is transferred from the sputtering chamber S3 to the load lock chamber L / UL by the handler H0. Thus, the sputter film formation of the back electrode 27 (see FIG. 8) of the semiconductor device 20 is completed.

  In the DC pulse sputtering for forming the solder layer 16, the DC pulse OFF duty t1 / t0 (see FIG. 4) was set to 20%, and the DC pulse frequency 1 / t0 was set to 250 kHz. In addition, by cooling the Si substrate 11 by the temperature control unit of the electrostatic chuck, a solder layer was formed while maintaining the temperature of the Si substrate 11 at 150 ° C. or lower. As the Ag—Sn—Pb alloy target, an Sn—Pb (60:40) -Ag (97: 3) wt% target was used. The Ag—Sn—Pb alloy target is provided on the surface on the anode electrode 70 side of the cathode electrode 60 (see FIG. 3) in the sputtering chamber S3. Further, the Si substrate 11 is provided on the surface on the cathode electrode 60 side of the anode electrode 70 (see FIG. 3) with the back surface, which is the film formation surface, facing the cathode electrode 60 side.

(Unloading the deposited substrate)
Thereafter, the load lock chamber L / UL is vented to open the valve mechanism with the transfer machine T1, and then the Si substrate 11 in the load lock chamber L / UL is removed by the handler H1 of the transfer machine T1. Return to cassette C2.

  As described above, according to the fourth embodiment of the present invention, the solder layer 16 containing the low melting point metal Pb is formed by DC pulse sputtering in which a DC pulse voltage is applied to the cathode electrode. 1 can be obtained without causing a shift in the metal composition contained in the solder layer 16 and without lowering the deposition rate, so that the substrate 11 can be formed in one sputtering apparatus. The second conductive film 14, the third conductive film 15, and the solder layer 16 constituting the back electrode 27 can be laminated without being exposed to the atmosphere even once. It is not necessary to provide the fourth conductive film, which is necessary as an antioxidant film when the substrate is exposed to the atmosphere.

  Further, by using the sputtering apparatus 300 in which a plurality of sputtering chambers are connected with a predetermined conductance, the same effect as that of the third embodiment can be obtained. Therefore, the back electrode can be laminated and formed in a short time.

[Underlayer / Substrate]
In the first to fourth embodiments, the solder layer is formed on the Ni film or the V-Ni film. However, a solder layer having high adhesion and no composition shift is formed on the Si substrate or the glass substrate. be able to.

Embodiment 5
FIG. 12 is a schematic cross-sectional view of a semiconductor device in which a back electrode is formed by the sputtering apparatus of the present invention. In FIG. 12, the semiconductor device 30 includes a substrate 11, an electric circuit 12, and a solder layer 16. In the semiconductor device 30, only the solder layer 16 constitutes the back electrode 37. In FIG. 12, the same components as those in FIG.

  A semiconductor device 30 in FIG. 12 has an electric circuit 12 on one surface (front surface) of the substrate 11, and a back surface electrode made of only the solder layer 16 on the other surface (back surface, film-formed surface) of the substrate 11. 37. As described above, for example, a power device is a semiconductor device having an electrode provided on the back surface of a substrate.

  The back surface electrode 37 (solder layer 16) of the semiconductor device 30 includes, for example, the sputtering apparatus 100 (see FIG. 2) of the first embodiment, the sputtering apparatus 200 (see FIG. 9) of the first embodiment, and the above embodiment. 3 sputtering apparatus 300 (see FIG. 10) or the sputtering apparatus 400 of the fourth embodiment (see FIG. 11), the DC pulse power supply 50 in FIG. Using a sputtering apparatus configured to include a sputtering chamber S3 in which a solder layer 16 is formed by applying FIG. 4A), a load lock chamber L / UL, and a substrate transfer device T1. A film can be formed. The procedure for forming the solder layer 16 is the same as that described in the first to fourth embodiments.

[substrate]
In the first to fifth embodiments, the Si substrate is used as the substrate. However, as the substrate of the present invention, a glass substrate or Ni substrate can be used in addition to the silicon substrate. In the first to fifth embodiments, the case where the solder layer, which is an alloy film containing a low melting point metal, is formed using the back surface of the substrate as the film formation surface has been described. The present invention is also applicable when an alloy film containing a low-melting-point metal is formed on the surface of the substrate having the surface to be formed as a film formation surface.

It is a schematic cross section of the semiconductor device which formed the back surface electrode with the sputtering device of Embodiment 1 of this invention. It is a schematic plan view which shows the structure of the sputtering device of Embodiment 1 of this invention. It is a schematic block diagram which shows the structure of the DC pulse power supply unit which applies DC pulse voltage to the electrode arrange | positioned in a sputtering chamber in the sputtering device of this invention. It is a time chart explaining the output voltage waveform of the DC pulse power supply unit of FIG. 3, (a) is a DC pulse voltage, (b) is a DC voltage. Metal composition of film thickness direction of solder layer (solder layer formed by DC pulse sputtering while cooling substrate with electrostatic chuck) using Ag—Sn—Pb alloy target with sputtering apparatus of the present invention It is a figure which shows It is a cross-sectional SEM photograph of the solder layer (The solder layer formed by DC pulse sputtering, cooling a board | substrate with an electrostatic chuck) using the Ag-Sn-Pb alloy target by the sputtering device of this invention. It is a figure which shows the comparison of the metal composition of a solder layer at the time of forming a solder layer by the DC pulse sputtering of this invention, and the conventional DC sputtering using a Sn-Pb-Ag alloy target, (a) is DC pulse sputtering. In the case of film formation, (b) is the case of DC sputtering film formation. It is a schematic cross section of the semiconductor device which formed the back surface electrode with the sputtering device of Embodiment 2 of this invention. It is a schematic plan view which shows the structure of the sputtering device of Embodiment 2 of this invention. It is a schematic plan view which shows the structure of the sputtering device of Embodiment 3 of this invention. It is a schematic plan view which shows the structure of the sputtering device of Embodiment 4 of this invention. It is a schematic cross section of the semiconductor device which formed the back surface electrode with the sputtering device of this invention.

Explanation of symbols

  10, 20, 30 Semiconductor device, 11 substrate, 12 electric circuit, 13 first conductive film, 14 second conductive film, 15 third conductive film, 16 solder layer, 17, 27, 37 back electrode, 50 power supply unit, 51 DC power source, 52 OFF pulse power source, 53 applied voltage generation unit, 54 control unit, 60 cathode electrode, 70 anode electrode, 100, 200, 300, 400 sputtering device, C1, C2 cassette, H0, H1 handler, L / UL load Lock chamber, S0, S1, S2, S3 sputtering chamber, S1-0, S1-1, S1-2 sputtering chamber.

Claims (5)

A cathode electrode provided with an alloy target containing lead (Pb) or tin (Sn) and an anode electrode provided with a substrate are arranged opposite to each other in a reduced-pressure atmosphere, and on one surface of the substrate, A film forming apparatus for forming an alloy film containing Pb or Sn by a sputtering method,
Power supply means for applying a DC pulse voltage to the cathode electrode;
Temperature control means for cooling the substrate below the melting point of the alloy film;
A film forming apparatus comprising at least   The film forming apparatus according to claim 1, wherein the temperature control unit maintains the temperature of the substrate at a temperature of 150 ° C. or lower. A cathode electrode provided with an alloy target containing lead (Pb) or tin (Sn) and an anode electrode provided with a substrate are arranged opposite to each other in a reduced-pressure atmosphere, and on one surface of the substrate, A film forming method using a film forming apparatus for forming an alloy film containing Pb or Sn by a sputtering method,
Applying a DC pulse voltage to the cathode electrode;
A film forming method characterized in that the temperature of the substrate during film formation is kept below the melting point of the alloy film.   The film forming method according to claim 3, wherein the temperature of the substrate during film formation is maintained at a predetermined temperature of 150 ° C. or less.   5. The film forming method according to claim 3, wherein the DC pulse voltage is applied such that a ratio of an OFF period in which the potential of the cathode electrode is 0 or positive is within a range of 10% to 30%.

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