JP5098244B2 - Memory module testing apparatus and method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a test apparatus and method for faulty contact in a memory module allowing to surely detect faulty contact caused by dust or the like at terminals of the memory module by a simple configuration. <P>SOLUTION: The test apparatus comprises a module-specific array in which terminal number and type are set for various types of memory modules, an array creation section for grouping the terminals in accordance with the types and writing them on a group-specific array for a module input from a module name input section from the module-specific array, and a test section for performing a test for each terminal by a test method predetermined by group in accordance with the module-specific array created by the array creation section. Whether a terminal with faulty contact has been detected or not is judged from the output generated in the test by the test section. When one terminal has been detected to be faulty, a judgement section judges that the memory module concerned involves faulty contact. <P>COPYRIGHT: (C)2008,JPO&amp;INPIT

Description

  The present invention relates to a memory module testing apparatus and method for detecting a contact failure caused by contamination of terminals of a memory module.

  Manufacturers of various electronic devices such as computers and servers that use memory modules purchase memory modules from semiconductor manufacturers, but are required to detect poor contact caused by contamination of memory module terminals.

  There are several test methods for detecting a contact failure in a terminal portion of a conventional memory module, which will be described below. Note that the memory module is mainly intended for DIMM (Dual Inline Memory Module: a module in which a plurality of memory chips are mounted on a small board and mounted in a memory socket for use).

Test method 1
Insert a memory module into the DIMM socket of a server, notebook PC, desktop PC, or other device that uses the memory module, perform a function test, and check whether the function test is successful. How to do it.

Test method 2
This is a method by observing the external appearance of a terminal portion of a memory module delivered from a semiconductor manufacturer with a microscope. Since the test time per DIMM takes about 10 minutes, only 6 appearance tests per hour and 48 appearance tests per day (8 hours) can be performed. Therefore, 5000 (sheets) ÷ (20 (days) × 48) ≒ 5 (persons) to perform an appearance test at 5000 sheets / month (20 days) requires 5 workers per month. Become.

Test method 3
Test method 3 is shown in the explanatory diagram of the conventional example of FIG. A. of FIG. Is a configuration diagram, 80 is a socket (connector), 81 is a memory module, 82 is a terminal part of the memory module part, 83 is a lead terminal part of the socket, and 84 is a tester for measuring resistance. After the operator inserts the memory module 81 into the socket 80, the operator confirms continuity between the terminal portion 82 of the memory module portion and the lead terminal portion 83 of the socket 80. At that time, FIG. The test is executed according to the flowchart shown in FIG. That is, assuming that the pin number is N, N = 0 is set first (S1 in FIG. 6), N = N + 1 is performed (S2), N-pin test conditions are set (S3), and N pin (S4). The measurement result is judged as good or bad (S5 in FIG. 6). If it is good, it is determined whether N is the maximum (S6). If not, the process goes to S2 to update the pin number N and perform the same processing When N is the maximum, the product is determined to be a non-defective product and the test is terminated. When the quality is determined to be defective, the memory module is terminated as a defective product.

  An invention of an apparatus for detecting a contact failure of a memory card has been proposed, and the configuration of the proposed apparatus is shown in FIG. 7 (see Patent Document 1). In FIG. 7, 90 is a memory card to be tested, 91 is an apparatus body, 92 is a memory card connector, 93 is a memory card interface controller, 94 is an external interface controller, 95 is an interface connector, 96 is a display controller, and 97 is A display screen, a RAM 98 having a work area, a ROM 99 storing a control procedure by the CPU, and a CPU 100 for controlling the entire apparatus.

The memory card 90 is inserted into the memory card connector 92 of the apparatus main body 91, and the contact failure detection data of the data line read from the memory card 90 is compared with the confirmation data in the RAM 98. As a result, when no contact failure is detected, the check data read from the predetermined address of the memory card 90 is data other than the predetermined address, and only one of all the address lines of the memory card 90 is the other address line. A contact failure is identified when it matches at least one of the data sequentially read from a desired number of addresses different from the value of.
JP-A-5-174200

  According to the above test method 1, it is necessary to prepare devices such as servers and notebook personal computers. However, these devices are expensive (servers are several million / unit), and a large number of memory modules are tested in parallel. In order to do so, it is necessary to prepare a plurality of such devices, which causes a problem of increased equipment costs. Moreover, according to the test method 2, there is a problem that labor costs are required. Further, according to the test method 3, the operator selects the terminal part 82 of the memory module part and the lead terminal part 83 of the socket 80 in a state where the memory module 81 is inserted into the socket 80, and sequentially confirms the continuity. There is a problem that it takes time and effort because it requires manual work. According to the technique disclosed in Patent Document 1, it is necessary to perform complicated data processing in which data is read out by changing an address and compared with data stored in advance in a RAM. There is a problem that it is necessary to prepare data for comparison and to prepare a program for generating addresses for testing.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a memory module testing apparatus and method capable of reliably detecting a contact failure due to dust or the like of a terminal portion of a memory module with a simple configuration.

  FIG. 1 shows the basic configuration of the present invention. In the figure, 1 is the module name input section, 2 is the module-specific array table in which the terminal number and function (terminal) representing the function is defined (registered), and 3 is the module-specific array table. An array table generator for generating an array table in which each terminal of the module corresponding to the specified module name is divided into groups each having its type (function) as a unit, 4 corresponds to the type generated by the array table generator 3 The terminal numbers for each group are arranged and the optimum test (measurement) method is set for each group. The arrangement table for each group is 5, the test product (memory module), and 6 is determined according to the group. A test unit (or measurement unit) 7 that performs a test (measurement) is a determination unit that determines the quality of the contact test of the memory module to be tested.

  When the module name is input by the module name input unit 1, the array table generation unit 3 takes out the registered terminal number and the terminal type for the module name input from the module-specific array table 2, and each group corresponding to the terminal type Each terminal number is set in the group-specific array table 4. In the group-by-group arrangement table 4, an optimal test method is preset for each group (corresponding to the type of terminal). Next, the test product (memory module) 5 having the name input by the module name input unit 1 is mounted on the test unit 6 (inserted into the connector), and the test (measurement) is executed. At this time, the terminal number arranged in the group for each group set in the group-by-group arrangement table 4 is determined by the test method registered in the group-by-group arrangement table 4 (optimal for the group). A test is performed. In this case, all the groups registered in the group-by-group arrangement table 4 are sequentially tested for each terminal number by each test method set for each group. The result obtained by the test by each test method (output signal obtained by the test) is input to the determination unit 7, and the presence or absence (good / bad) of contact failure compared to a predetermined standard corresponding to each test method Determine.

  By grouping power pins and ground pins into separate groups, contact resistance can be measured by applying voltage and measuring current.

  According to the present invention, various memory modules can be easily tested by simply inputting the module product name. In addition, it is possible to switch the test for an appropriate contact failure corresponding to the type of terminal of each memory module. Therefore, it is possible to test the contact resistance of the power supply pins, the ground pins, etc. by an appropriate method.

  FIG. 2 and FIG. 3 are process flows (No. 1) and (No. 2) of the embodiment. The module name input unit 1, the array table generation unit 3, the test unit 6, and the like, which execute each function shown in FIG. Each function of the determination unit 7 includes a CPU (processor) including RAM, ROM, an input device such as a keyboard / mouse, a display device, and an auxiliary storage device using a storage medium such as a hard disk, CD, or DVD. It can be performed using a computer.

  4 is an example of the configuration of the sequence listing. Is an arrangement table by module (2 in FIG. 1), and for each of modules A,..., Module H, a terminal number and a terminal name (type or function) are set. B. of FIG. Is a configuration example of an array table by group (4 in FIG. 1) generated by the array table generation unit, and is an example in which terminals are divided into groups 1 to 6 by terminal names (terminal types or functions). Reference numeral 1 is an input terminal, group 2 is an output terminal, group 3 is a bus terminal, group 4 is a power supply 1 terminal, group 5 is a power supply 2 terminal, and group 6 is a ground terminal. When the processing flow in FIGS. 2 and 3 identifies to which group (which type) the terminal numbers of all terminals included in the selected memory module correspond, the terminal numbers are written in the corresponding group arrangement table. In addition, a test method for testing (measuring) the terminals of each group is preset for each group in the array table generation unit.

  The processing flow of the embodiment shown in FIGS. 2 and 3 will be described. First, the test of the module A is started (S1 in FIG. 2), and “Module A” is selected as the module product name (S2 in the same). The arrangement table of module A is opened (S3). In this case, a list of module names in the module-specific array table is displayed on the display device, and when module A is selected from the list by the input device, the selected module A array table (stored in a storage device such as a hard disk) is retrieved. It is. A. of FIG. In the configuration example of the module-by-module arrangement table, the terminal name (type or function) is defined for each terminal number of module A, the terminal number “P1” is a terminal having an “input” function, and “P2 “Is a terminal having an“ output ”function,...,“ P240 ”is a terminal constituting a“ bus ”. Next, in step S4, an array table generation process is performed for the terminal number “P1”. That is, the type (function) of “P1” is read (S400 in FIG. 2), and first, it is identified whether the terminal number “P1” is an input terminal (S401).

  In the example of this description, since the type of the terminal number “P1” of the module A (A in FIG. 4) is “input”, it is determined as “YES” and The group 1 array table (terminal number is blank in the initial state) provided corresponding to the “input terminal” is opened (S402 in FIG. 2), and “P1” is written in the group 1 array table column (S403). ), Close the group 1 sequence list (S404). The processing of S402 to S404 is performed in accordance with A. of FIG. The type of the terminal number P1 of the module A shown in FIG. "P1" is set in the terminal number column corresponding to the array number (representing the order in the group 1) 1 of the array table of the group 1 "input terminal" in the array table by group shown in FIG.

  When writing to the array table for terminal number P1 is completed, S405 in FIG. 2 (whether P1 is an output terminal), S409 (whether P1 is a bus terminal), S413 (whether P1 is a power supply 1 terminal), and It is determined NO in each determination of S417 (whether P1 is a power supply 2 terminal) or S421 (whether P1 is a ground terminal) in FIG. 3, then the process proceeds to step S5 in FIG. Processing similar to S4 (S400 to S424) is executed. Since the type (function) of the terminal number P2 is “output”, B. of FIG. “P2” is written in the terminal number column of array number 1 in the array table of group 2 output terminals in the array table by group shown in FIG.

  Hereinafter, the details of the terminals of the terminal numbers P3 to P240 of the module A are omitted in FIG. 3, but the same processing as S400 to S424 shown in FIGS. 2 and 3 is executed for each terminal number. . In this way, B. of FIG. As shown in Fig. 4, for module A, all terminals are group 1 (input terminal), group 2 (output terminal), group 3 (bus terminal), group 4 (power supply 1 terminal), group 5 (power supply 2 terminal), group 6 (ground terminal), the terminal number is written for each group, so that B. of FIG. The sequence table by group as shown in FIG.

  When the sequence table for each group is generated, tests (measurements) for each group are executed in S700 to S711 in FIG. In FIG. 3, a plurality of tests are shown in parallel, but actually the tests are executed in order for each group.

  That is, the test product (memory module) to be tested is mounted on the test section (6 in FIG. 1). The test unit is provided with a plurality of test devices (or measurement devices) for performing tests by a plurality of test (measurement) methods. The test unit is equipped with a board with a number of connectors that connect to each terminal of the memory module that is the test product, and the terminals of each connector and the terminals of the test equipment to be tested are switched on and off one by one. It has a number of switches that can. Then, the operator can select from a plurality of test apparatuses corresponding to the selected test method.

  For the group 1 (input terminal), the group-specific arrangement table is referred to (S700 in FIG. 3), and the test is performed on the target pin by the test method 1 (S701). Next, referring to the array table of group 2 (output terminals) (S702 in FIG. 3), the test is performed on the target pin by the test method 1 (S703). Hereinafter, the test is performed on the group 3 (bus terminal) by the test method 1 and the test is performed on the group 4 to 6 by the test method 2. The results obtained by these tests are determined by the determination unit (7 in FIG. 1), and if there is a defect even with one terminal, it is determined as defective (S8 in FIG. 3). When a failure is determined, the test for the memory module is terminated (determined as a product having a contact failure), and when no failure is detected at all terminals, the test is terminated (determined as a non-contact product).

  The contents of Test Method 1 and Test Method 2 executed in S700 to S711 in FIG. 3 will be described with reference to FIG. FIG. 5 is an explanatory diagram of the test method. A. of FIG. Indicates a test method 1 for testing an input terminal, an output terminal, and a bus terminal, 50 is a memory module (MM), 51 is a connector, 52 is a pin (terminal) connected to a terminal of the memory module 50, and 53 is each Switches (SW1 to SW200) for switching the connection between the pins and the terminals of the current source 54, 54 is a current source, and 55 is a voltmeter that detects the voltage between the two terminals of the current source 54.

  The test is performed in a state in which the memory module (MM) 50 to be tested is attached to the connector 51 from one terminal of the current source 54 (the memory module is not supplied with power and is not operating). In the test method 1, first, the switch SW1 connected to the pin P1 (assumed to be an input pin) is turned on, and the switch SW200 that connects the other terminal of the current source 54 to the ground pin is turned on. In this state, when a constant current (50 μA (microampere) in this example) is generated from the current source 54, the voltage generated in the voltmeter 55 is detected. At this time, B. of FIG. When the diode characteristics (semiconductor memory characteristics) shown in FIG. 1 are obtained, it is determined that the diode is good, and when it is outside this characteristic, it is determined that the contact is poor. That is, from the current source 54, it is determined that the contact state is good if the voltage value generated in the voltmeter 55 is a value between about −0.5V and −0.2V for a current of minus 50 μA, Otherwise, it is identified as defective.

  C. of FIG. Indicates a test method 2 for testing a power supply terminal and a ground terminal, and symbols of the memory modules (MM) 50 to 53 are denoted by A. in FIG. , 56 is a voltage source, and 57 is an ammeter. This test method 2 is performed in a state in which a memory module is mounted on the connector 51 (a state in which no power is supplied to the memory module and the memory module is not operating). Is connected to the two terminals of the voltage source 56, a constant voltage (a low voltage at which the memory IC is not destroyed, for example, 0.1V) is applied, and a current (a minute current, for example, about 100 μA) is applied by the ammeter 57 In the same way, the power source 2 terminal and the other power source 2 terminal are connected by the two terminals of the voltage source 56, the current is detected by the ammeter 57, and the ground terminal is also defined between the ground terminals. A current is detected by applying a voltage. In this case, it is known that the current is normal by detecting that the current flows.

It is a figure which shows the basic composition of this invention. It is a figure which shows the processing flow (the 1) of an Example. It is a figure which shows the processing flow (the 2) of an Example. It is a figure which shows the structural example of an arrangement | sequence table. It is an example of a test (measurement) method. It is explanatory drawing of a prior art example. It is a figure which shows the structure of the proposed apparatus.

Explanation of symbols

1 Module name input part 2 Module array table 3 Array table generation part 4 Group array table 5 Test product (memory module to be tested)
6 Test part 7 Judgment part

Claims (4)

In memory module testing equipment for detecting poor contact of terminals,
According to the type of function of each terminal for the module input from the module name input section from the module-based arrangement table in which each terminal number and each function type is set for each type of memory module. An array table generator for grouping and writing to the group-specific array table;
A test unit for testing each terminal by a test method specified in advance for each group according to the module-specific sequence table generated by the sequence table generation unit;
A determination unit that determines whether a contact failure terminal is detected from the output generated by the test of the test unit, and determines that the memory module is determined to be a contact failure when it is detected that one terminal is defective. And a memory module test apparatus. In claim 1,
The memory module terminal function type is divided into any of input terminals, output terminals, bus terminals, power supply terminals, and ground terminals, and each terminal number is written as a different group in the group-by-group arrangement table. Memory module testing equipment. In claim 1,
The test unit includes a plurality of test apparatuses that execute different test methods corresponding to the groups set in the group-by-group arrangement table,
For test equipment that detects contact failure by supplying current between terminals connected to a group of input, output, and bus terminals and detecting the voltage between the terminals, and for groups of power and ground terminals And a test device for detecting a contact failure by supplying a voltage between the connected terminals and detecting a current between the terminals . A test method for a memory module using a processing device for detecting poor contact of terminals,
Create an array by module with each terminal number and each function type for each memory module.
Select the module arrangement table corresponding to the module arrangement table by specifying the module name to be tested,
Create a sequence table by group by identifying the function type of each terminal set in the selected module's sequence table and writing each terminal number into a group corresponding to the function type.
In the test unit equipped with the memory module to be tested using the created grouped arrangement table, each terminal is tested by a test method corresponding to each group,
Judging the output obtained from the test and detecting the presence or absence of poor contact,
A test method for a memory module.

Images