JP5055062B2 - Wiring board manufacturing method and wiring board material - Google Patents

Description

  The present invention relates to a method for manufacturing a wiring board and a wiring board material that are particularly suitable for performing a miniaturization process while maintaining flatness of a flexible wiring board.

  In recent years, as the demand for miniaturization and multi-functionality of mobile phones and various digital electronic devices has increased, electronic components such as semiconductor IC elements used in such devices and printed wiring boards on which such components are mounted There is also a strong demand for miniaturization, multifunctionalization, and miniaturization of patterned conductive layers.

  In manufacturing the wiring board, not only the patterned conductive layer is miniaturized, but also various processing techniques necessary for forming fine via holes and conductive vias for interlayer connection are employed. And as a prior art relevant to the said processing technique, there exist patent documents 1-3, for example.

  In Patent Document 1, when filling an insulating resin or a conductive resin into a through hole or a via hole provided on a substrate as an object to be processed, the resin filling is performed by stencil printing the resin in a vacuum atmosphere. Technology is provided to suppress air entrainment and unfilled holes.

  Patent Document 2 discloses that when resin sealing for forming an envelope of an electrical component is performed, the resin is stencil-printed on the surface of the electrical component in a vacuum atmosphere, so that there is no loss of mold without bubbles. A technology for forming a stop resin layer is provided.

  Furthermore, Patent Document 3 forms a through hole (via hole) in a part of an insulating substrate having a wiring conductive layer pattern formed on one side, and prints a conductive paste for interlayer connection from the other side of the insulating substrate. A technique for producing a wiring board material or a wiring board filled in the through hole is provided.

  Therefore, the present inventor, as an example, performs the filling process to the through holes by printing the conductive paste as shown in Patent Document 3 in a vacuum atmosphere as shown in Patent Documents 1 and 2. It was considered to prevent unfilling of the conductive paste into the via holes and preventing bubbles from being mixed.

  Next, an example of the prior art based on the above-mentioned idea of the present inventor will be described with reference to FIG. FIG. 4A is a schematic perspective view showing the wiring board material 40. FIG. 4B is a schematic view for explaining a method of manufacturing the wiring board material 40, and is a side view partially showing a cross section.

  That is, the wiring board material 40 includes a flexible insulating substrate 41 made of, for example, a polyimide resin film, and a patterned conductive layer 42 formed on one surface (the upper surface in FIG. 4A) of the insulating substrate 41. Yes. The patterned conductive layer 42 includes a first conductive layer region 42a formed in a central portion and shown in a rectangular shape, a second conductive layer region 42b shown in a rectangular frame shape surrounding the first conductive layer region 42a and the first conductive layer region 42a. And a closed loop hole (gap) 42c formed between the second conductive layer regions 42a and 42b.

  The first and second conductive layer regions 42a and 42b are simply shown in a rectangular shape, but in actuality, they have various complicated wiring pattern shapes depending on the circuit function. Here, the second conductive layer region 42b is formed with a rectangular frame-like pattern in order to function as a shield layer for removing electrical noise or a rigid body for stabilizing the dimensions of the wiring board material.

  Therefore, as shown in FIG. 4B, the patterned conductive layer 42 directly overlaps the upper surface of the processing stage 43 having a flat surface installed in a casing (not shown) that forms a vacuum atmosphere. The wiring board material 40 is placed. At this time, the pair of side surfaces 41a and 41b of the insulating substrate 41 are oriented in the relationship shown in FIGS. 4 (a) and 4 (b).

  Next, the conductive paste material P is filled in the through holes VH of the insulating substrate 41 by squeezing the conductive paste material P with a squeegee S on the upper surface side of the insulating substrate 41 in a vacuum atmosphere. Then, an interlayer conductive via 44 is formed.

However, during the printing process in such a vacuum atmosphere, the closed loop hole 42c is blocked by the flat surface of the processing stage 43 to form a sealed space. Therefore, a differential pressure is generated between the space and the surrounding vacuum atmosphere, and the sealed air remaining in the space swells to cause a partial bulging deformation in the insulating substrate 41, that is, a fold 45, and insulation. There is a problem that the flatness of the entire wiring board material 40 including the board 41 is hindered.
Patent No. 3260347 registration gazette Japanese Examined Patent Publication No. 6-66350 Japanese Unexamined Patent Publication No. 2003-332747

  The present invention solves the above-mentioned conventional problems, and particularly provides a method for manufacturing a wiring board and a wiring board material suitable for performing a miniaturization process while maintaining the flatness of the flexible wiring board. Objective.

  According to the first aspect of the present invention, there is provided a method of manufacturing a wiring substrate in which a processing step is performed on the other surface side of the insulating substrate of a wiring substrate material provided with a patterned conductive layer having a closed loop hole on one surface of the insulating substrate. (A) forming a groove in the patterned conductive layer of the wiring board material in communication with the closed loop hole and leading to the periphery of the insulating substrate; and (B) patterning the wiring board material. And a step of arranging the conductive layer so as to be in contact with the surface of the processing stage having a flat surface, and (C) a step of performing processing on the other surface side of the insulating substrate in a vacuum atmosphere. To do.

  According to a second aspect of the present invention, in the method for manufacturing a wiring board according to the first aspect, a via hole reaching a part of the pattern conductive layer is formed in the insulating substrate of the wiring board material in advance. The processing step in step C) is a step of forming an interlayer conductive via by performing conductive paste printing on the other surface side of the insulating substrate and filling the via hole with the conductive paste. To do.

According to a third aspect of the present invention, in the method for manufacturing a wiring board according to the first or second aspect, the groove portion has a cross-sectional area perpendicular to a direction communicating with the closed loop hole of 200 μm ² or more. It is characterized by being.

The wiring board material of the present invention according to claim 4 is an insulating substrate, a patterned conductive layer having a closed loop hole formed on one surface of the insulating substrate, and the closed loop hole formed in the patterned conductive layer. It includes a groove communicating with the insulating substrate peripheral communication, and a via hole opening on the other surface of the insulating substrate formed through reaches a portion of the patterned conductive layer on the insulating substrate, the patterned conductive layer The closed loop formed between the first conductive layer region, the second conductive layer region surrounding the first conductive layer region with a space therebetween, and the first conductive layer region and the second conductive layer region. And the groove is provided in the second conductive layer region and is formed leaving a conductive layer portion on a side in contact with the insulating substrate .

  The invention according to claim 5 is the wiring board material according to claim 4, further comprising an interlayer conductive via formed by filling the via hole with a conductive paste.

According to a sixth aspect of the present invention, in the wiring board material according to the fourth or fifth aspect, the groove portion has a cross-sectional area perpendicular to a direction communicating with the closed loop hole of 200 μm ² or more. It is characterized by.

  According to the method of manufacturing a wiring board of the present invention, the patterned conductive layer having the closed loop hole of the wiring board material is formed with the groove portion that communicates with the closed loop hole and communicates with the peripheral edge of the insulating substrate. During the processing step, the differential pressure is suppressed in relation to the periphery of the wiring board material due to the presence of the groove portion communicating with the space (gap) in the closed loop hole. As a result, it is possible to achieve an effect that the wiring substrate material including the insulating substrate can perform a miniaturization process while maintaining flatness without creases.

  Hereinafter, Example 1 and Example 2 shown in FIG. 1 and FIG. 2 will be sequentially described in order to describe an embodiment of a method of manufacturing a wiring board and a wiring board material according to the present invention.

(Example 1):
As shown in FIG. 1A, a wiring board material 1 includes a flexible film insulating substrate 2 made of, for example, polyimide resin or liquid crystal polymer, and one surface of the insulating substrate 2 (upper surface in FIG. 1A). The patterned conductive layer 3 made of, for example, copper foil is formed. The patterned conductive layer 3 includes a first conductive layer region 3a formed in a central portion and shown in a rectangular shape, a second conductive layer region 3b shown in a rectangular frame shape surrounding and surrounding the first conductive layer region 3a. , A closed loop hole (gap) 3c formed between the second conductive layer regions 3a and 3b, a groove 3d formed in a part of a rectangular frame of the second conductive layer region 3b, and a part of the insulating substrate 2 Via hole VH (see FIG. 1B).

  The patterned conductive layer 3 is shown as a schematic diagram or schematic diagram in FIG. 1, and the first conductive layer region 3a is simply shown in a rectangular shape. The main pattern region of the circuit wiring having a wiring pattern shape of various forms is configured, and is patterned with the number of circuit impositions corresponding to a large number of circuit blocks. In addition, the second conductive layer region 3b is intended here to serve as a shield layer for removing electrical noise and a rigid body for stabilizing the dimensions of the wiring board material, and has a relatively simple pattern shape. It is said that.

  The groove portion 3d is provided so as to communicate with the closed loop hole 3c and to the peripheral edge of the insulating substrate 2, and a part of the second conductive layer region 3b is formed on the entire layer by, for example, selective chemical etching or laser processing. It is formed by removing to a thickness. In addition, although the said closed loop hole 3c is not a complete closed loop by formation of the said groove part 3d, it is expressed as the meaning also including the closed loop which takes a general form.

  The via hole VH is formed through a part of the insulating substrate 2 by, for example, laser processing or drilling, and is blocked by reaching one surface of the insulating substrate 2 to the inner surface of the patterned conductive layer 3. In this state, an opening is formed on the other surface side of the insulating substrate 2 (see FIG. 1B).

  Therefore, as shown in FIG. 1B, the patterned conductive layer 3 directly overlaps the upper surface of the processing stage 4 having a flat surface installed in a casing (not shown) that forms a vacuum atmosphere. The wiring board material 1 is placed. At this time, as shown in FIG. 1 (b), the pair of side surfaces 2a, 2b of the insulating substrate 2 are oriented so as to be located on the left and right, respectively. In addition, the cross-sectional part of FIG.1 (b) is shown as a cross section of the direction along the grooved centerline of the said groove part 3d.

  Next, the conductive paste material P is filled in the via hole VH of the insulating substrate 2 by performing squeegee printing on the conductive paste material P with a squeegee S on the upper surface side of the insulating substrate 2 in a vacuum atmosphere. Then, the interlayer conductive via 5 is formed. Although only one via hole VH and conductive via 5 are shown in FIG. 1B, there are actually many via holes VH and conductive vias 5 in relation to the patterned conductive layer 3.

  The conductive paste material P includes, for example, as a first metal component, at least one kind of low electrical resistance and good heat conductive metal particles selected from the group of nickel, silver and copper, and as a second metal component , Tin, bismuth, indium and lead, and at least one kind of low-melting-point metal particles. The paste is composed of a binder component mainly composed of an epoxy resin. Such a conductive paste is in an uncured or semi-cured soft state at room temperature, and is a conductive material that is thermally cured by heat treatment such as in a hot press process and performs an adhesive function. The processing stage 4 may be referred to as a processing table or a processing table, and in this embodiment can also be referred to as a printing stage.

  By the way, when producing a laminated wiring board, as described above, a plurality of wiring board materials 1 on which the conductive vias 5 are formed are overlapped and integrally laminated by, for example, batch pressing. When a two-layer wiring board is manufactured, a conductive layer made of, for example, copper foil may be bonded to the upper surface of the insulating substrate 2 of the wiring board material 1 and predetermined wiring patterning may be applied to the conductive layer.

  According to the method for manufacturing a wiring board and the wiring board material used therefor according to Example 1, since the conductive paste is filled into the via hole VH in a vacuum atmosphere, generation of bubbles and unfilling is prevented. A fine conductive via 5 can be formed.

  Further, the surface of the patterned conductive layer 3 of the wiring board material 1 is in close contact with the flat surface of the processing stage 4, and air initially present in the space (gap) corresponding to the closed loop hole 3c passes through the groove 3d. The pressure difference is suppressed or eliminated in relation to the periphery of the wiring board material. As a result, the wiring board material including the insulating substrate can maintain flatness without creases. Therefore, the squeezing printing operation is smoothly performed, and the conductive paste 5 is surely filled into the via hole VH, so that the conductive via 5 can be formed finely.

  In addition, due to the thermal stress distribution during heat treatment for mounting reflow such as when electronic components are mounted on the patterned conductive layer 3 of the wiring board material 1, due to the presence of the second conductive layer region 3b having a rectangular frame shape, Although it is conceivable that the wiring board material 1 may be warped, the groove 3d formed in the second conductive layer region 3b may absorb the thermal stress and suppress the warping of the wiring board material.

(Example 2):
Next, a method for manufacturing a wiring board and a wiring board material according to Embodiment 2 of the present invention will be described with reference to FIG. Here, the same parts as those shown in the first embodiment and FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted.

  That is, as shown in FIG. 2A, the wiring board material 10 includes an insulating substrate 2 made of a flexible film and a patterned conductive layer 31 made of copper foil formed on the upper surface of the insulating substrate 2. The patterned conductive layer 31 includes a first conductive layer region 3a formed in the center and shown in a rectangular shape, a second conductive layer region 3b1 shown in a rectangular frame shape surrounding the first conductive layer region 3a. , A closed loop hole (gap) 3c formed between the second conductive layer regions 3a and 3b1, a groove 3d1 formed in a part of a rectangular frame of the second conductive layer region 3b1, and a part of the insulating substrate 2 Via hole VH (see FIG. 2B).

  The groove 3d1 is formed to a depth that leaves a thin conductive layer portion 3b2 on the side of the second conductive layer region 3b1 in contact with the insulating substrate 2. Therefore, due to the presence of the conductive layer portion 3b2, the second conductive layer region 3b1 can perform a shielding function for removing electrical noise by an electrically complete closed loop. In addition, the presence of the conductive layer portion 3b2 makes it easier to obtain dimensional stabilization of the wiring board material than in the first embodiment, reduces thermal stress distortion during reflow heat treatment during electronic component mounting, and reduces the wiring board material 10 It may be easy to suppress warping.

  The patterning of the patterned conductive layer 31 and the method of forming the groove 3d1 and the via hole VH are the same as in the first embodiment. Further, as shown in FIG. 2B, after the wiring board material 10 is placed on the processing stage 4, the conductive paste P is squeegee printed with the squeegee S and filled into the via holes VH, whereby the interlayer conductive vias 5 are formed. A series of processing methods for forming the are applied in the same manner as in the first embodiment, and the same effects of the invention can be obtained.

  By the way, each of the groove portions 3d and 3d1 in the first and second embodiments is a parallel groove having a flat pattern with a uniform groove width along the groove length. The shape of the groove portion is, for example, a taper shape or an orifice shape. Thus, various patterns such as a pattern shape in which a narrow portion and a wide portion are mixed, or a meandering shape can be used.

  Next, the evaluation result of the wiring board material after the vacuum printing process based on the present invention shown in the above embodiment will be described with reference to FIG.

  First, FIG. 3A is a schematic plan view schematically showing the evaluation wiring board material 30, and FIG. 3B is a crease after the evaluation wiring board material 30 is subjected to vacuum printing. It is a graph which shows the result of having measured the incidence rate of a defect. Here, the evaluation wiring board material 30 has the same structure as that of the wiring board material 1 of the first embodiment shown in FIG. 1A, and the same portions are denoted by the same reference numerals and detailed description of the portions will be given. Omitted.

  And the said 1st conductive layer area | region 3a1 in the wiring board material 30 for evaluation is an area | region corresponding to the 1st conductive layer area | region 3a in Example 1, and is a several circuit pattern shape which makes a circuit imposition number 300 pieces. 3 and is schematically represented with a plurality of circular patterns in FIG.

  Such an evaluation wiring board material 30 is formed using a rectangular polyimide resin film having a thickness of 250 μm and a thickness of 250 μm as the insulating substrate 2 and a copper foil layer having a thickness of 12 μm as the patterned conductive layer 3. ing. In addition, a plurality of types of evaluation wiring board materials having different groove cross-sectional areas and different groove cross-sectional areas were prepared for each groove cross-sectional area by varying the width and depth of the groove 3d.

  Then, the squeezing printing process was performed for each of the plurality of types of evaluation wiring board materials under the conditions of a degree of vacuum of 0.8 Torr, a squeegee pressure of 0.4 MPa, and a squeegee speed of 20 mm / sec.

FIG. 3B shows the evaluation result of the wiring board material after the vacuum printing process under the above conditions. The horizontal axis of FIG.3 (b) has shown the cross-sectional area (micrometer < ² >) of the groove part 3d, and the vertical axis | shaft has shown the broken crease defect incidence (%), respectively.

That is, in the conventional technique without a groove portion, the defect occurrence rate is as high as 20%. On the other hand, according to the technology of the present invention in which the groove portion is provided, it is possible to obtain an effect that the rate of occurrence of broken creases decreases as the groove cross-sectional area increases. Furthermore, an evaluation result was obtained that the defect occurrence rate was about 15% when the groove cross-sectional area was less than 200 μm ^2, but greatly reduced to 3% or less when it became 200 μm ² or more. Therefore, the groove cross-sectional area of the groove is more preferably 200 μm ² or more.

  By the way, the groove cross-sectional area of the groove portion is an area in a cross section perpendicular to the direction in which the groove portions 3d, 3d1 communicate with the closed loop hole 3c. In addition, if the planar pattern of the groove portions 3d and 3d1 is tapered or orifice-shaped as described above, there are a narrow portion and a wide portion of the groove width. What is necessary is just to determine on the basis of an area.

  In each of the above embodiments, the treatment on the other surface side of the insulating substrate 2 on which the patterned conductive layer 3 is formed on one surface is shown as an example in which a conductive paste is printed and filled into the via hole VH. However, the present invention is not limited to this, and various materials such as a dielectric paste and a resin paste may be printed and filled. For example, there are various treatments such as filling a plating layer in a recess of LVH with a resin paste. Further, the process on the other surface side of the insulating substrate 2 may be a case where the other surface of the insulating substrate 2 is directly processed, or a case where the processing is indirectly performed via another layer. Is also included. Further, the closed loop hole is not limited to the annular shape as shown in FIGS. 1 and 2, and includes all holes shaped so as to form a substantially sealed space (gap).

BRIEF DESCRIPTION OF THE DRAWINGS It is a figure for demonstrating the manufacturing method and wiring board material of a wiring board which concern on Example 1 of this invention, (a) is a schematic perspective view which shows the wiring board material, (b) Explains the manufacturing method of a wiring board. It is a partially cutaway side view for doing. It is a figure for demonstrating the manufacturing method and wiring board material of a wiring board which concern on Example 2 of this invention, (a) is a schematic perspective view which shows the wiring board material, (b) Explains the manufacturing method of a wiring board. It is a partially cutaway side view for doing. It is a figure for demonstrating the evaluation result of the wiring board manufactured by the manufacturing method of the wiring board which concerns on the Example of this invention, (a) is a schematic plan view which shows the wiring board material for evaluation, (b) is It is a graph which shows the crease defect incidence rate of a wiring board. It is a figure for demonstrating the manufacturing method and wiring board material of a prior art wiring board, (a) is a schematic perspective view which shows the wiring board material, (b) A part for demonstrating the manufacturing method of a wiring board It is a notch side view.

Explanation of symbols

1, 10, Wiring board material 2 Insulating board 3, 31 Patterned conductive layer 3a, 3a1 First conductive layer region 3b, 3b1 Second conductive layer region 3c Closed loop hole (gap)
3d, 3d1 Groove 4 Processing stage 5 Interlayer conductive via 30 Evaluation circuit board material P Conductive paste VH Via hole

Claims (6)

A method of manufacturing a wiring board, wherein a processing step is performed on the other surface side of the insulating substrate of the wiring substrate material provided with a patterned conductive layer having a closed loop hole on one surface of the insulating substrate,
(A) forming a groove in the patterned conductive layer of the wiring board material that communicates with the closed loop hole and communicates with the periphery of the insulating substrate;
(B) arranging the wiring board material so that the patterned conductive layer is in contact with the processing stage surface having a flat surface;
(C) In a vacuum atmosphere, a step of processing the other surface side of the insulating substrate;
A method of manufacturing a wiring board, comprising:   A via hole reaching a part of the pattern conductive layer is formed in the insulating substrate of the wiring board material in advance, and the processing step in the step (C) performs conductive paste printing on the other surface side of the insulating substrate. The method of manufacturing a wiring board according to claim 1, wherein an interlayer conductive via is formed by filling the via hole with the conductive paste. The method for manufacturing a wiring board according to claim 1, wherein the groove portion has a cross-sectional area perpendicular to a direction communicating with the closed loop hole of 200 μm ² or more. An insulating substrate; a patterned conductive layer having a closed loop hole formed on one surface of the insulating substrate; a groove formed in the patterned conductive layer and communicating with the periphery of the insulating substrate; A via hole formed in the substrate and reaching a part of the patterned conductive layer and opening on the other surface side of the insulating substrate ;
The patterned conductive layer includes a first conductive layer region, a second conductive layer region surrounding and surrounding the first conductive layer region, and a gap between the first conductive layer region and the second conductive layer region. The closed loop hole formed,
The wiring board material , wherein the groove is provided in the second conductive layer region and is formed leaving a conductive layer portion on a side in contact with the insulating substrate.   The wiring board material according to claim 4, further comprising an interlayer conductive via formed by filling the via hole with a conductive paste. 6. The wiring board material according to claim 4, wherein the groove portion has a cross-sectional area perpendicular to a direction communicating with the closed loop hole of 200 μm ² or more.

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