JP5025141B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device sealed with a flexible base material.

  Development of cards, tags, and the like on which thin semiconductor chips are mounted is underway. These cards and tags store personal information or information relating to the manufacturing history of products, and are used for authentication or product management.

  By the way, the semiconductor chip used so far has been manufactured using a silicon wafer as a material. However, a silicon wafer is an expensive material, which becomes a factor that hinders cost reduction in the manufacture of semiconductor chips.

  Therefore, in recent years, a thin film transistor manufactured using a glass substrate or the like is separated from the glass substrate or the like to produce a sheet-like or film-like integrated circuit, and a technology for mounting the integrated circuit on a card or a tag has been developed. It is done.

  A technology for separating a thin film transistor from a supporting substrate such as a glass substrate has been developed so far. For example, as described in Patent Document 1, a release layer is irradiated with laser light to release hydrogen. There is a method of separating them.

  In developing a technique for separating such a thin film transistor from a supporting substrate, it is also essential to develop a technique for separating the thin film transistor with a high yield.

Japanese Patent Laid-Open No. 10-125929

  An object of the present invention is to provide a technique for manufacturing a semiconductor sheet or a semiconductor chip with a high yield by using a circuit including a thin film transistor as a component.

  The method for manufacturing a semiconductor device according to the present invention is characterized by repeatedly performing a process of transferring a semiconductor device fixed to a thick base material from a thick base material to a thin base material.

  According to one method of manufacturing a semiconductor device of the present invention, the step of bonding a flexible base material to an element layer is performed x times (an integer of x ≧ 4), and y + 1 times (an integer of 1 ≦ y ≦ x−1). ) Is the same as the thickness of the substrate bonded in the yth time (an integer of 1 ≦ y ≦ x−1) or the yth time (1 ≦ y ≦ x−1). It is characterized by being thinner than the thickness of the substrate to be bonded to (integer). As a result, damage to the element layer that may occur due to separation from the substrate can be reduced, and the yield of manufacturing the semiconductor device can be improved. In such a method of manufacturing a semiconductor device of the present invention, the base material used in the process from the first to the x-2th time (an integer of x ≧ 4) is such that the adhesiveness is lowered by irradiation with light such as ultraviolet rays. A substrate having an adhesive layer is preferred. In particular, the base material preferably has a pressure-sensitive adhesive layer having adhesiveness greater than 5000 N / 20 mm at the time of adhesion and having adhesiveness smaller than 490 N / 20 mm after light irradiation. Thereby, separation of the element layer and the substrate can be facilitated, and damage to the element layer is reduced. Further, the base material used in the x-1 and x-th steps is preferably a base material having an adhesive layer made of a composition containing a thermoplastic resin as a main component, and particularly an adhesive made of a hot melt adhesive. A substrate having a layer is particularly preferred. As a result, a semiconductor device that has very little influence on the human body or the like and is low in pollution can be obtained.

  According to one method of manufacturing a semiconductor device of the present invention, a process of sealing an element layer using two base materials having flexibility and the same thickness is performed m times (an integer of m ≧ 2). , The thickness of the base material used for n + 1-th sealing (an integer of 1 ≦ n ≦ m−1) is the thickness of the base material used for the n-th sealing (an integer of 1 ≦ n ≦ m−1). It is characterized by being thinner than that. As a result, damage to the element layer that may occur due to separation from the substrate can be reduced, and the yield of manufacturing the semiconductor device can be improved. In such a method for manufacturing a semiconductor device of the present invention, the substrate used in the steps from the first to the m-1th (m ≧ 2) is such that the adhesiveness is lowered by irradiation with light such as ultraviolet rays. A substrate having an adhesive layer is preferred. In particular, a substrate having an adhesive layer that has an adhesiveness smaller than 490 N / 20 mm after light irradiation is preferable. Thereby, separation of the element layer and the substrate can be facilitated, and damage to the element layer is reduced. Further, the base material used in the m-th step is preferably a base material having an adhesive layer made of a composition containing a thermoplastic resin as a main component, and in particular, a base material having an adhesive layer made of a hot melt adhesive It is particularly preferred that As a result, a semiconductor device that has very little influence on the human body or the like and is low in pollution can be obtained.

  According to one method of manufacturing a semiconductor device of the present invention, a layer including an element is provided between a protective layer and an insulating layer, and a flexible first base material is bonded to the protective layer side. After the first base material is separated from the element layer to which the second base material having flexibility is bonded, the third base material is thinner than the first base material and has flexibility on the protective layer side. After the base material is adhered and the second base material is separated from the element layer to which the third base material is adhered, the insulating layer side is thinner than the second base material and has a fourth flexibility. And a step of adhering the substrate. Thereby, damage to the element layer that may be caused by warping of the base material can be reduced, and the yield of manufacturing the semiconductor device is improved. In such a method for manufacturing a semiconductor device of the present invention, the second base material is separated in a state where a fifth base material having a thickness of 100 μm to 200 μm is adhered to the third base material side. Is preferred. Thereby, damage to the element layer that may be caused by warping of the third substrate can be reduced. Moreover, it is preferable that a 1st base material and a 2nd base material are base materials which have the adhesion layer to which adhesiveness falls by light irradiation, such as an ultraviolet-ray. In particular, a substrate having an adhesive layer that has an adhesiveness smaller than 490 N / 20 mm after light irradiation is preferable. Further, the third base material and the fourth base material are preferably base materials having an adhesive layer made of a composition containing a thermoplastic resin as a main component, and in particular, have an adhesive layer made of a hot melt adhesive. A substrate is particularly preferred. As a result, a semiconductor device that has very little influence on the human body or the like and is low in pollution can be obtained.

  By implementing the present invention, damage to the element layer due to stress can be reduced, and a semiconductor device with favorable yield can be manufactured. Further, by implementing the present invention, it is possible to prevent the electrical characteristics of elements included in the element layer from being deteriorated due to stress. Moreover, by implementing this invention, the semiconductor device which sealed the element layer using the thin base material of 50 micrometers or less can be manufactured. A semiconductor device in which an element layer is sealed with such a thin substrate has resistance to bending and is suitable for manufacturing using a roll-to-roll method.

(Embodiment 1)
One mode of a semiconductor device of the present invention will be described with reference to FIGS.

  In FIG. 1A, a separation layer 102 is provided over a substrate 101. An insulating layer 103 is provided over the separation layer 102. A transistor including a semiconductor layer 104a or a semiconductor layer 104b, a gate insulating layer 105, and a gate electrode 106a or a gate electrode 106b is provided over the insulating layer 103. Is provided. The transistor is covered with a first interlayer insulating layer 107. A wiring 108a, a wiring 108b, a wiring 108c, a wiring 108d, a wiring 109a, a wiring 109b, a wiring 109c, and a wiring 109d are provided over the first interlayer insulating layer 107. The wirings 108a and 108b include the semiconductor layer 104a and the wiring 108c. , 108d are electrically connected to the semiconductor layer 104b through openings provided in the first interlayer insulating layer 107, respectively. The wirings 108 a to 108 d and the wirings 109 a to 109 d are covered with the second interlayer insulating layer 110. A wiring 111 a and a wiring 111 b are provided on the second interlayer insulating layer 110. The wiring 111 a is electrically connected to the wiring 108 a, and the wiring 111 b is electrically connected to the wiring 108 c through an opening provided in the second interlayer insulating layer 110. A wiring 112a, a wiring 112b, a wiring 112c, and a wiring 112d are further provided on the second interlayer insulating layer 110. Among these, the wiring 112a and the wiring 112c are electrically connected to the wiring 111a and the wiring 111b, respectively. It is provided to connect. Note that the wiring 112a, the wiring 112b, the wiring 112c, and the wiring 112d are a series of wirings that are electrically connected to each other. Further, the wirings 112 a to 112 d are covered with a protective layer 113.

  Here, the substrate 101 is not particularly limited, and may be made of any material such as glass, quartz, ceramic, plastic, and the like, while the element layer 140 that is a layer including elements such as transistors is being manufactured. Any substrate that functions as a support substrate for supporting 140 may be used.

  The peeling layer 102 is preferably either a layer containing silicon or a layer formed by laminating a layer made of metal and a layer made of an oxide of the metal. As a layer containing silicon, for example, an amorphous or crystalline semiconductor layer containing silicon (Si) as a main component, or a semiconductor layer containing silicon as a main component and containing both an amorphous component and a crystalline component ( Also referred to as semi-amorphous semiconductor). In addition, as a layer formed by laminating a layer made of metal and a layer made of the metal oxide, for example, a layer formed by laminating a layer made of tungsten (W) and a layer made of tungsten oxide (WOx) A layer formed by laminating a layer composed of niobium (Nb) and a layer composed of niobium oxide (NbOx), a layer formed by laminating a layer composed of titanium (Ti) and a layer composed of titanium oxide (TiOx) Etc.

  The insulating layer 103 is preferably formed using an insulator such as silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide. Note that silicon oxynitride is an insulator including both a bond of oxygen and silicon and a bond of nitrogen and silicon, and in particular, an insulator including more bonds of oxygen and silicon than bonds of nitrogen and silicon. Silicon nitride oxide is an insulator that includes both a bond between oxygen and silicon and a bond between nitrogen and silicon, and more particularly includes a larger number of bonds between nitrogen and silicon than bonds between oxygen and silicon. The insulating layer 103 may be a single layer or a multilayer. Note that in the case where the insulating layer 103 is formed using silicon nitride or silicon nitride oxide, impurities such as an alkali metal contained in the substrate 101 can be prevented from diffusing toward the element layer 140. Further, by providing a layer made of silicon nitride or silicon nitride oxide between the substrate 101 and the separation layer 102, impurities such as alkali metal contained in the substrate 101 can be prevented from diffusing toward the element layer 140. be able to.

  There is no particular limitation on the semiconductor layers 104a and 104b, and a semiconductor such as silicon or silicon germanium containing an amorphous component or a crystalline component, or a semiconductor such as silicon or silicon germanium containing both an amorphous component or a crystalline component is used. What was formed using can be used. Each of the semiconductor layers 104a and 104b only needs to include a region functioning as a source or drain and a region functioning as an active region. In addition to this, a region for relaxing an electric field applied from the drain side is provided. It may be provided between a region functioning as a drain and a region functioning as an active region.

  There is no particular limitation on the gate insulating layer 105, and the gate insulating layer 105 may be formed using an insulator such as silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide. The gate insulating layer 105 may be a single layer or a multilayer.

  There are no particular limitations on the gate electrodes 106a and 106b, and those formed of a conductive material can be used. Specific examples of the conductive material include metals such as tungsten, molybdenum, aluminum, and copper. Further, an alloy of these metals with silicon, neodymium, or the like may be used. The gate electrodes 106a and 106b may be a single layer or multiple layers, and the shape is not particularly limited. Note that in order to improve the adhesion between the gate electrodes 106a and 106b and the gate insulating layer 105, the gate electrodes 106a and 106b are formed in multiple layers, and in particular, a layer in contact with the gate insulating layer 105 is a gate insulating layer such as titanium nitride or tantalum nitride. Alternatively, a substance having good adhesion to 105 may be used.

  Note that although a transistor is illustrated in FIG. 1A, a capacitor, a resistor, a diode, a memory element, or the like may be provided as appropriate. Moreover, there is no limitation in particular about the structure of each element. For example, the transistor may have a single drain structure or an LDD structure. In the LDD transistor, a region where the low-concentration impurity region and the gate electrode overlap each other may be provided.

  There is no particular limitation on the first interlayer insulating layer 107, and a layer formed using an insulator such as silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, or siloxane may be used. Note that siloxane is a compound including an element such as silicon (Si), oxygen (O), and hydrogen (H) and further including a Si—O—Si bond (siloxane bond). Siloxane includes cyclic siloxane in addition to chain siloxane, and specific examples include silica glass, alkylsiloxane polymer, alkylsilsesquioxane polymer, and hydrogenated silsesquioxane polymer. Moreover, the 1st interlayer insulation layer 107 formed using organic insulators, such as an acryl and a polyimide other than these inorganic insulators, may be sufficient. The first interlayer insulating layer 107 may be a single layer or a multilayer.

  The wirings 108a to 108d and the wirings 109a to 109d are not particularly limited, but are preferably formed using a low-resistance conductive material such as aluminum or copper or an alloy containing silicon or the like. The wirings 108a to 108d and the wirings 109a to 109d may be multilayer or single layer. In the case of a multilayer structure, it is preferable to use a layer laminated so that a layer made of a conductive material such as aluminum is sandwiched between layers made of a metal nitride such as titanium nitride or tantalum nitride.

  The second interlayer insulating layer 110 is not particularly limited, and a layer formed using an insulator such as silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, or siloxane may be used. In addition to these inorganic insulators, the second interlayer insulating layer 110 formed using an organic insulator such as acrylic or polyimide may be used. The second interlayer insulating layer 110 may be a single layer or a multilayer.

  There is no particular limitation on the wiring 111a and the wiring 111b, and a wiring formed using a conductive material such as aluminum, copper, tungsten, or molybdenum may be used. Further, the wiring 111a and the wiring 111b may be a multilayer or a single layer.

  The wirings 112a to 112d are preferably formed of a conductive material containing copper, silver, or the like as a main component. The wirings 112a to 112d are formed so as to function as antennas. There is no particular limitation on a method for forming the wirings 112a to 112d, and the wiring 112a to 112d may be formed using a screen printing method or the like.

  The protective layer 113 is preferably formed of a resin such as an epoxy resin. Moreover, it is preferable that the thickness of the protective layer 113 is 15-100 micrometers. As a result, unevenness on the surface of the protective layer 113 that may occur reflecting the shape of the wirings 112a to 112d and the like is reduced.

  Note that in the present invention, a layer including an element such as a transistor sandwiched between the insulating layer 103 and the protective layer 113 is collectively referred to as an element layer 140.

  Hereinafter, a method of separating the element layer 140 from the substrate 101 and sealing with a sheet or film will be described.

  First, an opening extending to the separation layer 102 through the protective layer 113, the second interlayer insulating layer 110, the first interlayer insulating layer 107, the gate insulating layer 105, and the insulating layer 103 is provided (FIG. 1B). There is no particular limitation on the method for providing the opening, and etching may be performed. By providing the opening in this manner, when the peeling layer 102 is etched, the contact area between the etchant and the peeling layer 102 is increased, and the etching is facilitated.

Next, the peeling layer 102 is selectively etched. Etching may be performed using either gas or liquid. As etching proceeds, the etchant diffuses between the element layer 140 and the substrate 101, and the peeling layer 102 is removed (FIG. 2A). Here, when the peeling layer 102 contains silicon or tungsten as a main component, chlorine trifluoride (ClF ₃ ) or the like is preferably used as a gas that can selectively etch the peeling layer 102. In the case where the peeling layer 102 is formed using silicon and is etched by a wet method, tetramethylammonium hydroxide or the like is preferably used as a liquid that can selectively etch the peeling layer 102. Note that the peeling layer 102 does not necessarily have to be etched completely, and a part of the peeling layer 102 may remain to the extent that the substrate 101 and the element layer 140 can be separated.

  Next, the first base 121 is bonded to the protective layer 113 side (FIG. 2B). The first base 121 is preferably a sheet or film that has a thickness of 100 μm or more and is provided with an adhesive layer whose adhesiveness is reduced by ultraviolet irradiation or heating. Specifically, the base material is provided with a pressure-sensitive adhesive layer having adhesiveness larger than 5000 N / 20 mm at the time of adhesion and having adhesiveness smaller than 490 N / 20 mm after ultraviolet irradiation or heating. preferable. There is no particular limitation on the material of the sheet and film, and a material made of polyester or polyethylene terephthalate can be used. Here, by setting the thickness of the first base 121 to 100 μm or more, the stress generated between the substrate 101 and the first base 121 can be reduced, and the first base 121 is separated when the substrate 101 is separated. It is possible to prevent the element layer 140 from being damaged by the warp of the material 121.

  Next, the substrate 101 is separated from the element layer 140 to which the first base 121 is bonded (FIG. 3A). Then, after separating the substrate 101, the first base 121 is irradiated with ultraviolet rays (FIG. 3B). Thereby, the adhesiveness of the 1st base material 121 falls. Further, when heat treatment is performed after irradiation with ultraviolet rays, the first substrate 121 is more easily peeled off and the yield is improved. The heat treatment is preferably performed at a temperature of 120 ° C to 140 ° C.

  Next, the second base material 122 is bonded to the insulating layer 103 side (FIG. 4A). As a result, the element layer 140 is sealed between the first base material 121 and the second base material 122 (first sealing step). Similar to the first base material 121, the second base material 122 has a thickness of 100 μm or more and has a flexible sheet-like or film-like base that is reduced in adhesiveness by ultraviolet irradiation or heating. It is preferable that an adhesive layer is provided. Specifically, the base material is provided with a pressure-sensitive adhesive layer having adhesiveness larger than 5000 N / 20 mm at the time of adhesion and having adhesiveness smaller than 490 N / 20 mm after ultraviolet irradiation or heating. preferable. There is no particular limitation on the material of the base, and a material made of polyester or polyethylene terephthalate can be used. Here, by setting the thickness of the second base material 122 to 100 μm or more, the element layer 140 is damaged by the warping of the second base material 122 when the first base material 121 is separated. Can be prevented.

  Next, after peeling off the first base 121 (FIG. 4B), the second base 122 is irradiated with ultraviolet rays (FIG. 5A). The adhesiveness of the second base material 122 is reduced by the irradiation with ultraviolet rays. Further, when heat treatment is performed after the irradiation with ultraviolet rays, the second substrate 122 is more easily peeled off and the yield is improved. The heat treatment is preferably performed at a temperature of 120 ° C to 140 ° C.

  Next, the third substrate 131 is bonded to the protective layer 113 side (FIG. 5B). The third base 131 is a base having a thickness of 50 μm or less and a flexible sheet-like or film-like base provided with an adhesive layer containing a thermoplastic resin as a main component. preferable. More specifically, the adhesive layer is composed mainly of an ethylene / vinyl acetate copolymer (EVA) system, a polyester system, a polyamide system, a thermoplastic elastomer system, a polyolefin system, etc., and is also called a hot melt adhesive. Preferably it consists of. A hot-melt adhesive is an adhesive that does not contain an organic solvent, and melts by heating and then solidifies by cooling to bond the object. The hot melt adhesive has advantages such as a short bonding time and little influence on the human body. Moreover, the base part should just consist of a material whose softening temperature is higher than an adhesive layer, for example, what consists of polyester or a polyethylene terephthalate etc. can be used.

  Next, the second base material 122 is peeled off. At this time, it is preferable to attach a detachable film or sheet having a thickness of 100 μm to 200 μm as an auxiliary base material to the third base material 131, that is, the base material having a smaller thickness. . By sticking the auxiliary base material in this manner, it is possible to prevent the element layer 140 from being damaged due to the third base material 131 warping. As the auxiliary base material, like the first base material 121, the second base material 122, and the like, a base material in which the adhesiveness of the adhesive layer is reduced by irradiation with ultraviolet rays is preferable. After the second substrate 122 is peeled off, the fourth substrate 132 is adhered to the insulating layer 103 side (FIG. 6A). Similar to the third substrate 131, the fourth substrate 132 has a thickness of 50 μm or less and a flexible sheet-like or film-like base portion containing a thermoplastic resin as a main component. It is preferable that it is a base material provided with. More specifically, the adhesive layer is composed mainly of an ethylene / vinyl acetate copolymer (EVA) system, a polyester system, a polyamide system, a thermoplastic elastomer system, a polyolefin system, etc., and is also called a hot melt adhesive. Preferably it consists of. Moreover, the base part should just consist of a material whose softening temperature is higher than an adhesive layer, for example, what consists of polyester or a polyethylene terephthalate etc. can be used.

  Through the steps as described above, the element layer 140 is sealed by the third base material 131 and the fourth base material 132 (second sealing step). By sealing the element layer 140 on a thin base material having a thickness of 50 μm or less like the third base material 131 and the fourth base material 132, a sheet-like semiconductor device having resistance to bending is obtained. be able to. Such a semiconductor device having resistance to bending is particularly suitable for production by a production method referred to as a roll-to-roll method. In addition, instead of transferring the element layer 140 directly from the substrate 101 to a thin and flexible base material such as the third base material 131 and the fourth base material 132, the first base material 121 is temporarily used. And after the transfer to the second substrate 122. By transferring the element layer 140 to a thin substrate such as the third substrate 131 and the fourth substrate 132, the element layer 140 is destroyed due to stress and / or the electricity of the elements included in the element layer 140. The deterioration of characteristics can be reduced and the yield is improved. Further, as in the present embodiment, stress can be produced by providing a base material with a thinner thickness on the side of the protective layer 113 formed of a resin than the insulating layer 103 formed of an inorganic material. It is possible to further reduce damage to the element layer 140 caused by the above.

  In this embodiment, the third base material 131 and the fourth base material 132 have a configuration in which an adhesive layer is provided on a sheet-like or film-like base portion. The insulating layer 103 side may be simply coated with a composition containing a thermoplastic resin as a main component. And after coating, you may affix the flexible base material which has a thickness of 50 micrometers or less.

  Further, the third base material 131 and the fourth base material 132 may be covered with a film made of silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, or the like. By setting it as such a structure, mixing of the water | moisture content to the element layer 140 through a base material etc. can be reduced.

(Embodiment 2)
In this embodiment mode, FIGS. 7 to 12 show an embodiment of the present invention when the peeling layer has a configuration including a layer made of a metal and a layer formed by laminating a layer made of the metal oxide. It explains using.

  In FIG. 7A, an insulating layer 202 is provided over a substrate 201, and a separation layer 203 is provided over the insulating layer 202. The release layer 203 is formed by laminating a first layer 203a made of metal and a second layer 203b made of an oxide of the metal. An insulating layer 204, an insulating layer 205, and an insulating layer 206 are sequentially stacked over the separation layer 203. A transistor including the semiconductor layer 207a or the semiconductor layer 207b, the gate insulating layer 208, and the gate electrode 209a or the gate electrode 209b is further provided over the insulating layer 206. The transistor is covered with a first interlayer insulating layer 210. A wiring 211a, a wiring 211b, a wiring 211c, a wiring 211d, a wiring 212a, a wiring 212b, a wiring 212c, and a wiring 212d are provided over the first interlayer insulating layer 210. The wirings 211a and 211b include the semiconductor layer 207a and the wiring 211c. , 211d are electrically connected to the semiconductor layer 207b through the openings provided in the first interlayer insulating layer 210, respectively. The wirings 211 a to 211 d and the wirings 212 a to 212 d are covered with the second interlayer insulating layer 213. On the second interlayer insulating layer 213, a wiring 214a and a wiring 214b are provided. The wiring 214 a is electrically connected to the wiring 211 a and the wiring 214 b is electrically connected to the wiring 211 c through an opening provided in the second interlayer insulating layer 213. A wiring 215a, a wiring 215b, a wiring 215c, and a wiring 215d are further provided over the second interlayer insulating layer 213. Among these, the wiring 215a and the wiring 215c are electrically connected to the wiring 214a and the wiring 214b, respectively. It is provided to connect. Note that the wiring 215a and the wiring 215b, and the wiring 215c and the wiring 215d are each a continuous wiring electrically connected. The wirings 215a to 215d are covered with a protective layer 216.

  Substrate 201, semiconductor layers 207a and 207b, gate insulating layer 208, gate electrodes 209a and 209b, first interlayer insulating layer 210, wirings 211a to 211d, wiring 212a to wiring 212d, second interlayer insulating layer 213, wirings 214a and 214b, The wirings 215a to 215d and the protective layer 216 are the substrate 101, the semiconductor layers 104a and 104b, the gate insulating layer 105, the gate electrodes 106a and 106b, the first interlayer insulating layer 107, and the wirings 108a to 108d described in Embodiment 1, respectively. The wirings 109a to 109d, the second interlayer insulating layer 110, the wirings 111a and 111b, the wirings 112a to 112d, and the protective layer 113 are the same. Therefore, in this embodiment mode, the insulating layers 202 and 204 to 206 and the peeling layers 203 (203a and 203b) are described.

  The insulating layer 202 is preferably formed of silicon oxynitride. In the separation layer 203, the first layer 203a includes tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nb), nickel (Ni), cobalt (Co), zirconium ( Formed using an element selected from Zr), zinc (Zn), ruthenium (Ru), rhodium (Rh), lead (Pd), osmium (Os), iridium (Ir) or an alloy containing the element as a main component. It is preferable that The second layer 203b is preferably made of an oxide of a metal constituting the first layer 203a. As a result, the substrate and the element layer 240 are well separated, and the yield is improved. The insulating layer 204 is preferably formed of silicon oxide, and particularly preferably silicon oxide formed by a sputtering method. In particular, when the first layer 203a is made of tungsten, the insulating layer 204 is formed by a sputtering method, whereby the insulating layer 204 can be provided over the first layer 203a and the second layer 203b can be formed. The insulating layer 205 is preferably formed using silicon nitride oxide or silicon nitride. Accordingly, diffusion of impurities contained in the substrate 201 to the element layer 240 can be reduced. The insulating layer 206 is preferably formed using silicon oxynitride or silicon oxide. Accordingly, the generation of stress can be reduced as compared with the case where the insulating layer 205 and the semiconductor layers 207a and 207b are directly stacked.

  Note that in the present invention, a layer which is sandwiched between the insulating layer 205 and the protective layer 216 and includes an element such as a transistor is collectively referred to as an element layer 240.

  A method for sealing the element layer using a flexible base material after separating the element layer 240 from the substrate 201 will be described below.

  First, an opening reaching the separation layer 102 through the protective layer 216, the second interlayer insulating layer 213, the first interlayer insulating layer 210, the gate insulating layer 208, the insulating layers 205 and 206, and the like is provided (FIG. 7B). . There is no particular limitation on the method for providing the opening, and etching may be performed. By providing the opening in this manner, when the release layer 203 is etched, the contact area between the etchant and the release layer 203 is increased, and the etching is facilitated.

Next, the peeling layer 203 is selectively etched. Etching may be performed using either gas or liquid. As etching progresses, the etchant diffuses between the element layer 240 and the insulating layer 202, and the separation layer 203 is removed (FIG. 8A). Here, when the peeling layer 203 contains tungsten as a main component, chlorine trifluoride (ClF ₃ ) or the like is preferably used as a gas that can selectively etch the peeling layer 203. In the case where the peeling layer 203 is formed using silicon and is etched by a wet method, tetramethylammonium hydroxide or the like is preferably used as a liquid that can selectively etch the peeling layer 203. Note that the peeling layer 203 does not necessarily have to be etched entirely, and a part of the peeling layer 203 may remain attached to the extent that the insulating layer 202 and the element layer 240 can be separated.

  Next, the first base material 221 is bonded to the protective layer 216 side (FIG. 8B). Thus, the element layer 240 is sealed between the first base material 221 and the second base material 222 (first sealing step). Since the first base material 221 is the same as the first base material 121 described in Embodiment Mode 1, the description in Embodiment Mode 1 shall apply mutatis mutandis. In this embodiment mode, the first base material 221 will be used. Description is omitted.

  Next, the substrate 201 is separated from the element layer 240 to which the first base material 221 is bonded (FIG. 9A). Then, after the substrate 101 is separated, the first base material 221 is irradiated with ultraviolet rays (FIG. 9B). Thereby, the adhesiveness of the 1st base material 221 falls. Further, when heat treatment is performed after irradiation with ultraviolet rays, when the first base material 221 is peeled off, it becomes easier to peel off, and the yield is improved. The heat treatment is preferably performed at a temperature of 120 ° C to 140 ° C.

  Next, the second base material 222 is bonded to the insulating layer 204 side (FIG. 10A). Since the second base material 222 is the same as the second base material 122 described in Embodiment Mode 1, the description in Embodiment Mode 1 shall apply mutatis mutandis. Description is omitted.

  Next, the first base material 221 is peeled off (FIG. 10B), and the second base material 222 is irradiated with ultraviolet rays (FIG. 11A). Thereby, the adhesiveness of the 2nd base material 222 falls. Further, when heat treatment is performed after irradiation with ultraviolet rays, when the second base material 222 is peeled off, it becomes easier to peel off and the yield is improved. The heat treatment is preferably performed at a temperature of 120 ° C to 140 ° C.

  Next, the third substrate 231 is bonded to the protective layer 216 side (FIG. 11B). Since the third base material 231 is the same as the third base material 131 described in Embodiment Mode 1, the description in Embodiment Mode 1 is applied mutatis mutandis. In this embodiment mode, the third base material 231 is used. Description is omitted.

  Next, the second base material 222 is peeled off, and the fourth base material 232 is bonded to the insulating layer 204 side (FIG. 12A). Since the fourth base material 232 is the same as the fourth base material 132 described in Embodiment 1, the description in Embodiment 1 is applied mutatis mutandis. Description is omitted.

  Through the steps as described above, the element layer 240 is sealed by the third base material 231 and the fourth base material 232 (second sealing step). By sealing the element layer 240 on a thin base material having a thickness of 50 μm or less like the third base material 231 and the fourth base material 232, a sheet-like semiconductor device having resistance to bending is obtained. be able to. Such a semiconductor device having resistance to bending is particularly suitable for production by a production method referred to as a roll-to-roll method. Further, instead of transferring the element layer 240 directly from the substrate 201 to a thin and flexible base such as the third base 231 and the fourth base 232, the first base 221 is temporarily transferred. And after the transfer to the second substrate 222. By transferring the element layer 240 to a thin substrate such as the third substrate 231 and the fourth substrate 232, the element layer 240 is destroyed due to stress and / or the electricity of the elements included in the element layer 240. The deterioration of characteristics can be reduced and the yield is improved. In addition, as in the present embodiment, stress can be produced by manufacturing a base material having a thinner thickness on the side of the protective layer 216 formed of a resin than the insulating layer 204 formed of an inorganic material. It is possible to further reduce damage to the element layer 240 caused by the above.

  In this embodiment, the third base material 231 and the fourth base material 232 have a configuration in which an adhesive layer is provided on a sheet-like or film-like base, but the present invention is not limited thereto, and the protective layer 216 side and The insulating layer 204 side may be simply coated with a composition containing a thermoplastic resin as a main component. And after coating, you may affix the flexible base material which has a thickness of 50 micrometers or less.

  In addition, the third base 231 and the fourth base 232 may be covered with a film formed of silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, or the like. By setting it as such a structure, mixing of the water | moisture content to the element layer 240 through a base material etc. can be reduced.

(Embodiment 3)
In this embodiment, an embodiment in which the present invention is implemented using a roll-to-roll method will be described with reference to FIG.

  The manufacturing apparatus used in this embodiment includes a transport unit 301 having a function of transporting an object to be processed, a first supply unit 302 having a function of supplying a first base 352, and a second base 353. A second supply means 303 having a function of supplying, a third supply means 304 having a function of supplying a third base material 354, a fourth supply means 305 for supplying a fourth base material 355, First recovery means 306 having a function of recovering the first base material 352, second recovery means 307 for recovering the second base material 353, and third recovery means for recovering the object to be processed 308, first bonding means 309 having a function of bonding the first base 352 to the object to be processed, and the second base 353 to the object to be processed to which the first base 352 is bonded. Second bonding means 310 having a function of bonding, and a second substrate A third bonding means 311 having a function of bonding the third substrate 354 to the workpiece to which the 53 is bonded, and a fourth substrate to the workpiece to which the third substrate 354 is bonded. A fourth bonding means 312 having a function of bonding 355 is provided. Further, the direction in which the first transport roller 313, the second transport roller 314, and the second base material 353 are transported, which functions as a shaft for adjusting the direction in which the first base 352 is transported, is adjusted. A third transport roller 315 that functions as a shaft for this purpose is provided. Each of the first bonding means 309, the second bonding means 310, the third bonding means 311, and the fourth bonding means 312 includes two rollers, and these rollers are covered between the rollers. It is combined so that the substrate is bonded to the object to be processed by applying pressure by sandwiching the object to be processed and the substrate. Note that there is no particular limitation on the configuration of the first supply unit 302 to the fourth supply unit 305 and the first recovery unit 306 to the third recovery unit 308, but in this embodiment, the supply unit and the recovery unit are either Also consists of rolls.

  A mode for carrying out the present invention as described in the first embodiment or the second embodiment using the above apparatus will be described.

  First, the substrate 351 provided with the element layer 371 and processed to etch the peeling layer is transferred using the transfer unit 301 and transferred to the first bonding unit 309. The first adhering means 309 includes a first roller 309a and a second roller 309b, and the first roller 309a and the second roller 309b have different rotation directions. In the first bonding means 309, the first base 352 is fed from the first supply means 302 along the first roller 309a between the first roller 309a and the second roller 309b, The substrate 351 is also fed between the first roller 309a and the second roller 309b. Then, the first base material 352 is bonded to the element layer 371 so that the element layer 371 is sandwiched between the substrate 351 and the first base material 352.

  Next, the first base 352 is transported by the first transport roller 313 in a direction different from the direction in which the substrate 351 is transported. Accordingly, the element layer 371 and the substrate 351 are separated, and the element layer 371 is in a state of being bonded only to the first base material 352. Then, the first base material 352 to which the element layer 371 is bonded is conveyed toward the second bonding means 310. Here, a first irradiation unit 361 having a function of irradiating ultraviolet rays is provided between the first conveying roller 313 and the second bonding unit 310. Then, after the element layer 371 and the substrate 351 are separated and before being conveyed to the second bonding means 310, the first base material 352 is irradiated with ultraviolet rays. Thereby, the adhesiveness of the adhesive layer of the 1st base material 352 falls.

  The second adhering means 310 includes a first roller 310a and a second roller 310b, and the first roller 310a and the second roller 310b have different rotation directions. In the second bonding means 310, the second base 353 is fed from the second supply means 303 along the first roller 310a between the first roller 310a and the second roller 310b, The first base material 352 to which the element layer 371 is bonded is also fed between the first roller 310a and the second roller 310b. Then, the second substrate 353 is bonded to the element layer 371 so that the element layer 371 is sandwiched between the first substrate 352 and the second substrate 353.

  Next, the second base roller 314 transports the first base material 352 in a direction different from the direction in which the second base material 353 is transported. As a result, the element layer 371 and the first base material 352 are separated, and the element layer 371 is in a state of being bonded only to the second base material 353. The first base material 352 is wound around the first recovery means 306 and recovered. Then, the second base material 353 to which the element layer 371 is bonded is conveyed toward the third bonding means 311. Here, a second irradiation unit 362 having a function of irradiating ultraviolet rays is provided between the second conveyance roller 314 and the third bonding unit 311. Then, after the element layer 371 and the first base material 352 are separated and before being conveyed to the third bonding means 311, the second base material 353 is irradiated with ultraviolet rays. Thereby, the adhesiveness of the adhesion layer of the 2nd base material 353 falls.

  The third adhering means 311 includes a first roller 311a and a second roller 311b, and the first roller 311a and the second roller 311b have different rotation directions. In the third bonding means 311, the third base 354 is fed from the third supply means 304 along the first roller 311a between the first roller 311a and the second roller 311b. The second base material 353 to which the element layer 371 is bonded is also fed between the first roller 311a and the second roller 311b. The first roller 311a is provided with heating means, and the adhesive layer of the third base material 354 is softened by the heat applied from the first roller 311a. Then, the third substrate 354 is bonded to the element layer 371 so that the element layer 371 is sandwiched between the second substrate 353 and the third substrate 354.

  Next, the second substrate 353 is conveyed by the third conveyance roller 315 in a direction different from the direction in which the third substrate 354 is conveyed. As a result, the element layer 371 and the second base material 353 are separated, and the element layer 371 is in a state of being bonded only to the third base material 354. The second base material 353 is wound around the second recovery means 307 and recovered. Then, the third substrate 354 to which the element layer 371 is bonded is conveyed toward the fourth bonding means 312.

  The fourth bonding means 312 includes a first roller 312a and a second roller 312b, and the first roller 312a and the second roller 312b have different rotation directions. In the fourth bonding means 312, the fourth substrate 355 is fed from the fourth supply means 305 along the first roller 312a between the first roller 312a and the second roller 312b, The third base material 354 to which the element layer 371 is bonded is also sent between the first roller 312a and the second roller 312b. The first roller 312a is provided with a heating unit, and the adhesive layer of the fourth substrate 355 is softened by the heat applied from the first roller 312a. Then, the fourth substrate 355 is bonded to the element layer 371 so that the element layer 371 is sandwiched between the third substrate 354 and the fourth substrate 355.

  As described above, a semiconductor device in which the element layer 371 is sealed between the third base material 354 and the fourth base material 355 can be manufactured. This semiconductor device is wound around the third recovery means 308 and recovered. Thus, by collecting the semiconductor device by winding it around the roll, it is not necessary to bend the semiconductor device, and damage to the semiconductor device that may be caused by bending can be prevented. In addition, since the semiconductor device of the present invention has resistance to bending, even if it is wound around a roll having a short center radius, damage that can be caused by bending is very unlikely to occur and is manufactured with high yield.

(Embodiment 4)
In the present invention, the structure and circuit configuration of an element such as a transistor provided in the element layer are not particularly limited.

  For example, as shown in FIG. 14, the transistor includes an LDD including a semiconductor layer 151 in which a low-concentration impurity region 151c is provided between a region 151a functioning as an active region and a region 151b functioning as a source or drain. A transistor having a structure may be used. A sidewall 154 may be provided on the sidewall of the gate electrode 153. The sidewall 154 functions as a mask for preventing a high-concentration impurity from being added to the region 151c when the region 151b is provided, and is formed using an insulator such as silicon oxide. The gate insulating layer 152 provided between the semiconductor layer 151 and the gate electrode 153 may be provided so as to cover only the semiconductor layer 151 as in the semiconductor device described in this embodiment. In the transistor having such a structure, an electric field from the region functioning as a drain can be alleviated and deterioration of the transistor due to hot carriers can be reduced.

  In FIG. 14, the same reference numerals as those shown in FIG. 1 represent those having the same functions as those shown in FIG.

(Embodiment 5)
The semiconductor device of the present invention manufactured by the method described in the first to third embodiments is mounted on an article such as a card or a packaging container such as food. When mounted on a card, information such as personal information such as name, blood type, height, weight, and address is recorded and functions as an identification card. In addition, when mounted on packaging containers for food, etc., information such as the production location of the food, the producer, the production location of the raw material, the date of manufacture, etc. is recorded, and the distributor, consumer, etc. It functions as a means for knowing. The semiconductor device manufactured by the method for manufacturing a semiconductor device according to the present invention that is less harmful to the human body is particularly effective when high safety is required, particularly when it is attached to food, humans, animals, or the like. is there.

  In addition to this, for example, the semiconductor device of the present invention is mounted on personal belongings such as a mobile phone and a wallet, and the location information of the owner of the communication device is obtained or the personal information of the owner is managed. It may be used to

  Further, as shown in FIG. 15C, a semiconductor device 1001 manufactured by applying the present invention to a pet collar or the like may be mounted and attached to the pet. Thereby, even when the pet escapes and gets lost, the position information of the pet can be confirmed using the monitor 1002 or the like (FIG. 15A) (in this case, the battery 1003 for transmitting radio waves). Preferably). Furthermore, by recording the owner's information, history regarding preventive injections, and the like in advance in the semiconductor device 1001, the person who protected the escaped pet knows how to handle the pet and can feel secure. In addition, as shown in FIG. 15B, a semiconductor device that is attached to a pet by constructing a network that allows pet owners 1011, a pet store 1012, an animal hospital 1013, and the like to exchange information. A semiconductor device manufactured by applying the present invention may be used as a means for exchanging information based on information recorded in 1001. Such a network is, for example, that the animal hospital 1013 can easily know the history of the pet even if the pet 1011 becomes ill when the owner 1011 has been away from the pet store 1012 for a long time. Can be treated.

  FIG. 16 shows an embodiment in which a semiconductor device 1020 manufactured by applying the present invention to a bottle 1021 for drinking water is mounted. In the semiconductor device 1020, information related to drinking water, for example, a manufacturing date, a manufacturer, a raw material name, and the like is recorded by the reader / writer 1022.

  Since the semiconductor device of the present invention is produced with a high yield, it is provided at a low price. For this reason, when used in the above-described manner, it is possible to save the overhead for the use, which is effective.

8A and 8B illustrate an embodiment of a method for manufacturing a semiconductor device of the present invention. 8A and 8B illustrate an embodiment of a method for manufacturing a semiconductor device of the present invention. 8A and 8B illustrate an embodiment of a method for manufacturing a semiconductor device of the present invention. 8A and 8B illustrate an embodiment of a method for manufacturing a semiconductor device of the present invention. 8A and 8B illustrate an embodiment of a method for manufacturing a semiconductor device of the present invention. 8A and 8B illustrate an embodiment of a method for manufacturing a semiconductor device of the present invention. 8A and 8B illustrate an embodiment of a method for manufacturing a semiconductor device of the present invention. 8A and 8B illustrate an embodiment of a method for manufacturing a semiconductor device of the present invention. 8A and 8B illustrate an embodiment of a method for manufacturing a semiconductor device of the present invention. 8A and 8B illustrate an embodiment of a method for manufacturing a semiconductor device of the present invention. 8A and 8B illustrate an embodiment of a method for manufacturing a semiconductor device of the present invention. 8A and 8B illustrate an embodiment of a method for manufacturing a semiconductor device of the present invention. The figure explaining the aspect which manufactures the semiconductor device of this invention by a roll-to-roll system. 8A and 8B illustrate a structure mode of a semiconductor device of the present invention. 8A and 8B illustrate a usage mode of a semiconductor device manufactured by applying the present invention. 8A and 8B illustrate a usage mode of a semiconductor device manufactured by applying the present invention.

Explanation of symbols

101 Substrate 102 Release layer 103 Insulating layer 104a Semiconductor layer 104b Semiconductor layer 105 Gate insulating layer 106a Gate electrode 106b Gate electrode 107 First interlayer insulating layer 108a Wiring 108b Wiring 108c Wiring 108d Wiring 109a Wiring 109b Wiring 109c Wiring 109d Wiring 110 Second interlayer Insulating layer 111a Wiring 111b Wiring 112a Wiring 112b Wiring 112c Wiring 112d Wiring 113 Protective layer 121 First base material 122 Second base material 131 Third base material 132 Fourth base material 140 Element layer 201 Substrate 202 Insulating layer 203 Separation layer 203a First layer 203b Second layer 204 Insulating layer 205 Insulating layer 206 Insulating layer 207a Semiconductor layer 207b Semiconductor layer 208 Gate insulating layer 209a Gate electrode 209b Gate electrode 210 First interlayer insulating layer 211a Wiring 11b wiring 211c wiring 211d wiring 212a wiring 212b wiring 212c wiring 212d wiring 213 second interlayer insulating layer 214a wiring 214b wiring 215a wiring 215b wiring 215c wiring 215d wiring 216 protective layer 221 first base material 222 second base material 231 third Base material 232 fourth base material 240 element layer 301 transport means 302 first supply means 303 second supply means 304 third supply means 305 fourth supply means 306 first recovery means 307 second recovery Means 308 Third recovery means 309 First adhesion means 309a First roller 309b Second roller 310 Second adhesion means 310a First roller 310b Second roller 311 Third adhesion means 311a First roller 311b 2nd roller 312 4th adhesion means 312a 1st roller 3 2b Second roller 313 First transport roller 314 Second transport roller 315 Third transport roller 351 Substrate 352 First base 353 Second base 354 Third base 355 Fourth base 361 First irradiation means 362 Second irradiation means 371 Element layer 151 Semiconductor layer 151a Region 151b Region 151c Region 152 Gate insulating layer 153 Gate electrode 154 Side wall 1001 Semiconductor device 1002 Monitor 1011 Owner 1012 Pet store 1013 Animal hospital 1020 Semiconductor device 1021 Bottle 1022 Reader / Writer

Claims (4)

Forming a release layer on the substrate,
Forming an insulating layer on the release layer;
Forming a first semiconductor layer and a second semiconductor layer on the insulating layer;
Forming a gate insulating layer on the first semiconductor layer and the second semiconductor layer;
Forming a first gate electrode on the first semiconductor layer via the gate insulating layer, and forming a second gate electrode on the second semiconductor layer via the gate insulating layer ;
Forming a first interlayer insulating film on the first gate electrode, the second gate electrode, and the gate insulating layer;
A plurality of contact holes reaching the first semiconductor layer or the second semiconductor layer are formed in the first interlayer insulating film and the gate insulating film;
Forming a plurality of first wirings on the first interlayer insulating film, the plurality of first wirings being electrically connected to the first semiconductor layer or the second semiconductor layer;
Forming a second interlayer insulating film on the plurality of first wirings and on the first interlayer insulating film;
Forming a contact hole reaching a part of the plurality of first wirings in the second interlayer insulating film;
Forming a plurality of second wirings on the second interlayer insulating film, the plurality of second wirings being electrically connected to a part of the plurality of first wirings;
A plurality of third wirings are formed on the plurality of second wirings and the second interlayer insulating film, and a part of the plurality of third wirings is a part of the plurality of second wirings. Electrically connect,
Forming a protective layer made of a resin on the plurality of second wirings, on the plurality of third wirings, and on the second interlayer insulating film;
The protective layer, the second interlayer insulating film, the first interlayer insulating film, the gate insulating film, and the insulating layer provided between the first semiconductor layer and the second semiconductor layer. , Selectively etching to form an opening reaching the release layer;
Selectively etching the release layer;
Adhering the first substrate onto the protective layer;
Separating the substrate from the release layer;
Irradiating the first substrate with ultraviolet rays;
Adhering a second substrate under the insulating layer;
Peeling off the first substrate;
Irradiating the second substrate with ultraviolet rays,
Adhering a third substrate onto the protective layer;
Peeling off the second substrate;
A fourth base material is bonded under the insulating layer;
The peeling layer is a layer formed by laminating an amorphous or crystalline semiconductor layer containing silicon as a main component or a metal layer and an oxide layer of the metal,
The first base material and the second base material have a thickness of 100 μm or more, and an adhesive layer whose adhesiveness is reduced by ultraviolet irradiation or heating is provided on a flexible sheet or film. Is,
The third base material and the fourth base material have a thickness of 50 μm or less, and a flexible sheet or film is provided with an adhesive layer containing a thermoplastic resin as a main component. Oh it is,
The second substrate has the same thickness as the first substrate, or is thinner than the first substrate,
The method of manufacturing a semiconductor device, wherein the fourth base material has the same thickness as the third base material or is thinner than the third base material . Oite to claim 1,
A method of manufacturing a semiconductor device, wherein a film or sheet that is removable and has a thickness of 100 μm to 200 μm is attached to the third base material when the second base material is peeled off. In claim 1 or 2 ,
The first base material is irradiated with ultraviolet rays, and then the first base material is subjected to a heat treatment at 120 to 140 ° C., and then the second base material is adhered under the insulating layer. A method for manufacturing a semiconductor device. In any one of Claims 1 thru | or 3 ,
After irradiating the second base material with ultraviolet rays, the first base material is subjected to a heat treatment at 120 to 140 ° C., and then the third base material is adhered onto the protective layer. A method for manufacturing a semiconductor device.

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