JP5012779B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which LSIs are mounted on a printed wiring board with high density.

In recent years, printed wiring boards in which a plurality of semiconductor elements such as LSI are mixedly mounted have been put into practical use. Such a substrate is called SiP (System in Package). This type of semiconductor device has a strong demand for miniaturization, and for this reason, a form in which a semiconductor element and a passive component are built in a printed wiring board has been seen. For example, Non-Patent Document 1 discloses a package in which an LSI is incorporated in a coreless substrate.
An LSI-embedded substrate is advantageous for downsizing and thinning, but there is a problem that the substrate is likely to warp. In order to reduce warpage, a material having high rigidity may be used as the support. As a structure for that purpose, for example, Patent Document 1 discloses an LSI-embedded substrate using a reinforcing layer made of a prepreg material on the upper and lower surfaces of an insulating layer in which an LSI is embedded.
Braunisch, H., Towle, SN, Emery, RD, Chuan Hu, Vandentop, GJ, “Electrical performance of bumpless build-up layer packaging”, Electronic Components and Technology Conference, 2002. Proceedings. JP 2006-339421 A

In the method disclosed in Patent Document 1, even if the rigidity is supplemented by the reinforcing layer, the reinforcing layer formed by the prepreg material is not as rigid as the metal. Therefore, particularly in a very thin printed circuit board, the reinforcing layer is also thin. And the effect of suppressing warpage is small.
Another problem that occurs in high-density semiconductor devices such as SiP is that devices that operate at high speed, such as LSIs, are highly susceptible to electromagnetic noise. Electromagnetic noise can lead to equipment malfunction and performance degradation. Since SiP has high density wiring, crosstalk between wirings also increases.
An object of the present invention is to solve the above-mentioned problems of the prior art, and the object is to suppress warping related to a high-density mounting substrate such as an LSI-embedded substrate, It is to reduce the influence of electromagnetic noise accompanying high density mounting.

In order to achieve the above object, according to the present invention, two conductor plates are arranged inside a printed wiring board on which an LSI is mounted, with a dividing line dividing the transverse section of the printed wiring board into two. A first impedance element that connects the two conductor plates across the center of the dividing line is disposed, and the distance between the conductor plates is the smallest at two positions farthest from the center point of the dividing line. A semiconductor device in which a second impedance element for connecting the two conductor plates is arranged at a position, wherein the two conductor plates have a self-complementary shape, Is provided.
Preferably, the impedance of the first impedance element is 60π / √ (the relative dielectric constant of the printed wiring board) Ω, the second impedance element is a resistance, and the resistance value is 60π / √ (print The dielectric constant of the wiring board is greater than Ω.

[Action]
The two self-complementary conductor plates function as a self-complementary antenna. In the present invention, these conductor plates serve as antennas for receiving noise radiated from noise sources such as the LSI chip 1. In order to efficiently receive noise, the reception maximum effective power of the reception antenna only needs to be maximized. This condition is when the impedance of the load connected to the power receiving point is a complex conjugate of the characteristic impedance of the receiving antenna.
The self-complementary antenna is known to have a characteristic impedance of 60πΩ (in vacuum), that is, a pure resistance value, regardless of its frequency. Therefore, when the impedance of the load connected to the power receiving point is 60πΩ, the maximum reception efficiency is achieved. Power is maximized.
Here, in the present invention, since the conductor plate 10 is configured inside the printed wiring board 2, the impedance is divided by the square root of the relative dielectric constant of the printed board.
The characteristic impedance of the self-complementary antenna is 60πΩ (in vacuum) regardless of the frequency when the conductor is infinitely long. However, if the operating frequency is increased, there is a practical problem even if the frequency is finite. Absent.
The operation of the present invention will be described by taking a bow tie antenna having the simplest self-complementary structure as an example. A top view is shown in FIG. 1, and a cross-sectional view is shown in FIG. A 30 mm square bow-tie conductor plate 10 is embedded in a substrate 2a having a relative dielectric constant of 4 and a thickness of 0.7 mm. There is a feeding point at the center. The frequency characteristics of the input impedance at this time are shown in FIG. In FIG. 3, the unit of the horizontal axis is GHz, and the unit of the vertical axis is Ω. As shown in FIG. 3, the resistance component is 0 and the reactance component is −∞ at a low frequency, which is almost similar to a capacitor, but the resistance component is 30π (Ω) and the reactance component is converged to 0 at a high frequency. If the frequency exceeds 7 GHz, the resistance and reactance components do not fluctuate greatly and a characteristic close to that of a pure resistance is exhibited. Therefore, it can be said that the frequency band after this point operates as a self-complementary antenna. In order to absorb electromagnetic noise over a wide frequency band by connecting a complex load impedance to the antenna feed point, the frequency characteristics of the antenna exhibit a pure resistance, in other words, the antenna is a self-complementary antenna. Therefore, the structure shown in FIG. 1 can absorb electromagnetic noise of a semiconductor device that operates at a frequency of approximately 7 GHz or more. In other words, in this case, the lower limit of the frequency that can be used by the semiconductor device in order to cause the antenna to absorb electromagnetic noise (the lower limit frequency of use) is approximately 7 GHz.
However, in the semiconductor device targeted by the present invention, the frequency of the signal is at most several hundred MHz (the range shown as a desired frequency band in FIG. 3). Since the LSI built-in substrate is often less than about 30 mm square, the lower limit frequency of use is about 7 GHz or more. Therefore, it is not possible to effectively absorb noise of about several hundred MHz by simply arranging an antenna having a self-complementary structure.
Therefore, as shown in FIG. 4, the ends of the conductor plates that are farthest from the center of the two conductor plates are placed at two locations at an impedance element that is larger than the characteristic impedance of the self-complementary antenna (of the self-complementary antenna). The impedance element has a real part larger than the real part of the characteristic impedance. This is equivalent to loading an impedance element on the loop antenna. The frequency characteristics of the input impedance at this time are shown in FIG. The resistance component converges to 30π (Ω) at a high frequency and the reactance component to 0Ω as in the case of FIG. 3, but at a low frequency of 1 GHz or less, the reactance component is almost zero and exhibits a characteristic close to a pure resistance. . That is, by connecting the ends of the conductor plates with impedance elements, the input impedance of the antenna approaches 30πΩ (in a dielectric having a relative dielectric constant of 4) in a low frequency range close to direct current, which is a subject of the present invention. Noise of several hundred MHz can be effectively absorbed.
Further, if the size of the conductor plate 10 is reduced, the lower limit frequency for use as a self-complementary antenna increases, but by connecting resistors to the two locations, the frequency band in which the frequency characteristics are pure resistance is close to DC. Since a relatively low frequency band is covered from the frequency, even when the size of the conductor plate 10 is reduced, electromagnetic noise of several hundreds of MHz targeted by the present invention can be absorbed.
In principle, the self-complementary conductor plate 10 has a remaining copper ratio (area ratio between the wiring pattern and the vacant area) of 50%. Therefore, a gap is formed between the patterns of the conductor plate 10 and the layers are connected to each other. It is possible to pass through holes and via holes. Therefore, the LSI chip 1 and other active or passive components mounted on the surface of the printed wiring board 2 can be electrically connected. Since the conductor plate 10 having a self-complementary structure with a remaining copper ratio of 50% can uniformly cover the mounting surface by appropriately selecting a pattern, it is possible to suppress warping of the substrate.

The first effect is that the pattern that is not electrically connected is a receiving antenna terminated with its characteristic impedance, so that the received noise is absorbed by the terminating element without reflection, and noise re-radiation is suppressed. A semiconductor device can be provided.
The second effect is that a gap can be provided in the conductor plate arranged to suppress warpage, so that electrical connection is possible between the substrate surface and the built-in LSI chip 1, and high density that realizes reduction of warpage. A mounted semiconductor device can be provided.

Next, embodiments of the present invention will be described in detail with reference to the drawings.
[Construction]
FIG. 6 is a top view of the semiconductor device according to the first embodiment of the present invention, and FIG. 7 is a sectional view thereof. The printed wiring board 2 has a plurality of insulating layers 4 and wiring layers 3. The insulating layer 4 is a resin layer or a prepreg cured layer. The wiring layer 3 includes a printed wiring of a conductive adhesive, a copper wiring using an electrolytic or electroless plating method, a wiring formed by patterning a copper foil, and the like. Electrodes (not shown) electrically connected to the internal wiring layer are formed on the back surface of the printed wiring board 2, and solder balls 7 serving as external connection terminals are formed on the electrodes. Four LSI chips 6 are mounted on the surface of the printed wiring board 2 so as to follow the outer periphery of the board. Although illustration is omitted, chip components such as resistors and capacitors necessary for stable operation of the LSI chip 6 are surface-mounted as necessary. In the printed wiring board 2, the LSI chip 1 is disposed at the center, and the solder balls 7 are connected to the wiring layer. Two conductor plates 10 are arranged in the same layer above the built-in LSI chip 1. As shown in FIG. 7, the two conductor plates 10 are arranged in a manner that separates the LSI chip 1 and the LSI chip 6. The conductor plate 10 is arranged so as to have a point-symmetric self-complementary structure with the center of the printed wiring board 2 as the symmetry point. Here, the two conductors 10 plates are not in contact with each other, and are arranged across one diagonal line of the printed wiring board 2 so as to close a gap formed at the symmetrical point of the two conductors 10 plates. A resistor 11 having √ (relative permittivity of the printed wiring board 2) Ω is connected. Furthermore, impedance elements 12 having a resistance value greater than that of the resistor 11 are connected to two positions farthest from the symmetry point of the two conductors 10 and the gap is minimized.
Here, the two conductor plates 10 receive a self-complementary structure in which a resistance of 60π / √ (relative permittivity of the printed wiring board 2) Ω, which is the characteristic impedance of the self-complementary antenna, is connected to the power reception point. Operates as an antenna. At this time, it can be considered that two loop antennas are connected in parallel by the two conductor plates 10 and the impedance element 12 connected at two locations.

[Production method]
Next, an example of a method for manufacturing a semiconductor device of the present invention will be described with reference to FIGS. 8A and 8B. Only the manufacturing process of the core layer of the printed wiring board will be described, and the description of the manufacturing process of the buildup layer will be omitted. [After the process of FIG. 8B (i), one or more layers are formed on the front and back surfaces of the board by the buildup method. The insulating layer and the wiring layer are formed, and finally the surface mount component is mounted].
First, a support 21 is prepared [FIG. 8A (a)], and an insulating resin film 22 is formed thereon [FIG. 8A (b)]. Next, two conductor plates 10 previously molded into a desired shape are disposed on the substrate [FIG. 8A (c)]. Next, an insulating resin film 22 is further formed on the conductor plate 10 [FIG. 8A (d)]. Next, the LSI chip 1 is placed on the insulating resin film 22 [FIG. 8A (e)]. It is also possible to arrange the LSI chip 1 via a very thin adhesive layer so that the LSI chip 1 is not displaced.
Next, an insulating resin film 22 is further formed until the terminals of the LSI chip 1 are covered and ground until the terminals are exposed [FIG. 8B (f)]. Next, the wiring layer 3 connected to the LSI chip 1 is formed on the insulating resin film 22 [FIG. 8B (g)]. Next, a hole is formed in the back of the support 21 using a laser beam to expose the conductor plate 10 at two positions near the symmetry point, and a conductive adhesive is embedded in the via hole to form a via plug 23. [FIG. 8B (h)]. Next, a wiring layer (not shown) is formed on the support 21. Next, the resistor 11 is connected to the wiring layer formed on the support 21, and the two conductor plates 10 are connected to each other by the resistor 11 near the symmetry point [FIG. 8B (i)]. In addition, although illustration is abbreviate | omitted, the impedance element 12 is also arrange | positioned on the support body 21 so that the two conductor boards 10 may be connected by the process similar to the resistor 11. FIG.

  Next, the semiconductor device of the present invention will be described using specific examples. FIG. 9 is a top view showing an embodiment of the present invention, and FIG. 10 is a cross-sectional view taken along the line AA ′. As shown in FIGS. 9 and 10, a self-complementary conductive plate 10 made of stainless steel is disposed in a printed wiring board 2 having a relative permittivity of 4 having a 30 mm square and a thickness of 0.7 mm. Similarly, a 9 mm square LSI chip 1 is built in the printed wiring board 2. The LSI chip 1 has a thickness of 50 μm, which is 15 μm below the conductor plate 10. The LSI chip is simulated with silicon of the above size. In this embodiment, a noise source generated by the operation of the LSI chip 1 is simulated by the minute dipole antenna 13. Then, the radiated electromagnetic field intensity 3 m above the sectional view shown in FIG. 10 is obtained.

First, as a reference, as shown in FIG. 11, radiation when a frame-shaped conductor plate 5 having a side of 30 mm and a width of 2.5 mm is arranged and an LSI chip 11 and a minute dipole antenna 13 similar to those of the embodiment are incorporated. The electric field strength was simulated. The calculation result is shown in FIG. The result of 900 MHz corresponding to 300 MHz and its third harmonic is shown. In this case, an 8-shaped characteristic which is a typical radiation directivity of a minute dipole is shown.
Next, the self-complementary conductor plate according to the present invention is arranged. Between the two conductors, a total of three resistors, one 30πΩ resistor 11 at the center of the substrate and two 280Ω resistors 12 at the upper right and lower left corners of the substrate, are connected to the conductor plate 10 respectively. Has been. Similar to the reference, the calculation results at 300 MHz and 900 MHz are shown in FIG. Compared with the reference at the maximum radiation electric field strength, the frequency is reduced to about 30% for 300 MHz and to about 70% for 900 MHz.

The preferred embodiments and examples have been described above, but the present invention is not limited to these embodiments and examples, and appropriate modifications can be made without departing from the scope of the present invention. It is. For example, in the above-described embodiment, the connection method of the LSI chip 1 is the connection using the solder balls 7. Instead, for example, the connection is made using the copper posts 8 as shown in FIG. Also good. Further, the connection method between the printed wiring board 2 and the main board is BGA (Ball Grid Array) connection using solder balls in the semiconductor device shown in FIGS. 2 and 14, but is not limited thereto. Furthermore, any form such as the type and shape of the component to be mounted may be used as long as it does not affect the formation of the conductor plate 10 of the present invention.
The shape of the conductor plate 10 may not be the shape shown in FIG. 6 as long as it is a self-complementary structure. For example, the bow tie type which is the simplest self-complementary structure may be used. Further, the symmetrical point (center) of the two conductor plates 10 may not be the center of the printed wiring board 2. Alternatively, the number of conductor plates need not be two. For example, as shown in FIG. 15, two pairs of receiving antennas can be configured by four. In FIG. 15, the same reference numerals are given to the same members as those of the semiconductor device of the embodiment of FIG. 6, and thus duplicated explanation is omitted, but in the case of FIG. Therefore, two sets of resistors and impedance elements connected to this are also required.
Furthermore, as another embodiment, as shown in FIG. 16, a plurality of conductor plates 10 can be arranged side by side and used as a radio wave absorber. By arranging the small conductor plate 10 vertically and horizontally, the usable frequency as the absorber of each element can be increased for downsizing, and the absorption range and incident angle can be expanded by arranging the element vertically and horizontally. . A plurality of conductor plates 10 arranged in this way can be arranged on the inner layer or the surface layer of the printed wiring board 2.

In addition, the element connected to the power receiving point and the impedance element connected to the end of the conductor plate can be freely configured, such as a chip component, built-in built-in element, or a resistor made of a material with low conductivity. It is.
Further, the printed wiring board 2 may be a flexible wiring board whose shape can be changed. In this case, the conductor plate 10 is also formed of a flexible material, but can operate as a radio wave absorber even if it has a curved shape. At this time, the resistor may be formed by a printing technique.

The top view of the bow tie antenna embedded in the board | substrate for demonstrating the effect | action of this invention (without the impedance element 12). Sectional drawing of the bow tie antenna embedded in the board | substrate for demonstrating the effect | action of this invention. The frequency characteristic of the input impedance of the bow tie antenna embedded in the board | substrate shown by FIG. The top view of the bow tie antenna embedded in the board | substrate for demonstrating the effect | action of this invention (with the impedance element 12). The frequency characteristic of the input impedance of the bow tie antenna embedded in the board | substrate shown by FIG. 1 is a top view showing an embodiment of a semiconductor device of the present invention. Sectional drawing which shows embodiment of the semiconductor device of this invention. Sectional drawing of the order of a process which shows the manufacturing method of embodiment of the semiconductor device of this invention (the 1). Sectional drawing of the order of a process which shows the manufacturing method of embodiment of the semiconductor device of this invention (the 2). The top view which shows one Example of this invention. Sectional drawing which shows one Example of this invention. The top view which used the frame-shaped conductor used as the reference of this invention as the support body. 3m radiation electric field directivity when a frame-shaped conductor is used as a support. 3m radiation electric field directivity in an example of the present invention. Sectional drawing which shows the example of a change of embodiment of this invention. The top view which shows the other example of a change of embodiment of this invention. The top view which shows another example of a change of embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 LSI chip 2 Printed wiring board 2a Board | substrate 3 Wiring layer 4 Insulating layer 5 Frame-shaped conductor board 6 LSI chip 7 Solder ball 8 Copper post 10 Conductor board 11 Resistance 12 Impedance element 13 Minute dipole transmitting antenna 21 Support body 22 Insulating resin film 23 Via plug

Claims (12)

Two conductor plates are arranged inside or on the surface of the printed wiring board on which the LSI is mounted, with a dividing line that bisects the cross section or surface of the printed wiring board, and two conductor boards are straddling the center of the dividing line. The first impedance element that connects the two conductor plates is disposed, and the second impedance element that connects the two conductor plates is disposed at two locations near the position farthest from the center point of the dividing line. A semiconductor device comprising:
A semiconductor device characterized in that the two conductor plates have a self-complementary shape. The cross-section or surface of the printed wiring board is divided into a plurality of areas inside or on the surface of the printed wiring board on which the LSI is mounted, and two sheets are sandwiched across a dividing line that divides each divided area into two. A conductor plate is disposed, a first impedance element connecting the two conductor plates across the center of the dividing line is disposed, and at two locations near the position farthest from the center point of the dividing line, A semiconductor device in which a second impedance element for connecting two conductive plates is disposed,
A semiconductor device characterized in that the two conductor plates have a self-complementary shape. The semiconductor device according to claim 1, wherein at least a part of the LSI is mounted inside the printed wiring board. A part of the LSI is mounted inside the printed wiring board, the other part of the LSI is mounted on the surface of the printed wiring board, and the conductor plate is part of the LSI and the other part of the LSI. The semiconductor device according to claim 1, wherein the semiconductor device is disposed between the two. The semiconductor device according to claim 1, wherein the dividing line is a cross section of the printed wiring board or a surface thereof, or a diagonal line of the region. The impedance of the first impedance element is a complex conjugate value of a characteristic impedance of an antenna made of the self-complementary conductor at the maximum value of the operating frequency of the semiconductor device. The semiconductor device according to claim 1. The value of the real part of the second impedance element is larger than the value of the real part of the characteristic impedance of the antenna made of the self-complementary conductor at the maximum value of the operating frequency of the semiconductor device, and the second impedance The semiconductor device according to claim 1, wherein the imaginary part of the element and the imaginary part of the characteristic impedance have different signs. 6. The semiconductor device according to claim 1, wherein the impedance of the first impedance element is 60π / √ (relative permittivity of a printed wiring board) Ω. The said 2nd impedance element is resistance, The resistance value is larger than 60 (pi) / (root) (relative dielectric constant of printed wiring board) (omega | ohm), It is any one of Claim 1-5 or 8 characterized by the above-mentioned. Semiconductor device. The conductor plate is connected only to the first and second impedance elements, and is not connected to any other conductor or element. The semiconductor device described. 11. The semiconductor device according to claim 1, wherein a distance between the two conductor plates is less than 1 mm at the connection portion of the second impedance. The interlayer connection between wiring layers sandwiching the conductor plate is performed using a gap of the conductor plate or a gap between the two conductor plates. A semiconductor device according to 1.

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