JP5011682B2 - Electronic device and electronic equipment - Google Patents

Description

  The present invention controls various driven elements such as organic light emitting diode (hereinafter referred to as “OLED (Organic Light Emitting Diode)”) elements, liquid crystal elements, electrophoretic elements, electrochromic elements, electron emitting elements, and resistive elements. Related to technology.

Various techniques for driving this type of driven element have been proposed. For example, Patent Document 1 discloses a configuration in which a plurality of unit circuits including OLED elements that are driven elements are arranged in a planar shape. Each unit circuit includes a drive transistor that controls the current supplied to the OLED element in accordance with the gate voltage, a reset transistor for diode-connecting the drive transistor, and light emission that switches whether or not current can be supplied to the OLED element. And a control transistor. According to this configuration, it is possible to compensate for an error (variation) in the threshold voltage of the driving transistor in each unit circuit.
Japanese Patent Laying-Open No. 2003-122301 (FIG. 1)

  By the way, it is desirable that the total number of transistors constituting one unit circuit is small. This is because the larger the total number of transistors, the more complicated the configuration of the unit circuit and the higher the manufacturing cost. Further, in an electro-optical device using unit circuits as pixels, there is a problem that the aperture ratio decreases as the total number of transistors increases. However, there is a limit to reducing the total number of transistors in each unit circuit under the conventional configuration. For example, in the configuration of Patent Document 1, a light emission control transistor is indispensable in order to turn off the OLED element during a period in which data is written to the unit circuit. One embodiment of the present invention is effective for simplifying the configuration of each unit circuit, for example.

  An electronic device according to an aspect of the present invention includes a signal line, a unit circuit connected to the signal line, and a voltage supply line. The unit circuit includes a control terminal (for example, a gate) and a first terminal ( One of a source and a drain) and a second terminal (the other of the source and the drain) connected to the voltage supply line and between the first terminal and the second terminal according to the voltage of the control terminal Electrically connected to the drive transistor in which the conduction state is set, the driven element (for example, the electro-optical element 11 in FIG. 3), the control terminal of the drive transistor, and the first terminal or the second terminal Between the first switching element (for example, the transistor T1 in FIG. 3) for controlling a simple connection and the first electrode (for example, the first electrode Ea in FIG. 3) and the second electrode (for example, the second electrode Eb in FIG. 3). With dielectric, front The first electrode is connected to the control terminal of the driving transistor, and the second electrode is connected to the signal line (for example, the capacitive element C in FIG. 3), and is supplied to the driven element. At least one level of the drive current and the drive voltage is set according to a conduction state between the first terminal and the second terminal.

  In this configuration, the threshold voltage error of the driving transistor is compensated by electrically connecting the control terminal of the driving transistor and one of the first terminal and the second terminal via the first switching element, The voltage of the gate of the driving transistor is set to a voltage value corresponding to the voltage of the signal line by capacitive coupling in the capacitive element. Accordingly, the threshold voltage error of the driving transistor (difference between the threshold voltage of one driving transistor and the design value, or the threshold voltage of the driving transistor in each unit circuit in a configuration including a plurality of unit circuits can be achieved by an extremely simple configuration. The driven element can be driven while compensating for the difference.

  In the electronic device according to this aspect, the electrical connection between the signal line and the second electrode is controlled (switching whether or not the voltage of the signal line is supplied to the second electrode). Although a switching element may be arranged, from the viewpoint of facilitating simplification of the unit circuit, the second electrode may be directly connected to the signal line (that is, without interposing the switching element). desirable.

In a preferred aspect of the present invention, in the first period (for example, the writing period Pwrt in FIG. 2), one of the first terminal and the second terminal is connected to the control terminal of the drive transistor. In the first period, a data signal (for example, the data voltage Vdata in FIG. 2) is supplied to the second electrode through the signal line in the first period, and in the second period (for example, in FIG. 2). In the driving period Pdrv), a control signal (for example, the control voltage Vctl in FIG. 2) that changes with time in the second period is supplied to the second electrode.
Under this mode, the data signal is held in the second electrode in the first period, and the voltage of the second electrode changes with time in the second period. The voltage of the first electrode (that is, the voltage of the gate of the driving transistor) fluctuates by a voltage value corresponding to the level difference value between the data signal and the control signal due to capacitive coupling in the capacitive element. Therefore, according to this aspect, the driven element can be driven over a time length according to the data signal. Note that if the configuration in which the first electrode is in a floating state in the second period is adopted, the leakage of the charge accumulated in the first electrode is suppressed, so that the voltage of the first electrode can be converted to a data signal with high accuracy. The voltage value can be set accordingly.
In the driving circuit of this aspect, the circuit that supplies the data signal to the unit circuit and the circuit that supplies the control signal to the unit circuit may be mounted on the electronic device as separate circuits that are separated from each other. May be mounted on an electronic device in a form mounted on a single circuit (for example, an IC chip). Further, a signal line may be used as a wiring for supplying a control signal to the unit circuit, or a control signal may be supplied to the unit circuit via a wiring separate from the signal line.

  In an electronic device according to a more specific aspect, the voltage control circuit sets the voltage of the voltage supply line to any one of a plurality of voltage values (for example, controls electrical connection between the voltage supply line and a predetermined potential). Is further provided. For example, the voltage control circuit in this aspect sets the voltage of the voltage supply line to a first voltage value lower than the first terminal (for example, the voltage value Vss) in at least a part of the first period, The voltage of the voltage supply line is set to a second voltage value higher than the first terminal (for example, the voltage value Vdd) in at least part of the second period.

  In this configuration, in at least part of the first period (more specifically, at least part of the period in which the first terminal or the second terminal is connected to the control terminal), the voltage of the voltage supply line is the first terminal. Is set to a lower first voltage value. Therefore, in this period, compared with the configuration in which the voltage of the voltage supply line is set to the second voltage value, the electric energy applied to the driven element (the driving current or driving voltage supplied to the driven element) Is reduced. Therefore, even if a switching element (for example, “light emission control transistor” in Patent Document 1) for controlling whether or not to apply electric energy to the driven element is not disposed, in principle, the driven element is driven within the first period. The supply of electrical energy to the element can be suppressed (ideally stopped). However, even though the light emission control transistor is not necessary in principle, it is not intended to exclude the configuration in which the light emission control transistor is disposed from the scope of the present invention. That is, even in the configuration of the present invention, for the purpose of more reliably defining the period during which the driven element is driven, the application of electrical energy to the driven element as in the light emission control transistor of Patent Document 1. A switching element for controlling availability may be arranged.

  By the way, as a transistor constituting the unit circuit (particularly a driving transistor), for example, a transistor including a semiconductor layer made of various semiconductor materials (for example, polycrystalline silicon, microcrystalline silicon, single crystal silicon, or amorphous silicon) (typically A thin film transistor) can be used. It is known that in a transistor whose semiconductor layer is made of amorphous silicon, for example, the threshold voltage fluctuates with time if the direction of the current flowing therethrough is constantly fixed. According to this embodiment, current (for example, current I0 in FIG. 5) flows from the first terminal to the voltage supply line via the second terminal in the first period, while current flows from the second terminal in the second period. It is supplied to the driven element via the first terminal. That is, since the direction of the current flowing through the driving transistor is reversed between the first period and the second period, even if the semiconductor layer of the driving transistor is made of amorphous silicon, the threshold voltage varies according to this embodiment. Can be suppressed. In other words, it can be said that this embodiment is particularly preferably employed for a configuration in which the semiconductor layer of the driving transistor is made of amorphous silicon.

  In still another aspect, the first switching element is a switching transistor, and the transistors included in the unit circuit are only the driving transistor and the switching transistor. According to this configuration, it is possible to compensate for an error in the threshold voltage of the drive transistor while reducing the number of transistors included in the unit circuit to two transistors, that is, a drive transistor and a switching transistor. A specific example of this aspect will be described later as the first embodiment (FIG. 3).

  In a more specific aspect, the driving element is driven when the voltage value of the first terminal exceeds a predetermined voltage value, and the first voltage value is set so that the voltage value of the first terminal in the first period is greater than the predetermined voltage value. Is also determined to be low. According to this aspect, since the voltage value of the first terminal in the first period is lower than the predetermined voltage value, even if the light emission control transistor is not arranged, driving of the driven element in the first period ( For example, light emission) can be stopped reliably.

By the way, the voltage value of the first terminal of the drive transistor may fluctuate accidentally due to various external factors such as noise. Depending on the voltage value after the change (for example, when the voltage value of the first terminal is equal to or lower than the second voltage value), it is possible to inhibit the return to the intended state of driving the driven element. There is sex. Therefore, in a further preferred aspect of the present invention, the unit circuit includes first reset means for setting the voltage of the first terminal to a predetermined voltage value. According to this aspect, even if the voltage value of the first terminal fluctuates accidentally, the voltage of the first terminal is set to the intended voltage value by the first reset means. In this way, stable driving of the driven element is realized by resetting the voltage of the first voltage to a voltage value at which intended driving of the driven element is possible. The timing at which the voltage of the first terminal is set to a predetermined voltage value by the reset means is arbitrary. For example, the voltage value of the first terminal may be set at a predetermined cycle such as before the start of each first period, or when various operators such as an operator for turning on the power are operated by the user. The voltage value of the first terminal may be set.
More specifically, the first reset means includes a second switching element (for example, the transistor T2 in FIG. 6) that electrically connects the first terminal and the voltage supply line during the initialization period. In the initialization period, the voltage of the voltage supply line is set to the second voltage value. According to this aspect, since the voltage supply line can also be used for resetting the voltage value of the first terminal, a configuration in which a wiring separate from the voltage supply line is used for resetting the voltage value of the first terminal The configuration of the electronic device is simplified compared to A specific example of this aspect will be described later as a second embodiment.
Alternatively, the first reset means includes a second switching element (for example, the transistor T2 in FIG. 10) that electrically connects the first terminal and the power supply line to which a constant voltage is supplied in the initialization period, and the voltage control circuit However, the voltage supply line voltage may be set to the first voltage value in the initialization period. According to this aspect, since the voltage of the voltage supply line is set to the first voltage value in the initialization period, it is possible to reliably stop driving (for example, light emission) of the driven element in the initialization period. There is. A specific example of this aspect will be described later as a third embodiment.

In another aspect of the present invention, the unit circuit includes second reset means for setting the voltage of the control terminal of the drive transistor to a predetermined voltage value. According to this aspect, since the voltage of the control terminal of the drive transistor is set to an intended voltage value, the voltage value of the control terminal of the drive transistor can be obtained with high accuracy regardless of the state of the control terminal immediately before that. It can be set to a value.
More specifically, the second reset means includes a third switching element (for example, the transistor T3 in FIG. 13) that electrically connects the control terminal and the voltage supply line in the initialization period, and the voltage control circuit includes: In the initialization period, the voltage of the voltage supply line is set to the second voltage value. According to this aspect, the voltage of the control terminal is set to the second voltage value in the initialization period. Since the voltage supply line is also used to reset the voltage value of the control terminal, the wiring of the electronic device is different from the configuration in which a separate wiring from the voltage supply line is used for resetting the voltage value of the first terminal. The configuration is simplified. A specific example of this aspect will be described later as a fourth embodiment.

  The electronic device according to the present invention is used in various electronic devices. A typical example of this electronic device is a device that uses the electronic device as a display device. Examples of this type of electronic device include a personal computer and a mobile phone. However, the use of the electronic device according to the present invention is not limited to displaying images. For example, the electronic apparatus of the present invention can also be applied as an exposure apparatus (exposure head) for forming a latent image on an image carrier such as a photosensitive drum by irradiation of light.

  The driven element in the present invention includes all elements that are electrically driven. A typical example of this driven element is an electro-optical element in which optical properties (gradation) such as luminance and transmittance are changed by application of electric energy. The electro-optical device according to one aspect of the present invention has a configuration in which the electronic device of each of the above forms is dedicated to drive the electro-optical element. That is, this electro-optical device (for example, a light-emitting device in which a light-emitting element is employed as an electro-optical element) includes a signal line, a unit circuit connected to the signal line, and a voltage supply line. A drive having a control terminal, a first terminal, and a second terminal connected to the voltage supply line, and a conduction state between the first terminal and the second terminal is set according to a voltage of the control terminal A transistor, an electro-optic element, a first switching element that controls electrical connection between the control terminal of the driving transistor and the first terminal or the second terminal; a first electrode; A dielectric provided between the electrodes, the first electrode connected to the control terminal of the drive transistor, and the second electrode connected to the signal line, and supplied to the electro-optical element To be driven At least one of the levels are set according to the conduction state between the first terminal and the second terminal of the current and drive voltage. Also with this configuration, the same operations and effects as the electronic device described above are exhibited. In addition, the above-described aspects of the electronic device are similarly applied to this electro-optical device.

  An electronic circuit according to one aspect of the present invention is an electronic circuit for driving a driven element, and includes a signal line, a unit circuit connected to the signal line, and a voltage supply line, The unit circuit includes a control terminal, a first terminal, and a second terminal connected to the voltage supply line, and a conduction state between the first terminal and the second terminal is determined according to a voltage of the control terminal. A driving transistor to be set; a first switching element that controls electrical connection between the control terminal of the driving transistor and one of the first terminal and the second terminal; a first electrode and a second electrode; Including a capacitor, the first electrode being connected to the control terminal of the driving transistor, and the second electrode being connected to the signal line, and supplied to the driven element. Drive current and drive power At least one of the levels are set according to the conduction state between the first terminal and the second terminal of the. Also with this configuration, the same operations and effects as the electronic device described above are exhibited. In this electronic circuit, it does not matter whether or not there is a driven element. Moreover, each aspect enumerated above about an electronic device is applied similarly to this electronic circuit.

  One embodiment of the present invention is a method for driving the electronic device according to each embodiment described above. The driving method includes a control terminal, a first terminal, and a second terminal connected to the voltage supply line, and a conduction state between the first terminal and the second terminal according to a voltage of the control terminal. Is a method of driving an electronic device including a unit circuit including a driving transistor and a driven element, wherein one of the first terminal and the second terminal is driven in the first period. The transistor is electrically connected to the control terminal, and a data signal is supplied to the second electrode via the signal line within the first period, and the second period is over time within the second period. A control signal that changes with time is supplied to the second electrode. Also by this method, the same operations and effects as the electronic device according to each of the above embodiments are exhibited. In addition, the above-described aspects of the electronic device are similarly applied to this driving method.

<A: First Embodiment>
FIG. 1 is a block diagram showing a configuration of an electronic device according to the first embodiment of the present invention. The electronic device D illustrated in the figure is an electro-optical device that is employed in various electronic devices as a device for displaying an image, and includes an element array unit 10 in which a plurality of unit circuits U are arranged in a planar shape. The scanning line driving circuit 23 and the signal line driving circuit 25 for driving each unit circuit U, and the voltage control circuit 27 for supplying the voltage A to each unit circuit U are included. The scanning line driving circuit 23, the signal line driving circuit 25, and the voltage control circuit 27 may be mounted on the electronic device D as separate circuits, or a part or all of these circuits may be a single circuit. The electronic device D may be mounted as a circuit.

  As shown in FIG. 1, the element array unit 10 includes m scanning lines 13 extending in the X direction, and n signal lines (data lines) 15 extending in the Y direction orthogonal to the X direction. (M and n are both natural numbers). Each unit circuit U is arranged at a position corresponding to the intersection of the scanning line 13 and the signal line 15. Accordingly, these unit circuits U are arranged in a matrix of m rows × n columns.

  In the element array section 10, m voltage supply lines 17 that are paired with the scanning lines 13 and extend in the X direction are formed. These voltage supply lines 17 are connected in common to the output terminal of the voltage control circuit 27. Accordingly, the voltage A output from the voltage control circuit 27 is commonly supplied to the plurality of unit circuits U via the voltage supply lines 17.

  FIG. 2 is a timing chart for explaining the operation of the electronic apparatus D. As shown in the figure, in the present embodiment, one frame (1F) is divided into a writing period Pwrt and a driving period Pdrv. In the present embodiment, the case where the time length of the writing period Pwrt and the time length of the driving period Pdrv substantially coincide is illustrated, but the ratio of the time lengths of the respective periods is arbitrarily changed.

  As shown in FIG. 2, the voltage control circuit 27 sets the voltage A of each voltage supply line 17 to the voltage value Vss in the writing period Pwrt, and to the voltage value Vdd in the driving period Pdrv immediately after that. . The voltage value Vss in the present embodiment is a potential (ground potential) that serves as a reference voltage of each part. The voltage value Vdd is a voltage higher than the voltage value Vss (for example, the higher side of the power supply potential).

  The scanning line driving circuit 23 in FIG. 1 is a circuit for sequentially selecting each of the m scanning lines 13 in a predetermined order within the writing period Pwrt (selecting a plurality of unit circuits U in units of rows). is there. More specifically, as shown in FIG. 2, the scanning line driving circuit 23 scans signals S [1] to S [m that sequentially become high in each horizontal scanning period (1H) in the writing period Pwrt. ] Is generated and output to each scanning line 13. The scanning signal S [i] supplied to the scanning line 13 in the i-th row (i is an integer satisfying 1 ≦ i ≦ m) is in the i-th horizontal scanning period (1H) in the writing period Pwrt. This signal is a high level and maintains a low level in other periods (including the driving period Pdrv). The transition to the high level of the scanning signal S [i] means selection of the i-th row.

  On the other hand, the signal line drive circuit 25 in FIG. 1 sends a signal D [to each of one row (n) of unit circuits U corresponding to the scan line 13 selected by the scan line drive circuit 23 via each signal line 15. 1] to D [n] are supplied. As shown in FIG. 2, the signal D [j] supplied to the signal line 15 in the j-th column (j is an integer satisfying 1 ≦ j ≦ n) becomes the data voltage Vdata in the writing period Pwrt, and the driving period This is a voltage signal that becomes the control voltage Vctl at Pdrv.

  As shown in FIG. 2, the data voltage Vdata sequentially changes every horizontal scanning period in accordance with the gradation (luminance) specified for each unit circuit U. More specifically, the data voltage Vdata of the signal D [j] is a gray level specified for the unit circuit U in the j-th column belonging to the i-th row in the i-th horizontal scanning period in the writing period Pwrt. The voltage value corresponding to. The gradation of each unit circuit U is specified by gradation data supplied from the outside.

  On the other hand, the voltage value of the control voltage Vctl changes with time within the driving period Pdrv. In the present embodiment, the control voltage Vctl has a waveform from the middle point tc of the driving period Pdrv (that is, a point of the same time length from both the starting point and the ending point of the driving period Pdrv) to a waveform from the middle point tc to the end point. It is a triangular wave that is line-symmetric with respect to the midpoint tc. That is, as shown in FIG. 2, the control voltage Vctl increases linearly over time from the voltage value VL to the higher voltage value VH from the start point of the drive period Pdrv to the middle point tc. From the point tc to the end point, the voltage value linearly decreases from the voltage value VH with time and reaches the voltage value VL.

  Next, a specific configuration of each unit circuit U will be described with reference to FIG. In the drawing, only one unit circuit U located in the i-th row and the j-th column is shown, but the other unit circuits U have the same configuration.

  As shown in FIG. 3, the unit circuit U includes an electro-optical element 11, a driving transistor Tdr, a transistor T1, and a capacitive element C. Among them, the electro-optical element 11 is an element (driven element) I1 to be driven in the electronic apparatus D. The electro-optical element 11 of the present embodiment is a current-driven light-emitting element that emits light with luminance corresponding to a current supplied thereto (hereinafter referred to as “drive current”). In the present embodiment, an OLED element in which a light emitting layer made of an organic EL (ElectroLuminescent) material is interposed between an anode and a cathode is employed as the electro-optic element 11. The cathodes of the electro-optic element 11 in each unit circuit U are grounded in common (voltage value Vss). The electro-optical element 11 emits light when a forward voltage exceeding the threshold voltage Vth_EL is applied.

  The drive transistor Tdr in FIG. 3 is an n-channel transistor for controlling the current value of the drive current I1. More specifically, the drive transistor Tdr has a current corresponding to the gate voltage Vg by changing the electrical continuity between the source and the drain according to the gate voltage (hereinafter referred to as “gate voltage”) Vg. A drive current I1 having a level is generated. Accordingly, the electro-optical element 11 is driven to a luminance corresponding to the conduction state of the driving transistor Tdr (that is, a luminance corresponding to the gate voltage Vg).

  In the present embodiment, the voltage value of each of the source and drain of the drive transistor Tdr is sequentially reversed. Therefore, in a strict sense, the drain and source of the drive transistor Tdr are switched at any time. However, in the following description, for convenience of explanation, the drive transistor Tdr of the drive transistor Tdr is described based on the voltage level of each terminal of the drive transistor Tdr when the drive current I1 is supplied to the electro-optical element 11 via the drive transistor Tdr. Among these, the terminal on the electro-optic element 11 side is expressed as “source (S)” and the terminal on the opposite side is expressed as “drain (D)”.

  The drive transistor Tdr is interposed between the electro-optical element 11 and the voltage supply line 17. That is, the drain of the drive transistor Tdr is connected to the voltage supply line 17, and the source thereof is connected to the anode of the electro-optical element 11. The source of the driving transistor Tdr is directly connected to the electro-optical element 11. That is, no switching element is interposed on the path of the drive current I1 from the source of the drive transistor Tdr to the anode of the electro-optic element 11.

  The transistor T1 is an n-channel transistor that is interposed between the gate and the source of the driving transistor Tdr and controls the electrical connection between them. The gate of the transistor T1 is connected to the scanning line 13. Therefore, in a period in which the scanning signal S [i] is maintained at a high level (i-th horizontal scanning period), the transistor T1 is turned on, the driving transistor Tdr is diode-connected, and the scanning signal S [i] is When transitioning to the low level, the transistor T1 is turned off and the diode connection of the driving transistor Tdr is released.

  As shown in FIG. 3, the capacitive element C includes a first electrode Ea and a second electrode Eb that face each other, and a dielectric that is interposed in a gap between the two electrodes. The first electrode Ea is connected to the gate of the drive transistor Tdr. The second electrode Eb is connected to the signal line 15. The capacitive element C is a means for holding electric charge according to the potential difference between the first electrode Ea and the second electrode Eb (that is, the potential difference between the signal line 15 and the gate of the driving transistor Tdr).

  Next, a specific operation of the electronic device D will be described with reference to FIGS. 4 and 5. Hereinafter, the operation of the unit circuit U in the j-th column belonging to the i-th row will be described by dividing it into a writing period Pwrt and a driving period Pdrv.

(A) Writing period Pwrt (FIG. 4)
When the scanning signal S [i] transits to a high level during the writing period Pwrt, the transistor T1 is turned on, and the source and gate of the driving transistor Tdr are electrically connected (diode connected). On the other hand, the voltage A of the voltage supply line 17 maintains the voltage value Vss during the writing period Pwrt. That is, since the voltage A of the voltage supply line 17 is lower than the voltage value of the source and gate of the driving transistor Tdr, during the writing period Pwrt, as shown in FIG. 4, the current I0 is changed to the gate of the driving transistor Tdr. To the voltage supply line 17 through the sources and drains of the transistor T1 and the driving transistor Tdr in this order.

  In the present embodiment, the structures and materials of the electro-optic element 11 and the drive transistor Tdr are selected so that the threshold voltage Vth_EL of the electro-optic element 11 is larger than the threshold voltage Vth_TR of the drive transistor Tdr. That is, the source voltage (Vss + Vth_TR) of the driving transistor Tdr in the writing period Pwrt is lower than the threshold voltage Vth_EL of the electro-optic element 11. Accordingly, no current flows through the electro-optical element 11 during the writing period Pwrt, and the electro-optical element 11 is turned off.

  As described above, when the current I0 flows through the driving transistor Tdr, the gate voltage Vg of the driving transistor Tdr (in other words, the voltage of the first electrode Ea) is within the horizontal scanning period in which the scanning signal S [i] maintains the high level. The voltage value Vss and the threshold voltage Vth_TR of the driving transistor Tdr converge to an added value (Vss + Vth_TR). On the other hand, the data voltage Vdata of the signal D [j] is supplied to the first electrode Ea during this horizontal scanning period. When the horizontal scanning period elapses with such a voltage relationship maintained and the scanning signal S [i] transitions to a low level, the transistor T1 is turned off and the first electrode Ea of the capacitor C is in a floating state. It becomes. Therefore, the potential difference between the first electrode Ea (Vss + Vth_TR) and the second electrode Eb (Vdata) at the time when the scanning signal S [i] transitions to the low level is held in the capacitive element C.

  In the writing period Pwrt, the operation for accumulating the electric charge according to the data voltage Vdata and the threshold voltage Vth_TR in the capacitive element C as described above is performed for each unit circuit U from the first row to the n-th row. It repeats in order for every scanning period.

(B) Driving period Pdrv (FIG. 5)
Since the scanning signals S [1] to S [m] maintain the low level in the driving period Pdrv, the transistors T1 of all the unit circuits U are turned off and the diode connection of the driving transistors Tdr is released. Accordingly, the first electrode Ea of the capacitive element C in all the unit circuits U maintains the floating state. On the other hand, in the driving period Pdrv, the voltage control circuit 27 maintains the voltage A of the voltage supply line 17 at the voltage value Vdd.

  In the above situation, the control voltage Vctl that changes with time is supplied to the second electrode Eb of the capacitive element C of each unit circuit U through each signal line 15. Here, since the first electrode Ea is in a floating state, the gate voltage Vg of the drive transistor Tdr (that is, the voltage of the first electrode Ea) is equal to the voltage of the second electrode Eb due to capacitive coupling by the capacitive element C. It changes by a voltage value ΔV corresponding to the fluctuation. The relationship between the voltage change of the first electrode Ea and the drive current I1 will be described in detail as follows.

  First, when the control voltage Vctl applied to the second electrode Eb in the driving period Pdrv becomes higher than the data voltage Vdata applied in the immediately preceding writing period Pwrt, the gate voltage Vg (first voltage) of the driving transistor Tdr. The voltage of one electrode Ea) rises by a voltage value ΔV corresponding to the difference between the control voltage Vctl and the data voltage Vdata from the voltage value (Vss + Vth_TR) set in the writing period Pwrt. At this time, since the drive transistor Tdr is turned on (conductive state), as shown in FIG. 5, the drive current I1 is supplied from the voltage supply line 17 to the electro-optical element 11 via the drive transistor Tdr. The electro-optical element 11 emits light by supplying the driving current I1.

  On the other hand, when the control voltage Vctl applied to the second electrode Eb in the driving period Pdrv becomes lower than the data voltage Vdata applied in the immediately preceding writing period Pwrt, the gate voltage Vg of the driving transistor Tdr is The voltage value (Vss + Vth_TR) set in the writing period Pwrt drops by a voltage value ΔV corresponding to the difference between the data voltage Vdata and the control voltage Vctl. At this time, the driving transistor Tdr is turned off (non-conducting state), so that the path from the voltage supply line 17 to the electro-optical element 11 is blocked and the electro-optical element 11 is turned off.

  As described above, the drive transistor Tdr of each unit circuit U in the drive period Pdrv is turned on during the period when the control voltage Vctl is higher than the data voltage Vdata, and the control voltage Vctl is lower than the data voltage Vdata. At OFF. In other words, the electro-optical element 11 of each unit circuit U emits light during a time length corresponding to the voltage value of the data voltage Vdata in the driving period Pdrv, and turns off during the remaining period of the driving period Pdrv. Accordingly, each electro-optical element 11 is controlled to a gradation (integrated value of luminance in the driving period Pdrv) corresponding to the data voltage Vdata (gradation control by pulse width modulation).

  As described above, in the present embodiment, the gate voltage Vg of the drive transistor Tdr is set to a voltage value corresponding to the threshold voltage Vth_TR in the writing period Pwrt. In other words, the drive transistor Tdr is forcibly shifted to the boundary state between the conductive state and the non-conductive state regardless of the threshold voltage Vth_TR. Accordingly, the time length during which the drive transistor Tdr is turned on during the drive period Pdrv and the drive current I1 is supplied to the electro-optical element 11 is determined according to the data voltage Vdata, and depends on the threshold voltage Vth_TR of the drive transistor Tdr. do not do. That is, according to the present embodiment, it is possible to compensate the error (difference from the design value) of the threshold voltage Vth_TR of the drive transistor Tdr and control the electro-optical element 11 to a desired gradation with high accuracy.

  In the present embodiment, the total number of transistors included in one unit circuit U is “2”. Therefore, compared with the configuration of Patent Document 1 in which at least three transistors per unit circuit are indispensable to compensate for variations in threshold voltage of the drive transistor Tdr, the configuration of the electronic device D is simplified and the manufacturing cost is increased. Further, the aperture ratio of each unit circuit U (the ratio of the region where the emitted light from the electro-optical element 11 is emitted out of the region where the unit circuit U is distributed) can be increased.

  By the way, each transistor (particularly the drive transistor Tdr) constituting the unit circuit U is formed from, for example, a thin film transistor using polycrystalline silicon, microcrystalline silicon, single crystal silicon or amorphous silicon as a semiconductor layer material, or bulk silicon. A transistor can be employed. Among these transistors, it is known that the threshold voltage of a transistor whose semiconductor layer is made of amorphous silicon varies with time if the direction of the current flowing through the transistor is fixed constantly.

  Under the configuration of the present embodiment, the drive current I1 flows from the drain to the source of the drive transistor Tdr in the drive period Pdrv, whereas the current I0 is supplied from the source in the write period Pwrt as shown in FIG. It flows toward the drain. That is, the direction of the current flowing through the driving transistor Tdr is reversed between the writing period Pwrt and the driving period Pdrv. Therefore, according to the present embodiment, it is possible to suppress the variation with time of the threshold voltage Vth_TR under the configuration in which the thin film transistor whose semiconductor layer is made of amorphous silicon is adopted as the drive transistor Tdr.

<B: Second Embodiment>
Next, a second embodiment of the present invention will be described.
In the first embodiment, the current I0 is generated by reducing the voltage A of the voltage supply line 17 to the voltage value Vss in the writing period Pwrt, thereby causing the gate voltage Vg of the drive transistor Tdr to correspond to the threshold voltage Vth_TR. A configuration for converging to a voltage value (Vss + Vth_TR) is illustrated. However, if the source voltage of the drive transistor Tdr accidentally drops below the voltage value Vss due to some disturbance such as noise, the current I0 is not generated even if the voltage A is lowered to the voltage value Vss. As a result, the gate voltage Vg May not converge to a voltage value corresponding to the threshold voltage Vth_TR. In order to solve such a problem, in the present embodiment, the source voltage of the drive transistor Tdr is forcibly set to a voltage value that can generate the current I0. In addition, about the element similar to 1st Embodiment among this embodiment, a common code | symbol is attached | subjected to each and description is abbreviate | omitted suitably.

  FIG. 6 is a circuit diagram showing a configuration of the unit circuit U in the present embodiment. As shown in the figure, the unit circuit U of this embodiment includes a p-channel transistor T2 in addition to the elements shown in FIG. This transistor T2 is means for setting the voltage Vn at the connection point N (the source of the drive transistor Tdr or the anode of the electro-optical element 11) between the drive transistor Tdr and the electro-optical element 11 to the voltage value Vdd. It is inserted between N and the voltage supply line 17. The gate of the transistor T2 is connected to a reset signal line 141 that is paired with the scanning line 13 and extends in the X direction. A common reset signal RSa is supplied from the scanning line driving circuit 23 to the reset signal line 141 of each row. However, a circuit that generates the reset signal RSa and outputs the reset signal RSa to each reset signal line 141 may be provided separately from the scanning line driving circuit 23.

  Next, FIG. 7 is a timing chart showing the operation of the electronic device D according to the present embodiment. As shown in the drawing, one frame (1F) includes an initialization period Prs1 immediately before the writing period Pwrt in addition to the writing period Pwrt and the driving period Pdrv. The voltage A of each voltage supply line 17 is set to the voltage value Vss in the writing period Pwrt, and is set to the voltage value Vdd in the initialization period Prs1 and the driving period Pdrv.

  The reset signal RSa supplied to each reset signal line 141 becomes a low level in the initialization period Prs1, and maintains a high level in other periods (the writing period Pwrt and the driving period Pdrv). Further, the scanning line driving circuit 23 changes all the scanning signals S [1] to S [m] to the high level all at once within the initialization period Prs1. The waveforms of the scanning signals S [1] to S [m] in the writing period Pwrt and the driving period Pdrv are the same as those in the first embodiment.

  FIG. 8 is a circuit diagram showing a state of one unit circuit U in the initialization period Prs1. As shown in the figure, in the initialization period Prs1, the transistor T1 is kept on by the high level scanning signal S [i], and the transistor T2 is kept on by the low level reset signal RSa. That is, the connection point N and the gate of the driving transistor Tdr are electrically connected to the voltage supply line 17 via the transistor T2. At this time, the voltage A of the voltage supply line 17 is set to the voltage value Vdd. Therefore, in the initialization period Prs1, as shown in FIG. 8, the voltage Vn at the connection point N and the gate voltage Vg of the drive transistor Tdr are forcibly set to the voltage value Vdd. The initialization period Prs1 is set to a time length sufficient for the voltage Vn at the connection point N to reach the voltage value Vdd after the transistors T1 and T2 are turned on.

  The operations in the writing period Pwrt and the driving period Pdrv are the same as in the first embodiment. According to the present embodiment, in the initialization period Prs1 immediately before the write period Pwrt, the voltage Vn at the connection point N is the voltage value Vss of the voltage supply line 17 and the threshold voltage Vth_TR of the drive transistor Tdr in the write period Pwrt. Therefore, even if the voltage Vn drops below the voltage value Vss prior to the initialization period Prs1, the current I0 is supplied to the drive transistor Tdr during the writing period Pwrt. To the voltage supply line 17. Therefore, according to the present embodiment, in addition to the same effects as those of the first embodiment, there is an effect that a stable operation is realized by reducing the influence of disturbance such as noise.

  In the initialization period Prs1, the electro-optic element 11 emits light because the voltage value (Vdd) of the voltage Vn exceeds the threshold voltage Vth_EL. However, if the time length of the initialization period Prs1 is sufficiently shorter than the writing period Pwrt and the driving period Pdrv, the light emission of the electro-optic element 11 in the initialization period Prs1 is actually a level visually recognized by the observer. Has little effect on the tone. In the present embodiment, the case where the initialization period Prs1 is set immediately before each writing period Pwrt is illustrated, but the timing of the initialization period Prs1 is arbitrary. For example, an initialization period Prs1 may be provided for each of a plurality of frames so that the voltage Vn is initialized.

  Further, as shown in FIG. 9, the scanning signal S [i] is kept at the high level from the time when it rises to the high level during the initialization period Prs1 to the time when it falls to the low level at the end of the i-th horizontal scanning period. It is good also as a structure to maintain. The amount of charge held in the capacitive element C of the unit circuit U in the i-th row is determined when the scanning signal S [i] falls to the low level (that is, the end point of the i-th horizontal scanning period). Therefore, the driving method shown in FIG. 9 also controls the electro-optic element 11 to a gradation corresponding to the data voltage Vdata while compensating for the error of the threshold voltage Vth_TR, as in the first embodiment and the present embodiment. Can do. Further, according to the method of FIG. 9, the number of times of changing the level of the scanning signal S [i] is reduced as compared with the method of FIG. 7, so that the power consumed by the scanning line driving circuit 23 is reduced. There is an advantage that you can. On the other hand, according to the method of FIG. 7, since the pulse width of the scanning signal S [i] in each of the initialization period Prs1 and the writing period Pwrt can be set to the same value for all rows, the scanning signal S [i] There is an advantage that the configuration for generating is simplified.

<C: Third Embodiment>
Next, a third embodiment of the present invention will be described.
In the second embodiment, the configuration in which the voltage supply line 17 is also used to set the voltage Vn at the connection point N to the voltage value Vdd is exemplified. On the other hand, in the present embodiment, the voltage Vn is forcibly set to a predetermined value by connecting the connection point N to a wiring different from the voltage supply line 17. In addition, about the element similar to 1st Embodiment among this embodiment, a common code | symbol is attached | subjected to each and description is abbreviate | omitted suitably.

  FIG. 10 is a circuit diagram showing a configuration of the unit circuit U in the present embodiment. Similar to the second embodiment, the unit circuit U of the present embodiment includes a transistor T2 for setting the voltage Vn at the connection point N to a predetermined value (here, Vdd). The transistor T2 is interposed between the connection point N and the feeder line 18. The power supply line 18 is a wiring extending in the X direction in a pair with the scanning line 13. The voltage of the power supply line 18 in each row is always fixed to the voltage value Vdd by the voltage control circuit 27. Note that a circuit for supplying a voltage (Vdd) to the power supply line 18 may be provided separately from the voltage control circuit 27. The gate of the transistor T2 is connected to the reset signal line 141 as in the second embodiment.

  FIG. 11 is a timing chart for explaining the operation of the electronic device D of the present embodiment. Similar to the second embodiment, one frame (1F) in the present embodiment includes an initialization period Prs1 immediately before the writing period Pwrt in addition to the writing period Pwrt and the driving period Pdrv. The voltage A of each voltage supply line 17 is set to the voltage value Vdd in the driving period Pdrv, and is set to the voltage value Vss in the initialization period Prs1 and the writing period Pwrt. On the other hand, the waveforms of the scanning signal S [i] and the reset signal RSa are the same as those in the second embodiment (FIG. 7). However, the scanning signals S [1] to S [m] having the waveform illustrated in FIG. 9 may be employed.

  FIG. 12 is a circuit diagram showing a state of one unit circuit U in the initialization period Prs1. As shown in the figure, when the transistors T1 and T2 are turned on in the initialization period Prs1, the connection point N and the gate of the driving transistor Tdr are electrically connected to the power supply line 18 via the transistor T2. The Since the voltage of the feeder line 18 is fixed at the voltage value Vdd, the voltage Vn at the connection point N and the gate voltage Vg of the drive transistor Tdr are forcibly set in the initialization period Prs1 as shown in FIG. Set to the value Vdd. Therefore, the same effects as those of the second embodiment can be obtained by this embodiment.

  In the present embodiment, the voltage A of the voltage supply line 17 in the initialization period Prs1 can be set to the voltage value Vss. This is because, unlike the second embodiment, the power supply line 18 for setting the connection point N to the voltage value Vdd is formed separately from the voltage supply line 17 in the initialization period Prs1. As described above, in the present embodiment, the voltage supply line 17 is set to the voltage value Vss in the initialization period Prs1 (see FIG. 12), so that the drive current I1 is not supplied to the electro-optical element 11 in the initialization period Prs1. . In other words, as shown in FIG. 11, the light emission of the electro-optical element 11 stops when the voltage A of the voltage supply line 17 decreases to the voltage value Vss at the end of the driving period Pdrv. Therefore, according to the present embodiment, compared with the second embodiment in which the electro-optic element 11 can emit light even in the initialization period Prs1, the period in which each electro-optic element 11 emits light is defined with high accuracy, and each of them is specified. There is an advantage that it can be controlled to a desired gradation. However, according to the configuration of the second embodiment, since the voltage supply line 17 is also used to set the voltage Vn at the connection point N to the voltage value Vdd, the power supply line 18 dedicated to the initialization of the voltage Vn is It is unnecessary. Therefore, there is an advantage that the configuration of the unit circuit U is simplified.

<D: Fourth Embodiment>
Next, a fourth embodiment of the present invention will be described.
Under the configuration of the first embodiment, the charge accumulated in the capacitive element C in the write period Pwrt remains until the start point of the write period Pwrt in the next frame. Therefore, the charge amount (or gate voltage Vg) accumulated in the capacitive element C in the writing period Pwrt of a certain frame is affected by the amount of charge held in the capacitive element C in the writing period Pwrt of the immediately preceding frame. You may receive it. Therefore, in the present embodiment, the gate voltage Vg of the drive transistor Tdr is forcibly set to a predetermined value prior to the writing period Pwrt. In addition, about the element similar to 1st Embodiment among this embodiment, a common code | symbol is attached | subjected to each and description is abbreviate | omitted suitably.

  FIG. 13 is a circuit diagram showing a configuration of the unit circuit U according to the present embodiment. As shown in the figure, the unit circuit U of this embodiment includes a p-channel transistor T3 in addition to the elements shown in FIG. The transistor T3 is a means for setting the gate voltage Vg of the drive transistor Tdr to the voltage value Vdd, and is interposed between the voltage supply line 17 and the gate of the drive transistor Tdr. The gate of the transistor T3 is connected to a reset signal line 142 extending in the X direction. A common reset signal RSb is supplied from the scanning line driving circuit 23 to the reset signal line 142 of each row. Note that a circuit that generates the reset signal RSb and outputs the reset signal RSb to each reset signal line 142 may be provided separately from the scanning line driving circuit 23.

  FIG. 14 is a timing chart for explaining the operation of the electronic device D according to this embodiment. As shown in the figure, each frame includes an initialization period Prs2 immediately before the writing period Pwrt. Similarly to the second embodiment, the voltage A of each voltage supply line 17 is set to the voltage value Vss in the writing period Pwrt and set to the voltage value Vdd in the initialization period Prs2 and the driving period Pdrv. On the other hand, the reset signal RSb transitions to a low level during the initialization period Prs2 and maintains a high level during other periods. The waveforms of the scanning signals S [1] to S [m] are the same as those in the first embodiment.

  FIG. 15 is a circuit diagram showing a state of the unit circuit U in the initialization period Prs2. As shown in the figure, in the initialization period Prs2, since the reset signal RSb transits to a low level, the transistor T3 transits to the ON state, and the gate of the driving transistor Tdr and the voltage supply line 17 are electrically connected. Is done. Accordingly, the gate voltage Vg of the drive transistor Tdr is set to the voltage value Vdd supplied to the voltage supply line 17 at that time. The operations in the writing period Pwrt and the driving period Pdrv are the same as in the first embodiment.

  As described above, in the present embodiment, since the gate voltage Vg is initialized to the voltage value Vdd prior to the writing period Pwrt, regardless of the amount of charge accumulated in the capacitive element C in the previous frame, In each writing period Pwrt, charges corresponding to the data voltage Vdata can be accurately stored in the capacitive element C. Therefore, according to the present embodiment, each electro-optic element 11 can be controlled to a desired gradation with higher accuracy than in the first embodiment.

<E: Modification>
Various modifications can be made to each of the above embodiments. An example of a specific modification is as follows. In addition, you may combine each following aspect suitably.

(1) Modification 1
The waveforms of the signals D [1] to D [n] (the waveform of the control voltage Vctl) in the driving period Pdrv are appropriately changed. For example, in each embodiment, the triangular wave whose waveform is line symmetric with respect to the midpoint tc of the driving period Pdrv is exemplified, but the symmetry of the control voltage Vctl is not essential in the present invention. For example, various waveforms such as a ramp wave, a sawtooth wave (sawtooth wave), and a multi-ramp wave (staircase wave) are adopted as the control voltage Vctl. Further, not only a waveform in which the voltage value changes linearly but also a waveform that changes in a curve such as a sine wave may be adopted as the control voltage Vctl.

  In each embodiment, the configuration in which the control voltage Vctl in the driving period Pdrv is a waveform corresponding to one cycle of a triangular wave is exemplified. However, a plurality of various unit waveforms such as a triangular wave and a ramp wave and a sawtooth wave exemplified above are driven. A waveform that is continuous within the period Pdrv (that is, a waveform in which the voltage rise and fall are repeated a plurality of times) may be applied to the control voltage Vctl. In the electronic device D of the present invention, various waveforms whose voltage varies with time in the driving period Pdrv can be adopted as the control voltage Vctl.

(2) Modification 2
In the second embodiment and the third embodiment, the configuration in which the voltage Vn at the connection point N is set to the voltage value Vdd in the initialization period Prs1 is illustrated. However, the voltage set to the voltage Vn in the initialization period Prs1 The value is changed accordingly. However, from the viewpoint of surely flowing the current I0 in the writing period Pwrt in which the voltage A of the voltage supply line 17 is set to the voltage value Vss, the voltage Vn in the initialization period Prs1 is equal to the threshold value of the voltage value Vss and the driving transistor Tdr. It is desirable to set the voltage value higher than the added value (Vss + Vth_TR) with the voltage Vth_TR.

  In the fourth embodiment, the configuration in which the gate voltage Vg is set to the voltage value Vdd in the initialization period Prs2 has been exemplified. However, the voltage value set to the gate voltage Vg in the initialization period Prs2 is arbitrary. . For example, the voltage A of the voltage supply line 17 in the initialization period Prs2 may be set to the voltage value Vss, and the gate voltage Vg may be set to the voltage value Vss in the initialization period Prs2.

(3) Modification 3
The configuration of each unit circuit U is changed as appropriate. More specifically, the conductivity type of the transistors constituting the unit circuit U of each embodiment is arbitrary. For example, the transistor T1 of the first embodiment may be a p-channel type, and the transistor T2 of the second and third embodiments and the transistor T3 of the fourth embodiment may be an n-channel type.

  In each embodiment, the drive transistor Tdr is an n-channel type. However, the drive transistor Tdr may be a p-channel type. In the configuration in which the p-channel type drive transistor Tdr is employed, the same operations and effects as those of the embodiments can be achieved without changing the voltage A of the voltage supply line 17 between the write period Pwrt and the drive period Pdrv. . In this configuration, when the transistor T1 is turned on in the writing period Pwrt (the voltage A is the voltage value Vdd as in the driving period Pdrv), the drain voltage of the driving transistor Tdr (that is, the anode of the electro-optical element 11) is It is set to a value (Vdd−Vth_TR) obtained by subtracting the threshold voltage Vth_TR from the value Vdd.

(4) Modification 4
In the above embodiment, an OLED element is exemplified as the electro-optical element 11, but the electro-optical element employed in the electronic apparatus of the present invention is not limited to this. For example, instead of an OLED element, an inorganic EL element, a field emission (FE) element, a surface-conduction electron (SE) element, a ballistic electron surface emitting (BS) element, Various self-luminous elements such as LED (Light Emitting Diode) elements, and various electro-optical elements such as electrophoretic elements, electrochromic elements, and liquid crystal elements can be used. The present invention is also applied to a sensing device such as a biochip. The driven element of the present invention is a concept including all elements driven by application of electric energy, and an electro-optical element such as a light emitting element is merely an example of the driven element.

<F: Application example>
Next, an electronic apparatus using the electronic device according to the present invention will be described.
FIG. 16 is a perspective view showing the configuration of a mobile personal computer that employs the electronic device D according to any one of the embodiments described above as a display device. The personal computer 2000 includes an electronic device D as a display device and a main body 2010. The main body 2010 is provided with a power switch 2001 and a keyboard 2002. Since this electronic device D uses an OLED element as the electro-optical element 11, it is possible to display an easy-to-see screen with a wide viewing angle.

  FIG. 17 shows a configuration of a mobile phone to which the electronic device D according to the embodiment is applied. A cellular phone 3000 includes a plurality of operation buttons 3001, scroll buttons 3002, and an electronic device D as a display device. By operating the scroll button 3002, the screen displayed on the electronic device D is scrolled.

  FIG. 18 shows a configuration of a personal digital assistant (PDA) to which the electronic device D according to the embodiment is applied. The information portable terminal 4000 includes a plurality of operation buttons 4001, a power switch 4002, and an electronic device D as a display device. When the power switch 4002 is operated, various kinds of information such as an address book and a schedule book are displayed on the electronic device D.

  Electronic devices to which the electronic device (electro-optical device) according to the present invention is applied include digital still cameras, televisions, video cameras, car navigation devices, pagers, electronic notebooks, in addition to those shown in FIGS. Electronic paper, calculator, word processor, workstation, video phone, POS terminal, printer, scanner, copier, video player, equipment equipped with a touch panel, and the like. Further, the use of the electronic device according to the present invention is not limited to the display of images. For example, in an image forming apparatus such as an optical writing type printer or an electronic copying machine, a writing head that exposes a photosensitive member according to an image to be formed on a recording material such as paper is used. However, the electronic device of the present invention is used. The unit circuit referred to in the present invention is a concept including not only a circuit constituting a pixel of a display device (a so-called pixel circuit) but also a circuit as a unit of exposure in the image forming apparatus.

1 is a block diagram illustrating a configuration of an electronic device according to a first embodiment of the present invention. It is a timing chart for demonstrating operation | movement of an electronic device. It is a circuit diagram which shows the structure of one unit circuit. It is a circuit diagram which shows the mode of the unit circuit in a writing period. It is a circuit diagram which shows the mode of the unit circuit in a drive period. It is a circuit diagram which shows the structure of the unit circuit which concerns on 2nd Embodiment of this invention. 12 is a timing chart for explaining an operation of the electronic device according to the second embodiment. It is a circuit diagram which shows the mode of the unit circuit in an initialization period. It is a timing chart for demonstrating the operation | movement in the modification of 2nd Embodiment. It is a circuit diagram which shows the structure of the unit circuit which concerns on 3rd Embodiment of this invention. 12 is a timing chart for explaining the operation of the electronic device according to the third embodiment. It is a circuit diagram which shows the mode of the unit circuit in an initialization period. It is a circuit diagram which shows the structure of the unit circuit which concerns on 4th Embodiment of this invention. It is a timing chart for demonstrating operation | movement of the electronic device which concerns on 4th Embodiment. It is a circuit diagram which shows the mode of the unit circuit in an initialization period. It is a perspective view which shows the form (personal computer) of the electronic device which concerns on this invention. It is a perspective view which shows the form (cellular phone) of the electronic device which concerns on this invention. It is a perspective view which shows the form (mobile information terminal) of the electronic device which concerns on this invention.

Explanation of symbols

D: Electronic device, U: Unit circuit, 11: Electro-optic element, 13: Scan line, 141, 142: Reset signal line, 15: Signal line, 17: Voltage supply line, 18: Feed line, 23... Scanning line drive circuit, 25... Signal line drive circuit, 27... Voltage control circuit, Tdr... Drive transistor, T1... Transistor (first switching element), T2. Resetting means, second switching element), T3... Transistor (second resetting means, third switching element), C..capacitance element, Ea... First electrode, Eb. Line voltage, S [i] ... Scanning signal, D [j] ... Signal, Vdata ... Data voltage, Vctl ... Control voltage, RSa, RSb ... Reset signal, Pwrt ... Writing period, Pdrv ... ... Driving period, Prs1, Prs2 ... Initialization period.

Claims (4)

A signal line,
A unit circuit connected to the signal line;
Including a voltage supply line,
The unit circuit is
A drive having a control terminal, a first terminal, and a second terminal connected to the voltage supply line, and a conduction state between the first terminal and the second terminal is controlled according to a voltage of the control terminal A transistor,
A driven element;
A first switching element that controls electrical connection between the control terminal of the drive transistor and any one of the first terminal and the second terminal;
A dielectric is provided between the first electrode and the second electrode, the first electrode is electrically connected to the control terminal of the driving transistor, and the second electrode is electrically connected to the signal line. A capacitive element;
A voltage control circuit for setting the voltage of the voltage supply line to any one of a plurality of voltage values;
A second switching element that electrically connects the first terminal and the voltage supply line in an initialization period;
A level of at least one of a drive current and a drive voltage supplied to the driven element is set according to a conduction state between the first terminal and the second terminal;
In the first period after the initialization period, the control terminal of the drive transistor and any one of the first terminal and the second terminal are electrically connected via the first switching element,
In the first period, a data signal is supplied to the second electrode via the signal line,
In the second period after the first period, a control signal that changes over time within the second period is supplied to the second electrode,
The voltage control circuit sets the voltage of the voltage supply line to a first voltage value lower than the first terminal in at least part of the first period, and the voltage control circuit sets the voltage of the voltage supply line to at least part of the second period. The voltage of the voltage supply line is set to a second voltage value higher than the first terminal, and the voltage of the voltage supply line is set to the second voltage value during the initialization period.
An electronic device characterized by that . A signal line,
A unit circuit connected to the signal line;
Including a voltage supply line,
The unit circuit is
A drive having a control terminal, a first terminal, and a second terminal connected to the voltage supply line, and a conduction state between the first terminal and the second terminal is controlled according to a voltage of the control terminal A transistor,
A driven element;
A first switching element that controls electrical connection between the control terminal of the drive transistor and any one of the first terminal and the second terminal;
A dielectric is provided between the first electrode and the second electrode, the first electrode is electrically connected to the control terminal of the driving transistor, and the second electrode is electrically connected to the signal line. A capacitive element;
A voltage control circuit for setting the voltage of the voltage supply line to any one of a plurality of voltage values;
A second switching element that electrically connects the first terminal and a power supply line to which a constant voltage is supplied in an initialization period;
A level of at least one of a drive current and a drive voltage supplied to the driven element is set according to a conduction state between the first terminal and the second terminal;
In the first period after the initialization period, the control terminal of the drive transistor and any one of the first terminal and the second terminal are electrically connected via the first switching element,
In the first period, a data signal is supplied to the second electrode via the signal line,
In the second period after the first period, a control signal that changes over time within the second period is supplied to the second electrode,
The voltage control circuit sets the voltage of the voltage supply line to a first voltage value lower than the first terminal in at least part of the first period, and the voltage control circuit sets the voltage of the voltage supply line to at least part of the second period. The voltage of the voltage supply line is set to a second voltage value higher than the first terminal, and the voltage of the voltage supply line is set to the second voltage value during the initialization period.
An electronic device characterized by that . A signal line,
A unit circuit connected to the signal line;
Including a voltage supply line,
The unit circuit is
A drive having a control terminal, a first terminal, and a second terminal connected to the voltage supply line, and a conduction state between the first terminal and the second terminal is controlled according to a voltage of the control terminal A transistor,
A driven element;
A first switching element that controls electrical connection between the control terminal of the drive transistor and any one of the first terminal and the second terminal;
A dielectric is provided between the first electrode and the second electrode, the first electrode is electrically connected to the control terminal of the driving transistor, and the second electrode is electrically connected to the signal line. A capacitive element;
A voltage control circuit for setting the voltage of the voltage supply line to any one of a plurality of voltage values;
A third switching element that electrically connects the control terminal and the voltage supply line in an initialization period;
A level of at least one of a drive current and a drive voltage supplied to the driven element is set according to a conduction state between the first terminal and the second terminal;
In the first period after the initialization period, the control terminal of the drive transistor and any one of the first terminal and the second terminal are electrically connected via the first switching element,
In the first period, a data signal is supplied to the second electrode via the signal line,
In the second period after the first period, a control signal that changes over time within the second period is supplied to the second electrode,
The voltage control circuit sets the voltage of the voltage supply line to a first voltage value lower than the first terminal in at least part of the first period, and the voltage control circuit sets the voltage of the voltage supply line to at least part of the second period. The voltage of the voltage supply line is set to a second voltage value higher than the first terminal, and the voltage of the voltage supply line is set to the second voltage value during the initialization period.
An electronic device characterized by that . The electronic device which comprises the electronic device in any one of Claims 1-3 .

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