JP4987792B2 - Epitaxial silicon carbide single crystal substrate manufacturing method - Google Patents

Description

  The present invention relates to an epitaxial silicon carbide (SiC) single crystal substrate and a method for manufacturing the same.

  Silicon carbide (SiC) has attracted attention as an environmentally resistant semiconductor material because it is excellent in heat resistance and mechanical strength and is physically and chemically stable. In recent years, the demand for SiC single crystal substrates has increased as a substrate for high-frequency, high-voltage electronic devices.

  When manufacturing a power device, a high-frequency device, etc. using a SiC single crystal substrate, a SiC thin film is epitaxially grown on the substrate by a method called thermal CVD (thermochemical vapor deposition) or ion implantation is usually performed. In general, the dopant is directly implanted by the method, but in the latter case, annealing at a high temperature is required after the implantation, so that thin film formation by epitaxial growth is frequently used.

  Usually, when epitaxial growth is performed on a SiC substrate, a substrate having a (0001) plane (Si plane) having an off angle larger than 1 ° is used, and so-called step flow growth is performed. In general, a lateral CVD apparatus is often used for epitaxial growth. The CVD method has a simple apparatus configuration and can control growth by gas on / off, and is therefore a growth method with excellent controllability and reproducibility of the epitaxial film.

FIG. 1 shows a typical growth sequence for the growth, together with the gas introduction timing. First, a substrate is set in a growth furnace, the inside of the growth furnace is evacuated, and hydrogen gas is introduced to adjust the pressure to 1 × 10 ^{4 to} 3 × 10 ⁴ Pa. Thereafter, the temperature of the growth furnace is raised while keeping the pressure constant, and the substrate is etched in hydrogen or hydrogen chloride into which hydrogen chloride is introduced at about 1400 ° C. to 1500 ° C. for 10 to 30 minutes. This is for removing the altered layer on the surface of the substrate due to polishing or the like, and providing a clean surface.

Thereafter, the temperature is raised to a growth temperature of 1500 to 1600 ° C., and SiH ₄ and C ₃ H ₈ or C ₂ H ₄ as material gases are introduced to start growth. The SiH ₄ flow rate is 40-50 cm ^{3 /} min, C ₃ H ₈ or C ₂ H ₄ so that the atomic ratio of carbon and silicon (C / Si ratio) contained in the material gas is 1.5-2.0. Growth is performed at a flow rate of about 10 to 30 cm ³ per minute. The growth rate at this time is 5 to 6 μm per hour. This growth rate is determined in consideration of productivity because the film thickness of the normally used epitaxial layer is about 10 μm.

When the film is grown for a certain period of time and a desired film thickness is obtained, the introduction of SiH ₄ and C ₃ H ₈ or C ₂ H ₄ is stopped, and the temperature is lowered with only hydrogen gas flowing. After the temperature has dropped to room temperature, the introduction of hydrogen gas is stopped, the growth chamber is evacuated, an inert gas is introduced into the growth chamber, the growth chamber is returned to atmospheric pressure, and the substrate is taken out.

  When epitaxial growth is performed by the above method, a substrate with an off-angle of about 8 ° is usually used. This is because by using this off-angle, step flow growth is promoted, defects or surface roughness generated in the epitaxial growth layer is reduced, and a good surface state can be obtained (Patent Document 1).

  However, with the recent increase in substrate diameter, when the off-angle is about 8 °, there is a problem that the utilization rate of the bulk single crystal is remarkably lowered and the problem in cost is increased. Therefore, epitaxial growth on a substrate having an off angle smaller than the conventional angle of 4 ° or less has been attempted, but as the off angle becomes smaller, the step density on the substrate decreases, and the terrace width between steps. Becomes wider. As a result, two-dimensional nucleus growth is likely to occur on the terrace, resulting in an increase in epitaxial defect density and an increase in surface roughness.

  FIGS. 2 (a) and 2 (b) show the surface state of the epitaxial layer when the off-angle of the substrate is 4 ° by the conventional manufacturing method as described above. In FIG. 2 (a), a triangular defect is observed, and in FIG. 2 (b), a saddle-like surface roughness is observed although there is no defect. In particular, the triangular defects shown in FIG. 2 (a) are characteristic defects that are observed when the off-angle is 4 ° or less, and the device is formed on the epitaxial layer having these surface defects or surface roughness. However, device characteristics such as breakdown voltage and yield will be reduced.

Therefore, it is a SiC epitaxial growth substrate that is expected to be applied to devices in the future, but as the off-angle decreases as the substrate size increases, the epitaxial layer on such a substrate has a triangular surface defect density and Surface roughness increases and it is difficult to produce a good device. On the other hand, in SiC, there is a (000-1) plane (C plane) that is inverted in the c-axis direction with respect to the (0001) plane (Si plane). It is known that a good surface morphology with less epitaxial defects and surface roughness can be obtained (Non-patent Document 1). However, when the C plane is used, it is difficult to reduce the residual impurity density in the epitaxial growth layer compared to the Si plane. Therefore, when such an epitaxial growth substrate is used, the device leakage current is large. Another problem occurs, which becomes an adverse effect of practical use.
US Patent 4912064 K. Kojima, H. Okumura, S. Kuroda and K. Arai: J. Crystal Growth, 269 (2004) 367-376

  The present invention provides a SiC single crystal substrate having a high-quality epitaxial film with less surface defect density and surface roughness in epitaxial growth on a Si surface substrate having a small off angle of 4 ° or less, and a method for manufacturing the same. .

The present invention pays attention to the relationship between the atomic ratio of carbon and silicon (C / Si ratio) and the growth temperature, triangular epitaxial defects, and surface roughness, which are contained in the material gas used for epitaxial growth, The present inventors have found that the above problems can be solved by forming an epitaxial layer having a layer for reducing defects and surface roughness (defect reduction layer). That is, the present invention
(1) When silicon carbide is epitaxially grown by thermal chemical vapor deposition on a silicon carbide single crystal substrate having an off angle of 4 ° or less, the number of triangular defects present on the surface of the outermost silicon carbide epitaxial layer is three. A method of manufacturing an epitaxial silicon carbide single crystal substrate for a power control device that is less than / cm ² , wherein the atomic ratio of carbon and silicon contained in a material gas (C / After forming a defect reduction layer made of silicon carbide with a thickness of 0.1 to 0.5 μm that is epitaxially grown at a growth temperature of 1600 ° C. or more and 1650 ° C. or less with a Si ratio of 0.5 or more and less than 1.0, the C / Si ratio is made 1.0 or more and 1.5 or less An epitaxial carbonization characterized by forming an active layer made of silicon carbide having a thickness of 10 to 20 μm and epitaxially grown at a growth temperature of 1600 ° C. to 1650 ° C. and having a residual impurity density of 2 × 10 ¹⁴ cm ⁻³ or less Silicon single crystal substrate A method of manufacturing,
It is.

  According to the present invention, there is provided an epitaxial SiC single crystal substrate having a high-quality epitaxial film with little triangular defects and surface roughness even when epitaxial growth is performed on a Si surface with a small off-angle of the substrate. Is possible.

  In addition, since the manufacturing method of the present invention can grow a high-quality SiC epitaxial layer having a triangular epitaxial defect and less surface roughness by the CVD method, the device configuration is easy and excellent in controllability, uniformity, An epitaxial film with high reproducibility can be obtained.

  Furthermore, since the device using the epitaxial SiC single crystal substrate of the present invention is formed on a high-quality epitaxial film with little triangular epitaxial defects and surface roughness, the characteristics and yield are improved.

The specific contents of the present invention will be described.
First, epitaxial growth on a SiC single crystal substrate will be described. The apparatus and method are not particularly limited as long as a silicon carbide epitaxial layer can be deposited on a silicon carbide single crystal substrate, but the apparatus suitably used for epitaxial growth in the present invention is a horizontal CVD apparatus. The CVD method has a simple apparatus configuration and can control growth by gas on / off, and is therefore a growth method with excellent controllability and reproducibility of the epitaxial film. The growth sequence is the same as in FIG. 1 until the SiC substrate is set and the etching is performed in hydrogen or hydrogen chloride.

After that, the temperature is raised to a predetermined growth temperature, and the material gases SiH ₄ and C ₃ H ₈ or C ₂ H ₄ are allowed to flow, but the flow rate of C ₃ H ₈ or C ₂ H ₄ gas with respect to SiH ₄ gas at that time is the conventional flow rate. Grow smaller than the method. In the conventional method, the ratio of carbon atoms to silicon atoms (C / Si ratio) in the material gas is about 1.5 to 2.0, because in the case of step flow growth, the growth is controlled by the supply of Si atoms. However, in the case of the present invention, first, the C / Si ratio is lowered to 0.5 or more and less than 1.0, more preferably 0.6 to 0.8, and further to about 0.7, and a defect reduction layer made of epitaxially grown silicon carbide is grown. .

  In the case of a substrate with an off angle of 4 ° or less, as described above, the width of the terrace existing on the substrate surface becomes large, and in order for Si or C atoms that have reached the surface to be taken into the step, the distance moves longer. There is a need. As a result, two-dimensional nuclei are easily formed on the terrace, causing epitaxial defects and surface roughness. However, the absolute number of C atoms present on the substrate decreases as the C / Si ratio is 0.5 or more and less than 1.0, more preferably about 0.6 to 0.8, and even about 0.7, less than half of the conventional C / Si ratio. As a result, it is considered that the interaction between atoms on the terrace decreases and the probability of forming a two-dimensional nucleus decreases. As a result, a high-quality epitaxial film with little triangular defects and less surface roughness is expected to be formed.

  However, when the C / Si ratio is smaller than 1.0, the so-called site-competition effect increases the amount of impurities taken in from the atmosphere, increasing residual impurities in the film and affecting the quality of the film. If the density of this residual impurity does not affect the device characteristics, it can be used as a single layer film. However, if the device characteristics are affected, the thickness should be small as long as the effect as the defect reduction layer is maintained, and the thickness of the defect reduction layer is preferably 0.1 μm to 0.5 μm. Further, the number of defect reduction layers is not limited to one, and there may be a plurality of layers. When making a plurality of defect reduction layers, after growing a defect reduction layer of 0.1 μm to 0.5 μm, grow an active layer described below by about 1 μm, grow a defect reduction layer of 0.1 μm to 0.5 μm again, The process of growing an active layer on it is repeated.

  After growing the defect reducing layer, an active layer made of epitaxially grown silicon carbide is grown with a C / Si ratio of 1.0 to 1.5, more preferably about 1.1 to 1.3, and further about 1.2. In the case of this active layer as well, the C / Si ratio is made smaller than before and the growth is performed while maintaining the good surface state obtained by the growth of the defect reduction layer, but the influence of the site-competition effect is reduced. Thus, the C / Si ratio is 1.0 or more. The reason why the upper limit of the C / Si ratio is set to 1.5 is that if the C / Si ratio exceeds 1.5, it becomes easy to induce helical growth, surface defects increase, and a good epilayer cannot be grown.

  Further, the thickness of the active layer finally formed on the surface is preferably 10 μm to 50 μm in consideration of the breakdown voltage of the device to be produced. Usually, the withstand voltage of the device is required to be 1 kV or higher, but since the withstand voltage is about 100 V per 1 μm of the active layer, the lower limit is determined. Further, the upper limit value of 50 μm is determined because surface roughness is likely to occur when the thickness exceeds this value. The thickness of the active layer is determined between the upper and lower limits based on the required breakdown voltage of the device, but a more preferable range including productivity and the like is 10 to 20 μm.

  Regarding the growth temperature, from the viewpoint of promoting the movement of atoms on the substrate, in the present invention, it is 1600 ° C. or higher and 1650 ° C. or lower, more preferably 1625 ° C., compared to the conventional growth temperature of 1500 to 1600 ° C. It is preferable to set it as ° C. When the growth temperature exceeds 1650 ° C., it is not preferable because atoms re-evaporate from the surface easily and a growth rate is lowered or surface roughness is easily generated.

Based on such considerations, regarding the flow rates of SiH ₄ and C ₃ H ₈ or C ₂ H ₄ which are material gases, the SiH ₄ flow rate is 40 cm ^{3 /} min, the C ₃ H ₈ flow rate is 9 cm ^{3 /} min, C ₂ In the case of H _4, the rate is 14 cm ³ / min (C / Si ratio is 0.7), the growth temperature is 1625 ° C., a defect reduction layer is grown, and the SiH ₄ flow rate is 40 cm ^{3 /} min, C ₃ H ₈ When the flow rate was 16 cm ^{3 /} min and C ₂ H ₄ , the rate was 24 cm ³ / min (C / Si ratio was 1.2), the growth temperature was 1625 ° C., and the active layer was grown. It was possible to obtain an epitaxial layer having a surface roughness Ra value of 2.5 nm or less as well as the number of particles / cm ² or less. The growth rate of the active layer at this time was 6.0 μm / hour. Note that the triangular epitaxial defects and the number of them mean the triangular defects and the number of them that can be confirmed with the naked eye when the surface of the epitaxial layer is observed with a microscope at a magnification of about 50 times as shown in FIG. As will be described later, when the off-angle of the substrate is 4 °, the length of one side of this triangular epitaxial defect is typically about 150 μm. Further, the surface roughness Ra conforms to JIS B0601.

According to the present invention, the defect reduction layer is grown with the C / Si ratio of the material gas being 0.5 or more and less than 1.0, and the active layer is grown with the C / Si ratio being 1.0 or more and 1.5 or less at a growth temperature of 1600 ° C. or more and 1650 ° C. or less, respectively. By doing so, it is possible to produce an epitaxial layer having a surface roughness Ra value of 2.5 nm or less and a number of triangular defects existing on the surface of 3 / cm ² or less. The surface roughness Ra value needs to be 2.5 nm or less because the gate oxide film thickness of a MOS transistor that is usually created is about 30 to 60 nm, and the fluctuation value of the oxide film thickness must be 10% or less. This is because it must be done.

In addition, regarding the triangular defects present on the surface, assuming that the defects are generated from the interface between the SiC epitaxial layer and the SiC single crystal substrate, the thickness of the SiC epitaxial layer is 4 ° when the off angle of the SiC single crystal substrate is 4 °. Is 10 μm, approximately 10 μm / tan 4 ° = 150 μm is considered as the length of one side of the defect. On the other hand, since the chip size of the device is several mm square, about 10 chips are created within 1 cm ² . If the area occupied by the electrodes necessary for current control in one chip is about 200 to 300 μm square, it is almost the same as the size of a triangular defect, so if one defect exists, one chip becomes defective. Conceivable. Therefore, when 70% is considered as the minimum chip yield, the number of triangular defects that can exist in 1 cm ² must be 3 or less.

  Devices suitably formed on an epitaxial SiC single crystal substrate having an SiC epitaxial layer grown in this way are Schottky barrier diodes, MOS diodes, MOS transistors, etc., and particularly power control of vertical MOS transistors, etc. It is a device used for. This is because, in these power control devices, high breakdown voltage characteristics are particularly important, and an epitaxial layer with few surface roughness and defects causing deterioration of breakdown voltage is required.

(Example 1)
From a SiC single crystal ingot for a 3-inch (76 mm) wafer, sliced at a thickness of about 400 μm, and subjected to rough grinding and normal polishing with diamond abrasive grains, on the Si surface of a SiC single crystal substrate with a 4H type polytype, Epitaxial growth was performed. The off angle of the substrate is 4 °.

As a growth procedure, set the substrate obtained above in the growth furnace of the horizontal CVD apparatus, evacuate the growth furnace, and adjust the pressure to 1.0 × 10 ⁴ Pa while introducing 150 L of hydrogen gas per minute did. Thereafter, the temperature of the growth furnace was raised while keeping the pressure constant, and after reaching 1500 ° C. to 1550 ° C., the substrate was etched in a hydrogen atmosphere for 10 minutes. After etching, the temperature is increased to 1625 ° C., the SiH ₄ flow rate is 40 cm ^{3 /} min, the C ₂ H ₄ flow rate is 14 cm ³ / min (C / Si ratio is 0.7), and the defect reduction layer is made of silicon carbide epitaxially grown Was grown to 5 μm. The growth surface was a mirror surface, and the number of triangular defects on the surface was determined at a microscope magnification of 50. The average defect density in the wafer surface was 2.5 / cm ² . Further, as a result of AFM evaluation of the surface, the Ra value was 2.4 nm.

Desired results were obtained with respect to the surface roughness and the triangular defect density. When the residual impurity density of this growth layer was evaluated, it was 1 to 2 × 10 ¹⁵ cm ⁻³ . For example, ordinary power control devices such as inverters and rectifiers require a doping amount of about 1 × 10 ¹⁶ cm ^-3 for the MOS structure and about 5 × 10 ¹⁵ cm ^{-3 for} the SBD structure. The impurity density must be about an order of magnitude less than that. Therefore, this growth layer was somewhat affected by site-competition, while satisfying the minimum application requirements for limited devices.

(Example 2)
The substrate preparation, the off-angle, and the growth of the defect reduction layer are the same as in Example 1, but in order to reduce the effect of site-competition, the thickness of the defect reduction layer is 0.5 μm, and then the growth temperature is Without changing, the SiH ₄ flow rate was 40 cm ^{3 /} min, the C ₂ H ₄ flow rate was 24 cm ³ / min (C / Si ratio was 1.2), and the active layer was grown by 10 μm. The growth rate of the active layer at this time was about 6.0 μm per hour.

Fig. 3 shows an optical micrograph (50x) of the surface after epitaxial growth. The growth surface was a mirror surface, no surface roughness was observed, and the triangular defect density was 2 / cm ² on the wafer surface in average. The results of AFM evaluation of the surface are shown in FIG. In FIG. 4, the horizontal axis represents the C / Si ratio during active layer growth, the vertical axis represents the surface Ra value, and the growth temperature is 1625 ° C. 4 that the Ra value is 2.2 nm on the surface of the epitaxial layer having the defect reducing layer and the active layer according to the present invention. Further, the residual impurity density of the active layer is preferably 1 × 10 ¹⁵ cm ⁻³ or less, but the residual impurity density in this example is sufficiently small, about 2 × 10 ¹⁴ cm ^−3. The conditions for the epitaxial film were satisfied.
When a Schottky barrier diode is formed using such an epitaxial SiC single crystal substrate, when the doping density is about 1 × 10 ¹⁶ cm ⁻³ , the reverse breakdown voltage is 250 to 300 V, which is almost a theoretical value. was gotten.

(Comparative example)
As a comparative example, epitaxial growth was performed on the Si surface of a 3 inch (76 mm) SiC single crystal substrate having a 4H type polytype, which was sliced, roughly ground, and normally polished as in Example 1. The off angle of the substrate is 4 °.

The growth procedure is the same as that of Example 1 until etching in a hydrogen atmosphere. After etching, the temperature is increased to 1625 ° C., the SiH ₄ flow rate is 40 cm ^{3 /} min, the C ₂ H ₄ flow rate is 32 cm ³ / min (C / Si ratio is 1.6), the defect reduction layer does not grow, the active layer Only 10 μm was grown. Triangular epitaxial defects as shown in Fig. 2 (a) occurred on the surface after growth, and when the number of triangular defects on the surface was determined with a microscope magnification of 50, the density was 5 It was 10 pieces / cm ^2. In addition, it can be seen from FIG. 4 that the Ra value when the C / Si ratio during active layer growth is 1.6 is degraded to 2.7 nm.
When a Schottky barrier diode is formed using such a substrate, when the doping density is about 1 × 10 ¹⁶ cm ⁻³ , the average reverse breakdown voltage is about 100 V, which is less than half the theoretical value. In addition, the device yield was 50% or less.

According to the present invention, in epitaxial growth on a SiC substrate, an epitaxial SiC single crystal substrate having a high-quality epitaxial film having few triangular defects and small surface roughness even when the off-angle of the substrate is 4 ° or less. It is possible to create. Therefore, if an electronic device is formed on such a substrate, it can be expected that the characteristics and yield of the device are improved. In this example, SiH ₄ and C ₂ H ₄ are used as the material gas. However, when trichlorosilane is used as the Si source and C ₃ H ₈ is used as the C source, an epitaxial having a high-quality epitaxial film is similarly used. SiC single crystal substrate can be created.

The figure which shows the growth sequence of the SiC epitaxial film by a prior art. An optical microscope image showing the state of an epitaxial film grown on a SiC substrate with an off angle of 4 ° by conventional technology. (a) Triangular defect example (b) Surface roughness example The optical microscope image which shows the surface state of the SiC epitaxial film grown on the SiC substrate whose off angle is 4 degrees by an example of this invention. The graph which shows the relationship between C / Si ratio at the time of growth, and Ra value of surface roughness when an active layer of a SiC epitaxial film is grown on a SiC substrate with an off angle of 4 ° according to an example of the present invention and the prior art.

Claims (1)

Silicon carbide is epitaxially grown by thermal chemical vapor deposition on a silicon carbide single crystal substrate having an off angle of 4 ° or less, and the number of triangular defects present on the surface of the outermost silicon carbide epitaxial layer is 3 / cm. ² A method for producing an epitaxial silicon carbide single crystal substrate for a power control device, which is the following: an atomic ratio (C / Si ratio) of carbon and silicon contained in a material gas on the silicon carbide single crystal substrate After forming a defect reduction layer made of silicon carbide having a thickness of 0.1 to 0.5 μm that is epitaxially grown at a growth temperature of 1600 ° C. or higher and 1650 ° C. or lower, with a C / Si ratio of 1.0 or higher and 1.5 or lower. It consists of silicon carbide with a thickness of 10-20μm epitaxially grown at 1600 ° C or more and 1650 ° C or less, and the residual impurity density is 2 × 10 ¹⁴ cm ^-3 The manufacturing method of the epitaxial silicon carbide single crystal substrate characterized by forming the following active layers.