JP4956461B2 - Liquid crystal display device and manufacturing method thereof - Google Patents

Description

  The present invention relates to an active matrix liquid crystal display device driven by a thin film transistor and a manufacturing method thereof.

  In recent years, thin film transistor-driven liquid crystal display devices have been applied to large-screen TVs, and the driving frequency has been increased to improve the quality of moving images. Accordingly, it is essential to reduce the resistance of the signal line. In addition, there is a strong demand to reduce production costs in order to cope with lower prices.

  Conventionally, in order to construct a low resistance signal line, Mo / Al / Mo laminated wiring (where / represents the interface of the lamination, the right side of / is the lower layer, the left side of / is the upper layer), or a little A modified (for example, alloyed) wiring film configuration is used. However, the resistivity of the Al thin film is at most about 3 μΩcm, and there is a limit to further reducing the resistivity. Further, increasing the thickness of Al has a problem of dramatically increasing the frequency of hillock generation, which causes defects, in addition to reducing the tact of the film forming process. In addition, the upper layer and the lower layer of Al require expensive Mo as a barrier cap film, resulting in a problem that the material cost increases.

  Copper (Cu) is a wiring material having a low resistivity lower than that of Al and a reasonable material cost. Cu has a feature that the resistivity of the thin film is as low as about 2 μΩcm, and that it can make direct electrical contact with a transparent conductive film of a different layer (generally an oxide containing In as a main component). Have. However, there are disadvantages such as weak adhesion to the base and unnecessary diffusion in the silicon constituting the thin film transistor to deteriorate transistor characteristics.

  In order to compensate for the drawbacks of Cu described above, Patent Document 1 employs a Cu / Mo laminated wiring. That is, Mo serves as an adhesion layer and a diffusion barrier. However, this wiring structure has disadvantages such as high material cost because expensive Mo is used, and wet etching processing is difficult because two layers having completely different electrochemical properties are laminated.

  Further, in Patent Document 2, an adhesion force is secured by adding an alloy such as Mn to Cu and precipitating the additive element at the interface between the Cu alloy film and the base glass by a thermal process. However, in order to obtain a resistivity as low as Cu in this wiring structure, almost all of the additive elements must be deposited at the interface with the underlying glass. The driving force for this precipitation is diffusion, but it is difficult to obtain a sufficient diffusion rate for depositing an additive element from a thickness of about 200 to 400 nm by annealing at about 300 ° C. for about 30 minutes.

A Cu / Cu alloy laminated film is conceivable as a wiring structure that compensates for the disadvantages of Patent Document 1 and Patent Document 2. This is to ensure sufficient conductivity with the upper Cu layer and to secure adhesion with the lower layer Cu alloy by the same mechanism as in Patent Document 2.
JP 2004-163901 A WO2006 / 025347 A1 publication

  In order to apply the Cu / Cu alloy laminated film as a low resistance wiring, there are the following problems. The first problem is to secure a low resistivity of about 2 μΩcm. The second problem is ensuring adhesion. The third problem is ensuring processability. It is a problem to be solved by the present invention to solve these first to third problems at the same time.

  The reason why the low resistivity, which is the first problem, cannot be ensured is because the additive element of the lower Cu alloy diffuses into the upper Cu in the thermal process. Therefore, it is essential to suppress this diffusion.

  Ensuring adhesion, which is the second problem, is a problem when the additive element cannot form an oxide layer that becomes an adhesion layer at the interface between the Cu alloy and the base. The reason why the oxide layer cannot be formed is that the additive element cannot move to the interface with the base or does not cause an oxidation reaction even if it can move. Therefore, it becomes a problem to prepare conditions for the additive element to move smoothly to the interface and to cause an oxidation reaction.

  The securing of workability, which is the third problem, becomes a problem when the etching rate of the Cu alloy, which is the lower layer of the Cu / Cu alloy laminated film, is high. When the dissolution rate of the lower layer is higher than that of the upper layer, the lower layer is preferentially dissolved, so that the cross-section processed by the pattern has a reverse taper shape. If it becomes such a processed shape, an insulating film or the like laminated on the Cu / Cu alloy laminated film pattern cannot be covered well, and defects such as interlayer short-circuiting frequently occur. Accordingly, it becomes a problem to etch the cross-section of the Cu / Cu alloy laminated film into a forward tapered shape.

Means for solving the above first problem, that is, suppressing the additive element of the lower Cu alloy from diffusing into the upper Cu in the thermal process is about 300 of the additive metal element in copper. The diffusion coefficient D at 0 ° C. is smaller than 10 ⁻²¹ (m ² / s). If the time of the thermal process is t, the diffusion distance is given as the square root of πDt. (If not exceed ^{10 -21 (m 2 / s)} , hereinafter the same) is smaller than the diffusion coefficient D is 10 ^-21 (m ² / s) Number diffusion distance also estimates that the time of thermal process for 30 minutes It is about nm. Therefore, the diffusion distance of the Cu alloy-added element into the upper layer Cu of the Cu / Cu alloy can be limited to a level that can be ignored with respect to the film thickness (100 to 500 nm). The value of the diffusion constant can be obtained from the frequency factor and activation energy database described in “Metal Data Book” (Maruzen) edited by Japan Metallurgy Society using the Arrhenius equation.

  Means for solving the above-mentioned second problem, that is, adjusting the conditions under which the additive element moves to the interface and causes the oxidation reaction, is that the solid solubility limit of the metal element in copper is more than its content. It is large and the equilibrium oxygen potential of the oxidation reaction of the metal element is lower than that of silicon (or indium). First, for the requirement that the additive element moves to the interface, it is necessary that the solid solubility limit of the additive element in copper be larger than its content. This is because when the content of the additive element is smaller than the solid solubility limit, the additive element is precipitated as a different phase in the copper alloy film, thereby preventing movement to the interface. The solid solubility limit of the metal element in copper can be read from a binary alloy phase diagram described in, for example, ASM HANDBOOK Volume 3 “Alloy Phase Diagrams” or the like.

Next, for the requirement that the additive element causes an oxidation reaction, the equilibrium oxygen potential of the oxidation reaction of the metal element needs to be lower than that of the underlying oxide. Here, the equilibrium oxygen potential of the oxidation reaction is defined by the right side or the left side of the following equation.

  Here, R is a gas constant, T is a temperature, p is an equilibrium oxygen partial pressure, n is a stoichiometric number of oxygen of the oxide, and ΔG is a free energy of formation of the oxide. The lower the equilibrium oxygen potential, the easier it is to oxidize. When a metal with a low equilibrium oxygen potential comes into contact with an oxide with a high equilibrium oxygen potential, the metal deprives the oxide of oxygen. Themselves become oxides.

  Here, two types of base oxides are assumed and are silicon oxide which is a glass substrate main component or indium oxide which is a main component of a transparent conductive film. A copper alloy to which a metal element having an equilibrium oxygen potential lower than that of silicon is added can generate an oxide of the metal element at the interface with the glass substrate by heat treatment, which functions as an adhesion layer. Similarly, a copper alloy to which a metal element having an equilibrium oxygen potential lower than that of indium can generate an oxide of the metal element at the interface with the transparent conductive film by heat treatment, and this functions as an adhesion layer. The equilibrium oxygen potential can be obtained from the free energy of oxide formation using the above equation, and the value of free energy of oxide formation is described in a database such as “Chemical Handbook” (Maruzen) edited by the Chemical Society of Japan. Has been.

  Means for solving the third problem described above, that is, etching the patterned cross section of the Cu / Cu alloy laminated film into a forward tapered shape is that the solubility of the metal element oxide is that of the copper oxide. It is less than the solubility. When a metal is dissolved in an acid or an alkali, if the solubility of the oxide of the metal is low, a protective oxide layer is formed on the metal surface, resulting in a slow dissolution rate of the metal. Therefore, if the solubility of the oxide of the additive element of the copper alloy is smaller than that of the copper oxide, a copper alloy having a slower dissolution rate than copper can be obtained.

  If a Cu / Cu alloy using this copper alloy is wet-etched, a pattern section with a forward taper shape can be obtained. Since the solubility of the metal oxide is a function of pH, it is necessary to determine the additive element of the copper alloy in consideration of the pH of the etching solution. For example, if the underlayer of the Cu / Cu alloy wiring film is amorphous ITO (Indium-Tin-Oxide), it is 1.8 or more so that the ITO is not etched during the etching of the Cu / Cu alloy. It is necessary to select the oxide solubility in the pH range. The solubility of the metal oxide as a function of pH is described in, for example, “Atlas of Electrochemical Equilibrium in Aqueous Solutions” (NACE International Celcor) edited by Marcel Pourbaix.

In order to solve the first problem and the second problem at the same time, the present invention reduces the diffusion coefficient D of the additive metal element in copper at about 300 ° C. to less than 10 ⁻²¹ (m ² / s), In addition, the solid solubility limit of the metal element in copper was made larger than its content, and the equilibrium oxygen potential of the oxidation reaction of the metal element was made lower than that of silicon (or indium).

Further, the means of the present invention for simultaneously solving the first problem, the second problem, and the third problem described above has a diffusion coefficient D of about 10 ^-21 (m ² / s), the solid solubility limit of the metal element in copper is made larger than its content, and the equilibrium oxygen potential of the oxidation reaction of the metal element is lower than that of silicon (or indium). In addition, the solubility of the metal element oxide was made smaller than that of the copper oxide.

  By means for solving the above first problem, the additive element of the lower layer Cu alloy does not diffuse into the upper layer Cu in the Cu / Cu alloy film. Therefore, the upper layer Cu can maintain a low resistivity even after undergoing a thermal process.

  By means for solving the second problem described above, an oxide layer is formed after a thermal process at the interface between the lower Cu alloy of the Cu / Cu alloy film and the underlying oxide (glass substrate or transparent conductive film). Thus, the adhesion of the Cu / Cu alloy film can be ensured.

  By the means for solving the above third problem, the dissolution rate of the lower Cu alloy of the Cu / Cu alloy film becomes slower than that of the upper Cu. Accordingly, when the Cu / Cu alloy film is processed by wet etching, the shape of the pattern cross section becomes a forward taper shape, and as a result, the coverage of the insulating film laminated on the upper layer is improved, and defects such as interlayer short circuit do not occur.

  As described above, by simultaneously solving the three problems, a wiring material process having low resistance, good adhesion, and high yield can be achieved. Of course, since this wiring structure does not use expensive Mo, it goes without saying that a merit of low cost is also added.

In order to implement the means for solving the above first problem, the diffusion coefficient D of the added metal element in the copper alloy under the Cu / Cu alloy film at about 300 ° C. is 10 ⁻²¹ (m ² / It is necessary to determine an additive element smaller than s). As additive elements of such a copper alloy, Ag, Al, Au, Be, Cd, Ce, Co, Cr, Eu, Fe, Ga, Ge, Hg, In, Ir, Lu, Mn, Nb, Ni, Pd , Pm, Pt, Rh, Ru, S, Sn, Tb, Ti, Tm, V, Zn.

  In order to implement the means for solving the second problem described above, the solid solubility limit of the metal element in the copper alloy under the Cu / Cu alloy film is larger than the content thereof, and the metal element It is necessary to select an additive element whose equilibrium oxygen potential of the oxidation reaction is lower than that of silicon (or indium).

  Here, as an additive element in which the equilibrium oxygen potential of the oxidation reaction of the metal element is lower than that of silicon, Al, Ba, Be, Ca, Ce, Dy, Er, Eu, Gd, Hf, Ho, La, Li, Examples include Lu, Mg, Nd, Np, Pr, Pu, Sc, Sm, Sr, Tb, Th, Ti, Tm, U, Y, Yb, and Zr.

  The additive element whose equilibrium oxygen potential of the oxidation reaction of the metal element is lower than that of indium is added to the additive element whose equilibrium oxygen potential of the oxidation reaction of the metal element is lower than that of silicon, as well as B, Cr, Ga, K, Mn, NaNb, Rb, Si, Ta, V, Zn are mentioned.

  The content of the metal element in copper is assumed to be about 1%. Additive elements having a solid solubility limit of greater than 1% in the copper in the copper include Ag, Al, As, Au, Be, Cd, Co, Fe, Ga, Ge, Hf, Hg, In, Ir, Li, Examples include Mg, Nd, Ni, P, Pd, Pt, Rh, Sb, Sn, Ti, V, and Zn.

  Therefore, the additive element of the copper alloy under the Cu / Cu alloy film for solving the second problem described above is Al, Be, Hf, when the base oxide is a silicon oxide (that is, a glass substrate). Li, Mg, Ti are mentioned. In the case where the base oxide is indium oxide (that is, a transparent conductive film), Al, Be, Ga, Hf, Li, Mg, Mn, Ti, V, and Zn are listed.

  Therefore, elements that simultaneously solve the first and second problems described above include Al, Be, and Ti when the base oxide is a silicon oxide (that is, a glass substrate). In the case where the base oxide is indium oxide (that is, a transparent conductive film), Al, Be, Ga, Mn, Ti, V, and Zn are listed.

  The following searches for the additive element of the copper alloy in the lower layer of the Cu / Cu alloy film for solving the third problem from the elements that simultaneously solve the first problem and the second problem. .

  When the base oxide is a silicon oxide (for example, a glass substrate), Be and Ti are suitable. However, since Be is a toxic element, Ti is optimal in consideration of this point. In other words, the Cu / CuTi alloy wiring structure is optimal. Since the solid solubility limit of Ti in Cu is 2.1%, the Ti content of the CuTi alloy is desirably 2.1% or less.

  When the underlying oxide is indium oxide (that is, a transparent conductive film), the pH of the etching solution is limited to 1.8 or more so that the underlying transparent conductive film is not dissolved during the processing of the Cu / Cu alloy film. There is a need to. In that case, Al, Be, Ga, and Ti are suitable. However, since Be is a toxic element, Al, Ga, and Ti are optimal in consideration of this point. That is, the wiring structure of Cu / CuAl alloy, Cu / CuGa alloy, Cu / CuTi alloy is optimal. Since the solid solubility limits of Al, Ga, and Ti in Cu are 9.4%, 22.2%, and 2.1%, respectively, the Al content of the CuAl alloy is 9.4% or less, and the Ga content of the CuGa alloy. Is preferably 22.2% or less and the Ti content of the CuTi alloy is 2.1% or less.

  FIG. 1 is a cross-sectional view of main parts of a liquid crystal display device according to Embodiment 1 of the present invention. FIG. 2 is a process diagram illustrating the method of manufacturing the liquid crystal display device according to the first embodiment of the invention. FIG. 3 is a process diagram following FIG. 2 showing the method for manufacturing the liquid crystal display device according to the first embodiment of the present invention. FIG. 4 is a process diagram subsequent to FIG. 3 showing the method for manufacturing the liquid crystal display device according to the first embodiment of the present invention. FIG. 5 is a process diagram subsequent to FIG. 4 showing the method for manufacturing the liquid crystal display device according to Example 1 of the present invention. FIG. 6 is a process diagram subsequent to FIG. 5 showing the method for manufacturing the liquid crystal display device according to the first embodiment of the present invention.

  The liquid crystal display device shown in FIG. 1 is an in-plane switching (IPS) type liquid crystal display device. In FIG. 1, an active matrix substrate (transparent substrate, hereinafter simply referred to as a substrate) 1 is made of alkali-free glass, and is derived from oxidation of a transparent conductive film 2A made of indium tin oxide and a copper alloy film 2B on the substrate 1. A scanning signal line 2 is formed by laminating a metal oxide layer 8, a copper alloy film 2B containing aluminum, and a pure copper (99.5% or more) film 2C in this order. The substrate 1 has a common (transparent) electrode 4 formed of a transparent conductive film 2A having a laminated film similar to that of the scanning signal line 2, and a common signal line 3 formed of the laminated films 2A, 8, 2B, and 2C. Is formed. A gate insulating film 5 is formed so as to cover the scanning signal line 2 and the common (transparent) electrode 4 and the common signal line 3.

  The scanning signal line 2 is used as a gate electrode, and a thin film transistor including a semiconductor layer 6 made of amorphous silicon, a contact layer 7 made of n + type amorphous silicon, a drain electrode (video signal line) 9 and a source electrode 10 is formed. A protective insulating layer 11 is formed to cover the thin film transistor, a pixel (transparent) electrode 15 is formed thereon, and is electrically connected to the source electrode 10 through the through hole 14. An alignment film 18 is formed as the uppermost layer.

  On the other hand, a color filter 20 designed with a black matrix 19 is formed on the inner surface of a color filter substrate 17 that is preferably a glass substrate similar to the substrate 1, and covers a planarizing film 21 and an orientation. A film 18 is formed. And the polarizing plate 22 is each affixed on the surface of both board | substrates.

  A method of manufacturing the active matrix substrate (transparent substrate 1 side) of the in-plane switching type liquid crystal display device will be described with reference to FIGS. 2A to 6B, (a) shows a thin film transistor portion, and (b) shows a process flow. 2 to 6 are divided according to each photolithography process, and each figure shows a stage where the processing of the thin film by photolithography is completed and the photoresist is removed. Here, the photolithography technique refers to a series of steps of resist pattern formation from application of a photoresist to selective exposure using a mask and development thereof, and repeated description is avoided. Hereinafter, it demonstrates according to the divided process.

  FIG. 2 is a diagram for explaining the processing steps by the first photolithography in the method of manufacturing the liquid crystal display device of the first embodiment. First, a transparent conductive film 2A made of indium tin oxide is formed on a substrate 1 made of alkali-free glass by sputtering. Here, the transparent conductive film 2A may be indium zinc oxide or indium tin zinc oxide. The film thickness is about 10 nm to 150 nm, and about 50 nm is preferable. Subsequently, a copper alloy containing aluminum (Al) and pure copper (99.5% or more) are continuously formed by sputtering (S-1). The film thickness is about 100 nm to 500 nm, and is 400 nm in this example. The additive element of the copper alloy can be selected from beryllium, gallium, manganese, titanium, vanadium, and zinc in addition to the aluminum of this embodiment, and aluminum, gallium, and titanium are preferable. Here, aluminum was selected.

  Next, a resist pattern is formed by photolithography using a half exposure mask (S-2). Here, a thick resist is formed on the portions constituting the scanning signal line 2 and the common signal line 3 without exposure, and a thin resist is formed on the portion where the common (transparent) electrode 4 is formed as half exposure. After photolithography, pure copper and a copper alloy containing aluminum are etched (S-3), and then the transparent conductive film is etched (S-4).

  Next, the resist in the half exposure portion is removed by ashing (S-5). After ashing, the half-exposed portion of pure copper and the copper alloy containing aluminum are etched (S-6), and the resist is peeled off (S-7). Here, the copper alloy etching solution containing pure copper and aluminum has a pH in the range of 1.8 to 7.5 so as not to dissolve the transparent conductive film.

  Through the above steps, the scanning signal line 2 (including the gate electrode and the scanning signal line terminal), the common signal line 3 (including the common signal line terminal), and the common (transparent) electrode 4 are formed.

  In FIG. 3, first, a gate insulating film 5 made of silicon nitride, a semiconductor layer 6 made of amorphous silicon, and a contact layer 7 made of n + type amorphous silicon are successively formed by plasma chemical vapor deposition (S-8). ). The film forming temperature is about 300 ° C. At this time, a metal oxide layer 8 (in this case, an aluminum oxide layer) is formed at the interface between the transparent conductive film formed by photolithography and the copper alloy containing aluminum. This functions as an adhesion layer. After photolithography using a binary exposure mask (S-9), the contact layer 7 and the semiconductor layer 6 are selectively etched (S-10), and the resist is peeled off (S-11) to form a so-called island pattern. The

  In FIG. 4, first, molybdenum and pure copper are continuously formed in this order by sputtering (S-12). After photolithography using a binary exposure mask (S-13), the laminated film of pure copper and molybdenum is removed by etching (S-14), and the contact layer 7 made of n + type amorphous silicon is removed by etching (S-15). When the resist is removed (S-16), the drain electrode 9 (including the video signal line and the video signal line terminal) and the source electrode 10 are formed.

  In FIG. 5, first, a protective insulating film 11 made of silicon nitride is formed by plasma chemical vapor deposition (S-17). After photolithography using a binary exposure mask (S-18), a through hole 14 is opened in the protective insulating film 11 on the source electrode 10 and the video signal line terminal (not shown), and at the same time a scanning signal line terminal (not shown). 1) A through hole 14 is opened in the upper protective insulating film 11 and the gate insulating film 5 (S-19), and the resist is peeled off (S-20).

  In FIG. 6, a transparent conductive film made of indium tin oxide is formed by sputtering (S-21). First, after photolithography using a binary exposure mask (S-22), the pixel electrode 15, the scanning signal line terminal (not shown), the common signal line terminal (not shown), and the video signal line terminal (not shown). The pattern is etched (S-23), and the resist is removed (S-24). The active matrix substrate of the liquid crystal display device is completed through the above steps. Note that the so-called island pattern shown in FIG. 3 and the drain electrode 9 and the source electrode 10 shown in FIG. 4 can be implemented by a single photolithography using a half exposure technique or a registry flow technique. (However, in this case, in the cross-sectional views of FIGS. 1, 4, 5, and 6, the semiconductor layer 6 and the contact layer 7 are necessarily stacked under the drain electrode 9 or the source electrode 10). A color filter substrate is bonded to this active matrix substrate, ie, a thin film transistor substrate, and a liquid crystal is sealed between them to obtain a liquid crystal display device.

  FIG. 7 is a cross-sectional view of main parts of a liquid crystal display device according to Embodiment 2 of the present invention. FIG. 8 is a process diagram illustrating the method for manufacturing the liquid crystal display device according to the second embodiment of the present invention. FIG. 9 is a process diagram subsequent to FIG. 8 showing the method for manufacturing the liquid crystal display device according to Example 2 of the present invention. FIG. 10 is a process diagram subsequent to FIG. 9 showing the method for manufacturing the liquid crystal display device according to Example 2 of the present invention. FIG. 11 is a process diagram subsequent to FIG. 10 showing the method for manufacturing the liquid crystal display device according to Embodiment 2 of the present invention. FIG. 12 is a process diagram following FIG. 11 showing the method for manufacturing the liquid crystal display device according to Embodiment 2 of the present invention.

  The liquid crystal display device according to the second embodiment is a so-called TN type, and the difference from the liquid crystal display device according to the first embodiment is that the common electrode 12 is provided on the color filter substrate 17 side. In the second embodiment, the scanning signal line 2 formed on the thin film transistor substrate 1 does not have the transparent conductive film in the first embodiment. A method for manufacturing the active matrix substrate shown in FIG. 7 will be described with reference to FIGS. 8A to 12B, (a) shows a thin film transistor portion, and (b) shows a process flow. FIGS. 8 to 12 are divided according to each photolithography process, and each figure shows a stage where the processing of the thin film after photolithography is completed and the photoresist is removed. In this description, photolithography refers to a series of steps of resist pattern formation from application of a photoresist to selective exposure using a mask and development of the resist, and repeated description is avoided. The following explanation is based on the divided steps.

  In FIG. 8, first, a copper alloy 2D containing titanium and pure copper (99.5% or more) 2E are continuously formed on a substrate 1 made of alkali-free glass by sputtering (S-101). The film thickness is about 100 nm to 500 nm, and is 400 nm in this example. As an additive element of the copper alloy, beryllium can be selected in addition to titanium of the present embodiment, but titanium is more preferable from the viewpoint of beryllium toxicity.

  Next, after photolithography using a binary exposure mask (S-102), the copper alloy containing titanium and pure copper are etched (S-103). Here, unlike the case of Example 1, the pH of the etching solution may be 1.8 or less. Next, by removing the resist (S-104), the scanning signal line 2 (including the gate electrode and the scanning signal line terminal) is formed.

  In FIG. 9, first, a gate insulating film 5 made of silicon nitride, a semiconductor layer 6 made of amorphous silicon, and a contact layer 7 made of n + type amorphous silicon are successively formed by plasma chemical vapor deposition (S-105). ). The film forming temperature is about 300 ° C. At this time, a metal oxide layer 8 (in this case, a titanium oxide layer) is formed at the interface between the transparent conductive film formed by photolithography in FIG. 8 and the copper alloy containing titanium. Is formed and functions as an adhesion layer with the substrate 1. After photolithography using a binary exposure mask (S-106), the contact layer 7 and the semiconductor layer 6 are selectively etched (S-107), and the resist is peeled off (S-108) to form a so-called island pattern. Is done.

  In FIG. 10, first, molybdenum and pure copper are successively formed in this order by sputtering (S-109). After photolithography using a binary exposure mask (S-110), the laminated film of pure copper and molybdenum is removed by etching (S-111), the n + Si layer is etched (S-112), and the resist is removed (S- 113), the drain electrode 9 (including the video signal line and the video signal line terminal), and the source electrode 10 are formed.

  In FIG. 11, first, a protective insulating film 11 made of silicon nitride is formed by plasma chemical vapor deposition (S-114). After photolithography using a binary exposure mask (S-115), a through hole 14 is opened in the protective insulating film 11 on the source electrode 10 and the video signal line terminal (not shown), and at the same time a scanning signal line terminal (not shown). 1) A through hole 14 is opened in the protective insulating film 11 and the gate insulating film 5 (S-116), and the resist is peeled off (S-117).

  In FIG. 12, a transparent conductive film made of indium tin oxide is formed by sputtering (S-118). First, after photolithography using a binary exposure mask (S-119), the pattern of the pixel electrode 15, the scanning signal line terminal (not shown), and the video signal line terminal (not shown) is etched (S-120). Then, the resist is removed (S-121). Through the above steps, an active matrix substrate of the liquid crystal display device is completed. Note that the so-called island pattern shown in FIG. 9 and the drain electrode 9 and the source electrode 10 shown in FIG. 10 can be formed by a single photolithography using a half exposure technique or a registry flow technique. (However, in this case, in the cross-sectional views of FIGS. 7, 10, 11, and 12, the semiconductor layer 6 and the contact layer 7 are necessarily stacked under the drain electrode 9 or the source electrode 10). A color filter substrate is bonded to this active matrix substrate, ie, a thin film transistor substrate, and a liquid crystal is sealed between them to obtain a liquid crystal display device.

  The liquid crystal display device of the present invention has a configuration suitable for reducing the scanning signal lines of the active matrix substrate at low cost. Therefore, industrial use such as a liquid crystal television and a liquid crystal monitor is possible. The present invention can also be applied to an organic light emitting diode display device.

It is principal part sectional drawing of the liquid crystal display device concerning Example 1 of this invention. It is process drawing which shows the manufacturing method of the liquid crystal display device concerning Example 1 of this invention. FIG. 3 is a process drawing subsequent to FIG. 2 showing the method for manufacturing the liquid crystal display device according to Example 1 of the present invention; FIG. 4 is a process drawing subsequent to FIG. 3 showing the method for manufacturing the liquid crystal display device according to Example 1 of the present invention. FIG. 5 is a process drawing subsequent to FIG. 4 showing the method for manufacturing the liquid crystal display device according to Example 1 of the present invention; FIG. 6 is a process drawing subsequent to FIG. 5 showing the method for manufacturing the liquid crystal display device according to Example 1 of the present invention; It is principal part sectional drawing of the liquid crystal display device concerning Example 2 of this invention. It is process drawing which shows the manufacturing method of the liquid crystal display device concerning Example 2 of this invention. FIG. 9 is a process drawing subsequent to FIG. 8 for a method for manufacturing a liquid crystal display device according to Embodiment 2 of the present invention; FIG. 10 is a process drawing subsequent to FIG. 9 for a method for manufacturing a liquid crystal display device according to Embodiment 2 of the present invention; FIG. 11 is a process drawing subsequent to FIG. 10 for a method for manufacturing a liquid crystal display device according to Embodiment 2 of the present invention; FIG. 12 is a process drawing subsequent to FIG. 11 for a method for manufacturing a liquid crystal display device according to Example 2 of the invention;

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Substrate (for active matrix substrate), 2 ... Scanning signal line, 3 ... Common signal line, 4 ... Common electrode, 5 ... Gate insulating film, 6 ... Semiconductor layer, 7 ... Contact layer, 8 ... Metal oxide layer , 9 ... Drain electrode (video signal line), 10 ... Source electrode, 11 ... Protective insulating film, 14 ... Through hole, 15 ... Pixel electrode, 16 ... Liquid crystal, 17 ... Glass substrate for color filter, 18 ... Alignment film, 19 ... black matrix, 20 ... color filter, 21 ... flattening film, 22 ... polarizing plate.

Claims (11)

A pair of substrates, a liquid crystal sandwiched between the pair of substrates, a plurality of scanning signal lines formed on one of the pair of substrates, a plurality of video signal lines intersecting the scanning signal lines in a matrix, A thin film transistor formed corresponding to an intersection of the scanning signal line and the video signal line; a pixel electrode formed in the pixel region and connected to the thin film transistor; a gate insulating film covering the scanning signal line; A liquid crystal display device comprising a protective insulating film covering a video signal line and the thin film transistor,
The scanning signal line includes a transparent conductive film mainly composed of indium oxide, a metal oxide film, an alloy film mainly composed of copper, and a laminated film of copper having a purity of 99.5% or more. Configured,
The additive metal element of the alloy film mainly containing copper and the metal element of the metal oxide film are common,
The equilibrium oxygen potential of the metal element oxidation reaction is lower than the equilibrium oxygen potential of the indium oxidation reaction,
And the diffusion coefficient of the metal element in the copper at about 300 ° C. does not exceed 10 ⁻²¹ (m ² / s),
A liquid crystal display device characterized in that a solid solubility limit of the metal element in the copper is larger than its content. The liquid crystal display device according to claim 1.
The liquid crystal display device, wherein the metal element contains one or more elements selected from aluminum, beryllium, gallium, manganese, titanium, vanadium, and zinc. The liquid crystal display device according to claim 1.
A liquid crystal display device, wherein the solubility of the metal element oxide is smaller than the solubility of copper oxide in a pH range of 1.8 to 7.5. The liquid crystal display device according to claim 3.
The liquid crystal display device, wherein the metal element contains one or more elements selected from aluminum, beryllium, gallium, and titanium. A pair of substrates, a liquid crystal sandwiched between the pair of substrates, a plurality of scanning signal lines directly formed on one glass substrate of the pair of substrates, and a plurality of scanning signal lines intersecting with the scanning signal lines in a matrix A video signal line; a thin film transistor formed corresponding to an intersection of the scanning signal line and the video signal line; a pixel electrode formed in the pixel region and connected to the thin film transistor; and a gate covering the scanning signal line A liquid crystal display device comprising an insulating film and a protective insulating film covering the video signal line and the thin film transistor,
The scanning signal line is composed of a metal oxide film, an alloy film containing copper as a main component, and a copper laminated film having a purity of 99.5% or more,
The additive metal element of the alloy film mainly containing copper and the metal element of the metal oxide film are common,
The equilibrium oxygen potential of the oxidation reaction of the metal element is lower than the equilibrium oxygen potential of the oxidation reaction of silicon,
And the diffusion coefficient of the metal element in the copper at about 300 ° C. does not exceed 10 ⁻²¹ (m ² / s),
And the solid solubility limit of the said metallic element in the said copper is larger than the content, The liquid crystal display device characterized by the above-mentioned. The liquid crystal display device according to claim 5.
The liquid crystal display device, wherein the metal element contains one or more elements selected from aluminum, beryllium, and titanium. The liquid crystal display device according to claim 5.
The solubility of the said metal element oxide in the range which pH does not exceed 1.8 is smaller than the solubility of copper oxide, The liquid crystal display device characterized by the above-mentioned. The liquid crystal display device according to claim 7.
The liquid crystal display device, wherein the metal element contains one or more elements selected from beryllium and titanium. A pair of substrates, a liquid crystal sandwiched between the pair of substrates, a plurality of scanning signal lines formed on one of the pair of substrates, a plurality of video signal lines intersecting the scanning signal lines in a matrix, A thin film transistor formed corresponding to an intersection of the scanning signal line and the video signal line, a common transparent electrode formed in a pixel region surrounded by the scanning signal line and the video signal line, and the scanning signal A common signal line adjacent to and parallel to the line and connected to the common transparent electrode, a pixel transparent electrode formed in the pixel region and connected to the thin film transistor, the scanning signal line, the common transparent electrode, and the common signal line And a protective insulating film covering the video signal line and the thin film transistor, and the molecules of the liquid crystal are applied with a voltage applied between the common transparent electrode and the pixel transparent electrode. A-plane manufacturing method of the switching type liquid crystal display device driven I,
A transparent conductive film, an alloy film containing copper as a main component, and copper having a purity of 99.5% or more are continuously formed, and the scanning signal line, the gate electrode, and the common electrode are formed by photolithography using a half exposure mask. A scanning signal line, a gate electrode, a common signal line, and a common electrode forming step for forming a communication line and a common electrode;
A semiconductor layer processing step of continuously forming a silicon nitride serving as the gate insulating film, an amorphous silicon film and an n + amorphous silicon film, and forming a semiconductor layer by photolithography;
Forming a metal film, and forming the video signal line, the drain electrode, and the source electrode by photolithography; a video signal line / drain electrode / source electrode forming step;
Forming a silicon nitride film as the protective insulating film, and forming a through hole in the protective insulating film and the gate insulating film by photolithography to form a through hole;
Forming a transparent conductive film and forming the pixel transparent electrode by photolithography;
Have
The equilibrium oxygen potential of the oxidation reaction of the added metal element of the alloy film mainly composed of copper processed in the scanning signal line / gate electrode / common signal line / common electrode formation step is the equilibrium oxygen potential of the indium oxidation reaction. Lower than
And reducing the diffusion coefficient of the metal element in the copper at about 300 ° C. within a range not exceeding 10 ⁻²¹ (m ² / s),
And the solid solubility limit of the metal element in the copper is larger than its content,
And the solubility of the metal element oxide is smaller than the solubility of the copper oxide in a pH range of 1.8 to 7.5,
PH of an etching solution for processing the alloy film mainly composed of copper processed in the scanning signal line / gate / electrode / common signal line / common electrode forming step and the copper having a purity of 99.5% or more. Is in the range of 1.8 to 7.5. A method for manufacturing an in-plane switching type liquid crystal display device. A pair of substrates, a liquid crystal sandwiched between the pair of substrates, a plurality of scanning signal lines formed on one of the pair of substrates, a plurality of video signal lines intersecting the scanning signal lines in a matrix, A thin film transistor formed corresponding to an intersection of the scanning signal line and the video signal line, a common transparent electrode formed in a pixel region surrounded by the scanning signal line and the video signal line, and the scanning signal A common signal line adjacent to and parallel to the line and connected to the common transparent electrode, a pixel transparent electrode formed in the pixel region and connected to the thin film transistor, the scanning signal line, the common transparent electrode, and the common signal line And a protective insulating film covering the video signal line and the thin film transistor, and the molecules of the liquid crystal are applied with a voltage applied between the common transparent electrode and the pixel transparent electrode. A-plane manufacturing method of the switching type liquid crystal display device driven I,
A transparent conductive film, an alloy film containing copper as a main component, and copper having a purity of 99.5% or more are continuously formed, and the scanning signal line, the gate electrode, and the common electrode are formed by photolithography using a half exposure mask. A scanning signal line, a gate electrode, a common signal line, and a common electrode forming step for forming a communication line and a common electrode;
A silicon nitride, an amorphous silicon film, an n + amorphous silicon film, and a metal film as the gate insulating film are continuously formed, and a semiconductor layer, a video signal line, a drain electrode, and a source electrode are formed by photolithography using a half exposure mask. Forming a semiconductor layer, a video signal line, a drain electrode, and a source electrode,
Forming a silicon nitride film as the protective insulating film, and forming a through hole in the protective insulating film or the gate insulating film by photolithography, and forming a through hole;
Forming a transparent conductive film and forming the pixel transparent electrode by photolithography, and a pixel transparent electrode forming step,
The equilibrium oxygen potential of the oxidation reaction of the added metal element of the alloy film mainly composed of copper processed in the scanning signal line / gate electrode / common signal line / common electrode formation step is determined from the equilibrium oxygen potential of the indium oxidation reaction. Lower,
And reducing the diffusion coefficient of the metal element in the copper at about 300 ° C. within a range not exceeding 10 ⁻²¹ (m ² / s),
And the solid solubility limit of the metal element in the copper is larger than its content, and
In the pH range of 1.8 to 7.5, the solubility of the metal element oxide is smaller than the solubility of the copper oxide,
The pH of an etching solution for processing the alloy film mainly composed of copper processed in the scanning signal line / gate electrode / common signal line / common electrode forming step and the copper having a purity of 99.5% or more is set. A method for manufacturing an in-plane switching type liquid crystal display device, characterized in that the range is from 1.8 to 7.5. A pair of substrates, a liquid crystal sandwiched between the pair of substrates, a plurality of scanning signal lines formed on one of the pair of substrates, a plurality of video signal lines intersecting the scanning signal lines in a matrix, A thin film transistor formed corresponding to an intersection of the scanning signal line and the video signal line, a common transparent electrode formed in a pixel region surrounded by the scanning signal line and the video signal line, and the scanning signal A common signal line adjacent to and parallel to the line and connected to the common transparent electrode, a pixel transparent electrode formed in the pixel region and connected to the thin film transistor, the scanning signal line, the common transparent electrode, and the common signal line And a protective insulating film covering the video signal line and the thin film transistor, and molecules of the liquid crystal are applied by a voltage applied between the common transparent electrode and the pixel transparent electrode. A-plane manufacturing method of the switching type liquid crystal display device to be driven,
A transparent conductive film, an alloy film containing copper as a main component, and copper having a purity of 99.5% or more are continuously formed, and the scanning signal line, the gate electrode, and the common electrode are formed by photolithography using a half exposure mask. A scanning signal line, a gate electrode, a common signal line, and a common transparent electrode forming step for forming a communication line and the common transparent electrode;
A video signal line for forming the video signal line, the drain electrode, and the source electrode by photolithography by continuously forming a silicon nitride serving as the gate insulating film, an amorphous silicon film, an n + amorphous silicon film, and a metal film. Drain electrode / source electrode formation step;
After the video signal line / drain electrode / source electrode forming step, a semiconductor layer forming step of forming a semiconductor layer by reflowing and etching the resist;
Forming a silicon nitride film as the protective insulating film, and forming a through hole in the protective insulating film or the gate insulating film by photolithography, and forming a through hole;
Forming a transparent conductive film and forming the pixel transparent electrode by photolithography, and a pixel transparent electrode forming step,
The equilibrium oxygen potential of the oxidation reaction of the added metal element of the alloy film mainly composed of copper processed in the scanning signal line / gate electrode / common signal line / common transparent electrode formation step is expressed as the equilibrium oxygen potential of the indium oxidation reaction. Lower than the potential,
And reducing the diffusion coefficient of the metal element in the copper at about 300 ° C. within a range not exceeding 10 ⁻²¹ (m ² / s),
And the solid solubility limit of the metal element in the copper is larger than its content,
And the solubility of the metal element oxide is smaller than the solubility of the copper oxide in a pH range of 1.8 to 7.5,
PH of an etching solution for processing the alloy film mainly composed of copper processed in the scanning signal line / gate electrode / common signal line / common transparent electrode forming step and the copper having a purity of 99.5% or more. Is in the range of 1.8 to 7.5. A method for manufacturing an in-plane switching type liquid crystal display device.

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