JP4932147B2 - Semiconductor integrated circuit - Google Patents

Description

  The present invention relates to a semiconductor integrated circuit, and more particularly to a semiconductor integrated circuit in which mutual interference suppression between an oscillator and a transmission amplifier arranged on the same chip is performed.

  When an oscillator is built in a semiconductor integrated circuit, there is a problem that the characteristics of the oscillator deteriorate due to noise or signal leakage from other circuit blocks. In particular, when the oscillator is a variable frequency oscillator such as a voltage controlled oscillator, the output of the oscillator is modulated due to an external influence, and normal operation is hindered. As a circuit block configuration for solving this problem, a method is often used in which a buffer amplifier is arranged between an oscillator and a subsequent amplifier or mixer to reduce the influence from the subsequent stage.

  This method is intended to suppress noise or interference signals that pass through the signal path to the oscillator, but cannot suppress interference through the substrate (semiconductor substrate). On the other hand, there is one that reduces noise wraparound from a signal output pad through a substrate (for example, see Patent Document 1).

Japanese Unexamined Patent Publication No. 2003-115543 (first page, FIG. 2)

  However, when both an oscillator and a transmission amplifier are built in this semiconductor integrated circuit, noise or interference signals are generated greatly from the transmission amplifier itself, and it is sufficient to reduce the influence of only the output pad. There is a problem that performance cannot be achieved.

  The present invention has been made to solve the above-described problems. By adopting an oscillator configuration that is resistant to disturbances, the influence of noise or interference signals can be suppressed even when the oscillator and the transmission amplifier are integrated into one chip. The object is to obtain a semiconductor integrated circuit.

A semiconductor integrated circuit according to the present invention is a semiconductor integrated circuit in which an oscillation circuit and a transmission amplifier circuit are arranged on the same chip. The oscillation circuit is a differential voltage controlled oscillation circuit having a varactor diode pair. Arrange the anode terminals or the cathode terminals close together, connect the anode terminal or the cathode terminal using a common signal line, and arrange the anode terminal and the cathode terminal of the varactor diode pair to be the same, A bias circuit unit that surrounds the varactor diode pair with a first PN isolation isolation layer, surrounds the transmission amplifier circuit with a second PN isolation isolation layer, and applies a bias voltage and a bias current to the transmission amplifier circuit ; It is arranged outside the separation layer by the second PN separation.

  According to the present invention, by arranging varactor diode pairs in close proximity and connecting them with a common signal line, it is possible to equalize the noise or interference signal input to the varactor diode pairs and eliminate the influence on the differential operation. Even when the oscillator and the transmission amplifier are made into one chip, a semiconductor integrated circuit in which the influence of noise or interference signals is suppressed can be obtained.

Embodiment 1 FIG.
Hereinafter, preferred embodiments of a semiconductor integrated circuit according to the present invention will be described with reference to the drawings. FIG. 1 is a circuit configuration diagram showing an example of a semiconductor integrated circuit according to Embodiment 1 of the present invention. The semiconductor integrated circuit 1 is a system LSI in which a plurality of circuit blocks are integrated. For example, the semiconductor integrated circuit 1 is formed on a single semiconductor chip made of single crystal silicon or the like by SiGeBiCMOS or CMOS semiconductor integrated circuit manufacturing technology.

  A large number of bonding pads 2 are arranged around the chip and have various power supply, ground (GND), and I / O functions. In this chip, an oscillation circuit 3 and a transmission amplifier circuit 4 are built in, and each circuit is arranged at both ends on the diagonal line of the chip of the semiconductor integrated circuit 1 so that the distance between the circuits is maximized. . Since the bonding pad 2a for extracting the RF signal output from the transmission amplifier circuit 4 is disposed near one end on the diagonal line where the transmission amplifier circuit 4 is disposed, as a result, the bonding pad 2a is also separated from the oscillation circuit 3. The influence of noise and the like can be reduced.

  The oscillation circuit 3 and the transmission amplifier circuit 4 are separated from circuit blocks other than itself by separation layers 5a and 5b by PN separation. At this time, the separation layers 5a and 5b completely surround each circuit block as shown in the figure. Such separation layers 5a and 5b can also be constituted by trenches.

  The isolation layer 5a can prevent fluctuations in the oscillation frequency due to noise and interference signals from other circuit blocks entering the oscillation circuit 3. Further, the separation layer 5b can prevent leakage of noise generated from the transmission amplifier circuit 4 and interference signals for other circuit blocks such as an oscillation circuit.

  FIG. 2 is a diagram showing an internal circuit configuration when a voltage-controlled oscillator is used for oscillation circuit 3 in the first embodiment of the present invention. This voltage controlled oscillator includes two varactor diodes 6a and 6b that operate differentially. The varactor diodes 6a and 6b are variable capacitance elements. A voltage-controlled oscillator using the varactor diodes 6a and 6b changes the capacitance value of the varactor diodes 6a and 6b by changing the control voltage, thereby changing the transmission frequency. Can be made. In FIG. 2, the varactor diodes 6a and 6b are arranged immediately adjacent to each other, and are arranged adjacent to each other so that anode terminals connected to the common signal line 7 face each other.

  If the anode terminals of the varactor diodes 6a and 6b connected to the signal line 7 are separated from each other, when an interference signal is applied to the signal line 7, two varactor diodes 6a that operate differentially in terms of high frequency. , 6b may have a phase difference or a different amplitude. The arrangement shown in FIG. 2 is performed in order to prevent these problems. By making the interference signals input to the two varactor diodes 6a and 6b equal, the influence on the differential operation can be eliminated.

  In FIG. 2, the two varactor diodes 6 a and 6 b are common terminals whose anode terminals are connected to the signal line 7, but the same configuration can be obtained by arranging them in the same manner even in a circuit configuration having a common cathode terminal. An effect can be obtained.

  The separation layer 5c is arranged to prevent noise and interference signals from being input to the two differentially operating varactor diodes 6a and 6b via the substrate, and completely surrounds the varactor diodes 6a and 6b. . In FIG. 2, only two varactor diodes 6a and 6b are included in the separation layer. However, when two or more varactor diodes are used for the voltage controlled oscillator, they may be disposed in the separation layer 5c. .

  FIG. 3 is a diagram showing another internal circuit configuration when a voltage-controlled oscillator is used for oscillation circuit 3 in the first embodiment of the present invention. In the voltage controlled oscillator of FIG. 3, the differentially operated varactor diodes 6a and 6b are arranged immediately adjacent to each other, and the anode terminals connected to the common signal line 7 are adjacent to each other as in FIG. Yes. Furthermore, the varactor diodes 6a and 6b are arranged so that the directions of the anode terminal and the cathode terminal are the same so as to cancel out the electric fields when each operates differentially.

  By adopting such an arrangement, even when an interference signal entering from the outside is applied to the two varactor diodes 6a and 6b, the electric fields in the case where each operates differentially cancel each other, thereby achieving differential operation. The influence given can be reduced.

  2 and 3 is not limited to the semiconductor integrated circuit in which the transmission amplifier circuit as shown in FIG. 1 is arranged on the same chip, but also a semiconductor including a voltage controlled oscillation circuit. Applicable to all integrated circuits.

  FIG. 4 is a diagram showing an internal circuit configuration when a spiral inductor is used in transmission amplifier circuit 4 in the first embodiment of the present invention. In FIG. 4, spiral inductors 8a and 8b are used as amplifier loads. The spiral inductors 8a and 8b are separated from other elements by the separation layers 5d and 5e, respectively. The separation layers 5d and 5e can suppress noise and interference signals radiated from the spiral inductors 8a and 8b to the substrate. In FIG. 4, the differential spiral inductors 8a and 8b are surrounded by separate separation layers 5d and 5e, respectively, but the two differential spiral inductors 8a and 8b may be collectively surrounded.

  The spiral inductors 8a and 8b are applicable not only to those used as amplifier loads but also to all those used in transmission amplifiers such as base feeds.

  The transistors 9a and 9b are used as amplifying elements in the transmission amplifier of FIG. The transistors 9a and 9b are separated from the other circuit portions by the separation layer 5f in a differential manner. Here, the separation layer 5f may surround each of the transistors 9a and 9b separately. The separation layer 5f prevents noise generated from the transistors 9a and 9b and interference signals for other circuit blocks such as the oscillation circuit 3 from leaking out.

  The element arrangement method in the transmission amplifier circuit shown in FIG. 4 is applied not only to the semiconductor integrated circuit in which the transmission amplifier circuit as shown in FIG. 1 is arranged on the same chip, but also to all semiconductor integrated circuits including the transmission amplifier circuit. Applicable.

  FIG. 5 is a cross-sectional view when the separation layer of the semiconductor substrate in the first embodiment of the present invention is PN separation. In FIG. 5, the element 10 surrounded by the separation layer is a passive element, but the same applies to an active element. The separation layer that separates the element 10 includes a p + diffusion layer 11 and an n + diffusion layer 12.

  The p + diffusion layer 11 is connected to DC-GND which is a ground line of a circuit that performs DC operation by a connection line 13. Further, the n + diffusion layer 12 is connected to DC-VCC, which is a power supply line of a circuit that performs DC operation, by a connection line 14. Here, DC-GND is a ground line that is not directly connected to an element that handles a high-frequency signal, and DC-VCC is a power supply line that is not directly connected to an element that handles a high-frequency signal.

  In this way, by connecting the PN isolation layer to DC-VCC and DC-GND, respectively, the potential of the p + diffusion layer 11 and the n + diffusion layer 12 is not varied, and a reliable shielding effect can be obtained.

  If the semiconductor integrated circuit includes both the oscillation circuit 3 and the transmission amplifier circuit 4 as shown in FIG. 1, the power supply line / ground line of the PN isolation layer surrounding the oscillation circuit 3 and the transmission amplifier circuit 4 It is preferable that the power line / ground line of the surrounding PN isolation layer is not shared in the IC.

  FIG. 6 is a diagram showing an example of an arrangement method of the transmission amplifier circuit 4 in the first embodiment of the present invention. In FIG. 6, the transmission amplifier circuit 4 is constituted by a cascade connection of single-stage amplifier circuits 15a, 15b and 15c. In the multistage amplifier circuit having such a configuration, the amplifier circuit 15a naturally handles the lowest RF signal power, and the amplifier circuit 15c in the final stage handles the highest RF signal power. In FIG. 6, the amplifier circuit has three stages, but the same is true regardless of the number of stages.

  Normally, the bias circuit 16 that applies the bias voltage and the bias current to the amplifier circuits 15a, 15b, and 15c in each stage is arranged near the signal amplifier, but here, only the bias circuit 16 is separated from the amplifier. It is said. Further, the bias circuit 16 is disposed outside the separation layer 5g surrounding the entire transmission amplifier circuit. The bias circuit 16 is disposed at a position where the final stage amplifier circuit 15c that handles the highest RF signal power is farthest from the other amplifier circuits 15a and 15b.

  By surrounding the amplification circuits 15a, 15b, and 15c at each stage with the separation layer 5g in this way, noise generated from each transistor is prevented and interference signals for other circuit blocks such as the oscillation circuit 3 leak out. Can be prevented. Further, by disposing the bias circuit 16 away from the final stage amplifier circuit 15c and outside the separation layer 5g, the bias circuit 16 receives interference due to noise and interference signals leaking from the transmission amplifier, It is possible to prevent the characteristics from deteriorating.

  In FIG. 6, the entire multistage amplifier circuit is surrounded by the separation layer, but the same effect can be obtained by surrounding only the final stage amplifier circuit that handles the highest RF signal power with the separation layer.

1 is a circuit configuration diagram illustrating an example of a semiconductor integrated circuit according to a first embodiment of the present invention. It is the figure which showed the internal circuit structure at the time of using a voltage controlled oscillator for the oscillation circuit in Embodiment 1 of this invention. It is the figure which showed another internal circuit structure at the time of using a voltage controlled oscillator for the oscillation circuit in Embodiment 1 of this invention. It is the figure which showed the internal circuit structure at the time of using a spiral inductor for the transmission amplifier circuit in Embodiment 1 of this invention. It is sectional drawing at the time of making the separation layer of the semiconductor substrate in Embodiment 1 of this invention into PN isolation | separation. It is a figure which shows an example of the arrangement | positioning method of the transmission amplifier circuit in Embodiment 1 of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Semiconductor integrated circuit 2, 2a Bonding pad 3 Oscillation circuit 4 Transmission amplifier circuit 5a, 5b, 5c, 5d, 5e, 5f, 5g Separation layer, 6a, 6b Varactor diode, 7 Signal line, 8a, 8b Spiral Inductor, 9a, 9b transistor, 10 elements, 11 p + diffusion layer, 12 n + diffusion layer, 13 connection line (ground line), 14 connection line (power supply line), 15a, 15b, 15c amplifier circuit, 16 bias circuit.

Claims (5)

In a semiconductor integrated circuit in which an oscillation circuit and a transmission amplifier circuit are arranged on the same chip,
The oscillation circuit is a differential voltage controlled oscillation circuit having a varactor diode pair, wherein the anode terminals or the cathode terminals of the varactor diode pair are arranged close to each other, and the anode terminal or the cathode is used using a common signal line. Connect the terminals,
Arranged so that the directions of the anode terminal and the cathode terminal of the varactor diode pair are the same,
Surrounding the varactor diode pair with a separation layer by a first PN separation,
Surrounding the transmission amplifier circuit with a separation layer by second PN separation,
A semiconductor integrated circuit, wherein a bias circuit section for applying a bias voltage and a bias current to the transmission amplifier circuit is disposed outside a separation layer by the second PN separation. The semiconductor integrated circuit according to claim 1,
The transmission amplifier circuit is a differential amplifier circuit having a spiral inductor, and the spiral inductor is surrounded by a separation layer by PN separation. The semiconductor integrated circuit according to claim 1,
The transmission amplifier circuit is a multistage amplifier circuit, and a semiconductor integrated circuit characterized in that at least an amplification transistor part constituting the final stage among the amplification transistors constituting the multistage amplifier circuit is surrounded by a separation layer by PN separation circuit. The semiconductor integrated circuit according to any one of claims 1 to 3 ,
A semiconductor integrated circuit, wherein the p + diffusion layer used for the PN separation is connected to a ground line of a circuit that operates DC, and the n + diffusion layer is connected to a power supply line of a circuit that operates DC. The semiconductor integrated circuit according to any one of claims 1 to 4 ,
The semiconductor integrated circuit according to claim 1, wherein the oscillation circuit and the transmission amplifier circuit are disposed at opposite end positions of a diagonal line on the chip.

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