[go: up one dir, main page]

JP4920202B2 - Surface processing method of semiconductor processing carrier member and article thereof - Google Patents

Surface processing method of semiconductor processing carrier member and article thereof Download PDF

Info

Publication number
JP4920202B2
JP4920202B2 JP2005166315A JP2005166315A JP4920202B2 JP 4920202 B2 JP4920202 B2 JP 4920202B2 JP 2005166315 A JP2005166315 A JP 2005166315A JP 2005166315 A JP2005166315 A JP 2005166315A JP 4920202 B2 JP4920202 B2 JP 4920202B2
Authority
JP
Japan
Prior art keywords
carbon
carrier member
semiconductor processing
processing carrier
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2005166315A
Other languages
Japanese (ja)
Other versions
JP2006342364A (en
Inventor
豊 日比野
隆一郎 窪島
幹雄 兼定
明 吉田
将人 速水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SpeedFam Co Ltd
Plasma Ion Assist Co Ltd
Original Assignee
SpeedFam Co Ltd
Plasma Ion Assist Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SpeedFam Co Ltd, Plasma Ion Assist Co Ltd filed Critical SpeedFam Co Ltd
Priority to JP2005166315A priority Critical patent/JP4920202B2/en
Publication of JP2006342364A publication Critical patent/JP2006342364A/en
Application granted granted Critical
Publication of JP4920202B2 publication Critical patent/JP4920202B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Physical Vapour Deposition (AREA)
  • Chemical Vapour Deposition (AREA)
  • Other Surface Treatments For Metallic Materials (AREA)

Description

発明の詳細な説明Detailed Description of the Invention

本発明は、シリコン半導体基板やガリウムリン、ガリウム砒素、窒化ガリウム等の化合物半導体基板の表面を超平滑化するための研磨用半導体加工キャリア部材の耐摩耗性、耐食性、耐汚染性を改善した表面処理方法及びその物品に関するものである。The present invention provides a surface with improved wear resistance, corrosion resistance, and contamination resistance of a polishing semiconductor processing carrier member for ultra-smoothing the surface of a silicon semiconductor substrate or a compound semiconductor substrate such as gallium phosphide, gallium arsenide, and gallium nitride. The present invention relates to a processing method and articles thereof.

パソコン、携帯電話、液晶デジタルテレビ、デジタルカメラ、カーナビゲーション機器、ブロードバンド情報端末に代表される高速大容量のデジタル情報処理に、シリコン基板等の高精度デバイスが利用されている。その材料基板は益々薄くなってゆく傾向にあり、従来以上の高精度超平坦面が要求されてきている。High-precision devices such as silicon substrates are used for high-speed and large-capacity digital information processing represented by personal computers, mobile phones, liquid crystal digital televisions, digital cameras, car navigation devices, and broadband information terminals. The material substrate tends to become thinner and thinner, and there has been a demand for a higher-precision ultra-flat surface than ever before.

極薄基板の研磨加工方法は、多くはラッピング加工やポリシング加工方法が採られる。これらはラフに切断された加工物を、所定の円形の穴部を設けた加工キャリアにセットした後、スラリーと呼ばれる研磨液を定量供給しながら回転させて研磨するラッピング加工、ダイヤモンド微粒子を鋳物、銅、錫等の比較的柔らかい金属に埋め込んだ定盤状に押し、回転研磨するハードポリシング加工、更に、布やウレタンスポンジなどの柔らかい材料に微粉砥粒を含んだ研磨液(化学作用のある液も含む)を定量供給しながら回転させ、鏡面研磨するソフトポリシング加工方法がある。As a method for polishing an ultrathin substrate, a lapping process or a polishing process is often employed. These are a lapping process in which a rough cut workpiece is set on a processing carrier provided with a predetermined circular hole, and then rotated and polished while quantitatively supplying a polishing liquid called slurry, and diamond fine particles are cast, Hard polishing process that pushes and rotates and polishes into a platen embedded in a relatively soft metal such as copper or tin, and also a polishing liquid (chemically active liquid) containing fine abrasive grains in a soft material such as cloth or urethane sponge There is a soft polishing processing method in which a mirror polishing is performed while rotating while supplying a fixed amount.

これら半導体基板の研磨加工には、装置振動を極力抑制することや駆動伝達部による振動減衰性に優れた鋳造筐体など、各種研磨装置の加工精度を極限まで向上させることが必要であるが、それ以上に基板を固定して回転研磨するためのキャリア治具(以下半導体加工キャリア部材と言う)の加工精度や耐摩耗性、耐食性、耐汚染性がますます必要とされるようになっている。For polishing processing of these semiconductor substrates , it is necessary to improve the processing accuracy of various polishing apparatuses to the utmost, such as a cast housing that suppresses apparatus vibration as much as possible and has excellent vibration attenuation by the drive transmission unit, In addition, the processing accuracy, wear resistance, corrosion resistance, and contamination resistance of carrier jigs (hereinafter referred to as semiconductor processing carrier members) for fixing and rotating the substrate are increasingly required. .

現在の半導体加工キャリア部材はステンレス鋼、チタン合金、ガラスエポキシ樹脂板なと、さまざまな基材が使用されているが、シリコン単結晶基板の研磨中において、基材からの金属の溶出、基材自身の摩擦・摩耗による損傷、回転歯車の摩耗損傷、金属の腐食など、キャリア部材の損傷は極薄ウエハーの研磨加工工程に重大なる影響を及ぼす。このため半導体加工キャリア部材を数百時間毎に交換して高品質化に対応して使用しているのが現状である。Various semiconductor substrates such as stainless steel, titanium alloys, and glass epoxy resin plates are used for current semiconductor processing carrier members. During the polishing of silicon single crystal substrates , metal elution from the substrate, the substrate Damage to the carrier member, such as damage due to its own friction and wear, wear damage to the rotating gear, and metal corrosion, has a significant impact on the polishing process of ultra-thin wafers. For this reason, the present situation is that the semiconductor processing carrier member is replaced every several hundred hours and used for high quality.

従来から金属材料表面やセラミックス材料表面に滑り性を付与するため、ダイヤモンドライクカーボン膜(以下DLC膜と言う)を成膜する方法が提案されている。機械部品や接触部材と摺動する部材表面に、メタンガス、アセチレンガス等の原料を用いてプラズマCVD法で炭素膜を形成する方法は既に実用化されており、ビデオテープキャプスタンローラー、小型軸受け、湯水切替え弁などに適用され、優れた性能を発揮している。Conventionally, a method of forming a diamond-like carbon film (hereinafter referred to as a DLC film) has been proposed in order to impart slipperiness to the metal material surface or the ceramic material surface. A method of forming a carbon film by a plasma CVD method using raw materials such as methane gas and acetylene gas on the surface of a member that slides with a machine part or a contact member has already been put into practical use, such as a video tape capstan roller, a small bearing, Applied to hot water and water switching valves, etc. , it exhibits excellent performance.

下記公報に記載されている特許文献を参照する。
[特許文献1]特開2000−96233号公報にプラズマCVD法において、プラズマ生成方法や印加電圧、ガス組成などを工夫して、出来るだけ低温加工が可能なプラズマCVD装置を開発して、セラミックスやプラスチック成形品表面にもダイヤモンドライクカーボン膜(以下、DLC膜とも記す)を成膜する方法が提案され、さらにカメラ用オーリングや自動車用ワイパーゴムなどに利用することが提案されている。しかしながらこれらのプラズマCVD法は、導入したガスを高周波でプラズマ化させて、活性化したカーボン元素を部品表面で化学的に反応し堆積させる手法であるため、部材表面とDLC膜層との化学的結合力が弱く密着性に乏しいことがある。
Reference is made to patent documents described in the following publications.
[Patent Document 1] JP 2000-96233 A discloses a plasma CVD method in which plasma generation method, applied voltage, gas composition, etc. are devised to develop a plasma CVD apparatus capable of low temperature processing as much as possible. A method of forming a diamond-like carbon film (hereinafter also referred to as a DLC film) on the surface of a plastic molded product has been proposed, and further, it has been proposed to be used for an O-ring for cameras, a wiper rubber for automobiles, and the like. However, these plasma CVD methods are methods in which the introduced gas is turned into plasma at a high frequency, and the activated carbon element is chemically reacted and deposited on the surface of the component. Therefore, the chemical reaction between the member surface and the DLC film layer is performed. Bonding strength is weak and adhesion may be poor.

特にプラスチック材料やゴム等の熱に弱い材料へ加工するためには、プラズマ密度を低く(弱く)するため、高周波を変調してソフトなプラズマを生成して成膜する必要がある。またプラズマ中のカーボンイオンを引きつけるためには、数十V〜数百Vのバイアス電圧を印加するのが一般的であるが、この程度の電圧ではカーボン元素は基材表層部分に付着する程度であるため、基材内部(数十nm以上)までイオン注入することは出来ない。このことからプラズマCVD法では必ず基材との密着性を上げるために下地処理層としてシリコン単体、シリコン酸化物、シリコン窒化物、シリコン炭化物、四塩化チタン、ペンタエトキシチタニウム、テトライソプロキシチタニウム等を導入して、ケイ素あるいはチタンとカーボンとの化合物の中間層を形成して基材との密着性を向上させることが必要である。  In particular, in order to process a heat-sensitive material such as a plastic material or rubber, it is necessary to generate a soft plasma by modulating a high frequency in order to reduce (weaken) the plasma density. In order to attract carbon ions in the plasma, it is common to apply a bias voltage of several tens of volts to several hundreds of volts. However, with such a voltage, the carbon element is attached to the surface layer portion of the substrate. Therefore, it is not possible to implant ions into the base material (several tens of nm or more). Therefore, in the plasma CVD method, in order to improve the adhesion to the base material, silicon as a base treatment layer, silicon oxide, silicon nitride, silicon carbide, titanium tetrachloride, pentaethoxytitanium, tetraisoproxytitanium, etc. are used. It is necessary to improve the adhesion to the substrate by introducing an intermediate layer of a compound of silicon or titanium and carbon.

またカーボン固体ターゲットをスパッタリングして成膜するPVD法(物理的蒸着法)などにおいても、密着性を向上させるため金属やセラミックスの基材温度を300〜500℃加熱してDLC膜を形成したり、下地処理としてカーボンとなじみがよいケイ素やクロム材料を蒸着して成膜したりする必要があった。またプラズマ中のカーボンイオンを引きつけるために数十V〜数百Vの直流あるいは交流のバイアス電圧を印加するのが一般的であるが、この電圧は成膜エネルギーとしての利用であり、基材との密着性を大幅に向上させることは出来ない。  Also, in the PVD method (physical vapor deposition method) that forms a film by sputtering a carbon solid target, a DLC film is formed by heating the substrate temperature of metal or ceramic at 300 to 500 ° C. in order to improve adhesion. In addition, it was necessary to form a film by depositing silicon or chromium material, which is compatible with carbon, as a base treatment. Further, in order to attract carbon ions in plasma, it is common to apply a DC or AC bias voltage of several tens of volts to several hundreds of volts. This voltage is used as film forming energy, It is not possible to greatly improve the adhesion.

さらに下地を均一に付けるためには特別な反応機構の装置を設ける必要があり、膜厚の均一性を確保するためには回転機構は不可欠であり、大きな複雑な物品では対応できず、小型、一定形状の製品にしか対応できなかった。特に本提案で加工する半導体加工キャリア部材は直径500〜800mmに及ぶ大面積で0.5〜0.8mm厚の高精度円盤からなり、この表面に0.1μm精度でDLC膜を均一に成膜する必要がある。Furthermore, it is necessary to provide a device with a special reaction mechanism in order to uniformly apply the base, and a rotation mechanism is indispensable in order to ensure the uniformity of the film thickness. It could only deal with products with a certain shape. In particular, the semiconductor processing carrier member to be processed in this proposal consists of a high-precision disk having a large area ranging from 500 to 800 mm in diameter and 0.5 to 0.8 mm in thickness, and a DLC film is uniformly formed on this surface with an accuracy of 0.1 μm. There is a need to.

上記のプラズマCVD法では、大面積であると板材が歪み、加工精度が得られず、またPVD法では、回転機構を設けてDLC成膜を行っても、膜厚の均一化はできず1μm以上の厚さばらつきが生じた。さらに両者共に成膜加工プロセスが複雑となり、加工コストが上昇した。  In the above plasma CVD method, if the area is large, the plate material is distorted and processing accuracy cannot be obtained. In the PVD method, even if a DLC film is formed by providing a rotation mechanism, the film thickness cannot be made uniform and 1 μm. The above thickness variation occurred. Furthermore, the film forming process has become complicated in both cases, and the processing cost has increased.

上述した技術では、半導体加工キャリア部材へのDLC均一成膜は困難であり、複雑な回転機構など付けることなく高精度で安価、且つ均一なDLC膜の形成が可能なプロセスが望まれていた。With the above-described technology, it is difficult to uniformly form a DLC film on a semiconductor processing carrier member , and a process capable of forming a uniform DLC film with high accuracy and low cost without adding a complicated rotation mechanism has been desired.

本発明は直径500〜800mmに及ぶ大面積で0.5〜0.8mm厚の高精度円盤からなる半導体加工キャリア部材表面層を、プラズマベースイオン注入技術(Plasma based Ion Implantation)を用いて表面改質し、機能性DLC膜を形成する。従来技術である物理的成膜プロセス(PVD)や化学的成膜プロセス(CVD)では出来ない、新規なDLC成膜プロセスと高品質なDLC膜をコーティングした半導体加工キャリア部材を提供するものである。In the present invention, a surface layer of a semiconductor processing carrier member composed of a high-precision disk having a large area ranging from 500 to 800 mm in diameter and a thickness of 0.5 to 0.8 mm is modified by using a plasma-based ion implantation technique (plasma based ion implantation). To form a functional DLC film. Provided is a semiconductor processing carrier member coated with a novel DLC film forming process and a high-quality DLC film, which cannot be achieved by the conventional physical film forming process (PVD) or chemical film forming process (CVD). .

従来のダイヤモンド状炭素膜、即ちDLC膜は高硬度で耐摩耗性、電気絶縁性、親水性等に優れるが、成膜方法や使用する原料により、内蔵する水素含有暈が異なり様々な硬さの炭素膜が得られた。特にプラズマCVD法、スパッタリング法、イオンプレーティング法などは高硬度で耐摩耗性に優れているが、基材との密着性に乏しという課題があった。本発明はプラズマベースイオン注入・成膜法を各種金属材料、セラミックス材料、プラスチック成形材料等の複合物である半導体加工キャリア部材表面に適用して、耐摩耗性、耐食性、耐汚染性を改善した表面改質技術として提供するものである。A conventional diamond-like carbon film , that is, a DLC film, has high hardness and excellent wear resistance, electrical insulation, hydrophilicity, etc., but depending on the film forming method and the raw material used, the built-in hydrogen-containing flaws vary in hardness. A carbon film was obtained. In particular, the plasma CVD method, the sputtering method, the ion plating method and the like have high hardness and excellent wear resistance, but have a problem of poor adhesion to the substrate. The present invention improves the wear resistance, corrosion resistance, and contamination resistance by applying the plasma-based ion implantation / film formation method to the surface of semiconductor processing carrier members that are composites of various metal materials, ceramic materials, plastic molding materials, etc. This is provided as a surface modification technique.

本発明は、半導体加工キャリア部材をプラズマ表面処理装置内に設置し、前記プラズマ表面処理装置内に炭化水素系ガスを導入して、そのガス圧力を0.1〜10Paに保持し、前記半導体キャリア部材に高周波電力を給電して放電プラズマを発生させ、前記半導体加工キャリア部材にパルス電圧1〜50kV、周波数100〜5000サイクルの負の高電圧パルス(以下、負電圧パルスとも記す)を印加して、前記半導体加工キャリア部材の表面にカーボンイオンを注入し、その表面にダイヤモンドライクカーボン層を形成することを特徴とする。前記半導体加工キャリア部材に数kV〜数十kVの負電圧パルスを印加して、カーボンを含むイオンを半導体加工キャリア部材表面に注入することによりカーボンの傾斜層を形成させ、更に前記パルス電圧を制御しながらカーボンと水素を含有したDLC膜を形成させることによって、上記の課題の解決を実現し目的を達成するものである。In the present invention, a semiconductor processing carrier member is installed in a plasma surface treatment apparatus, a hydrocarbon-based gas is introduced into the plasma surface treatment apparatus, and the gas pressure is maintained at 0.1 to 10 Pa. A high frequency power is supplied to the member to generate discharge plasma, and a negative high voltage pulse (hereinafter also referred to as a negative voltage pulse) having a pulse voltage of 1 to 50 kV and a frequency of 100 to 5000 cycles is applied to the semiconductor processing carrier member. Further, carbon ions are implanted into the surface of the semiconductor processing carrier member, and a diamond-like carbon layer is formed on the surface . A negative voltage pulse of several kV to several tens of kV is applied to the semiconductor processing carrier member, and ions containing carbon are implanted into the surface of the semiconductor processing carrier member to form a carbon gradient layer, and the pulse voltage is controlled. However, by forming a DLC film containing carbon and hydrogen, the above-mentioned problems are solved and the object is achieved.

半導体加工キャリア部材は単体材料でなく、多くはステンレス鋼、チタン合金等の金属円盤部分とポリイミド樹脂、ポリアミドイミド樹脂、ポリエーテルエーテルケトン樹脂、ナイロン樹脂等の樹脂歯車部分から構成された複合部材、或いはガラス繊維強化エポキシ樹脂、カーボン繊維強化エポキシ樹脂等の円盤部材などが組み合わされた複合部材からなる。このことから金属でもプラスチックスでも成膜出来る条件でDLC成膜する必要がある。Semiconductor processing carrier members are not single materials, many are composite members composed of metal disc parts such as stainless steel and titanium alloy and resin gear parts such as polyimide resin, polyamideimide resin, polyetheretherketone resin, nylon resin , Alternatively, it is composed of a composite member in which disk members such as glass fiber reinforced epoxy resin and carbon fiber reinforced epoxy resin are combined. For this reason, it is necessary to form a DLC film under conditions that allow a metal or plastic film to be formed.

具体的には真空チャンバー、真空排気系、ガス供給・制御系、高周波電源、負の高電圧パルス電源(以下、高電圧負パルス電源と記す)、セット架台、高電圧導入系と冷却系構成された表面処理装置を用いて半導体加工キャリア部材の表面改質を行う。金属部材には電極リード線を接続するのみで給電可能であるが、セラミックス、ゴム、プラスチック等の絶縁物に電圧を印加するためには、部材背面、或いは部材内部に電極を配置して、該電極に高周波電力を給電してガスプラズマを発生させる必要がある。前記被注入物である金属部材及びプラスチックス部材に負の高圧パルス電圧を加えると、プラズマ中の電子は排斥され、被注入物の形状に沿ってイオンシースが形成される。印加した負のパルス電圧の 大部分はこのイオンシースに加わり、プラズマ中の正イオンは吸引、加速されて前記被注入物の形状に沿って入射する。従って、前記被注入物の表面には高エネルギーイオンが注入され、注入されたイオンを含有する傾斜層が形成される。 Vacuum chamber, the vacuum exhaust system in particular, the gas supply and control system, a high frequency power source, the negative high-voltage pulse power supply (hereinafter, referred to as the high-voltage negative pulse power supply), consists of a set frame, the high-voltage supply system cooling system The surface modification of the semiconductor processing carrier member is performed using the surface treatment apparatus . Power can be supplied to the metal member simply by connecting an electrode lead wire. However, in order to apply a voltage to an insulator such as ceramics, rubber, plastic, etc. , an electrode is placed on the back of the member or inside the member. It is necessary to supply high-frequency power to the electrode to generate gas plasma. When a negative high voltage pulse voltage is applied to the metal member and plastics member that are the injection target, electrons in the plasma are discharged, and an ion sheath is formed along the shape of the injection target. Most of the applied negative pulse voltage is applied to the ion sheath, and positive ions in the plasma are attracted and accelerated and enter along the shape of the injection target. Therefore, high energy ions are implanted into the surface of the implanted object, and a gradient layer containing the implanted ions is formed.

本発明では金属およびプラスチックス等の絶縁物に対してもカーボンイオン注入が可能である。従来の直流バイアス電圧を印加する場合は、絶縁物に正イオンを注入するとチャージアップして絶縁破壊を起すことがあった。本発明よる高周波電圧、高電圧の負パルス電圧を印加する方法では、パルス電圧が印加されていない時にはプラズマが基材表面に接近し、基材に帯電した電荷は中和され、チャージアップは解消される。また、パルスの周波数および印加時間等を形状毎に最適化して行うことで絶縁破壊を防止すると共に、チャージアップによる膜の不均一性、成膜速度の低下を防ぐことが可能である。In the present invention, carbon ions can be implanted into insulators such as metals and plastics. In the case of applying a conventional DC bias voltage, when positive ions are implanted into the insulator, the battery is charged up and dielectric breakdown may occur. In the method of applying a high- frequency voltage and a high-voltage negative pulse voltage according to the present invention , when the pulse voltage is not applied, the plasma approaches the substrate surface, the charge charged on the substrate is neutralized, and the charge-up is eliminated. Is done. Further, by optimizing the pulse frequency and application time for each shape, it is possible to prevent dielectric breakdown and to prevent film non-uniformity and film formation speed from being lowered due to charge-up.

下記のとおりである。  It is as follows.

本発明に係る表面処理方法は、一定の周期で発振するパルス状の高周波電力(以下、高周波パルスとも記す)を被処理物に給電して放電プラズマを励起し、前記高周波パルスの直後に負電圧パルスを前記被処理物に印加して、その表面にイオン注入、或いはDLC被膜を形成する方法である。従って、前記表面処理方法によって成膜された被膜の物性は、高周波電源の周波数、高周波パルスの繰返し周波数、パルス発振時間などに依存し、また、高電圧負パルス電源のパルス電圧、パルス幅、前記高周波パルスからのディレータイムなどに依存する。更に、プラズマ生成原料のガス流量、ガス圧力等にも影響される。これらの要因を制御して被処理物である半導体加工キャリア部材表面にイオン注入し、その表面にDLC膜を被覆することにより、耐摩耗性、耐食性、耐汚染性を改善した半導体加工キャリア部材を提供することができる。In the surface treatment method according to the present invention, pulsed high-frequency power (hereinafter also referred to as a high-frequency pulse) oscillating at a constant cycle is supplied to a workpiece to excite discharge plasma, and a negative voltage immediately after the high-frequency pulse. In this method, a pulse is applied to the object to be processed, and ion implantation or a DLC film is formed on the surface. Therefore, the physical properties of the film formed by the surface treatment method depend on the frequency of the high-frequency power source, the repetition frequency of the high-frequency pulse, the pulse oscillation time, etc., and the pulse voltage, pulse width of the high-voltage negative pulse power source, Depends on delay time from high frequency pulse. Furthermore, it is also influenced by the gas flow rate, gas pressure, etc. of the plasma generation raw material. A semiconductor processing carrier member having improved wear resistance, corrosion resistance, and contamination resistance by controlling these factors and implanting ions onto the surface of the semiconductor processing carrier member, which is the object to be processed, and coating the surface with a DLC film. Can be provided.

前記原料ガスである炭化水素系ガスは、メタン、アセチレン、ベンゼン、トルエン及びシクロヘキサノン、クロロベンゼン等からなる炭化水素化合物から選択される少なくとも1種類を主成分とするガスを使用する。真空チャンバー内にガスを導入し、高周波電圧を印加して前記原料ガスをプラズマ化することによって、カーボン原子もしくは分子イオンを生成させ、負電圧パルスを印加して加速し、前記半導体加工キャリア部材にイオン注入する。 The hydrocarbon gas that is the raw material gas is a gas mainly composed of at least one selected from hydrocarbon compounds composed of methane, acetylene, benzene, toluene, cyclohexanone, chlorobenzene, and the like . A gas is introduced into the vacuum chamber, a high-frequency voltage is applied to make the source gas into plasma, thereby generating carbon atoms or molecular ions, and a negative voltage pulse is applied to accelerate the material gas. Ion implantation.

炭化水素系ガスによって、カーボン原子と水素原子の割合の異なる放電プラズマが励起されるため、生成されるDLC膜中に含まれる水素原子の必要な割合によって、ガス種とその混合割合を決定するのが好ましい。メタン、アセチレン、ベンゼン、トルエンガスにおいて、脂肪族系と芳香族系によってカーボンのイオン注入度合いやDLC膜の成膜状態が大きく変化することが知られており、さらに必要に応じて二フッ化炭素、四フッ化炭素、六フッ化炭素、六フッ化硫黄および十フッ化四カーボン等を添加することにより、潤滑性や撥水性などの機能を付加したDLC膜を形成することができる。 Since the discharge gas with different ratios of carbon atoms and hydrogen atoms is excited by the hydrocarbon gas , the gas species and the mixing ratio thereof are determined by the required ratio of hydrogen atoms contained in the generated DLC film . Is preferred. In methane, acetylene, benzene, and toluene gases, it is known that the degree of carbon ion implantation and the state of film formation of the DLC film vary greatly depending on whether aliphatic or aromatic, and carbon difluoride as required. By adding carbon tetrafluoride, carbon hexafluoride, sulfur hexafluoride, tetrafluorocarbon 10 and the like, a DLC film having functions such as lubricity and water repellency can be formed.

放電プラズマを発生させる高周波電源は、周波数が0.2MHzから2.45GHz、出力が10Wから20kW、高周波パルスのパルス幅が1μsから200μsであることが望ましい。前記高周波電源の好適な周波数は1MHz〜50MHzである。また、前記高周波パルスの好適なパルス幅は30μs〜100μsである。The high frequency power source for generating discharge plasma desirably has a frequency of 0.2 MHz to 2.45 GHz, an output of 10 W to 20 kW, and a pulse width of the high frequency pulse of 1 μs to 200 μs. A suitable frequency of the high frequency power source is 1 MHz to 50 MHz. The preferred pulse width of the high-frequency pulse is 30 μs to 100 μs.

本発明によれば、生成されるDLC被膜の物性は印加する高周波パルスにも依存する。従来の質量分離型のイオン注入装置では、メタン、アセチレン等の市販の炭化水素ガスを使用し、高周波電界により放電プラズマを励起させ、カーボンイオンのみを注入することが可能であった。しかし、本発明に係る表面処理方法では、被処理物に負の高電圧パルスを印加してプラズマ表面から直接加速してイオン注入するため、カーボンと結合した分子イオンも不純物として同時に注入される。本願発明者等は、これらの余分なイオンの存在下でもカーボンイオンを十分に注入できる良好なプラズマ条件を種々検討した結果、次の高周波パルス印加条件が好適であることを見出した。 According to the present invention, the physical properties of the generated DLC film also depend on the applied high frequency pulse. In a conventional mass separation type ion implantation apparatus , it is possible to inject only carbon ions by using a commercially available hydrocarbon gas such as methane or acetylene , exciting a discharge plasma by a high frequency electric field . However, in the surface treatment method according to the present invention, a negative high voltage pulse is applied to the object to be processed and accelerated directly from the plasma surface for ion implantation, so that molecular ions combined with carbon are also implanted simultaneously as impurities. The inventors of the present application have found that the following high-frequency pulse application conditions are suitable as a result of various investigations of favorable plasma conditions that can sufficiently inject carbon ions even in the presence of these extra ions.

高周波パルスの印加条件、即ち、繰り返し周波数、パルス幅、出力電力の最適化が必要である。繰り返し周波数が100Hz以下であると一定時間内のイオン注入回数が減少することになりイオン注入効率が低下する。一方、5000Hz以上であると高周波電源の高性能化が必要となり装置コストが高くなる。パルス幅は励起される放電プラズマの密度に関係し、パルス幅が10μs以下であると十分なプラズマ密度が得られず、また、100μs以上ではプラズマ密度は飽和する。なお、前記高周波パルスはパルス発振のみならず連続発振する高周波電力を給電することができる。 It is necessary to optimize the application conditions of the high frequency pulse, that is, the repetition frequency, the pulse width, and the output power . When the repetition frequency is 100 Hz or less, the number of ion implantations within a certain time is reduced, and the ion implantation efficiency is lowered. On the other hand, when the frequency is 5000 Hz or higher, it is necessary to improve the performance of the high- frequency power source , and the cost of the apparatus increases. The pulse width is related to the density of the excited discharge plasma. If the pulse width is 10 μs or less, a sufficient plasma density cannot be obtained, and if it is 100 μs or more, the plasma density is saturated. Note that the high-frequency pulse can supply not only pulse oscillation but also high-frequency power that continuously oscillates.

前記負電圧パルスは、被膜の基材との密着性、耐摩耗性、耐食性付与の観点からは−1.0〜30kVが好ましい。−1.0kV以下であると基材へのイオン注入深さが浅く、基材とDLC膜間の傾斜構造が得られず密着力が低い。また、−30kV以上の高電圧になると基材とDLC膜間の傾斜構造化は進むが、高電圧負パルス電源が大型化して装置コストが高くなり、絶縁性基材の場合にはチャージアップによる異常放電の発生、イオン照射による温度上昇等の不具合が生じ、プラスチック成形品のひずみ発生、損傷等が顕著になる。 The negative voltage pulse is preferably -1.0 to 30 kV from the viewpoints of adhesion of the film to the substrate, wear resistance, and corrosion resistance. If it is −1.0 kV or less, the ion implantation depth into the substrate is shallow, and an inclined structure between the substrate and the DLC film cannot be obtained, resulting in low adhesion . In addition, when a high voltage of −30 kV or higher is applied, the inclined structure between the base material and the DLC film advances, but the high-voltage negative pulse power source increases in size and the device cost increases. As a result, problems such as the occurrence of abnormal discharge and temperature rise due to ion irradiation occur, and the occurrence of distortion and damage of the plastic molded product becomes remarkable.

各種基材表面へのイオン注入時間は制約されるものではないが30〜120分であることが好ましい。より好ましくは生産性の観点から短時間処理であるが、半導体加工キャリア部材のプラスチック成形部分ではカーボン原子の注入により表面層が脆くなり、密着性を低下させることもあり、材料成分によってイオン注入条件を選定する必要がある。Although the ion implantation time to the surface of various base materials is not limited, it is preferably 30 to 120 minutes. More preferably, it is a short-time treatment from the viewpoint of productivity, but in the plastic molding part of the semiconductor processing carrier member, the surface layer becomes brittle due to carbon atom implantation, and the adhesion may be lowered. Must be selected.

従来の質量分離型のイオン注入装置では、利用可能なイオンビーム電流はmA以下で、1E17ions/cm2のイオン注入するには数時間もかかってしまう。これに対して本発明に係る表面処理方法では、プラズマ表面から直接イオンを取り出すことができるため、数A〜数十Aのビーム電流が得られ、短時間でのカーボンイオン注入処理が行える。且つ直流電圧によるイオン注入でなくパルス電圧によるイオン注入であるため、絶縁物に対してもチャージアップによる損傷は非常に少ない。In the conventional mass separation type ion implantation apparatus, the available ion beam current is less than mA, and it takes several hours to implant ions of 1E17 ions / cm 2. On the other hand , in the surface treatment method according to the present invention, since ions can be directly taken out from the plasma surface, a beam current of several A to several tens of A can be obtained, and a carbon ion implantation process can be performed in a short time. In addition, since the ion implantation is performed not by the DC voltage but by the pulse voltage , damage to the insulator due to the charge-up is very small.

本発明のカーボンイオン注入法では表層の酸化層を充分突き破るだけのエネルギーでイオン注入されるため、カーボンの傾斜構造を容易に形成することができる。特に、化学量論的にカーボンを固溶し難い非鉄金属に対して高エネルギーでカーボンイオン注入することにより、表面硬度を上げながらDLC膜を形成することが可能である。また、DLC成膜エネルギーを変化させてDLC膜の弾性率を制御しながら成膜することが可能である。従って、DLC膜中の残留応力が低く密着性が得られやすい。このため耐摩耗性が必要とされる半導体加工キャリア部材では厚さ2.0〜10μmの高硬度DLC膜を容易に得ることができる。 In the carbon ion implantation method of the present invention, since the ion implantation is performed with an energy sufficient to break through the surface oxide layer, a carbon gradient structure can be easily formed . In particular, by carbon ions implanted at a high energy for the stoichiometric solid solution carbon hard non-ferrous metals, it is possible to form a DLC film while increasing the surface hardness. It is also possible to form a film while changing the DLC film formation energy and controlling the elastic modulus of the DLC film. Accordingly, the residual stress in the DLC film is low and adhesion is easily obtained. For this reason, a high-hardness DLC film having a thickness of 2.0 to 10 μm can be easily obtained in a semiconductor processing carrier member that requires wear resistance .

また腐食性が強いシリコン研磨溶液を使用してシリコン基板を研磨する場合には、耐食性を重視したDLC成膜を行う必要がある。従来のグラファイトターゲットを原料として成膜するスパッタリング成膜方法では、ドロプレットと呼ばれるカーボン粒子がDLC膜中に存在し、微小なピンホールが多数発生して耐食性を大きく損なった。本発明のカーボンイオン注入+DLC成膜法では任意な量だけカーボン注入して、カーボンの傾斜構造を形成することが可能であり、その表面に形成するDLC膜は水素元素の含有量を制御した非晶質カーボン堆積物であることから、ドロップレットもピンホールもない非常に緻密なDLC成膜とすることが可能である。In addition, when a silicon substrate is polished using a highly corrosive silicon polishing solution, it is necessary to perform DLC film formation that emphasizes corrosion resistance. In a sputtering film forming method in which a conventional graphite target is used as a raw material, carbon particles called droplets are present in the DLC film, and a lot of minute pinholes are generated, resulting in a significant loss of corrosion resistance. In the carbon ion implantation + DLC film forming method of the present invention, an arbitrary amount of carbon can be implanted to form a carbon gradient structure. The DLC film formed on the surface of the carbon ion implantation has a non- hydrogen content controlled. since, as a crystalline carbon deposits can be extremely dense DLC film forming no droplets pinholes.

本プロセスではDLC成膜時のパルス電圧を変化させることによりDLC膜の弾性率を制御しながら成膜することが可能であるため、炭素膜中の残留応力が低く密着性が得られやすい。このため2.0〜10μmの炭素膜を容易に得ることが可能であり、直径500〜800mmに及ぶ大面積で0.5〜0.8mm厚の高精度円盤からなる半導体加工キャリア部材に対して、在留ひずみが影響することなく、0.5μm以下の精度で均一にDLCを成膜することが可能となり、本プロセスが最適であることが判った。In this process, it is possible to form a film while controlling the elastic modulus of the DLC film by changing the pulse voltage at the time of film formation of the DLC. Therefore, the residual stress in the carbon film is low and the adhesion can be easily obtained. For this reason, it is possible to easily obtain a carbon film having a thickness of 2.0 to 10 μm, and for a semiconductor processing carrier member comprising a high-precision disk having a large area ranging from 500 to 800 mm in diameter and a thickness of 0.5 to 0.8 mm. It was found that the DLC film can be uniformly formed with an accuracy of 0.5 μm or less without being affected by the residence strain, and this process was found to be optimal.

本発明のDLC膜をコーティングした半導体加工キャリア部材では、その非処理物表面よりカーボンが10nm以上イオン注入され、その表層部に厚さ1.0〜10μmの高硬度DLC層が成膜されていることが大きな特徴としている。従来のプラズマCVD法やPVD法などでは、プラズマ中のカーボンイオンを引きつけるために数十V〜数百Vの直流あるいは交流のバイアス電圧を印加するのが一般的であるが、この電圧では被処理物表面よりカーボン原子が10nm以上イオン注入されることは無く、基材との密着性向上に寄与することはなかった。In the semiconductor processed carrier member coated with the DLC film of the present invention, carbon is ion-implanted by 10 nm or more from the surface of the non-processed product, and a high-hardness DLC layer having a thickness of 1.0 to 10 μm is formed on the surface layer portion. This is a major feature. In the conventional plasma CVD method or PVD method, a DC voltage or an AC bias voltage of several tens to several hundreds of volts is generally applied to attract carbon ions in the plasma. Carbon atoms were not ion-implanted by 10 nm or more from the surface of the object, and it did not contribute to improving the adhesion to the substrate.

負電圧パルスのパルス電圧やパルス幅、繰り返し周波数、処理温度等を種々変化させて評価した結果、被処理物表向から、より深くカーボン原子が注入されていることが密着性向上に寄与することを見出した。実験の結果少なくとも10nm以上イオン注入されていることが好ましく、これより浅いと密着性への寄与率が低下することが判った。As a result of various changes in the pulse voltage, pulse width, repetition frequency, processing temperature, etc. of the negative voltage pulse, the deeper carbon atoms implanted from the surface of the workpiece contribute to improved adhesion. I found. As a result of the experiment, it is preferable that at least 10 nm or more of ions are implanted, and it has been found that if it is shallower than this, the contribution rate to the adhesiveness decreases.

カーボン原子が表層部より深く注入され、その表面に厚さ1〜10μmの硬質なDLC膜が形成されると、耐摩耗性、耐食性、潤滑性及び耐汚染性に著しい効果が発揮される。従来のプラズマCVD法やPVD法などは、基材界面に発生する残留応力のため、炭素膜は0.1〜2.0μm成膜するのが一般的であったが、本発明では10nm以上の傾斜構造層が形成されるため基材界面に発生する残留応力が低減され、3.0μm以上のDLC膜の成膜が可能となった。実験によると例えば柔軟なアルミニウム基材に対して50〜100μmのDLC膜の成膜も可能であり、高機能・長寿命な摺動部材として応用可能であることが判った。When carbon atoms are implanted deeper than the surface layer portion and a hard DLC film having a thickness of 1 to 10 μm is formed on the surface thereof, a remarkable effect is exhibited in wear resistance, corrosion resistance, lubricity and contamination resistance. In such conventional plasma CVD method or a PVD method, the residual stress generated in the substrate interface, the carbon film is to 0.1~2.0μm deposited were common, 10 nm or more in the present invention As a result, the residual stress generated at the substrate interface was reduced, and a DLC film of 3.0 μm or more could be formed. According to experiments, it was found that, for example, a DLC film having a thickness of 50 to 100 μm can be formed on a flexible aluminum substrate, and can be applied as a sliding member having a high function and a long life.

更に、半導体加工キャリア部材で重要なことは、シリコン基板の研磨中に不純物が溶出しないことである。従来のステンレス鋼を使用した半導体加工キャリア部材では、鉄、クロム、ニッケルなどの微量不純物が溶出して、シリコン基板に悪影響を及ぼすことがあった。本発明に係る半導体加工キャリア部材では、緻密で均一なDLC膜コートにより不純物の溶出が全く検出されない半導体加工キャリア部材を得ることが可能となった。 Furthermore, what is important in the semiconductor processing carrier member is that impurities are not eluted during polishing of the silicon substrate . In semiconductor processing carrier members using conventional stainless steel, trace impurities such as iron, chromium and nickel are eluted, which may adversely affect the silicon substrate . With the semiconductor processed carrier member according to the present invention, it is possible to obtain a semiconductor processed carrier member in which the elution of impurities is not detected at all by the dense and uniform DLC film coating .

金属とプラスチックの複合部材である半導体加工キャリア部材はセット架台に取付けられる。該セット架台は高周波電力を給電するフィードスルーと一体化されている。高周波電力はフィードスルー、前記セット架台を介して半導体加工キャリア部材に給電される。半導体加工キャリア部材に高周波電力を給電することによって、半導体加工キャリア部材の表面に高密度のプラズマを形成する。プラズマ中にはイオン、ラジカル、電子が共存し、負電圧パルスを印加すると、高エネルギーの炭素イオン、水素イオン及びラジカルが前記半導体加工キャリア部材表面に入射し、基材表面でイオン注入、化学結合してDLC膜が 形成される。前記高周波パルス及び負電圧パルスを制御することによって所望のイオン注入と成膜の組み合わせが可能となる。 A semiconductor processing carrier member, which is a composite member of metal and plastic, is attached to a set frame. The set frame is integrated with a feedthrough for supplying high-frequency power. The high frequency power is fed to the semiconductor processing carrier member through the feedthrough and the set frame. By supplying high-frequency power to the semiconductor processing carrier member, high-density plasma is formed on the surface of the semiconductor processing carrier member . Ions, radicals, and electrons coexist in the plasma. When a negative voltage pulse is applied, high-energy carbon ions, hydrogen ions, and radicals are incident on the surface of the semiconductor processing carrier member, and ion implantation and chemical bonding are performed on the substrate surface. Thus, a DLC film is formed. By controlling the high frequency pulse and the negative voltage pulse, a desired combination of ion implantation and film formation becomes possible.

以下、本発明の実施の形態を説明する。
先ず、本発明に係る実施例に用いたプラズマ表面処理装置の概略構成を図1に基づいて説明する。この装置は、半導体加工キャリア部材1をセットするセット架台2を内蔵する真空チャンバー3を具えている。セット架台2は高周波電力及び負のパルス電圧を印加するための電極を兼ねている。真空チャンバー3は、排気装置4により内部を所定の真空度に保持することができる。この装置は、所定の炭化水素系ガスを導入する炭化水素ガス導入口5、また必要に応じてDLC膜の密着性を向上させるため金属系元素をイオン注入するための有機金属ガス導入口6を備えている。
Embodiments of the present invention will be described below.
First, a schematic configuration of a plasma surface treatment apparatus used in an embodiment according to the present invention will be described with reference to FIG. This apparatus comprises a vacuum chamber 3 containing a set frame 2 on which a semiconductor processing carrier member 1 is set. The set base 2 also serves as an electrode for applying high-frequency power and a negative pulse voltage . The inside of the vacuum chamber 3 can be maintained at a predetermined degree of vacuum by the exhaust device 4. This apparatus has a hydrocarbon gas inlet 5 for introducing a predetermined hydrocarbon gas, and an organometallic gas inlet 6 for ion-implanting metal elements to improve the adhesion of the DLC film as required. I have.

更に、この装置は、各種形状の半導体加工キャリア部材1に負の高電圧パルスを印加する高電圧負パルス電源7と高周波(RF)電源8も具えている。高電圧負パルス電源7は、所定の波高値の負電圧パルスを発生させ、高電圧用フィードスルー9を通じて半導体加工キャリア部材1に負電圧パルスを印加する。このフィードスルーはセット架台2に接続されており、セット架台2は絶縁碍子10によって電気的に浮いた状態に保持されている。更に、DLC成膜時には、負電圧パルスと高周波電力を重畳装置11によって重畳し、高電圧用フィードスルー9を介して前記半導体加工キャリア部材1に給電される。高電圧用フィードスルー9にはシールドカバー12が取り付けられフィードスルー9を防護している。The apparatus further includes a high voltage negative pulse power source 7 and a radio frequency (RF) power source 8 for applying a negative high voltage pulse to the semiconductor processing carrier member 1 having various shapes. The high voltage negative pulse power supply 7 generates a negative voltage pulse having a predetermined peak value and applies the negative voltage pulse to the semiconductor processing carrier member 1 through the high voltage feedthrough 9. This feedthrough is connected to the set base 2, and the set base 2 is held in an electrically floating state by an insulator 10. Further, at the time of DLC film formation, the negative voltage pulse and the high frequency power are superimposed by the superimposing device 11 and supplied to the semiconductor processing carrier member 1 through the high voltage feedthrough 9. A shield cover 12 is attached to the high voltage feedthrough 9 to protect the feedthrough 9.

本装置のセット架台2には、図1のA展開図に示すような半導体加工キャリア部材1がセットされる。架台2には、直径500mm厚さ0.7mmの半導体加工キャリア部材1を3〜9枚セットすることが出来る。半導体加工キャリア部材1にはシリコン基板固定用の開口部aが数箇所開いており、該開口部内周部にはポリエーテル樹脂リング13が接着されている。開口部の形状や樹脂材質などは任意に選定される。また部材の一部にはDLC成膜後の膜厚を正しく評価するために10×10×0.3mm角のシリコン試験片(b)と、DLC成膜品の物理的、化学的特性を評価するための25×25×2mm角ステンレス鋼試験片(c)を貼り付け試験評価を行えるようにしている。A semiconductor processing carrier member 1 as shown in the A development view of FIG. 1 is set on the set base 2 of the present apparatus . Three to nine semiconductor processing carrier members 1 having a diameter of 500 mm and a thickness of 0.7 mm can be set on the gantry 2 . The semiconductor processing carrier member 1 has several openings a for fixing the silicon substrate , and a polyether resin ring 13 is bonded to the inner periphery of the opening . The shape of the opening and the resin material are arbitrarily selected. In addition, in order to accurately evaluate the film thickness after DLC film formation on a part of the member, the physical and chemical characteristics of the 10 × 10 × 0.3 mm square silicon test piece (b) and the DLC film-formed product are evaluated. A 25 × 25 × 2 mm square stainless steel test piece (c) is attached so that the test evaluation can be performed.

これら半導体加工キャリア部材に負電圧パルスを印加すると、プラズマ中のカーボンイオンあるいはCH、CH、C等のイオンが半導体加工キャリア部材に引きつけられ、カーボンイオンあるいは水素イオンが注入される。半導体加工キャリア部材に負電圧パルスを印加してイオンを注入するので、部材が平板でなく凹凸のある立体形状物でも、電界が部材の形状に沿って発生し、この表面に対してほぼ直角にカーボンイオンが入射する。このため絶縁性あるプラスチック部材に凹凸があってもプラスチック表面全体にカーボンイオンを注入することができる。なお、同時に水素イオンもイオン注入されるが、基材中の水素は注入後に拡散して脱ガスすることが知られており、基材の物性をあまり左右されることはないと考えられている。When a negative voltage pulse is applied to these semiconductor processed carrier members, carbon ions in the plasma or ions such as CH, CH X and C 2 are attracted to the semiconductor processed carrier member, and carbon ions or hydrogen ions are implanted. Since ions are implanted by applying a negative voltage pulse to a semiconductor processing carrier member, an electric field is generated along the shape of the member even if the member is not a flat plate but an uneven solid shape, and is almost perpendicular to the surface. Carbon ions are incident . Therefore if there are irregularities in the plastic member is an insulating it is possible to inject carbon ions across the plastic surface is also. At the same time, hydrogen ions are also ion-implanted, but it is known that hydrogen in the base material diffuses and degass after injection, and it is considered that the physical properties of the base material are not greatly affected. .

カーボンイオン注入後、連続してDLCを成膜する。カーボンイオン注入は数kV以上好ましくは10kV以上の電圧でイオン注入されるが、DLC膜の成膜はメタン、アセチレン、ベンゼン、トルエン等の炭化水素系ガスを任意割合で混合したガスを10kV以下の負電圧パルスを印加しながら成膜する。この理由は、高エネルギーでDLCの成膜を行うとイオンの衝突エネルギーによりDLCの膜構造が乱れ、硬高度な被膜が得られにくいばかりでなく、成膜速度が得られにくいためである。特に表層部分になるほど低エネルギーで成膜する方が高品質なDLC膜被覆物品が得られるので好ましい。好ましくは成膜時に自動制御により高電圧側から低電圧側に徐々に低下させる成膜手法が好ましい。
以下実施例に基づき説明する。
After the carbon ion implantation, a DLC film is continuously formed. Although the carbon ion implantation is preferably not less than several kV is ion implanted at a voltage higher than 10 kV, the formation of the DLC film methane, acetylene, benzene, 10 kV or less gas to hydrocarbon gas was mixed in any proportion, such as toluene The film is formed while applying a negative voltage pulse of. This is because when the DLC film is formed at a high energy, the film structure of the DLC is disturbed by the collision energy of ions, and it is difficult to obtain a hard and high-grade film, and it is difficult to obtain a film formation speed. In particular, it is preferable to form a film with lower energy as the surface layer portion is obtained because a high-quality DLC film-coated article is obtained. It is preferable to use a film forming technique in which the voltage is gradually lowered from the high voltage side to the low voltage side by automatic control during film formation.
This will be described below based on examples.

(実験例1)
図1に示すプラズマ表面処理装置を用いて、図中のA展開図に示すように半導体加工キャリア部材1に設けられた開口部aの近傍に、分析用試験片b及びcを複数個貼り付け、分析評価に用いた。実験は次の条件でプラズマを発生させ、カーボンイオン注入+DLCの成膜を行い評価した。
(Experimental example 1)
Using the plasma surface treatment apparatus shown in FIG. 1, a plurality of analytical test pieces b and c are pasted in the vicinity of the opening a provided in the semiconductor processing carrier member 1 as shown in an A development view in FIG. Used for analytical evaluation. In the experiment, plasma was generated under the following conditions, and carbon ion implantation + DLC film was formed and evaluated.

使用材料:ステンレス鋼(新日鐵住金ステンレス社製SUS304材)
使用ガス種:メタンガス/アセチレン混合ガス
ガス混合比:メタンガス50/アセチレン50
注入・成膜時圧力:0.5Pa〜1.0Pa
注入時負電圧パルス:10kV、20kV、30kV
成膜時負電圧パルス:10kV→2kV
注入時間:30分
炭素膜成膜時間:180分
印加周波数:2000Hz
Material used: Stainless steel (SUS304 made by Nippon Steel & Sumikin Stainless Steel)
Use gas type: Methane gas / acetylene mixed gas mixing ratio: Methane gas 50 / acetylene 50
Pressure during injection / film formation: 0.5 Pa to 1.0 Pa
Negative voltage pulse during injection: 10 kV, 20 kV, 30 kV
Negative voltage pulse during film formation: 10 kV → 2 kV
Injection time: 30 minutes Carbon film formation time: 180 minutes Application frequency: 2000 Hz

前記の3条件の前記注入時負電圧パルスを印加してカーボンイオンをステンレス鋼へ注入し、その後電圧を下げながらDLC膜をメタン/アセチレン混合ガスプラズマを用いて成膜を行った。上記成膜時圧力は、前記成膜時負電圧パルスを変化させるとガス圧力が変動するため、その時の圧力範囲を示し、パルス電圧の矢印は成膜時間内にパルス電圧を低 させながら実験したことを示す。注入されたカーボン元素の深さ方向の分布をオージェ分析装置(AES)で評価を行い、カーボンの注入深さと注入量(原子%)を求めた。またステンレス鋼基材表面の硬度と密着性をダイナミック硬度計およびスクラッチ密着性評価試験機にて測定し、さらに摩擦係数をボール&ディスク法による摩擦試験で鋼球を用いて測定した。DLCの膜厚は半導体加工キャリア部材の9ヶ所に貼り付けたシリコン試験片に付着したDLC膜厚を求め、DLC膜厚のばらつきを評価した。AES分折による注入エネルギー10keV、20keV、30keVにおけるカーボン注入分布を図2に示した。また硬度、密着性、摩擦係数については図3に未処理のステンレス鋼と比較して示した。The negative voltage pulse during the injection under the above three conditions was applied to inject carbon ions into the stainless steel, and then the DLC film was formed using methane / acetylene mixed gas plasma while the voltage was lowered. The deposition time pressure, since the film forming time is causing the gas pressure change a negative voltage pulse fluctuate, represents the pressure range at that time, the arrow of the pulse voltage while low reducing a pulse voltage to the film forming time It shows that it experimented. The distribution of the implanted carbon element in the depth direction was evaluated by an Auger analyzer (AES), and the carbon implantation depth and amount (atomic%) were determined. Further, the hardness and adhesion of the stainless steel substrate surface were measured with a dynamic hardness meter and a scratch adhesion evaluation tester, and the friction coefficient was measured with a steel ball in a friction test by a ball and disk method. The DLC film thickness was determined by obtaining the DLC film thickness attached to the silicon test pieces attached to nine locations of the semiconductor processing carrier member , and evaluating variations in the DLC film thickness. FIG. 2 shows carbon injection distributions at injection energies of 10 keV, 20 keV, and 30 keV by AES analysis. The hardness, adhesion, and friction coefficient are shown in FIG. 3 in comparison with untreated stainless steel.

SUS304基板にカーボンイオン注入とDLC膜を形成した被膜のオージェ分析によるカーボン注入深さとカーボン濃度との関係を図2に示す。横軸はステンレス鋼基板の深さ方向を示し、原点はDLC膜材料表面を示す。縦軸は材料中のカーボン原子の割合を示している。なお分析に当たりDLC膜はあらかじめアルゴンスパッタにより表面汚染物を除去して分析した。図2から判るようにステンレス鋼表面ではDLC膜主成分であるカーボン層が300nm付近まで形成されており、330nm付近がステンレス鋼の最表層部分と見られる。ここからカーボン注入層が380nm〜450nm付近まで高濃度のカーボン層であることが判る。この結果、注入エネルギーが高いほどカーボンの侵入深さは深く、内部までイオン注入されていることが判る。カーボンの注入深さは10keVで60nm付近まで、20keVで90nm、30keVで120nmほどイオン注入されていることが判る。このことはDLC膜形成前の印加電圧が高い程、カーボンはステンレス材料中に深く注入され、傾斜構造が形成されていることが判る。 FIG. 2 shows the relationship between the carbon implantation depth and the carbon concentration by Auger analysis of a film in which carbon ion implantation and a DLC film are formed on a SUS304 substrate. The horizontal axis indicates the depth direction of the stainless steel substrate, and the origin indicates the DLC film material surface . The vertical axis represents the proportion of carbon atoms in the material. In the analysis, the DLC film was analyzed in advance by removing surface contaminants by argon sputtering. As can be seen from FIG. 2, the carbon layer, which is the main component of the DLC film, is formed up to about 300 nm on the stainless steel surface, and the vicinity of 330 nm is seen as the outermost layer portion of the stainless steel. From this, it can be seen that the carbon injection layer is a high-concentration carbon layer from 380 nm to about 450 nm. As a result, it can be seen that the higher the implantation energy, the deeper the carbon penetration depth, and the ion implantation into the interior. It can be seen that the carbon implantation depth is about 10 nm at 10 keV, 90 nm at 20 keV, and 120 nm at 30 keV. This shows that the higher the applied voltage before forming the DLC film , the deeper the carbon is injected into the stainless steel material, and the inclined structure is formed.

一方、ステンレス表面のダイナミック硬度、スクラッチ密着力及び摩擦係数を図3に示す。未処理のステンレス鋼は硬度570と非常に柔らかいが、DLC膜を成膜することによりいずれも1300以上の硬度を示し、且つスクラッチ密着力も基材が柔らかいにもかかわらず15N以上の密着力を示すことが判る。またステンレス鋼は0.3以上の非常に高い摩擦係数を示すが、DLC膜によりいずれも0.18以下の低摩擦係数を示した。イオン注入エネルギーとの関係を見ると、適度な注入エネルギーにおいて、硬度は高く、摩擦係数が低くなることが判った。更に、DLC膜厚の均一性を評価した結果、図3に示すように6枚の半導体加工キャリア部材について各9点づつ測定した結果、膜厚は平均2μm±0.3μmでDLC膜が形成できることが判った。 On the other hand, the dynamic hardness, scratch adhesion and friction coefficient of the stainless steel surface are shown in FIG. Untreated stainless steel is very soft with a hardness of 570, but by forming a DLC film, all show a hardness of 1300 or more, and the scratch adhesion also shows an adhesion of 15 N or more despite the soft substrate. I understand that. Stainless steel exhibited a very high coefficient of friction of 0.3 or more, but all of the DLC films exhibited a low coefficient of friction of 0.18 or less. Looking at the relationship with the ion implantation energy, it was found that at a suitable implantation energy, the hardness was high and the friction coefficient was low. Furthermore, as a result of evaluating the uniformity of the DLC film thickness, as a result of measuring 9 points for each of the six semiconductor processed carrier members as shown in FIG. 3, the DLC film can be formed with an average film thickness of 2 μm ± 0.3 μm. I understood.

(実験例2)
に示すプラズマ表面処理装置を用いて、図中のA展開図に示すようにチタン合金半導体加工キャリア部材1に設けられた開口部aの近傍に、分析用試験片b及びcを複数個貼り付け、分析評価用に用いた。実験は次の条件でプラズマを発生させ、カーボンイオン注入+DLC膜の成膜を行い評価した。
(Experimental example 2)
Using the plasma surface treatment apparatus shown in FIG. 1 , a plurality of analytical test pieces b and c are provided in the vicinity of the opening a provided in the titanium alloy semiconductor processing carrier member 1 as shown in an A development view in FIG. Used for pasting and analysis evaluation. In the experiment, plasma was generated under the following conditions, and carbon ion implantation + DLC film was formed and evaluated.

使用材料:チタン合金材料(株式会神戸製鋼所社製KS6−4材)
使用ガス種:アセチレン/トルエン混合ガス
ガス混合比:アセチレン70/トルエン30
注入・成膜時圧力:0.5Pa〜1.0Pa
注入時負電圧パルス:10kV、20kV、30kV
成膜時負電圧パルス:10kV→2kV
注入時間:30分
炭素膜成膜時間:180分
印加周波数:3000Hz
Material used: Titanium alloy material (KS6-4 manufactured by Kobe Steel, Ltd.)
Gas type used: Acetylene / toluene gas mixture ratio: Acetylene 70 / toluene 30
Pressure during injection / film formation: 0.5 Pa to 1.0 Pa
Negative voltage pulse during injection: 10 kV, 20 kV, 30 kV
Negative voltage pulse during film formation: 10 kV → 2 kV
Implantation time: 30 minutes Carbon film formation time: 180 minutes Application frequency: 3000 Hz

前記の3条件の前記注入時負電圧パルスを印加してチタン合金板へカーボンイオンを注入し、引き続いてパルス電圧を低減しながらアセチレン/トルエン混合ガスプラズマ中でDLC膜の成膜を行った。注入されたカーボン原子の深さ方向の分布をオージェ分析装置(AES)で評価し、カーボン原子の注入深さと注入量を求めた。また、チタン合金基材表面の硬度および密着性評価ダイナミック硬度計およびスクラッチ密着性評価試験機を用いて測定した。更に、ボール&ディスク法による摩擦試験で鋼球を用いて摩擦係数を測定した。DLCの膜厚は半導体加工キャリア部材の9ヶ所に貼り付けたシリコン試験片に堆積したDLC膜の厚さを測定し、DLC膜厚のばらつきを評価した。AES分析による注入エネルギー10keV、20keV、30keVにおけるカーボン注入分布を図5に示した。また硬度、密着性、摩擦係数については図6に未処理のチタン合金と比較して示した。The negative voltage pulse during the injection under the above three conditions was applied to inject carbon ions into the titanium alloy plate, and subsequently a DLC film was formed in an acetylene / toluene mixed gas plasma while reducing the pulse voltage. The distribution of the implanted carbon atoms in the depth direction was evaluated by an Auger analyzer (AES), and the implantation depth and amount of carbon atoms were determined. Further, the hardness and adhesion evaluation of the titanium alloy substrate surface were measured using a dynamic hardness meter and a scratch adhesion evaluation tester . Furthermore, the coefficient of friction was measured using a steel ball in a ball and disk friction test. The thickness of the DLC was measured by measuring the thickness of the DLC film deposited on the silicon test pieces attached to nine locations of the semiconductor processing carrier member , and evaluating the variation in the DLC film thickness. FIG. 5 shows carbon injection distributions at injection energies of 10 keV, 20 keV, and 30 keV by AES analysis . Further, the hardness, adhesion, and coefficient of friction are shown in FIG. 6 in comparison with an untreated titanium alloy.

図4にオージェ分析結果を示す。横軸はDLC膜表面からの深さを示し、原点はDLC膜表面を示している。縦軸は材料中のカーボン原子の割合を示している。表面から深さ330nmまではDLC膜が形成されており、チタン合金基材へのカーボン注入層は330nmから420nm〜540nm付近までであることが判る。この結果、注入エネルギーが高いほどカーボンの侵入深さは深く、内部までイオン注入されていることが判る。カーボンの注入深さは10keVで100nm付近まで、20keVで160nm、30keVで200nmほどイオン注入されていることが判る。このことはDLC膜形成前の負のパルス電圧が高い程、カーボンはチタン合金基材中の深くまで入り込み傾斜構造が形成されていることが判る。 FIG. 4 shows the results of Auger analysis. The horizontal axis indicates the depth from the DLC film surface, and the origin indicates the DLC film surface. The vertical axis represents the proportion of carbon atoms in the material. It can be seen that a DLC film is formed from the surface to a depth of 330 nm, and the carbon injection layer to the titanium alloy substrate is from 330 nm to around 420 nm to 540 nm. As a result, it can be seen that the higher the implantation energy, the deeper the carbon penetration depth, and the ion implantation into the interior. It can be seen that the carbon implantation depth is about 10 nm at 10 keV, about 160 nm at 20 keV, and about 200 nm at 30 keV. This shows that the higher the negative pulse voltage before the DLC film is formed , the deeper the carbon enters the titanium alloy base material, and the inclined structure is formed .

一方、表面処理したチタン合金表面のダイナミック硬度、スクラッチ密着力と摩擦係数を図5に示す。未処理のチタン合金は硬度320と非常に柔らかいが、DLC膜を成膜することによりいずれも1100以上の硬度を示す。スクラッチ密着力も基材が柔らかいにもかかわらず12N以上の密着力を示すことが判る。また、チタン合金は0.4と非常に高い摩擦係数を示すが、DLC膜によりいずれも0.16以下の低摩擦係数を示した。イオン注入エネルギーとの関係を見ると、高エネルギーでやや硬度が低くなる傾向になることが判った。
さらに、DLC膜厚の均一性を評価した結果、図5に示すように6枚の半導体加工キャリア部材についてそれぞれ9ケ所測定した結果、平均2μmの膜厚に対して、±0.3μmの誤差範囲でDLC成膜が出来ることが判った。
On the other hand, FIG. 5 shows the dynamic hardness, scratch adhesion and friction coefficient of the surface-treated titanium alloy surface . The untreated titanium alloy is very soft with a hardness of 320, but any of them exhibits a hardness of 1100 or more by forming a DLC film . It can be seen that the scratch adhesion also shows an adhesion of 12 N or more despite the soft substrate. Titanium alloys showed a very high friction coefficient of 0.4, but all showed a low friction coefficient of 0.16 or less by the DLC film. Looking at the relationship with ion implantation energy, it was found that the hardness tends to be slightly lower at higher energies.
Further, as a result of evaluating the uniformity of the DLC film thickness, as shown in FIG. 5, as a result of measuring 9 positions on each of the six semiconductor processed carrier members , an error range of ± 0.3 μm with respect to the average film thickness of 2 μm. It was found that DLC film formation was possible.

また、実験例には記載していないが、ガラスエポキシ基材に関しても同様の実験、評価を行った結果、10keVエネルギーで130nm付近までカーボンイオン注入が確認され、さらにアセチレン/トルエンで成膜したDLC膜形成後の物性もチタン合金と同様た表面物性を示すことが判った。このように金属、絶縁物問わずカーボンのパルスイオン注入とそれに続くDLC成膜が不可欠であることが明らかになった。 Although not described in the experimental examples , the same experiment and evaluation were performed on the glass epoxy base material. As a result, carbon ion implantation was confirmed up to about 130 nm with 10 keV energy, and DLC formed with acetylene / toluene. It was found that the physical properties after film formation were similar to those of the titanium alloy. Thus metal, pulsed ion implantation and the DLC deposition followed by carbon regardless of insulating material was found to be essential.

以上、説明したように、本発明に係る表面処理方法を用いて半導体加工キャリア部材にカーボンイオン注入を行い、更にその表面にDLC膜を形成することにより、半導体加工キャリア部材の耐摩耗性、耐食性、耐汚染性に優れたDLC被覆物品及びその表面処理方法を提供できることが判った。As described above, by applying the carbon ion implantation to the semiconductor processing carrier member using the surface treatment method according to the present invention and further forming the DLC film on the surface, the wear resistance and corrosion resistance of the semiconductor processing carrier member are obtained. It has been found that a DLC-coated article excellent in stain resistance and a surface treatment method thereof can be provided.

また、本発明に係る表面処理方法によるDLC被覆物品は、表面硬度が高く、耐摩耗性、耐食性、耐汚染性が優れていることから、半導体産業分野以外のアルミ磁気ディスク基板、ガラス製磁気ディスク基板、フォトマスク用ガラス基板、水晶発振子、光学レンズの研磨、反射鏡等の研磨へも利用可能である。さらに、本発明のカーボンイオン注入+DLC膜形成技術は、耐摩耗性、耐食性、耐汚染性以外に潤滑性、撥水性・離型性も増大させることができ、本発明の用途以外の金属材料やセラミックス材料の表面硬度アップや潤滑性・離型性の機能性向上など工業用セラミックス材料や金属材料成形品等に対しても同様に応用可能である。Further, since the DLC-coated article by the surface treatment method according to the present invention has high surface hardness and excellent wear resistance, corrosion resistance, and contamination resistance, aluminum magnetic disk substrates and glass magnetic disks other than those in the semiconductor industry field It can also be used for polishing substrates, glass substrates for photomasks, crystal oscillators, optical lenses, and reflecting mirrors. Furthermore, the carbon ion implantation + DLC film forming technology of the present invention can increase lubricity, water repellency, and release properties in addition to wear resistance, corrosion resistance, and contamination resistance. The present invention can also be applied to industrial ceramic materials and metal material molded products such as increasing the surface hardness of ceramic materials and improving the functionality of lubricity and releasability.

本発明に係る実施例に用いたプラズマ表面処理装置の概略構成図である。It is a schematic block diagram of the plasma surface treatment apparatus used for the Example which concerns on this invention. SUS304へのカーボンイオン注入+DLC形成後のオージェ分析によるカーボン注入深さとカーボン濃度との関係を示すである。It is a figure which shows the relationship between the carbon implantation depth by the Auger analysis after carbon ion implantation + DLC formation to SUS304, and a carbon concentration. SUS304へのカーボンイオン注入+DLC形成後の硬度、密着力、摩擦係数など物理的変化と膜厚分布を示す表である。It is a table | surface which shows physical changes, such as the hardness after carbon ion implantation + DLC formation to SUS304, adhesion, and a friction coefficient, and film thickness distribution. チタン材へのカーボンイオン注入+DLC形成後のオージェ分析によるカーボン注入深さとカーボン濃度との関係を示すである。It is a figure which shows the relationship between the carbon implantation depth by the Auger analysis after carbon ion implantation + DLC formation to a titanium material, and carbon concentration. チタン材へのカーボンイオン注入+DLC形成後の硬度、密着力、摩擦係数など物理的変化と膜厚分布を示す表である。It is a table | surface which shows physical changes and film thickness distribution, such as the hardness after carbon ion implantation to DLC + DLC formation, adhesive force, and a friction coefficient.

1 半導体キャリア部材
セット架台
3 真空チャンバー
4 排気装置
5 炭化水素ガス導入口
6 有機金属ガス導入口
7 高電圧負パルス電源
8 高周波(RF)電源
9 高電圧用フィードスルー
10 絶縁碍子
11 重畳装置
12 シールドカバー
DESCRIPTION OF SYMBOLS 1 Semiconductor carrier member 2 set mounting frame 3 Vacuum chamber 4 Exhaust device 5 Hydrocarbon gas inlet 6 Organometallic gas inlet 7 High voltage negative pulse power source 8 High frequency (RF) power source 9 High voltage feedthrough 10 Insulator 11 Superposition device 12 Shield cover

Claims (6)

金属部材と、ポリイミド樹脂、ポリアミドイミド樹脂、ポリエーテルエーテルケトン樹脂、ナイロン樹脂、ガラス繊維強化エポキシ樹脂及びカーボン繊維強化エポキシ樹脂の中から選ばれる少なくとも1種の樹脂部材とからなる半導体加工キャリア部材をプラズマ表面処理装置内に設置し、前記プラズマ表面処理装置内に炭化水素系ガスを導入して、そのガス圧力を0.1〜10Paに保持し、前記半導体加工キャリア部材に高周波電力を給電して放電プラズマを発生させ、前記半導体加工キャリア部材にパルス電圧1〜50kV、周波数100〜5000サイクルの負の高電圧パルスを印加して、前記半導体加工キャリア部材の表面にカーボンイオンを注入し、その表面にダイヤモンドライクカーボン層を形成することを特徴とする半導体加工キャリア部材の表面処理方法。 A semiconductor processing carrier member comprising a metal member and at least one resin member selected from polyimide resin, polyamideimide resin, polyetheretherketone resin, nylon resin, glass fiber reinforced epoxy resin and carbon fiber reinforced epoxy resin Installed in a plasma surface treatment apparatus, introduces a hydrocarbon-based gas into the plasma surface treatment apparatus, maintains the gas pressure at 0.1 to 10 Pa, and feeds high-frequency power to the semiconductor processing carrier member A discharge plasma is generated, a negative high voltage pulse having a pulse voltage of 1 to 50 kV and a frequency of 100 to 5000 cycles is applied to the semiconductor processed carrier member, and carbon ions are implanted into the surface of the semiconductor processed carrier member. and forming a diamond-like carbon layer on a semiconductor The surface treatment method of engineering the carrier member. 前記炭化水素系ガスとして、メタン、アセチレン、ベンゼン、トルエン、シクロヘキサン、クロロベンゼン、二フッ化炭素、四フッ化炭素からなるガス群から選択される少なくとも1種類のガスを使用してカーボンイオンを注入し、その表面にダイヤモンドライクカーボン層を形成することを特徴とする請求項1に記載の半導体加工キャリア部材の表面処理方法。 As the hydrocarbon gas, carbon ions are injected using at least one gas selected from the gas group consisting of methane, acetylene, benzene, toluene, cyclohexane, chlorobenzene, carbon difluoride, and carbon tetrafluoride. 2. A surface processing method for a semiconductor processing carrier member according to claim 1, wherein a diamond-like carbon layer is formed on the surface of the semiconductor processing carrier member. 前記半導体加工キャリア部材へ印加する前記負の高電圧パルスの電圧が10kV〜30kVであって、カーボンイオン注入時間が30〜120分であることを特徴とする請求項1及び2に記載の半導体加工キャリア部材の表面処理方法。 The voltage of the negative high voltage pulse applied to the semiconductor processing carrier member is a 10KV~30kV, semiconductor processing according to claim 1 and 2 carbon ion implantation time is characterized in that 30 to 120 minutes A surface treatment method for a carrier member. 前記金属部材が、ステンレス鋼又はチタン合金であることを特徴とする請求項1から3のいずれかに記載の半導体加工キャリア部材の表面処理方法。The surface treatment method for a semiconductor processing carrier member according to any one of claims 1 to 3, wherein the metal member is stainless steel or a titanium alloy . 前記半導体加工キャリア部材表面にカーボンイオン注入後、継続して少なくとも厚さ1μmのダイヤモンドライクカーボン層を形成し、その表面の摩擦係数を0.18以下にしたことを特徴とする請求項2から4のいずれかに記載の半導体加工キャリア部材の表面処理方法。After carbon ion implantation into the semiconductor processing carrier member surface, to continue to form a diamond-like carbon layer of a thickness of at least 1 [mu] m, from claim 2, characterized in that the friction coefficient of the surface to 0.18 4 The surface treatment method of the semiconductor processing carrier member in any one of. 請求項1から5のいずれかに記載の表面処理方法を用いて製造した半導体加工キャリア物品。The semiconductor processing carrier article manufactured using the surface treatment method in any one of Claim 1 to 5 .
JP2005166315A 2005-06-07 2005-06-07 Surface processing method of semiconductor processing carrier member and article thereof Active JP4920202B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005166315A JP4920202B2 (en) 2005-06-07 2005-06-07 Surface processing method of semiconductor processing carrier member and article thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005166315A JP4920202B2 (en) 2005-06-07 2005-06-07 Surface processing method of semiconductor processing carrier member and article thereof

Publications (2)

Publication Number Publication Date
JP2006342364A JP2006342364A (en) 2006-12-21
JP4920202B2 true JP4920202B2 (en) 2012-04-18

Family

ID=37639542

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005166315A Active JP4920202B2 (en) 2005-06-07 2005-06-07 Surface processing method of semiconductor processing carrier member and article thereof

Country Status (1)

Country Link
JP (1) JP4920202B2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007002268A (en) * 2005-06-21 2007-01-11 Plasma Ion Assist Co Ltd Surface treatment method for polishing member, and article obtained thereby
KR100761446B1 (en) * 2007-06-04 2007-09-27 에스엠엘씨디(주) DLC coating device for wafer carrier and DLC coating method for wafer carrier
JP5144562B2 (en) * 2008-03-31 2013-02-13 日本碍子株式会社 DLC film mass production method
US9051639B2 (en) * 2011-09-15 2015-06-09 Amedica Corporation Coated implants and related methods
JP6978057B2 (en) * 2017-12-27 2021-12-08 株式会社プラズマイオンアシスト Separator manufacturing method for fuel cells and film forming equipment
CN110983300B (en) * 2019-12-04 2023-06-20 江苏菲沃泰纳米科技股份有限公司 Coating equipment and application thereof

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4134315B2 (en) * 2003-01-14 2008-08-20 独立行政法人産業技術総合研究所 Carbon thin film and manufacturing method thereof
JP4653964B2 (en) * 2003-04-08 2011-03-16 株式会社栗田製作所 DLC film forming method and DLC film-formed product
JP2004315876A (en) * 2003-04-15 2004-11-11 Ion Engineering Research Institute Corp Die for molding magnesium having sliding resistance improved, and surface treatment method thereof

Also Published As

Publication number Publication date
JP2006342364A (en) 2006-12-21

Similar Documents

Publication Publication Date Title
EP1220311B1 (en) Electrostatic chuck and method of manufacturing the same
US4260647A (en) Method of depositing an abrasive layer
JP6103040B2 (en) Manufacturing method of coated tool
CA2846434C (en) Stripping process for hard carbon coatings
TWI511801B (en) Method of fixing water-shedding coating onto amorphous carbon film
JPH1192935A (en) Wear resistant hard carbon coating
JP4920202B2 (en) Surface processing method of semiconductor processing carrier member and article thereof
US20100105296A1 (en) Ultra smooth face sputter targets and methods of producing same
US5279866A (en) Process for depositing wear-resistant coatings
JP2007002268A (en) Surface treatment method for polishing member, and article obtained thereby
WO1996028270A1 (en) Guide bush and method for forming a hard carbon film on an internal circumferential surface of said bush
JP4990959B2 (en) Thick film DLC coated member and method for manufacturing the same
JP2008174790A (en) Surface treatment method for metal fiber textile, and article obtained thereby
JP2018048393A (en) Method for coating conductive component, and coating for conductive component
WO2016017375A1 (en) Method for manufacturing a coated tool
JP2005048252A (en) Carbon film-coated article having lubricity and releasing property, and surface treatment method therefor
JP3034241B1 (en) Method of forming high hardness and high adhesion DLC film
CN1275790A (en) Surface treatment method and equipment
KR100765630B1 (en) Automotive wiper blades and manufacturing method thereof
JP3355892B2 (en) Method of forming carbon film
JP5245103B2 (en) Thick film DLC coated member and method for manufacturing the same
JP5082116B2 (en) Method for manufacturing non-metallic carrier for holding object to be polished
JP3016748B2 (en) Method for depositing carbon-based high-performance material thin film by electron beam excited plasma CVD
KR101192321B1 (en) DLC coating method and apparatus therefor
EP0651385A2 (en) Method for producing diamond-like carbon film and tape driving apparatus

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20080507

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080522

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20100303

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110329

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110511

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120110

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120201

R150 Certificate of patent or registration of utility model

Ref document number: 4920202

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150210

Year of fee payment: 3

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250