JP4891869B2 - A / D conversion unit - Google Patents

Description

  The present invention relates to an A / D conversion unit.

  Conventionally, an input analog signal such as current or voltage is converted into a digital value by an analog-digital conversion circuit, and the digital value is substituted into a linear linear expression indicating the relationship between the digital value and a physical quantity such as current or voltage. An A / D conversion unit that obtains an output value indicating the magnitude of a physical quantity to be measured is provided (see, for example, Patent Document 1).

  FIG. 16A is a block diagram showing a schematic configuration of a conventional A / D conversion unit 1, a microcomputer 11, an analog-digital conversion circuit (hereinafter abbreviated as A / D conversion circuit) 12, and a RAM 13. And a flash memory (hereinafter referred to as FROM) 14 and a DIP switch (hereinafter referred to as DIPSW) 15 as main components. As shown in FIG. 16B, the DIPSW 15 is composed of, for example, a 4-bit dip switch, the first bit is a switch for switching the operation mode of the microcomputer 11 to the normal mode or the calibration mode, and the second bit is a reference digital value. A switch for setting whether or not, a third bit is a switch for setting whether or not to register a reference digital value in the FROM 14, and a fourth bit is a switch for setting whether or not to delete the reference digital value registered in the FROM 14 is there.

  If there is no error in the A / D conversion by the A / D conversion circuit 12, the signal level Y of the analog signal input to the A / D conversion circuit 12 as shown by the solid line a in FIG. The relationship with the digital value X is represented by a standard linear equation of Y = aX incorporated in advance in the microcomputer 11. For example, if the input span is 0 to 5V, the digital value X is 0 when the analog signal Y is 0V, and the digital value X is 2000 when the analog signal Y is 5.0V, then Y = X / 400. The signal level of the analog signal Y is obtained from the output of the A / D conversion circuit 12 using this linear linear equation.

  However, in practice, there are variations in the individual parts used in the A / D conversion circuit 12, so that an error occurs between the analog signal and the analog amount indicated by the converted digital value. The relationship between the signal level Y of the signal and the converted digital value X is expressed by the following equation.

Y = a ′ × X + b (1)
For example, as indicated by a dotted line b in FIG. 17, when the analog signal Y is 0 (V), the digital value X is 300, and when the analog signal Y is 5.0 (V), the digital value X is 1800, the slope a = 1/300, intercept b = -1, and the linear equation is Y = X / 300-1.

  As described above, when there is a variation in the A / D conversion by the A / D conversion circuit 12, the error for A / D conversion is calibrated instead of the linear linear expression built in the microcomputer 11 as a standard. It was necessary to obtain a linear equation (the above equation (1)).

  Hereinafter, a procedure for obtaining a linear equation for calibrating the conversion error in the conventional A / D conversion unit 1 will be described with reference to the flowchart of FIG. When power is turned on to the A / D conversion unit (S61), the microcomputer 11 executes a built-in program and confirms the first bit of the DIPSW 15 (S62). If the first bit switch is OFF, the microcomputer 11 operates in a normal mode (a mode in which an input analog value is converted into a digital value and output). If the first bit switch is ON, the microcomputer 11 operates. Operates in a calibration mode to obtain a linear equation for calibration.

  When the linear linear calibration process is performed at the start of use of the A / D conversion unit, the user turns on the power with the first bit of the DIPSW 15 turned ON, and the operation of the microcomputer 11 is determined as a result of the determination in S52. Switch to calibration mode. In the calibration mode, the microcomputer 11 first confirms the second bit of the DIPSW 15 (S63), and if the switch of the second bit is set to ON, acquires the output of the A / D conversion circuit 12 as a reference digital value. After executing the processing routine (S66), the process returns to step S62. If the second bit switch is set to OFF, the microcomputer 11 checks the third bit of the DIPSW 15 (S64), and if the third bit switch is set to ON, registers the reference digital value. After executing the processing routine (S67), the process returns to step S62. If the third bit switch is set to OFF, the microcomputer 11 checks the fourth bit of the DIPSW 15 (S65). If the fourth bit switch is set to OFF, the microcomputer 11 returns to step S62. If the fourth bit switch is set to ON, a processing routine for erasing the reference digital value is executed (S68), and the process returns to step S62. Thus, when executing the calibration mode, the user first executes the acquisition routine with the second bit of the DIP switch turned on and the third and fourth bits turned off, and after acquiring the reference digital value, The third bit of the DIP switch is turned on and the second and fourth bits are turned off to execute the registration routine, and the fetched reference digital value is registered in the FROM 14. In the calibration mode, when the user turns on the fourth bit of the DIP switch and turns off the second and third bits, the erasing routine is executed, and the reference digital value registered in the FROM 14 is erased.

  Here, the reference digital value acquisition routine, registration routine, and erasure routine will be described with reference to FIGS.

  FIG. 19 is a flowchart of a processing routine for acquiring a reference digital value, and two outputs D0 and D1 are captured as the reference digital value. The analog signal levels corresponding to the outputs D0 and D1 are determined in advance. For example, the output D0 is an output when the analog signal is 0.0V, and the output D1 is an output when the analog signal is 5.0V. When the microcomputer 11 starts the acquisition routine, the microcomputer 11 reads the output (digital value) from the A / D conversion circuit 12 (S81), determines whether or not the reference digital value D0 is cleared (S82), and is cleared. If so, the acquired digital value is set as the reference digital value D0 (S83), and the acquisition routine is terminated. On the other hand, if the reference digital value D0 is not cleared in the determination of S82, the microcomputer 11 determines whether or not the reference digital value D1 is cleared (S84). The reference digital value D1 is set (S85), and the acquisition routine is terminated. On the other hand, if the reference digital value D1 is not cleared in the determination of S84, the microcomputer 11 determines that the acquisition of the reference digital values D0 and D1 has been completed, and ends the acquisition routine. When executing the acquisition routine, the user applies an analog signal corresponding to the reference digital value D0 or D1 to the input terminal of the A / D conversion circuit 12 before turning on the second bit of DIPSW15. For example, in a state where an analog signal corresponding to the reference digital value D0 is input, the reference digital value D0 is acquired by executing the above acquisition routine, and thereafter, an analog signal corresponding to the reference digital value D1 is input. The reference digital value D1 is captured by executing the acquisition routine.

  20A shows a flowchart of a processing routine for registering the reference digital values D0 and D1, FIG. 20B shows a memory map in the initial state of the FROM 14, and FIG. 20C shows one data in the FROM 14. A memory map in a written state is shown. In the figure, ○ indicates the address (start address) in which the data is not written and the address number is the smallest among the addresses 14a of the FROM 14, and the hatched address indicates the address where the data has been written. . When the microcomputer 11 starts the registration routine, as shown in FIG. 20B, the microcomputer 11 erases the data in the FROM 14 (S86), moves the write pointer of the FROM 14 to the head address (S87), As shown in c), the reference digital values D0 and D1 acquired in the acquisition routine are written in the FROM 14 as one data (S88), and the registration routine is terminated.

  FIG. 21A shows a flowchart of a processing routine for deleting the reference digital values D0 and D1, FIG. 21B shows a memory map of the FROM 14, and “◯” in the figure shows the leading address of the FROM 14. When the microcomputer 11 starts the erase routine, the microcomputer 11 erases the data stored in the FROM 14 (S89), clears the reference digital values D0 and D1 (S90), and ends the erase routine.

  When the processing in the calibration mode is completed and the user turns OFF the first bit of DIPSW 15, the microcomputer 11 switches the operation mode to the normal mode as a result of the determination in S62 of FIG. 18, and the reference digital value D0, A processing routine for setting a linear expression using D1 is executed (S69).

  22A is a flowchart of a processing routine for setting a linear equation, FIG. 22B is a memory map in the initial state of the FROM 14, and FIG. 22C is a memory map in which one data is written in the FROM 14. Respectively. When the microcomputer 11 starts a processing routine for setting a linear equation, it checks the presence or absence of data written in the FROM 14 (S91), and if there is write data as shown in FIG. Is moved to the head address (S92), one data is read out from the FROM 14 to be the reference digital values D0 and D1, and the reference digital values D0 and D1 are stored in the RAM 13 (S93). In the microcomputer 11, the slope a ′ and intercept b of the linear linear equation are obtained by calculation from the values of the reference digital values D 0 and D 1 and the signal level of the corresponding analog signal, and then the analog-digital conversion circuit 51 A linear equation for obtaining the signal level of the analog signal from the output is set (S94), and the processing routine is terminated. As a result of the determination in S91, if there is no write data as shown in FIG. 22B, the microcomputer 11 sets a primary linear equation using a standard linear equation built in beforehand (S95), The processing routine ends.

When the linear linear type setting process (S69) is completed in the normal mode, the microcomputer 11 determines whether or not a predetermined calculation period (sampling period) has been reached (S70). The intermediate output value (digital value) is taken from the / D conversion circuit 12 (S71), the intermediate output value is substituted into the linear equation set in S69, and the signal level of the analog signal is obtained by calculation (S72) and then calculated. The signal level (analog value) is output to the external device (S73).
Japanese Patent Laying-Open No. 2005-57468 (paragraphs [0007]-[0009] and FIG. 1)

  In the A / D conversion unit described above, the slope and intercept of the linear linear equation used for calculating the signal level (magnitude) of the analog quantity input from the intermediate output value (digital value) of the A / D conversion circuit 12 are obtained. When obtaining, the DIPSW 15 is operated to switch the operation mode to the calibration mode, and the DIPSW 15 is operated to execute each processing routine in the calibration mode. Therefore, it is necessary to mount a switch such as the DIPSW 15 for a user to operate by hand on the substrate of the A / D conversion unit, and such a switch is formed to a size that can be operated by a human hand. Therefore, there was a limit to the miniaturization of the substrate.

  The present invention has been made in view of the above problems, and an object thereof is to provide a small A / D conversion unit capable of correcting variations in A / D conversion.

  In order to achieve the above object, an invention according to claim 1 is an analog-to-digital converter that performs A / D conversion of an analog signal to obtain an intermediate output value having a magnitude proportional to the signal level of the analog signal; An arithmetic processing unit that calculates the signal level of an analog signal by substituting the intermediate output value into a linear equation that indicates the relationship between the signal level and the intermediate output value, and a RAM that temporarily stores the operation data of the arithmetic processing unit The arithmetic processing unit has communication means for communicating with the outside, and operates in a calibration mode for obtaining a linear linear slope and intercept, an analog signal of a predetermined level is supplied to the analog-digital conversion unit. When the reference digital value acquisition command transmitted from the external device is received via the communication means in the input state, the intermediate output value at the time of command reception is stored in the RAM as the reference digital value. In addition, the reference digital value is transmitted as a response signal from the communication means to the external device, and the slope and intercept of the linear linear equation are obtained based on at least two reference digital values and the signal level of the analog signal corresponding to the reference digital value. It is characterized by calculating.

  According to a second aspect of the present invention, in the first aspect of the invention, there is provided a FROM for storing a reference digital value, and the arithmetic processing unit receives a reference digital value registration command transmitted from an external device after receiving the reference digital value acquisition command. When received via the communication means, the reference digital value stored in the RAM is stored in the FROM, and the reference digital value is returned as a response signal from the communication means to the external device.

  According to a third aspect of the present invention, in the second aspect of the present invention, when the arithmetic processing unit receives the reference digital value erasure command transmitted from the external device via the communication means, the reference digital value stored in the RAM and FROM. 3. The A / D conversion unit according to claim 2, wherein after the data is erased, data indicating completion of data erase is returned as a response signal from the communication means to the external device.

  According to a fourth aspect of the present invention, in the first aspect of the invention, the arithmetic processing unit performs the process of erasing the data in the FROM before writing the reference digital value into the FROM only when there is no free space in the FROM. And

  According to a fifth aspect of the present invention, in any one of the first to fourth aspects of the present invention, the arithmetic processing unit receives, via the communication means, a primary linear expression read command for calculating a linear expression that is transmitted from an external device. Then, based on the plurality of reference digital values stored in the RAM and the signal level of the analog signal corresponding to each reference digital value, the slope and intercept of the linear linear equation are calculated, and the calculated slope and intercept are used as response signals. It is characterized in that it is returned from the communication means to the external device.

  The invention of claim 6 is the invention of any one of claims 1 to 5, wherein signal level information of an analog signal corresponding to the reference digital value is added to the reference digital value acquisition command transmitted from the external device, The arithmetic processing unit calculates the slope and intercept of the linear equation based on the signal level information added to the reference digital value acquisition command and the reference digital value acquired when the command is received.

  According to a seventh aspect of the present invention, in any one of the first to sixth aspects, the signal level of the analog signal input to the analog-digital conversion unit in the calibration mode is switched in at least three ways, and the signal level of the analog signal is changed. Each time switching is performed, a reference digital value acquisition command is transmitted from the external device, and the arithmetic processing unit acquires at least three reference digital values acquired when receiving the reference digital value acquisition command and an analog signal corresponding to each reference digital value On the basis of the signal level, a slope and an intercept of a linear linear expression indicating the relationship between the signal level of the analog signal and the intermediate output value are obtained for each section of at least three reference digital values.

  According to the first aspect of the present invention, when the arithmetic processing unit is operating in the calibration mode and the analog signal of a predetermined level is input to the analog-digital conversion unit, a reference digital value acquisition command from the external device is communicated. The intermediate output value at the time of receiving the command is stored in the RAM as a reference digital value, and the primary output is based on at least two reference digital values and the signal level of the analog signal corresponding to the reference digital value. Since the linear inclination and intercept are calculated, conversion errors due to variations in the analog-digital conversion unit can be reduced. Therefore, there is no need to switch to the calibration mode or acquire the reference digital value using a mechanical switch such as a DIP switch as in the conventional A / D conversion unit, and a mechanical switch such as a DIP switch. Therefore, a small A / D conversion unit capable of correcting variations in A / D conversion can be realized. In addition, the arithmetic processing unit returns the reference digital value acquired at the time of receiving the reference digital value acquisition command to the external device, so that the reference digital value used to obtain the slope and intercept of the linear linear equation is set on the external device side. Whether or not the linear linear calibration can be satisfactorily performed can be estimated based on whether or not the reference digital value matching the signal level of the analog signal can be acquired. Therefore, if the reference digital value does not match the signal level of the corresponding analog signal, an appropriate reference digital value can be acquired by resending the reference digital value acquisition command on the external device side, and the calibration mode Since it is possible to prevent a situation in which calibration cannot be performed normally after completion and the calibration is performed again, it is possible to reduce the time required for the linear linear calibration work.

  According to the second aspect of the present invention, the arithmetic processing unit returns the reference digital value stored in the FROM to the external device when the reference digital value registration command is received. There is an effect that it can be estimated at the time of calibration whether or not the linear linear calibration can be satisfactorily performed based on whether or not the reference digital value matching the signal level of the analog signal can be acquired.

  According to the invention of claim 3, when the arithmetic processing unit erases the reference digital value stored in the RAM and the FROM when receiving the reference digital value erase command, the data indicating the completion of the erase is returned to the external device. Therefore, it can be confirmed on the spot whether or not the reference digital values stored in the RAM and FROM can be normally erased on the external device side. Accordingly, when the data indicating the completion of erasure cannot be received on the external device side, the reference digital value stored in the RAM and FROM can be surely erased by transmitting the reference digital value erasure command again.

  According to the fourth aspect of the present invention, when there is a free space in the FROM, the process of deleting the data in the FROM is not performed, so that the time required for writing the data is reduced by omitting the time for deleting the data. be able to. Since the life of the FROM depends on the number of times of erasing, the life of the FROM can be extended by reducing the number of times of erasing.

  According to the invention of claim 5, since the arithmetic processing unit returns the result of calculating the slope and intercept of the linear linear equation to the external device, the arithmetic processing unit uses any linear linear equation to determine the analog signal. It is possible for the external device side to grasp whether the signal level is obtained. Therefore, when the slope and intercept of the primary linear expression used by the arithmetic processing unit are inappropriate, a reference digital value acquisition command, a reference digital value registration command, or a primary linear expression read command is sent from the external device side to the A / D. By transmitting to the conversion unit, the process of calculating the slope and intercept of the linear equation can be executed again.

  According to the sixth aspect of the present invention, the intercept and slope of the linear equation can be obtained by using the signal level information of the analog signal sent together with the reference digital value acquisition command from the external device and the reference digital value acquired when the command is received. Since it can be calculated, the signal level of the analog signal given when acquiring the reference digital value can be changed in the middle according to the input / output specifications and the signal level of the analog signal to be measured. An optimal linear linear equation can be set for each / D conversion unit according to the usage pattern.

  Here, when the relationship between the signal level of the analog signal and the intermediate output value cannot be expressed by a linear expression, the linear output is obtained by substituting the intermediate output value into one primary linear expression to obtain the signal level of the analog signal. Although an error occurs between the signal level calculated using the actual signal level, the signal level of the analog signal and the intermediate output value for each section of at least three reference digital values. The slope and intercept of the linear linear equation that shows the relationship between and the signal level of the analog signal is calculated from the intermediate output value using the linear linear equation obtained for each section, so calculate using the linear linear equation The error between the measured signal level and the actual signal level can be reduced.

  Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1)
FIG. 1 is a block diagram showing a schematic configuration of an A / D conversion unit 1 according to the present embodiment. A microcomputer 11 as an arithmetic processing unit, an analog-digital conversion circuit 12 (analog-digital conversion unit), a RAM 13, The microcomputer 11 includes a FROM 14 as a main configuration, and the microcomputer 11 includes a communication port 11a (communication means) that communicates with the control device 2 that is an external device via the expansion bus 3. In the A / D conversion unit 1, the input analog signal is A / D converted by the analog-digital conversion circuit 12 to obtain an intermediate output value having a magnitude proportional to the signal level of the analog signal, and then the microcomputer 11. However, by substituting the intermediate output value input from the analog-digital conversion circuit 12 into a linear equation representing the relationship between the intermediate output value and the signal level of the analog signal, the signal level of the analog signal is obtained by calculation, Data of the signal level obtained by the calculation is transmitted from the communication port 11a to the control device 2 (external device) such as PLC via the expansion bus 3. If the signal level of the analog signal input to the analog-digital conversion circuit 12 is Y and the intermediate output value (digital value) after conversion is X, the above linear expression is expressed as Y = a × X + b. .

  The operation of the A / D conversion unit 1 will be described with reference to the flowchart of FIG. When the power is turned on to the A / D conversion unit 1 (S1), the microcomputer 11 executes a built-in program to determine whether or not a command from the control device 2 is received within 2 seconds after the power is turned on. (S2). Here, when a command is received from the control device 2 within 2 seconds after the power is turned on, the operation mode of the microcomputer 11 is switched to a calibration mode for obtaining a linear linear equation (inclination a and intercept b) for calibration, When no command is received, the mode is switched to the normal mode in which A / D conversion of the input analog signal is performed.

  First, the operation in the normal mode will be described. If it is determined in S2 that the command has not been received, the microcomputer 11 sets a linear equation whose slope and intercept are calculated in the calibration mode described later (S13), and then at a predetermined calculation cycle (sampling cycle). It is determined whether or not it has been reached (S14), and if the calculation period has been reached, an intermediate output value (digital value) is taken from the analog-digital conversion circuit 12 (S15), and the linear linear equation set in S13 is obtained in S15. After the obtained intermediate output value is substituted and the signal level (analog value) of the analog signal is obtained by calculation (S16), the calculated signal level is output to the control device 2 via the expansion bus 3 (S17). At this time, the control device 2 performs feedback control and data accumulation based on the signal level data input from the A / D conversion unit 1 via the expansion bus 3. When the output (current value or voltage value) of the temperature sensor is input as an analog signal to the D conversion unit 1, the control device 2 performs temperature control, accumulation of temperature data, and the like based on the signal level of the temperature sensor. Can do.

  Next, the operation in the calibration mode will be described. If it is determined in S2 that the command has been received, the microcomputer 11 determines whether or not the received command is a reference digital value acquisition command (S3). If the command is a reference digital value acquisition command, the microcomputer 11 determines the reference digital value. A processing routine to be acquired is executed (S7). If it is not a reference digital value acquisition command, the microcomputer 11 determines whether or not the received command is a reference digital value registration command (S4), and if it is a reference digital value registration command, registers the reference digital value. A processing routine is executed (S8). If it is not a reference digital value registration command, the microcomputer 11 determines whether or not the received command is a reference digital value deletion command (S5). If it is a reference digital value deletion command, the microcomputer 11 deletes the reference digital value. A processing routine is executed (S9). If it is not a reference digital value erasure command, the microcomputer 11 determines whether or not the received command is a primary linear read command (S6), and if it is a primary linear read command, calculates a primary linear equation. A processing routine is executed (S10), and if it is not a linear linear read command, the process returns to step S3 and is repeated. When each processing routine is executed in steps S7 to S10, the microcomputer 11 creates a response signal (response) to the received command (S11), and returns it to the control device 2 via the communication port 11a.

  Here, a reference digital value acquisition routine, a registration routine, an erasure routine, and a linear linear calculation routine will be described with reference to FIGS.

  FIG. 3 is a flowchart of a processing routine for acquiring a reference digital value. In this embodiment, two intermediate output values D0 and D1 are taken in as reference digital values. The analog signal levels corresponding to the intermediate output values D0 and D1 are determined in advance. For example, the intermediate output value D0 is an intermediate output when the analog signal is 0.0V, and the intermediate output value D1 is an intermediate output when the analog signal is 5.0V. Value. It is assumed that an analog signal of a predetermined level is input to the analog-digital conversion circuit 12 before transmitting a reference digital value acquisition command from the control device 2. When the microcomputer 11 starts the acquisition routine, the microcomputer 11 reads the intermediate output value (digital value) from the analog-digital conversion circuit 12 (S21), and determines the type of the reference digital value corresponding to the received reference digital value acquisition command. (S22). That is, information indicating the type of reference digital value (D0 or D1) to be acquired is added to the reference digital value acquisition command. If the type of reference digital value is D0, the microcomputer 11 reads the intermediate value read in S21. The output value is stored in the RAM 13 as the reference digital value D0 (S23), and the processing routine is terminated. On the other hand, if the type of the reference digital value is D1, the microcomputer 11 stores the intermediate output value read in S21 in the RAM 13 as the reference digital value D1 (S24), and ends the processing routine. When the microcomputer 11 completes the reference digital value acquisition routine, it returns the reference digital value stored in the RAM 13 as a response signal from the communication port 11a to the control device 2 (S11, S12).

  Next, a processing routine for registering the reference digital values D0 and D1 stored in the RAM 13 in the FROM 14 will be described based on the flowchart shown in FIG. 4B is a memory map of the FROM 14 in the initial state, FIG. 4C is a memory map in which one data is written, FIG. 4D is a memory map in which two data are written, FIG. 6E is a memory map in a state where 6 data are written. Among the plurality of addresses 14a, hatched addresses indicate written addresses, and ◯ indicates an address number among unwritten addresses. Indicates the smallest address, and ● indicates the address with the largest address number among the written addresses. When the microcomputer 11 starts the registration routine, the microcomputer 11 determines whether or not the FROM 14 has a free space (S31), and when there is a free space as shown in FIGS. 4B to 4D, The write pointer of the FROM 14 is moved to the address (o address) with the smallest address number among the unwritten addresses (S32), the reference digital values D0 and D1 are written as one data in the FROM 14 (S34), and the write routine is executed. finish. As a result of the determination in S31, if there is no free space in the FROM 14 as shown in FIG. 4 (e), the microcomputer 11 erases all the data in the FROM 14 (S33), then proceeds to S32 and is similar to the above. Process. When the microcomputer 11 finishes the reference digital value registration routine, the microcomputer 11 returns the reference digital value stored in the FROM 14 as a response signal from the communication port 11a to the control device 2 (S11, S12).

  A processing routine for erasing the reference digital value stored in the RAM and FROM will be described with reference to the flowchart of FIG. FIG. 5B shows a memory map of the FROM 14, and ◯ shows the address with the smallest address number among unwritten addresses. When the microcomputer 11 starts the erasing routine, as shown in FIG. 5B, after all the data in the FROM 14 is erased (S41), the reference digital values D0 and D1 stored in the RAM 13 are erased (S42). Then, the erase routine is terminated. When the microcomputer 11 completes the reference digital value erasing routine, it returns data indicating completion of erasing the reference digital value from the communication port 11a to the control device 2 as a response signal (S11, S12).

  Next, a processing routine for calculating a linear equation will be described with reference to the flowchart of FIG. 6B to 6E show the memory maps of the FROM 14, respectively, the hatched addresses indicate the addresses that have been written, the circles indicate the addresses that have the smallest address number among the unwritten addresses, ● indicates the address with the largest address number among the written addresses. When the microcomputer 11 starts the primary linear equation calculation routine, it first determines the presence or absence of data written in the FROM 14 (S51). Here, as shown in FIGS. 5C to 5E, if there is write data in the FROM 14, the microcomputer 11 moves the read pointer of the FROM 14 to the written address with the largest address number ( S52) One data is read out from the FROM 14 and set as reference digital values D0 and D1 (S53). The read reference digital values D0 and D1 and signal levels A0 and A1 of analog signals corresponding to the respective reference digital values D0 and D1 Is used to calculate the slope a = (A0−A1) / (D0−D1) and the intercept b = (A0 · D1−A1 · D0) / (D1−D0) in the linear equation Y = a × X + b. Then, after storing in the RAM 13 (S54), the processing routine is terminated. As a result of the determination in S51, if there is no write data in the FROM 14 as shown in FIG. 5B, the microcomputer 11 sets a standard inclination and intercept set in advance to a linear equation (S55). The processing routine is terminated. Then, the microcomputer 11 returns the slope of the primary calculation formula and the set value of the intercept as a response signal from the communication port 11a to the control device 2 (S11, S12).

  The operation of the microcomputer 11 in the calibration mode is as described above. While the microcomputer 11 is operating in the calibration mode, the reference digital signal from the control device 2 is input in a state where an analog signal of a predetermined level is input to the analog-digital conversion circuit 12. When a value acquisition command is received via the communication port 11a, the intermediate output value at the time of command reception is stored in the RAM 13 as a reference digital value. In the linear linear setting routine, the microcomputer 11 calculates the slope and intercept of the linear linear expression based on at least two reference digital values and the signal level of the analog signal corresponding to the reference digital value. Therefore, conversion errors due to variations in the analog-digital conversion circuit 12 can be reduced. Therefore, there is no need to switch to the calibration mode or acquire the reference digital value using a mechanical switch such as a DIP switch as in the conventional A / D conversion unit, and a mechanical switch such as a DIP switch. Therefore, a small A / D conversion unit 1 capable of correcting variations in A / D conversion can be realized. Furthermore, since the microcomputer 11 returns the reference digital value acquired at the time of receiving the reference digital value acquisition command to the control device 2, the reference digital value used for obtaining the slope or intercept of the linear linear equation is used as the control device 2. It can be confirmed at the time of calibration whether or not the linear linear calibration can be satisfactorily performed based on whether or not the reference digital value matching the signal level of the analog signal has been acquired. Therefore, when the reference digital value does not match the signal level of the corresponding analog signal, an appropriate reference digital value can be acquired by retransmitting the reference digital value acquisition command on the control device 2 side, and the calibration mode Therefore, it is possible to prevent a situation in which the calibration of the linear linear type is not normally performed after the completion of the process and the calibration is performed again. Therefore, the time required for the calibration of the linear linear type can be shortened.

  Further, since the microcomputer 11 returns the reference digital value stored in the FROM 14 to the control device 2 when the reference digital value registration command is received, the reference digital value stored in the FROM 14 can be confirmed on the control device 2 side. Whether or not the linear linear calibration can be satisfactorily performed can be estimated at the time of calibration depending on whether or not the reference digital value matching the signal level of the analog signal has been acquired.

  Furthermore, when the microcomputer 11 erases the reference digital value stored in the RAM 13 and the FROM 14 upon reception of the reference digital value erase command, it returns data indicating completion of the erase to the control device 2, so that the external device side 2 Thus, it can be confirmed on the spot whether or not the reference digital values stored in the RAM 13 and the FROM 14 have been successfully erased. Therefore, on the control device 2 side, when the data indicating the completion of erasure cannot be received, the reference digital value stored in the RAM 13 and the FROM 14 can be reliably erased by transmitting the reference digital value erasure command again.

  Further, the microcomputer 11 performs the process of erasing the data in the FROM 14 before writing the reference digital value in the FROM 14 based on the reference digital value registration command transmitted from the control device 2 only when the FROM 14 has no free space. If the FROM 14 has a free space, the data in the FROM 14 is not erased. Therefore, the time for erasing data can be saved and the time required for data writing can be shortened. Further, since the life of the FROM 14 depends on the number of times of erasing, the life of the FROM 14 can be extended by reducing the number of times of erasing.

  Further, since the microcomputer 11 returns the result of calculating the slope and intercept of the linear linear equation after executing the linear linear equation setting routine, how the microcomputer 11 of the A / D conversion unit 1 is operated. It is possible to grasp on the control device 2 side whether the signal level of the analog signal is obtained using a simple linear equation. Therefore, when the slope and intercept of the linear linear expression used by the A / D conversion unit 1 are inappropriate, a reference digital value acquisition command, a reference digital value registration command, or a linear linear readout command from the control device 2 side. Is transmitted to the A / D conversion unit 1, the process of calculating the slope and intercept of the linear equation can be executed again.

(Embodiment 2)
A second embodiment of the present invention will be described with reference to FIGS. Since the configuration of the A / D conversion unit 1 is the same as that of the first embodiment, common constituent elements are denoted by the same reference numerals and description thereof is omitted.

  In the first embodiment, the signal level of the analog signal input to the analog-to-digital conversion circuit 12 when the reference digital value is acquired is determined in advance. In the present embodiment, the signal level of the analog signal is arbitrarily set. The signal level information of the analog signal applied when acquiring the reference digital value is transmitted together with the reference digital value acquisition command from the control device 2 to the A / D conversion unit 1, and the A / D is transmitted. In the microcomputer 11 of the conversion unit 1, the slope and intercept of the linear linear expression are based on the signal level information added to the reference digital value acquisition command and the reference digital value acquired from the analog-digital conversion circuit 12 when the command is received. Is calculated.

  Hereinafter, the operation of the A / D conversion unit 1 of the present embodiment will be described with reference to the flowcharts of FIGS. Since operations other than the reference digital value acquisition routine, registration routine, deletion routine, and linear linear setting routine are the same as those in the first embodiment, description of common operations is omitted, and only different operations are described below. explain.

  FIG. 7 is a flowchart of a processing routine for acquiring a reference digital value. In this embodiment as well, two intermediate output values D0 and D1 are captured as reference digital values, and a reference digital value acquisition command is transmitted. It is assumed that an analog signal of a predetermined level has been input to the analog-digital conversion circuit 12 before. When the microcomputer 11 starts the acquisition routine, the microcomputer 11 reads the intermediate output value (digital value) from the analog-digital conversion circuit 12 (S21), and determines the type of the reference digital value corresponding to the received reference digital value acquisition command. (S22). That is, information indicating the type of reference digital value (D0 or D1) to be acquired is added to the reference digital value acquisition command. If the type of reference digital value is D0, the microcomputer 11 reads the intermediate value read in S21. The output value is stored in the RAM 13 as the reference digital value D0 (S23), and the signal level information added to the reference digital value acquisition command is stored in the RAM 13 as the reference analog value A0 (S25), and the processing routine is terminated. On the other hand, if the result of the determination in S22 is that the type of the reference digital value is D1, the microcomputer 11 stores the intermediate output value read in S21 in the RAM 13 as the reference digital value D1 (S24), and a reference digital value acquisition command After the signal level information added to is stored in the RAM 13 as the reference analog value A1 (S26), the processing routine is terminated. When the microcomputer 11 completes the reference digital value acquisition routine, it returns the reference digital value stored in the RAM 13 as a response signal from the communication port 11a to the control device 2 (S11, S12).

  Next, a processing routine for registering the reference digital values D0 and D1 stored in the RAM 13 in the FROM 14 will be described based on the flowchart shown in FIG. When the microcomputer 11 starts the registration routine, the microcomputer 11 determines whether or not the FROM 14 has free space (S31), and if there is free space, the write pointer of the FROM 14 is set to the address number of the unwritten addresses. Is moved to the minimum address (S32), the reference digital values D0, D1 and the reference analog values A0, A1 are written as one data in the FROM 14 (S34), and the writing routine is terminated. As a result of the determination in S31, if there is no free space in the FROM 14, the microcomputer 11 erases all the data in the FROM 14 (S33), then proceeds to S32 and performs the same processing as described above. When the microcomputer 11 ends the reference digital value registration routine, the reference digital value (or the reference digital value and the reference analog value) stored in the FROM 14 is returned as a response signal from the communication port 11a to the control device 2 (S11). , S12).

  A processing routine for erasing the reference digital value and the reference analog value stored in the RAM and FROM will be described with reference to the flowchart of FIG. When the microcomputer 11 starts the erasing routine, all data in the FROM 14 is erased (S41), the reference digital values D0 and D1 stored in the RAM 13 are erased (S42), and the reference analog stored in the RAM 13 is erased. The values A0 and A1 are erased (S43), and the erase routine is terminated. When the microcomputer 11 finishes the reference digital value and the reference digital value erasing routine, the microcomputer 11 returns the reference digital value and data indicating completion of erasure of the reference digital value as a response signal from the communication port 11a to the control device 2 (S11, S12).

  Next, a processing routine for calculating the linear equation will be described with reference to the flowchart of FIG. When the microcomputer 11 starts the primary linear equation calculation routine, it first determines the presence or absence of data written in the FROM 14 (S51). If there is write data in the FROM 14, the microcomputer 11 moves the read pointer of the FROM 14 to the written address having the largest address number (S 52), reads one data from the FROM 14, and reads the reference digital Values D0 and D1 and reference analog values A0 and A1 are set (S53 ′). Then, from these reference digital values D0 and D1 and reference analog values A0 and A1, the slope a = (A0−A1) / (D0−D1) of the linear equation Y = a × X + b and the intercept b = (A0 · D1-A1 · D0) / (D1-D0) is calculated and stored in the RAM 13 (S54 ′), and then the processing routine is terminated. If there is no write data in the FROM 14 as a result of the determination in S51, the microcomputer 11 sets the standard inclination and intercept set in advance to a linear equation (S55), and ends the processing routine. Then, the microcomputer 11 returns the slope of the primary calculation formula and the set value of the intercept as a response signal from the communication port 11a to the control device 2 (S11, S12).

  The operation of the microcomputer 11 in the calibration mode is as described above. In the present embodiment, the signal level information of the analog signal sent together with the reference digital value acquisition command from the control device 2 and the reference digital value acquired when the command is received. Since the slope a and intercept b of the linear linear equation are used, the signal level of the analog signal given when acquiring the reference digital value according to the input / output specifications and the signal level of the analog signal to be measured Can be changed on the way, and an optimal linear linear expression can be set for each A / D conversion unit in accordance with the usage pattern.

(Embodiment 3)
A third embodiment of the present invention will be described with reference to FIGS. Since the configuration of the A / D conversion unit 1 is the same as that of the first embodiment, common constituent elements are denoted by the same reference numerals and description thereof is omitted.

  In Embodiment 2 described above, the slope and intercept of the linear equation are calculated using the two reference digital values D0 and D1 and the reference analog values A0 and A1 corresponding to the reference digital values D0 and D1. When the relationship between the signal level of the analog signal and the intermediate output value cannot be expressed by one primary linear equation, the intermediate linear value is substituted into one primary linear equation to obtain the signal level of the analog signal. Although an error occurs between the signal level calculated using the signal level and the actual signal level, according to the present embodiment, (n + 1) (n is an integer of 2 or more) reference digital values D0, D1,. The slope and intercept of the linear linear equation indicating the relationship between the signal level A0, A1,..., An of the analog signal and the reference digital values A0, A1,. Intermediate output using a linear equation Since calculating the signal level of the analog signals from, it is possible to reduce the error between the actual signal level and the signal level calculated using a first order linear equation. FIG. 13 shows a case in which five reference digital values are taken, and four linear linear expressions f1, f1, f1 and f2 for each section (−1000 to 0, 0 to 1000, 1000 to 2000, 2000 to 3000) of the reference digital value. Since f2, f3, and f4 are obtained, the error between the signal level calculated using the linear equation and the actual signal level is reduced by using the linear equations f1 to f4 corresponding to each section. Can do.

  The operation of the A / D conversion unit 1 of this embodiment will be described with reference to the flowcharts of FIGS. 11, 12, 14 and 15. Since operations other than the reference digital value acquisition routine, registration routine, deletion routine, and linear linear setting routine are the same as those in the second embodiment, the description of common operations is omitted, and only different operations are described below. explain.

  FIG. 11 is a flowchart of a processing routine for acquiring a reference digital value. In this embodiment, (n + 1) -point intermediate output values D0, D1,..., Dn are captured as reference digital values. It is assumed that an analog signal of a predetermined level is input to the analog-digital conversion circuit 12 before transmitting the acquisition command. When the microcomputer 11 starts the acquisition routine, the microcomputer 11 reads the intermediate output value (digital value) from the analog-digital conversion circuit 12 (S21), and determines the type of the reference digital value corresponding to the received reference digital value acquisition command. (S22). That is, information indicating the type of reference digital value (D0, D1,..., Dn) to be acquired is added to the reference digital value acquisition command. If the type of reference digital value is D0, the microcomputer 11 performs S21. The intermediate output value read in step S3 is stored in the RAM 13 as the reference digital value D0 (S23), and the signal level information added to the reference digital value acquisition command is stored in the RAM 13 as the reference analog value A0 (S25). Exit. If the type of the reference digital value is D1, the microcomputer 11 stores the intermediate output value read in S21 in the RAM 13 as the reference digital value D1 (S24), and the signal level added to the reference digital value acquisition command. After the information is stored in the RAM 13 as the reference analog value A1 (S26), the processing routine is terminated. Further, if the type of the reference digital value is Dn, the microcomputer 11 stores the intermediate output value read in S21 as the reference digital value Dn in the RAM 13 (S27), and the signal level added to the reference digital value acquisition command. After the information is stored in the RAM 13 as the reference analog value An (S28), the processing routine is ended. When the microcomputer 11 finishes the routine for acquiring the reference digital value, the reference digital value (or the reference digital value and the reference analog value) stored in the RAM 13 is returned as a response signal from the communication port 11a to the control device 2 (S11, S12).

  Next, a processing routine for registering the reference digital values D0 to Dn and the reference analog values A0 to An stored in the RAM 13 in the FROM 14 will be described based on the flowchart shown in FIG. When the microcomputer 11 starts the registration routine, the microcomputer 11 determines whether or not the FROM 14 has free space (S31), and if there is free space, the write pointer of the FROM 14 is set to the address number of the unwritten addresses. Is moved to the smallest address (S32), the reference digital values D0 to Dn and the reference analog values A0 to An are written as one data in the FROM 14 (S34), and the writing routine is terminated. As a result of the determination in S31, if there is no free space in the FROM 14, the microcomputer 11 erases all the data in the FROM 14 (S33), then proceeds to S32 and performs the same processing as described above. When the microcomputer 11 finishes the reference digital value registration routine, the microcomputer 11 returns the reference digital value stored in the FROM 14 as a response signal from the communication port 11a to the control device 2 (S11, S12).

  A processing routine for erasing the reference digital value and the reference analog value stored in the RAM and FROM will be described with reference to the flowchart of FIG. When the microcomputer 11 starts the erase routine, all data in the FROM 14 is erased (S41), and then the reference digital values D0, D1,..., Dn stored in the RAM 13 are erased (S42) and stored in the RAM 13. The reference analog values A0, A1,..., An that have been erased are erased (S43), and the erase routine ends. When the microcomputer 11 finishes the routine for erasing the reference digital value and the reference analog value, data indicating completion of erasure of the reference digital value and the reference analog value is returned from the communication port 11a to the control device 2 as a response signal (S11, S12).

  Next, a processing routine for calculating a linear equation will be described with reference to the flowchart of FIG. When the microcomputer 11 starts the primary linear equation calculation routine, it first determines the presence or absence of data written in the FROM 14 (S51). If there is write data in the FROM 14, the microcomputer 11 moves the read pointer of the FROM 14 to the written address having the largest address number (S 52), reads one data from the FROM 14, and reads the reference digital , Dn and reference analog values A0, A1,..., An (S53 ′). Then, from these reference digital values D0 to Dn and reference analog values A0 to An, the slope a and the intercept b of the linear linear equation Y = a × X + b are calculated for each section of the adjacent reference digital values and stored in the RAM 13. (S54), the processing routine is terminated. In the reference digital value section (D0, D1), the slope a = (A0−A1) / (D0−D1) and the intercept b = (A0 · D1−A1 · D0) / (D1−D0). If there is no write data in the FROM 14 as a result of the determination in S51, the microcomputer 11 sets the standard inclination and intercept set in advance to a linear equation (S55), and ends the processing routine. Then, the microcomputer 11 returns the slope of the primary calculation formula and the set value of the intercept as a response signal from the communication port 11a to the control device 2 (S11, S12).

  The operation of the microcomputer 11 in the calibration mode is as described above. In the present embodiment, the microcomputer 11 is a primary straight line indicating the relationship between the signal level of the analog signal and the intermediate output value for each section of at least three reference digital values. Since the slope and intercept of the equation is obtained and the signal level of the analog signal is calculated from the intermediate output value using the linear equation obtained for each section, the signal level calculated using the linear equation and the actual signal The error from the level can be reduced.

  In the present embodiment, in the A / D conversion unit 1 of the second embodiment, the relationship between the signal level of the analog signal and the intermediate output value is determined for each section of at least three reference digital values D0, D1,. The slope and intercept of the linear linear equation shown are obtained. In the A / D conversion unit 1 of the first embodiment, at least three reference digital values D0, D1,..., Dn are set in advance. .., An and the reference digital values D0, D1,..., Dn, the slope and intercept of the linear linear equation showing the relationship between the analog signal levels A0, A1,. The signal level of the analog signal may be calculated from the intermediate output value.

2 is a schematic block diagram of an A / D conversion unit according to Embodiment 1. FIG. It is a flowchart explaining the whole operation | movement same as the above. It is a flowchart which shows the acquisition routine of a reference | standard digital value same as the above. (A) is a flowchart showing a reference digital value registration routine as described above, and (b) through (e) are explanatory diagrams showing storage areas of the FROM used in the above. (A) is a flow chart showing a reference digital value erasing routine same as above, and (b) is an explanatory diagram showing a storage area of the FROM used in the above. (A) is a flowchart showing a linear linear setting routine as described above, and (b) through (e) are explanatory diagrams showing storage areas of the FROM used in the above. 10 is a flowchart illustrating a reference digital value acquisition routine according to the second embodiment. It is a flowchart which shows the registration routine of a reference | standard digital value same as the above. It is a flowchart which shows the deletion routine of a reference | standard digital value same as the above. It is a flowchart which shows the setting routine of the primary linear type same as the above. 10 is a flowchart illustrating a reference digital value acquisition routine according to the third embodiment. It is a flowchart which shows the registration routine of a reference | standard digital value same as the above. It is explanatory drawing which shows the relationship between the signal level of the analog signal input into the same as above, and the digital value after A / D conversion. It is a flowchart which shows the deletion routine of a reference | standard digital value same as the above. It is a flowchart which shows the setting routine of the primary linear type same as the above. (A) is a schematic block diagram of a conventional A / D conversion unit, and (b) is an external view of a DIPSW used in the same. It is explanatory drawing which shows the relationship between the signal level of the analog signal input into the same as above, and the digital value after A / D conversion. It is a flowchart explaining the whole operation | movement same as the above. It is a flowchart which shows the acquisition routine of a reference | standard digital value same as the above. (A) is a flow chart showing a reference digital value registration routine as described above, and (b) and (c) are explanatory diagrams showing storage areas of the FROM used in the above. (A) is a flow chart showing a reference digital value erasing routine same as above, and (b) is an explanatory diagram showing a storage area of the FROM used in the above. (A) is a flowchart showing a linear linear equation setting routine, and (b) and (c) are explanatory diagrams showing storage areas of the FROM used in the above.

Explanation of symbols

1 A / D conversion unit 2 Control device 3 Expansion bus 11 Microcomputer (arithmetic processing unit)
11a Communication port (communication means)
12 Analog-digital conversion circuit (analog-digital converter)
13 RAM
14 FROM

Claims (7)

An analog-to-digital converter that obtains an intermediate output value that is proportional to the signal level of the analog signal by performing A / D conversion on the analog signal, and a primary that indicates the relationship between the signal level of the analog signal and the intermediate output value An arithmetic processing unit that calculates the signal level of an analog signal by substituting the intermediate output value into a linear equation, and a RAM that temporarily stores arithmetic data of the arithmetic processing unit,
The arithmetic processing unit has communication means for communicating with the outside, and an analog signal of a predetermined level is input to the analog-to-digital conversion unit during operation in the calibration mode for obtaining the slope and intercept of the linear linear equation. When the reference digital value acquisition command transmitted from the external device is received through the communication means in the state, the intermediate output value at the time of command reception is stored in the RAM as the reference digital value, and the reference digital value is used as the response signal. A / is transmitted from the communication means to the external device, and the slope and intercept of the linear equation are calculated based on at least two reference digital values and the signal level of the analog signal corresponding to the reference digital values. D conversion unit.   A FROM for storing the reference digital value; and when the arithmetic processing unit receives a reference digital value registration command transmitted from the external device via the communication unit after receiving the reference digital value acquisition command, The A / D conversion unit according to claim 1, wherein the reference digital value stored in the RAM is stored in the FROM, and the reference digital value is returned as a response signal from the communication means to the external device.   When the arithmetic processing unit receives a reference digital value erasure command transmitted from the external device via the communication means, it indicates erasure completion after erasing the reference digital value stored in the RAM and the FROM. 3. The A / D conversion unit according to claim 2, wherein data is returned as a response signal from the communication means to the external device.   3. The A / D conversion according to claim 2, wherein the arithmetic processing unit performs a process of erasing data in the FROM before writing the reference digital value in the FROM only when there is no free space in the FROM. unit.   When the arithmetic processing unit receives a primary linear equation read command for calculating a primary linear equation transmitted from the external device via the communication unit, a plurality of reference digital values stored in the RAM and each reference The slope and intercept of the linear equation are calculated based on the signal level of the analog signal corresponding to the digital value, and the calculated slope and intercept are returned as a response signal from the communication means to the external device. Item 5. The A / D conversion unit according to any one of Items 1 to 4.   Signal level information of an analog signal corresponding to the reference digital value is added to the reference digital value acquisition command transmitted from the external device, and the arithmetic processing unit is configured to output the signal level added to the reference digital value acquisition command. 6. The A / D conversion according to claim 1, wherein a slope and an intercept of the linear equation are calculated based on information and a reference digital value acquired at the time of command reception. unit.   In the calibration mode, the signal level of the analog signal input to the analog-digital conversion unit is switched at least in three ways, and a reference digital value acquisition command is transmitted from an external device each time the signal level of the analog signal is switched. The arithmetic processing unit is configured to obtain at least three sections of the reference digital value based on at least three reference digital values acquired at the time of receiving the reference digital value acquisition command and the signal level of the analog signal corresponding to each reference digital value. The A / D conversion unit according to any one of claims 1 to 6, wherein an inclination and intercept of a linear linear expression indicating a relationship between the signal level of the analog signal and the intermediate output value are obtained every time.

Images