JP4841282B2 - Power supply device control circuit, power supply device, and control method therefor - Google Patents

Description

  The present invention relates to a control circuit for a power supply device, a power supply device, and a control method therefor, and in particular, a control circuit for a power supply device in which a voltage value of an output voltage is controlled in accordance with an external command, a power supply device, and It relates to the control method.

  In the technical field of semiconductor devices, lower power supply voltage has been developed along with higher speed and higher integration. However, it is conceivable that the power supply voltage required for each semiconductor device differs due to the difference in the progress of manufacturing technology. In a system device configured by combining a plurality of semiconductor devices, when an interface is provided between the semiconductor devices, voltage amplitudes of input / output signals may be different from each other. As a technique for interfacing between semiconductor devices having different power supply voltages, a technique exemplified in Patent Document 1 has been proposed.

  An example is shown in FIG. It is conceivable to interface a control LSI 100 such as an ASIC with a dynamic memory (hereinafter referred to as a DDR memory) 200 having a DDR function. For example, it is assumed that the DDR memory 200 operates with a power supply voltage Vdd2 of 2.5V, and 1.25V, which is a half of the power supply voltage Vdd2, is set as the termination voltage VTT in the interface circuit. On the other hand, the control LSI 100 operates with a power supply voltage Vdd of 1.2V.

  In the DDR memory 200 having the high-speed interface circuit, the voltage amplitude width is limited to ± 200 mV centering on the termination voltage VTT (for example, 1.25 V) in order to suppress the signal propagation delay. The maximum value of the interface signal is 1.45 V which is the termination voltage VTT (1.25 V) +200 mV, and if it is left as it is, it exceeds 1.2 V which is the power supply voltage Vdd of the control LSI 100.

  Therefore, the lower voltage of the control LSI 100 is set to a potential floating from the ground so that the termination voltage VTT (1.25 V) matches the voltage half of the power supply voltage Vdd of the control LSI 100. That is, the lower voltage of the control LSI 100 is set to 0.65V, and the power supply voltage is set to 1.85V (= 1.2V + 0.65V) accordingly. When the interface signal has an amplitude of 1.25 V ± 200 mV, the voltage amplitude range of the interface signal is within the operating voltage range of the control LSI 100, and it is possible to directly interface with the DDR memory 200.

  In addition, due to miniaturization associated with higher speed and higher integration of semiconductor devices, the electrical characteristics and other physical characteristics of devices such as MOS transistors that make up semiconductor devices become more susceptible to manufacturing variations, and individual semiconductor devices There may be a large variation between the two. It is also known that the electrical characteristics and other physical characteristics of various devices vary depending on the usage environment such as the usage temperature. Such characteristic fluctuations may appear more conspicuously due to the effect of lowering the voltage, and it is considered that sufficient characteristics cannot be secured in all use environments.

  For example, due to the demand for high-speed operation, the voltage of semiconductor devices has been reduced along with miniaturization. However, in order to operate a MOS transistor at high speed, it is necessary to suppress the threshold voltage to a low voltage. However, in a low threshold voltage MOS transistor, there may be a characteristic that current consumption increases due to a leakage current penetrating between the source and drain when not conducting. In order to reduce the leakage current, it is conceivable to increase the threshold voltage by applying a voltage bias to the back gate so that the MOS transistor has a back gate bias effect. That is, the low threshold voltage required for ensuring the characteristic of high-speed operation and the high threshold voltage required for ensuring the characteristic of low current consumption are in conflict.

  Therefore, as disclosed in Patent Document 2, when the semiconductor device is stopped, a voltage bias that increases the back gate bias effect is performed, and the threshold voltage of the MOS transistor is deepened to reduce the current consumption due to the leakage current. At the time of operation, a voltage bias for reducing the back gate bias effect is performed, and the threshold voltage of the MOS transistor is made shallow to cope with high-speed operation. In this technique, the voltage bias to the back gate of the MOS transistor is dynamically controlled to achieve both high-speed response during operation and low current consumption during standby in the semiconductor device.

JP 2002-111470 A Japanese Patent Application Laid-Open No. 07-176624

  As disclosed in Patent Document 1, in order to interface between semiconductor devices having different power supply voltages, a low-side voltage, which is a reference value of the power supply voltage, is not used as a common ground, but a threshold value of an interface signal In order to make the voltage common, the voltage floating from the ground is set as the lower voltage.

  However, in this case, the power supply voltage commanded from the system device or other controller as a power supply voltage required for the control LSI whose lower voltage is a voltage floating from the ground is a voltage value based on the ground. It is generally information. This is because the normal power supply voltage is a voltage with respect to the ground. If the power supply apparatus is instructed based on this voltage value information, both the lower voltage and the higher voltage cannot be supplied with a predetermined voltage, and the power supply that enables the interface disclosed in Patent Document 1 can be used. There is a possibility that it cannot be supplied, which is a problem.

  Further, as disclosed in Patent Document 2, the threshold voltage is changed by changing the voltage bias to the back gate of the MOS transistor between the operation and the stop, thereby reciprocal between high-speed operation and low current consumption. It is possible to achieve compatibility of the characteristics to be achieved.

  However, manufacturing variations, temperature fluctuations, and the like may be characteristic fluctuations that differ among individual semiconductor devices. It is also conceivable that the optimum voltage value differs for each semiconductor device and for each operating condition. Whereas a voltage value adjustment function such as adjusting a voltage value defined in advance according to operating characteristics is desired, Patent Document 2 does not disclose a similar function, which is a problem.

  The present invention has been made in view of the above-described background art, and is a control circuit for a power supply device that can flexibly set and adjust the voltage value of an output voltage in response to an external command, a power supply device, and control thereof It aims to provide a method.

  In order to achieve the above object, a control circuit for a power supply device according to the present invention is a control circuit for a power supply device that controls a voltage value of an output voltage in accordance with an external command, and is a first voltage input from the outside. The actual voltage information output from the voltage adjustment unit includes a voltage adjustment unit that adjusts the actual voltage information according to the setting information or according to the first voltage setting information and the preset second voltage setting information. The voltage value of the output voltage is controlled based on the above.

The power supply device according to the present invention is a power supply device in which the voltage value of the output voltage is controlled according to a command from the outside, and according to the first voltage setting information input from the outside or the first voltage A voltage adjustment unit that adjusts the actual voltage information according to the setting information and the preset second voltage setting information is provided, and the voltage value of the output voltage is controlled based on the actual voltage information output from the voltage adjustment unit It is characterized by being.
Here, the control circuit and the power supply of the power source apparatus according to the present invention, voltage adjustment unit, between at least two between the first voltage setting information or the first voltage setting information and the second voltage setting information, The first voltage setting information includes specified value information of a specific voltage indicating a voltage value that is a half of the voltage value indicated by the specified value information of the output voltage , and the reference voltage value information is at least one of the adjustment value information of a particular voltage, the second voltage setting information, specified value information of the output voltage, the adjustment value information of the specified value information of a particular voltage, and a specific voltage Among these, the signal is not determined by the first voltage setting information. The calculation unit includes a subtraction unit that obtains differential offset value information of the adjustment value information of the specific voltage with respect to the specified value information of the specific voltage, and an addition unit that adds the differential offset value information to the specified value information of the output voltage.

  In the control circuit for a power supply device and the power supply device of the present invention, the voltage adjustment unit adjusts the actual voltage information according to the first voltage setting information input from the outside, or the first voltage setting information input from the outside. The actual voltage information is adjusted according to the second voltage setting information set in advance. The output voltage of the power supply device is controlled based on the adjusted actual voltage information.

The power supply device control method according to the present invention is a power supply device control method in which the voltage value of the output voltage is controlled in accordance with an external command, and the step of inputting the first voltage setting information from the outside. Alternatively, the second voltage setting information is set in advance and the first voltage setting information is input, and the first voltage setting information acquired by the input step or by the setting and input step And adjusting the actual voltage information according to the first and second voltage setting information, and the voltage value of the output voltage is controlled based on the actual voltage information output by the adjusting step. It is characterized by that.
Here, adjustment of the step, between at least two between the first voltage setting information or the first voltage setting information and the second voltage setting information, comprising the step of performing an operation, a first voltage setting information Is at least output voltage specified value information, specified voltage specified value information indicating a voltage value that is a half of the voltage value indicated by the output voltage specified value information, and adjusted value information of the specified voltage that is reference voltage value information. The second voltage setting information is a signal that is not defined in the first voltage setting information among the output voltage specified value information, the specified voltage specified value information, and the specified voltage adjustment value information. . The calculation step includes a step of obtaining difference offset value information of the adjustment value information of the specific voltage with respect to the specified value information of the specific voltage, and a step of adding the difference offset value information to the specified value information of the output voltage.

  In the method for controlling a power supply device according to the present invention, first voltage setting information is input from the outside, and actual voltage information is adjusted according to the input first voltage setting information. Alternatively, the first voltage setting information is input from the outside after the second voltage setting information is set in advance, and the actual voltage information is adjusted according to the first and second voltage setting information. The power supply device controls the output voltage based on the adjusted actual voltage information.

  As a result, information on the voltage setting set as the output voltage to the supply destination is actually required by the first voltage setting information input from the outside or / and the second voltage setting information determined in advance. Even when the voltage value is different from the output voltage value, the actual voltage information can be flexibly adjusted to set a desired output voltage.

  Responds to variations in operating characteristics due to manufacturing variations and usage environments of electronic devices and system devices, depending on the circuit configuration of electronic devices represented by semiconductor devices and system devices configured by combining electronic devices. In some cases, it is preferable to adjust and supply the voltage value by providing an offset with respect to the specified voltage value or / and adjusting the voltage value with a predetermined adjustment magnification. This is to optimize the operation of the device. Also in this case, the actual voltage information subjected to the predetermined adjustment can be output from the first and second voltage setting information given as information on the output voltage.

  When the output voltage specified value information is given as the first voltage setting information to the control circuit of the power supply device or the power supply device, the actual voltage information unique to each device can be easily adjusted. There is no need to input a unique voltage value for each device from the outside, and control of the power supply device control circuit and the power supply device can be simplified. In addition, when it is desired to set a unique voltage value that has fluctuated from the specified voltage value according to the device, the fluctuation amount from the specified voltage value is set as the first voltage setting information to the control circuit of the power supply device and the power supply device. It is also possible to input information regarding voltage setting indicating. Thereby, a different voltage for every apparatus can be output simply.

  According to the present invention, it is possible to provide a control circuit for a power supply device, a power supply device, and a control method thereof that can easily output a voltage value different from the specified value information on the basis of the specified value information of the output voltage. It becomes possible.

  DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a power supply device control circuit, a power supply device, and a control method thereof according to the present invention will be described below in detail with reference to the drawings based on FIGS.

  FIG. 1 shows a connection relationship between a power supply device 1 according to the present invention and an external device 2 fed by the power supply device 1. As shown in the principle diagram of FIG. 2, the power supply device 1 includes a plurality of DC-DC converters 30 to 70, each of which includes a high-side power supply voltage VDD, a low-side power supply voltage VSS, a back gate of the PMOS and NMOS transistors. The reference voltages Vref used for the voltages VBGP and VBGN and the threshold voltage of the interface signal are supplied to the external device 2. In addition, the power supply device 1 exchanges various information with the external device 2 through a communication line such as an IIC (IIC) bus. The external device 2 is composed of a MOS device including a PMOS / NMOS transistor. The interface configuration shown in FIG. 7 is also provided.

  Here, the various types of information are first voltage setting information related to the power supply voltage, each voltage bias, and the like required by the external device 2. The external device 2 starts to operate in response to power supply from the power supply device 1. For this reason, the first voltage setting information transmitted from the external device 2 via a communication line such as an IC (IIC) bus must be transmitted in a transient state before the external device 2 reaches a steady state. . Such provisional setting information may be transmitted, and may not be optimized voltage setting information to be originally supplied. Further, it may be nominal voltage setting information different from the voltage value to be output.

  For example, there are cases where first voltage setting information based on voltage specifications of individual devices constituting the external device 2 is transmitted as various information. In this case, for example, an interface configuration in which the lower power supply voltage is different between devices as shown in FIG. 7 is not considered. In the power supply device 1, it is advantageous if power can be supplied to the device after adjusting the actual voltage information by adding the output voltage offset value information corresponding to the interface configuration to the transmitted first voltage setting information.

  In addition, it is convenient if the power supply device 1 includes optimal second voltage setting information associated with the first voltage setting information transmitted from the external device 2.

  In addition, in order to obtain an optimum circuit operation depending on the variation state of devices constituting the external device 2 or the fitting of the external device 2, a voltage value different from a specified voltage value such as the center value of the voltage range is supplied. It may be preferable to do this. For example, when the transmitted first voltage setting information is output voltage specified value information, the power supply device 1 includes voltage adjustment magnification information as the second voltage setting information, and is transmitted. When the first voltage setting information is predetermined voltage adjustment magnification information, the power supply device 1 includes the output voltage specified value information as the second voltage setting information, so that the output voltage specified value information It would be advantageous to obtain actual voltage information adjusted with predetermined voltage adjustment magnification information.

  In addition, when it is necessary to maintain a predetermined voltage relationship such as the high-side power supply voltage VDD and the back gate voltage VBGP of the PMOS transistor, the low-side power supply voltage VSS and the back gate voltage VBGN of the NMOS transistor, It would be advantageous if a predetermined adjustment could be made.

  In the following description, an accurate voltage value for the external device 2 based on various first voltage setting information transmitted from the external device 2 and second voltage setting information stored in advance as necessary. In the first to fourth embodiments, a method for adjusting the actual voltage information in order to output the voltage is illustrated.

  FIG. 2 shows the principle of the present invention. The power supply device 1 includes first to fifth DC-DC converters 30 to 70. The setting voltages VR1 to VR5 for setting the voltage values of the output voltages VDD, VSS, Vref, VBGP, and VBGN of the first to fifth DC-DC converters 30 to 70 are sent from the external device 2 through the IIC (IIC) bus. It is determined based on the transmitted first voltage setting information. The interface control unit IF, registers REGa to REGd, voltage adjustment unit AD, registers REG1 to REG5, and DA converters DAC1 to DAC5 are provided. Here, in addition to the interface control unit IF, the registers REGa to REGd, the voltage adjustment unit AD, the registers REG1 to REG5, and the DA converters DAC1 to DAC5, the first to fifth DC-DC converters 30 to 70, which will be described later, are configured. , Error amplifiers EA1 to EA5, triangular wave oscillators O1 to O5, and PWM comparators PWM1 to PWM5 constitute a control circuit 20 of the power supply device 1.

  The input end of the interface control unit IF is connected to an IIC (IIC) bus. This IC (IIC) bus is connected to the external device 2, and the first voltage setting information is transmitted from the external device 2. The registers REGa to REGd are connected to the output terminal of the interface control unit IF.

  The registers REGa to REGd are connected to the voltage adjustment unit AD. In the voltage adjustment unit AD, the transmitted first voltage setting information is adjusted to actual voltage information of each of the first to fifth DC-DC converters 30 to 70. The voltage adjustment unit AD is connected to the registers REG1 to REG5, and the registers REG1 to REG5 are connected to the DA converters DAC1 to DAC5, respectively. The DA converters DAC1 to DAC5 are connected to the first to fifth DC-DC converters 30 to 70. The actual voltage information adjusted by the voltage adjustment unit AD is stored in the registers REG1 to REG5, and then DA-converted by the DA converters DAC1 to DAC5 to output the set voltages VR1 to VR5.

  The first DC-DC converter 30 supplies the high-order power supply voltage VDD to the external device 2. A main switching transistor T11, a synchronous switching transistor T12, a choke coil L1, and a capacitor C1 are provided. The main switching transistor T11 is supplied with the input voltage VIN at the drain. The source of the main switching transistor T11 is connected to the drain of the synchronous side switching transistor T12. The source of the synchronous side switching transistor T12 is connected to the ground. Further, the source of the main switching transistor T11 and the drain of the synchronous side switching transistor T12 are connected to one end of the choke coil L1. The other end of the choke coil L1 is an output terminal, and the higher power supply voltage VDD is output. The capacitor C1 is connected between the output terminal and the ground.

  Further, the first DC-DC converter 30 includes an error amplifier EA1, a triangular wave oscillator O1, and a PWM comparator PWM1. The inverting input terminal of the error amplifier EA1 is connected to the output terminal. On the other hand, the non-inverting input terminal of the error amplifier EA1 is connected to the DA converter DAC1, and the set voltage VR1 is input thereto.

  The triangular wave oscillator O1 outputs a triangular wave signal. The triangular wave signal has an amplitude in a certain voltage value range (for example, 1.0 V to 2.0 V). The triangular wave oscillator O1 is configured using, for example, an OP amplifier, a resistor, a capacitor, and the like.

  The PWM comparator PWM1 has a plus side input terminal (+) and a minus side input terminal (−). The plus side input terminal (+) is connected to the output terminal (N1) of the error amplifier EA1. On the other hand, the minus side input terminal (−) is connected to the triangular wave oscillator O1. Further, the output terminal (Q1) of the PWM comparator PWM1 is connected to the gate of the main switching transistor T11, and the inverted output terminal (* Q1) of the PWM comparator PWM1 is connected to the gate of the synchronous side switching transistor T12. .

  The configurations of the second to fourth DC-DC converters 40 to 60 are the same as the configuration of the first DC-DC converter 30. In place of the error amplifier EA1 of the first DC-DC converter 30, error amplifiers EA2 to EA4 are provided, and the set voltages VR2 to VR4 are input to the respective non-inverting input terminals. Further, PWM comparators PWM2 to PWM4 are provided instead of the PWM comparator PWM1, and instead of the main switching transistor T11, main switching transistors T21 to T41, and instead of the synchronization side switching transistor T12, the synchronization side switching transistors T22 to T22 are provided. T42, choke coils L2 to L4 instead of the choke coil L1, and capacitors C2 to C4 instead of the capacitor C1 are provided.

  The other ends of the choke coils L2 to L4 are output terminals, which respectively output a lower power supply voltage VSS, a reference voltage Vref, and a back gate voltage VBGP of the PMOS transistor.

  Further, the fifth DC-DC converter 70 that outputs the back gate voltage VBGN of the NMOS transistor, which is a negative voltage, has the same configuration as the first to fourth DC-DC converters 30 to 60, the error amplifier EA5, the triangular wave oscillator O5, the PWM. A comparator PWM5, a main switching transistor T51, a synchronous side switching transistor T52, a choke coil L5, and a capacitor C5 are provided.

  Here, in order to output a negative voltage, unlike the connection in the first to fourth DC-DC converters 30 to 60, the synchronization side switching transistor T52 and the capacitor C5 are connected to the output terminal instead of the ground. The choke coil L5 is connected to the ground instead of the output terminal. Further, an inverting amplifier INV is provided between the output terminal and the inverting input terminal of the error amplifier EA5. The output voltage is inverted and fed back to the inverting input terminal of the error amplifier EA5.

  Here, the interface control unit IF corresponds to a communication unit.

  Next, a method for controlling the power supply device 1 will be described. The interface control unit IF receives the first voltage setting information from the external device 2 connected to the IC (IIC) bus. The first voltage setting information received by the interface control unit IF is stored in the registers REGa to REGd for each target DC-DC converter. Since the transmitted first voltage setting information is information indicating a logical voltage value, it is represented by a potential difference with respect to the lower power supply voltage. That is, it is information indicating a voltage value with respect to the ground. Therefore, when the lower power supply voltage VSS is different from the ground, the first voltage setting information is not transmitted in accordance with the actual voltage information indicating the actual voltage value. As a result, the registers REGa to REGd have a configuration that is one less than the number of DC-DC converters. This is because the transmitted first voltage setting information uses the lower power supply voltage VSS as the ground, and therefore it is not necessary to transmit the first voltage setting information related to the lower power supply voltage VSS.

  The first voltage setting information stored in the registers REGa to REGd is information for setting an output voltage such as a power supply voltage, a reference voltage, a back gate voltage of a PMOS transistor, and a back gate voltage of an NMOS transistor. The output voltage specified value information, output voltage adjustment magnification information, output voltage offset value information, specified voltage specified value information, specified voltage adjusted value information, and the like.

  Here, the specific voltage is a voltage related to the output voltage output from the power supply device 1 and is a nominal voltage, a logical voltage value (specified value) given provisionally, and a voltage actually output. This is a voltage for comparing the value (adjustment value). For example, the threshold voltage is an example of a specific voltage. In FIG. 7, when the control LSI 100 is considered alone, the threshold voltage is 0.6 V, which is a half voltage of the power supply voltage (1.2 V). This is the specified value of the specific voltage. When the interface shown in FIG. 7 is taken, the threshold voltage must match the termination voltage VTT (1.25 V). This is the adjustment value of the specific voltage.

  The first voltage setting information stored in each of the registers REGa to REGd is a digital signal indicating logical voltage value information or a digital signal indicating code information corresponding to actual voltage information of the voltage value to be output.

  The voltage adjustment unit AD adjusts actual voltage information, which is information on voltage values to be output from the first to fifth DC-DC converters 30 to 70, based on the first voltage setting information stored in the registers REGa to REGd. To do. The adjusted actual voltage information is stored in the registers REG1 to REG5 for each of the first to fifth DC-DC converters 30 to 70. The actual voltage information stored in the registers REG1 to REG5 is a digital signal. These digital signals are converted into analog values by the DA converters DAC1 to DAC5. The converted analog signals are input to the non-inverting input terminals of the error amplifiers EA1 to EA5 as the set voltages VR1 to VR5 of the first to fifth DC-DC converters 30 to 70.

  Output voltages of the first to fifth DC-DC converters 30 to 70 are fed back to the inverting input terminals of the error amplifiers EA1 to EA5. The difference voltage of the higher power supply voltage VDD with respect to the setting voltage VR1, the difference voltage of the lower power supply voltage VSS with respect to the setting voltage VR2, the difference voltage of the reference voltage Vref with respect to the setting voltage VR3, and the difference voltage of the back gate voltage VBGP with respect to the setting voltage VR4 And the difference voltage of the inverted back gate voltage VBGN with respect to the set voltage VR5 is error amplified. The error output voltages output from the output terminals (N1) to (N5) are input to the plus side input terminals (+) of the PWM comparators PWM1 to PWM5.

  Triangular wave signals from the triangular wave oscillators O1 to O5 are input to the negative side input terminals (−) of the PWM comparators PWM1 to PWM5. The PWM comparators PWM1 to PWM5 compare the error output voltage with the voltage value of the triangular wave signal.

  When the error output voltage is larger than the voltage value of the triangular wave signal, the PWM comparators PWM1 to PWM5 output high level PWM signals from the output terminals (Q1) to (Q5). At the same time, a low-level inverted PWM signal is output from the inverted output terminals (* Q1) to (* Q5). When the error output voltage is smaller than the voltage value of the triangular wave signal, the PWM comparators PWM1 to PWM5 output low level PWM signals from the output terminals (Q1) to (Q5). At the same time, a high level inverted PWM signal is output from the inverted output terminals (* Q1) to (* Q5).

  The PWM signal is input to the gates of the main switching transistors T11 to T51. The main switching transistors T11 to T51 are turned on when the PWM signal is at a high level, and are turned off when the PWM signal is at a low level. The inverted PWM signal is input to the gates of the synchronous side switching transistors T12 to T52. The synchronous side switching transistors T12 to T52 are turned off when the inverted PWM signal is at a low level, and turned on when the inverted PWM signal is at a high level. The output voltage (VDD, VSS, Vref, VBGP, VBGN) is changed by repeatedly changing the PWM signal between the high level and the low level and simultaneously changing the inverted PWM signal between the low level and the high level. Control is performed to match the set voltages VR1 to VR5. However, the output voltage has a voltage value whose polarity is inverted from that of the set voltage VR5.

  The first voltage setting information transmitted through the IC (IIC) bus is stored in the registers REGa to REGd. The first voltage setting information stored in the registers REGa to REGd is adjusted to actual voltage information in the voltage adjustment unit AD and stored in the registers REG1 to REG5. The actual voltage information output from the registers REG1 to REG5 is output as setting voltages VR1 to VR5 for setting output voltages (VDD, VSS, Vref, VBGP, VBGN) of the first to fifth DC-DC converters 30 to 70, respectively. The voltage can be controlled to a target voltage value. The voltage adjusting unit AD can adjust the optimum actual voltage information regardless of the first voltage setting information.

  FIG. 3 is a circuit block diagram of the voltage adjustment unit AD1 applied to the first embodiment. 3 is a specific example of the voltage adjustment unit AD in the principle diagram of FIG. In the first embodiment, the power supply device 1 will be described as supplying power to the control LSI 100 configuring the interface illustrated in FIG.

  In the control LSI 100 of FIG. 7, it is assumed that the nominal power supply voltage when the lower power supply voltage is ground is, for example, 1.2V. The power supply voltage value information VD0 is stored in the register REGa with information on the voltage value of 1.2V. In order to give a back gate effect to the back gate of the PMOS / NMOS transistor, it is assumed that a voltage value higher by ΔVP, for example, is applied from the higher power supply voltage to the PMOS transistor, and for the NMOS transistor from the ground, for example, It is assumed that a voltage value lower by ΔVN is applied. The back gate effect voltage value information DVP of the PMOS transistor is stored in the register REGc with information on the voltage value of ΔVP. Further, the back gate effect voltage value information DVN of the NMOS transistor is stored in the register REGd with the voltage value information of ΔVN. Further, the termination voltage VTT of the interface signal is set to, for example, 1.25V. It is necessary to make the threshold voltage of the control LSI 100 coincide with the termination voltage VTT. The reference voltage value information VRF0 is stored in the register REGb with information on the voltage value of 1.25V.

The calculation to be performed by the calculation unit OP1 obtains the actual high power supply voltage information VR1D for setting the physical high power supply voltage VDD output from the power supply device 1 from the power supply voltage value information VD0 and the reference voltage value information VRF0. That is. Since the logic threshold voltage of the control LSI 100 is made to coincide with the termination voltage VTT (1.25 V), the actual higher power supply voltage information VR1D representing the physical higher power supply voltage VDD is supplied to the reference voltage value information VRF0. Calculation is performed by adding 1/2 of the voltage value information VD0.
VR1D = VD0 / 2 + VRF0
It becomes. As a specific voltage value, 1.2V / 2 + 1.25V = 1.85V is output as the high-side power supply voltage VDD.

  The calculation unit OP1 includes a divider and an adder. In the first embodiment, the divider performs division by 2. Digital computation can be easily realized by a 1-bit bit shift operation. Also, the adder can be easily realized by a known circuit configuration in the field of digital computation.

The calculation to be performed by the calculation unit OP2 obtains the actual lower power supply voltage information VR2D for setting the physical lower power supply voltage VSS output from the power supply device 1 from the power supply voltage value information VD0 and the reference voltage value information VRF0. That is. Similar to the calculation unit OP1, the actual lower power supply voltage information VR2D representing the physical lower power supply voltage VSS is calculated by subtracting 1/2 of the power supply voltage value information VD0 from the reference voltage value information VRF0.
VR2D = VRF0−VD0 / 2
It becomes. As a specific voltage value, 1.25V-1.2V / 2 = 0.65V is output as the lower power supply voltage VSS.

  The calculation unit OP2 includes a divider and a subtracter. Similar to the case of the arithmetic unit OP1, the divider can be easily realized by a 1-bit bit shift operation in the digital calculation. Also, the subtracter can be easily realized by a known circuit configuration in the field of digital computation.

The calculation to be performed by the calculation unit OP3 is a physical operation that adds the back gate effect voltage value information DVP of the PMOS transistor to the actual high power supply voltage information VR1D and is output from the power supply device 1 and exhibits the back gate effect of the PMOS transistor. The actual PMOS back gate voltage information VR4D for setting the back gate voltage VBGP is obtained. Similarly, the calculation to be performed by the calculation unit OP4 is output from the power supply device 1 by subtracting the back gate effect voltage value information DVN of the NMOS transistor from the actual low-side power supply voltage information VR2D and exhibits the back gate effect of the NMOS transistor. The real NMOS back gate voltage information VR5D for setting the physical back gate voltage VBGN is obtained. Each is represented by the following formula.
VR4D = VR1 + DVP,
VR5D = VR2-DVN
It is. As specific voltage values, the back gate voltage VBGP of the PMOS transistor is output as = 1.85 V + ΔVP, and the back gate voltage VBGN of the NMOS transistor is output as 0.65 V−ΔVN.

  The arithmetic units OP3 and OP4 are each composed of an adder and a subtracter. In the field of digital computation, all can be easily realized by a known circuit configuration.

  In the first embodiment, as described above, the actual voltage information can be adjusted by performing the four arithmetic operations on the first voltage setting information by the operation units OP1 to OP4. The reference voltage value information VRF0 is stored as it is in the register REG3 as actual reference voltage value information VR3D. The voltage value indicated by the actual reference voltage value information VR3D is 1.25 V, which is the same as the voltage value indicated by the reference voltage value information VRF0.

  Here, the power supply voltage value information VD0 is an example of specified value information of the output voltage, and the back gate effect voltage value information DVP and DVN of the PMOS / NMOS transistor is an example of output voltage offset value information. Real P / NMOS back gate voltage information VR4D, VR5D is obtained by adding / subtracting back gate effect voltage value information DVP, DVN, which is output voltage offset value information, to / from actual high / low power supply voltage information VR1D, VR2D. Can do. The reference voltage value information VRF0 is an example of adjustment value information for a specific voltage.

  If the information indicating the voltage value (0.6V) that is 1/2 of the voltage value (1.2V) indicated by the power supply voltage value information VD0 is the specified value information of the specific voltage, the subtractor is used to By subtracting the specified value information of the specific voltage from the reference voltage value information VRF0, which is the adjustment value information, the difference offset value information is obtained, and the difference offset value information is added to the specified value information of the output voltage such as the power supply voltage value information VD0 by the adder. Can be added to adjust the actual voltage information. In this case, the voltage value indicated by the differential offset value information is 1.25V−0.6V = 0.65V. It goes without saying that this voltage value matches the lower power supply voltage VSS. In the first embodiment, the shift from the ground to the lower power supply voltage VSS corresponds to the voltage value shifted by the difference offset value information. In the first embodiment, instead of this calculation, the actual voltage information is adjusted by calculations performed by the calculation units OP1 to OP4.

  In the first embodiment, the case where the target for adding / subtracting the output voltage offset value information is the actual high-side / low-side power supply voltage value information VR1D, VR2D has been described as an example, but the present invention is limited to this. Instead, it may be configured to add / subtract to the first voltage setting information. The actual high-side power supply voltage information VR1D, the actual low-higher-side power supply voltage information VR2D, the actual reference voltage value information VR3D, the actual PMOS back gate voltage information VR4D, and the actual NMOS back gate voltage information VR5D are examples of actual voltage information. is there.

It is needless to say that the arithmetic units OP1 to OP4 or other arithmetic operations can be implemented either in hardware with a well-known circuit configuration or in software using a well-known arithmetic routine. Yes.

  FIG. 4 is a circuit block diagram showing the second embodiment. In the second embodiment, an amplifier A1 and a comparator CMP1 are provided, and a voltage adjustment unit AD2 to which selectors S1 and S2 are added is provided. The first DC-DC converter 30 includes a sense resistor RS in the current path on the output side from the connection point between the choke coil L1 and the capacitor C1. Both ends of the sense resistor RS are connected to the amplifier A1. The connection point between the choke coil L1 and the capacitor C1 is connected to the non-inverting input terminal, and the output side is connected to the inverting input terminal, and the output current that is voltage-converted by the sense resistor RS is amplified. The output terminal of the amplifier A1 is connected to the non-inverting input terminal of the comparator CMP1. The inverting input terminal of the comparator CMP1 is connected to the reference voltage VRF. The output terminal of the comparator CMP1 is connected to the selection terminals (S) of the selectors S1 and S2.

  Here, the higher power supply voltage VDD corresponds to the first output voltage. The amplifier A1 corresponds to the buffer unit, and the selectors S1, S2 and the registers REGc1, REGc2, REGd1, REGd2 correspond to the selection unit. The reference voltage VRF corresponds to a reference value. Furthermore, the sense resistor RS and the amplifier A1 correspond to a detection unit in the power supply device. In addition, a comparator CMP1, selectors S1 and S2, and registers REGc1, REGc2, REGd1, and REGd2 are provided and correspond to a voltage changing unit. The amplifier A1 corresponds to a detection unit in the control circuit of the power supply device. In addition, a comparator CMP1, selectors S1 and S2, and registers REGc1, REGc2, REGd1, and REGd2 are provided and correspond to a voltage changing unit.

  The selector S1 selects one of the registers REGc1 and REGc2, and is connected to the arithmetic unit OP3 instead of the register REGc in the first embodiment. The other of the arithmetic unit OP3 is connected to the register REG1. The selector S2 selects one of the registers REGd1 and REGd2, and is connected to the arithmetic unit OP4 instead of the register REGd in the first embodiment. The other of the arithmetic unit OP4 is connected to the register REG2.

  The registers REGc1 and REGc2 have different voltage value information to be added to the actual high-side power supply voltage information VR1D when adjusting the actual PMOS backgate voltage information VR4D for setting the physical backgate voltage VBGP of the PMOS transistor. Gate effect voltage value information DVP1 and DVP2 are stored. Similarly, in the registers REGd1 and REGd2, different voltage value information to be subtracted from the actual lower power supply voltage information VR2D when adjusting the actual NMOS backgate voltage information VR5D for setting the physical backgate voltage VBGN of the NMOS transistor. The back gate effect voltage value information DVN1 and DVN2 having is stored. Here, the magnitude relationship between the voltage values indicated by each information is assumed to be DVP1> DVP2, DVN1> DVN2. When the back gate effect voltage value information DVP1 and DVN1 is selected, the actual P / NMOS back gate voltage information VR4D and VR5D exhibiting a larger back gate effect are adjusted.

  In the MOS transistor, when the back gate effect is reduced, the threshold voltage becomes shallower. While the leakage current increases, the operation speed associated with the current driving capability is improved. Conversely, the threshold voltage increases as the back gate effect increases. While the operation speed associated with the current driving capability is limited, the leakage current is reduced. When the semiconductor device composed of MOS transistors is in the operating state, the threshold voltage is reduced by reducing the back gate effect, and in the standby state where the operation is suspended, the threshold voltage is increased by increasing the back gate effect. It is convenient to deepen.

  In the second embodiment shown in FIG. 4, the operating state of the semiconductor device is detected based on the amount of output current flowing through the higher power supply voltage VDD. When the semiconductor device is in the standby state and the output current is small and the output voltage amplified by the amplifier A1 falls below the reference voltage VRF, the output voltage of the comparator CMP1 outputs a low level. At this time, if the selectors S1 and S2 are set to select the registers REGc1 and REGd1, larger voltage value signals DVP1 and DVN1 are selected. The back gate effect will be greatly enhanced. In the standby state, the threshold voltage is set deep and the leakage current can be reduced.

  When the semiconductor device is in an operating state and an output current flows, if the output current increases until the reference voltage VRF exceeds the output voltage of the amplifier A1, the output voltage of the comparator CMP1 outputs a high level. Thereby, since the selectors S1 and S2 select the registers REGc2 and REGd2, smaller voltage value signals DVP2 and DVN2 are selected. The back gate effect will be smaller. In the operating state, the threshold voltage is set shallow, and the operating speed can be improved.

  FIG. 5 is a circuit block diagram showing the power supply device 13 of the third embodiment and the control circuit 23 of the power supply device 13. In the third embodiment, the second DC-DC converter 40 that outputs the lower power supply voltage VSS is not provided. A register REGe is provided instead of the registers REGa to REGd, and a voltage adjusting unit AD3 is provided. The lower power supply voltage VSS is maintained at the same potential as the ground, and other voltage values are generated using the output voltage adjustment magnification information. For example, it is a case where adjustment is performed with predetermined magnification information such as 0.9 times or 1.1 times with respect to the specified value information of the output voltage.

  The voltage adjustment unit AD3 includes calculation units OP5 to OP8. Each of the calculation units OP5 to OP8 is connected to a register REGe and has a logical voltage value as specified value information of a preset output voltage. Voltage value information (VD0, VRF0, VBGP0, VBGN0) is connected. Here, the voltage value information VD0 indicates the specified value information of the power supply voltage, the voltage value information VRF0 indicates the specified value information of the reference voltage, the voltage value information VBGP0 indicates the specified value information of the back gate voltage of the PMOS transistor, Value information VBGN0 indicates prescribed value information of the back gate voltage of the NMOS transistor.

  The register REGe stores output voltage adjustment magnification information. When adjusting the optimum voltage value according to the manufacturing variation of the external device 2 or the like that receives power supply or the combination of individual devices, it may be possible to adjust the voltage value with a predetermined magnification information with respect to the specified value information of the output voltage. In this case, output voltage adjustment magnification information transmitted from the external device 2 or the like is stored.

  The arithmetic units OP5 to OP8 are multipliers. Voltage value information (VD0, VRF0, VBGP0, VBGN0) indicating a predetermined logical voltage value is multiplied by output voltage adjustment magnification information stored in the register REGe. In this case, the multiplier can be easily realized by a well-known circuit configuration or well-known software in the field of digital computation.

  Here, the predetermined voltage value information (VD0, VRF0, VBGP0, VBGN0) corresponds to the second voltage setting information. The output voltage adjustment magnification information may be set as predetermined second voltage setting information, and voltage value information (VD0, VRF0, VBGP0, VBGN0) may be set to be transmitted from the outside.

  The third embodiment shown in FIG. 5 can be applied when the ground of the external device 2 is unchanged and various voltages determined with reference to the ground are adjusted at a predetermined magnification. When it is necessary to adjust the voltage value for each external device 2 and to supply power, etc., if the output voltage adjustment magnification information for the output voltage regulation value information is transmitted from the outside, the output voltage of each external device 2 The voltage value can be output according to the actual voltage information adjusted with respect to the specified value information.

  FIG. 6 is a circuit block diagram showing the power supply device 14 of the fourth embodiment and the control circuit 24 of the power supply device 14. The fourth embodiment is a case where the first voltage setting information is transmitted as code information. A nonvolatile memory AD4 is provided as a voltage adjustment unit.

  Code information from the interface control unit IF is input to an address terminal (AD) as an address signal of the nonvolatile memory AD4, and registers REG1 to REG1 to store actual voltage information for the first to fifth DC-DC converters 30 to 70. A selection signal for selecting REG5 is input to the selection terminals (S) of the registers REG1 to REG5. The output terminal (O) of the nonvolatile memory AD4 is connected to the data input terminals (D) of the registers REG1 to REG5.

  When code information transmitted from the outside such as the external device 2 is output from the interface control unit IF, actual voltage information stored in the nonvolatile memory AD4 is output to the output terminal (O) according to the code information. Is done. For the code information, the corresponding registers REG1 to REG5 are selected simultaneously. As a result, the actual voltage information indicating the physical voltage value output from the nonvolatile memory AD4 is stored in the corresponding register. With respect to the register in which the actual voltage information corresponding to the code information is stored, the corresponding DC-DC converter can be operated.

  The order in which the actual voltage information is stored in the registers REG1 to REG5 is determined according to the input order of the code information. The first to fifth DC-DC converters 30 to 70 can be activated after storage in all the registers REG1 to REG5 is completed. It is also possible to start the corresponding DC-DC converter each time the actual voltage information is stored. In this case, it is necessary to determine the order of the code information output from the external device 2 according to the circuit configuration or device configuration in the external device 2. For example, in the case of the fourth embodiment, after the high power supply voltage VDD and the low power supply voltage VSS are raised in advance, the back gate voltages VBGP, VBGN, and the reference voltage Vref are raised. It is necessary to pay attention to.

  As described above in detail, in the control circuit and the power supply device of the power supply device according to the present embodiment, the output voltage input from the outside as the first voltage setting information by the voltage adjustment units AD, AD1, AD2, AD3, and AD4. The actual voltage information is adjusted according to the specified value information, the output voltage offset value information, the specified value information of the specific voltage, the adjustment value information of the specific voltage, and / or the output voltage adjustment magnification information. Alternatively, output voltage specified value information, output voltage offset value information, specified voltage specified value information, specified voltage adjustment value information, or / and output voltage adjustment magnification information, and second voltage setting information, which are first voltage setting information. The actual voltage information is determined according to the preset value information of the output voltage, the output voltage offset value information, the specified value information of the specific voltage, the adjustment value information of the specific voltage, and / or the output voltage adjustment magnification information. Adjusted. The output voltage of the power supply device is controlled based on the adjusted actual voltage information.

  Further, in the control method of the power supply device of the present embodiment, as the first voltage setting information, output voltage specified value information, output voltage offset value information, specified voltage specified value information, specified voltage adjustment value information, or / And output voltage adjustment magnification information is input, and the input voltage specified value information, output voltage offset value information, specific voltage specified value information, specific voltage adjustment value information, and / or output voltage adjustment magnification information The actual voltage information is adjusted accordingly. Alternatively, the output voltage specified value information, the output voltage offset value information, the specified voltage specified value information, the specified voltage adjustment value information, and / or the output voltage adjustment magnification information are set in advance as the second voltage setting information. Specified value information of output voltage, output voltage offset value information, specified value information of specific voltage, adjustment value information of specific voltage, and / or output voltage adjustment magnification information are input from the outside, and actual voltage information is adjusted. The power supply device controls the output voltage based on the adjusted actual voltage information.

  Accordingly, the voltage value set as the output voltage to the supply destination by the first voltage setting information or / and the second voltage setting information, which is input from the outside or / and determined in advance, is actually required. Even when the physical voltage value is different from the actual voltage value, it is possible to set the desired output voltage by flexibly adjusting the actual voltage information.

  Responds to variations in operating characteristics due to manufacturing variations and usage environments of electronic devices and system devices, depending on the circuit configuration of electronic devices represented by semiconductor devices and system devices configured by combining electronic devices. Thus, the voltage value can be appropriately adjusted and supplied by providing an offset with respect to the specified voltage value or / and adjusting the voltage value with a predetermined adjustment magnification. The operation of the device can be optimized.

  Further, it is possible to easily adjust actual voltage information indicating a specific physical voltage value required for each device from the voltage setting information. There is no need to input a unique voltage value for each device from the outside, and control of the power supply device control circuit and the power supply device can be simplified. Also,

The present invention is not limited to the above-described embodiment, and it goes without saying that various improvements and modifications can be made without departing from the spirit of the present invention.
For example, in the present embodiment, the case where the first to fifth DC-DC converters are provided as constituting the power supply device has been described. However, the present invention is not limited to this, and a linear regulator or other power supply is provided. Needless to say, the present invention can be similarly applied to the apparatus. There is no limitation on the number of output voltages and voltage values provided in the power supply device.

  Further, the control circuit and the power supply device of the power supply device of the present invention can be realized on a semiconductor integrated circuit by a semiconductor technology, or can be realized on a module such as a multichip module (MCP) or a circuit board. In addition to being realized independently as a control circuit for a power supply device and a power supply device, the power supply device can be mounted on other devices.

Here, the means for solving the problems in the background art according to the technical idea of the present invention are listed below.
(Supplementary note 1) A control circuit for a power supply device that controls a voltage value of an output voltage in accordance with an external command,
According to the first voltage setting information input from the outside, or according to the first voltage setting information and the preset second voltage setting information, a voltage adjustment unit that adjusts the actual voltage information,
A control circuit for a power supply apparatus, wherein a voltage value of the output voltage is controlled based on the actual voltage information output from the voltage adjustment unit.
(Additional remark 2) The said voltage adjustment part is provided with the calculating part which performs a calculation between the said 1st voltage setting information and the said 2nd voltage setting information between at least 2 said 1st voltage setting information. The control circuit for a power supply device according to appendix 1, wherein:
(Supplementary Note 3) The first voltage setting information is at least one of specified value information of output voltage and output voltage adjustment magnification information, and the second voltage setting information is specified value information of the output voltage and the output Of the voltage adjustment magnification information, the signal is not determined by the first voltage setting information,
The control circuit for a power supply apparatus according to appendix 2, wherein the calculation unit includes a multiplication unit that multiplies the specified value information of the output voltage by the output voltage adjustment magnification information.
(Supplementary Note 4) The first voltage setting information is at least one of specified value information and output voltage offset value information of the output voltage, and the second voltage setting information is specified value information of the output voltage and the output Among the voltage offset value information is information that is not defined in the first voltage setting information,
The control circuit for a power supply apparatus according to appendix 2, wherein the calculation unit includes an addition unit that adjusts the output voltage offset value information with respect to the specified value information of the output voltage.
(Supplementary Note 5) The first voltage setting information is at least one of output voltage specified value information, specific voltage specified value information, and specific voltage adjustment value information, and the second voltage setting information is: Among the specified value information of the output voltage, the specified value information of the specific voltage, and the adjustment value information of the specific voltage are signals that are not defined in the first voltage setting information,
The voltage adjustment unit includes a subtraction unit that obtains difference offset value information of the adjustment value information of the specific voltage with respect to the specified value information of the specific voltage, and an addition unit that adds the difference offset value information to the specified value information of the output voltage The control circuit for a power supply device according to appendix 2, characterized by comprising:
(Appendix 6) The power supply device outputs a plurality of output voltages having different voltage values,
An output current associated with a first output voltage that is one of the plurality of output voltages is detected, and at least one of the first output voltages excluding the first output voltage based on the detected change in the output current. The control circuit for a power supply apparatus according to appendix 1, further comprising a voltage changing unit that changes the output voltage.
(Supplementary Note 7) The voltage changing unit is
A detection unit for detecting the output current;
A comparison unit that outputs a comparison result between a detection value of the detection unit and a reference value;
A selection unit configured to select the first or / and second voltage setting information in order to adjust the actual voltage information related to a voltage value of at least one of the output voltages based on the comparison result. The control circuit of the power supply device according to appendix 6.
(Supplementary note 8) The control circuit for a power supply device according to supplementary note 7, wherein the detection unit includes a buffer unit that receives the value of the output current converted into a voltage and outputs the detection value.
(Supplementary Note 9) The first voltage setting information is code information associated with a voltage value of the output voltage,
The control circuit for a power supply apparatus according to appendix 1, wherein the voltage adjustment unit includes a conversion table in which the actual voltage information is assigned to the code information.
(Supplementary Note 10) The voltage adjustment unit includes a nonvolatile storage unit in which the conversion table is stored.
The control circuit for a power supply apparatus according to appendix 9, wherein the code information is a signal corresponding to an address signal for the nonvolatile storage unit.
(Supplementary note 11) The control circuit for a power supply device according to supplementary note 1, wherein the first voltage setting information and the second voltage setting information are digital signals.
(Supplementary Note 12) A communication unit is provided.
The control circuit for a power supply apparatus according to appendix 9, wherein the first voltage setting information is received by the communication unit.
(Supplementary note 13) A power supply device in which a voltage value of an output voltage is controlled in accordance with an external command,
According to the first voltage setting information input from the outside, or according to the first voltage setting information and the preset second voltage setting information, a voltage adjustment unit that adjusts the actual voltage information,
The power supply apparatus, wherein a voltage value of the output voltage is controlled based on the actual voltage information output from the voltage adjusting unit.
(Additional remark 14) The said voltage adjustment part is provided with the calculating part which performs a calculation between the said 1st voltage setting information and the said 2nd voltage setting information between at least 2 said 1st voltage setting information. Item 14. The power supply device according to appendix 13.
(Supplementary note 15) Output multiple output voltages with different voltage values,
An output current associated with a first output voltage that is one of the plurality of output voltages is detected, and at least one of the first output voltages excluding the first output voltage based on the detected change in the output current. 14. The power supply apparatus according to appendix 13, further comprising a voltage changing unit that changes the output voltage.
(Supplementary Note 16) The first voltage setting information is code information associated with a voltage value of the output voltage,
The power supply apparatus according to appendix 13, wherein the voltage adjustment unit includes a conversion table in which actual voltage information is assigned to the code information.
(Supplementary Note 17) The voltage adjustment unit includes a nonvolatile storage unit in which the conversion table is stored.
The power supply apparatus according to appendix 16, wherein the code information is a signal corresponding to an address signal for the nonvolatile storage unit.
(Supplementary Note 18) A method for controlling a power supply apparatus in which a voltage value of an output voltage is controlled in accordance with an external command,
A step of inputting first voltage setting information from the outside, or a step of inputting second voltage setting information in advance and inputting the first voltage setting information;
Adjusting actual voltage information according to the first voltage setting information acquired by the input step or according to the first and second voltage setting information acquired by the setting and input step; Have
The method of controlling a power supply apparatus, wherein a voltage value of the output voltage is controlled based on the actual voltage information output in the adjustment step.
(Supplementary note 19) The adjustment step includes a step of performing an operation between at least two pieces of the first voltage setting information or between the first voltage setting information and the second voltage setting information. The control method for a power supply device according to appendix 18, which is characterized by
(Supplementary note 20) Output multiple output voltages with different voltage values,
Detecting an output current associated with a first output voltage that is one of the plurality of output voltages;
The power supply apparatus according to claim 18, further comprising a step of changing at least one of the output voltages excluding the first output voltage based on a change in the output current detected in the detection step. .
(Supplementary Note 21) A step of associating code information with the actual voltage information in advance,
In the input step, the code information is input as the first voltage setting information,
19. The method for controlling a power supply device according to appendix 18, wherein in the adjustment step, the actual voltage information associated with the code information is output in the association step.

It is a figure which shows the connection of a power supply device and the external device which receives supply of power. It is a principle diagram of the present invention. It is a figure which shows the voltage adjustment part of 1st Embodiment. It is a figure which shows 2nd Embodiment. It is a figure which shows 3rd Embodiment. It is a figure which shows 4th Embodiment. In background art, it is a figure which shows the interface of LS I for control and DDR memory.

DESCRIPTION OF SYMBOLS 1, 13, 14 Power supply device 2 External device 20, 23, 24 Control circuit 30 thru | or 70 1st thru | or 5th DC-DC converter A1 Amplifier AD, AD1 thru | or AD3 Voltage adjustment part AD4 Nonvolatile memory C1 thru | or C5 Capacitor CMP1 Comparator DAC1 Through DAC5 DA converters EA1 through EA5 error amplifier IF interface control units L1 through L5 choke coils O1 through O5 triangular wave oscillators OP1 through OP8 arithmetic units PWM1 through PWM5 PWM comparators REG1 through REG5, REGa through REGe, REGc1, REGc2, REGd1, REGd2 registers RS sense resistors S1, S2 selectors T11 to T51 main switching transistors T12 to T52 synchronous side switching transistors

Claims (5)

A control circuit of a power supply device that controls a voltage value of an output voltage according to a command from the outside,
According to the first voltage setting information input from the outside, or according to the first voltage setting information and the preset second voltage setting information, a voltage adjustment unit that adjusts the actual voltage information,
The voltage adjustment unit includes a calculation unit that performs calculation between at least two pieces of the first voltage setting information or between the first voltage setting information and the second voltage setting information.
The first voltage setting information is specified as output voltage specified value information, specified voltage specified value information indicating a voltage value that is a half of a voltage value indicated by the output voltage specified value information, and reference voltage value information. At least one of voltage adjustment value information, and the second voltage setting information includes the output voltage specification value information, the specific voltage specification value information, and the specific voltage adjustment value information. 1 It is a signal that is not defined in the voltage setting information,
The calculation unit includes a subtraction unit that obtains differential offset value information of the adjustment value information of the specific voltage with respect to the specified value information of the specific voltage, and an addition unit that adds the differential offset value information to the specified value information of the output voltage; With
A control circuit for a power supply apparatus, wherein a voltage value of the output voltage is controlled based on the actual voltage information output from the voltage adjustment unit. The power supply device outputs a plurality of output voltages having different voltage values,
An output current associated with a first output voltage that is one of the plurality of output voltages is detected, and at least one of the first output voltages excluding the first output voltage based on the detected change in the output current. The control circuit for a power supply apparatus according to claim 1, further comprising a voltage changing unit that changes the output voltage. A power supply device in which a voltage value of an output voltage is controlled according to a command from the outside,
According to the first voltage setting information input from the outside, or according to the first voltage setting information and the preset second voltage setting information, a voltage adjustment unit that adjusts the actual voltage information,
The voltage adjustment unit includes a calculation unit that performs calculation between at least two pieces of the first voltage setting information or between the first voltage setting information and the second voltage setting information.
The first voltage setting information is specified as output voltage specified value information, specified voltage specified value information indicating a voltage value that is a half of a voltage value indicated by the output voltage specified value information, and reference voltage value information. At least one of voltage adjustment value information, and the second voltage setting information includes the output voltage specification value information, the specific voltage specification value information, and the specific voltage adjustment value information. 1 It is a signal that is not defined in the voltage setting information,
The calculation unit includes a subtraction unit that obtains differential offset value information of the adjustment value information of the specific voltage with respect to the specified value information of the specific voltage, and an addition unit that adds the differential offset value information to the specified value information of the output voltage; With
The power supply apparatus, wherein a voltage value of the output voltage is controlled based on the actual voltage information output from the voltage adjusting unit. A method for controlling a power supply apparatus in which a voltage value of an output voltage is controlled in accordance with an external command,
A step of inputting first voltage setting information from the outside, or a step of inputting second voltage setting information in advance and inputting the first voltage setting information;
Adjusting actual voltage information according to the first voltage setting information acquired by the input step or according to the first and second voltage setting information acquired by the setting and input step; Have
The adjusting step includes a step of performing an operation between at least two pieces of the first voltage setting information or between the first voltage setting information and the second voltage setting information.
The first voltage setting information is specified as output voltage specified value information, specified voltage specified value information indicating a voltage value that is a half of a voltage value indicated by the output voltage specified value information, and reference voltage value information. At least one of voltage adjustment value information, and the second voltage setting information includes the output voltage specification value information, the specific voltage specification value information, and the specific voltage adjustment value information. 1 It is a signal that is not defined in the voltage setting information,
The calculating step includes a step of obtaining difference offset value information of the adjustment value information of the specific voltage with respect to the specified value information of the specific voltage, and a step of adding the difference offset value information to the specified value information of the output voltage. Prepared,
The method of controlling a power supply apparatus, wherein a voltage value of the output voltage is controlled based on the actual voltage information output in the adjustment step. The adjusting step includes a step of performing an operation between at least two pieces of the first voltage setting information or between the first voltage setting information and the second voltage setting information. Item 5. A power supply device control method according to Item 4 .

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