JP4830829B2 - Insulated gate transistor drive circuit - Google Patents

Description

  The present invention relates to a circuit for driving an insulated gate transistor.

  There is known a switching circuit that switches between a state in which power is supplied to a load and a state in which power is not supplied by switching on / off of a transistor connected to the load. For example, the inverter circuit converts DC power into AC power by switching on / off of the transistor, and supplies the AC power to the motor. On / off of a transistor in this type of switching circuit is controlled by a drive circuit connected to the gate electrode (or base electrode) of the transistor.

  FIG. 7 shows an operation waveform diagram in the case where a field effect transistor (FET) is used as this type of transistor in a conventional inverter circuit. The drive circuit switches the transistor on and off by supplying the drive voltage Vin to the gate electrode of the transistor.

  First, the transition period in which the transistor is turned on will be described. When the drive voltage Vin changes from low to high, a positive gate current Ig flows toward the gate electrode of the transistor, and charges are accumulated in the gate electrode. When charges are accumulated in the gate electrode, the gate-source voltage Vgs of the transistor increases. When the gate-source voltage Vgs rises, the drain current Id starts to flow from the drain to the source of the transistor, and the drain-source voltage Vds decreases. Through these processes, the transistor shifts from off to on.

  Next, the transition period T100 in which the transistor is turned off will be described. When the drive voltage Vin changes from high to low, the charge accumulated in the gate electrode is discharged, a negative gate current Ig flows from the gate electrode toward the drive circuit, and the gate-source voltage Vgs decreases. When the gate-source voltage Vgs decreases, the drain current Id also decreases, and the drain-source voltage Vds increases. Through these processes, the transistor shifts from on to off.

  As shown in FIG. 7, a surge voltage (ringing) is generated in the drain-source voltage Vds at the end of the transition period T100 when the transistor is turned off. This surge voltage is caused by the drain current Id that fluctuates sharply and the inductance that is parasitic on the wiring on the drain electrode side in the circuit. When ringing occurs, it becomes noise and may cause malfunction.

  In order to suppress the increase of the surge voltage, the drain current Id may be gradually changed. For example, if the gate resistance of the transistor is increased, the rate at which charges accumulated in the gate electrode are discharged decreases, and the negative gate current Ig flows gently. As a result, the drain current Id also gradually decreases, and an increase in surge voltage can be suppressed. However, when the drain current Id of the transistor gradually decreases, the time required for the transistor to turn off increases and the switching loss (turn-off loss) increases. That is, the switching loss is the product of the drain voltage Vds and the drain current Id at the time of switching. Therefore, when the drain voltage Vds changes slowly, the switching loss is an integral value of the product of Vds and Id, and the loss increases. Thus, in this type of transistor, a trade-off relationship exists between the surge voltage and the turn-off loss in the turn-off transition period T100.

  In order to break this trade-off relationship, it is desirable to cause the drain current Id to change steeply at the beginning of the turn-off transition period T100, and to slowly change the drain current Id at the end of the transition period T100. If the drain current Id is abruptly changed at the beginning of the transition period T100, the time required for turn-off can be shortened. As a result, turn-off loss can be kept low. Further, if the drain current Id is slowly changed at the end of the transition period T100, an increase in surge voltage can be suppressed.

  Patent Document 1 discloses a technique for adjusting a resistance value of a gate resistance of a transistor based on a voltage between main electrodes of the transistor (a voltage between a drain electrode and a source electrode, a voltage between a collector electrode and an emitter electrode, and the like). In the technique of Patent Document 1, the resistance value of the gate resistance is increased when the voltage between the main electrodes of the transistor is large, and the resistance value of the gate resistance is adjusted small when the voltage between the main electrodes is small. Specifically, the drive circuit of Patent Document 1 includes variable resistance means connected to the gate electrode of the transistor. The resistance variable means is composed of a semiconductor switching element and a fixed resistor connected in parallel thereto. The semiconductor switching element is turned off when the voltage between the main electrodes of the transistor is larger than a predetermined value, and is turned on when the voltage is smaller than the predetermined value. That is, when the voltage between the main electrodes of the transistor is large, the gate resistance is largely adjusted according to the resistance value of the fixed resistor by turning off the semiconductor switching element. When the voltage between the main electrodes of the transistor is small, the gate resistance is adjusted to be small according to the internal resistance of the semiconductor switching element by turning on the semiconductor switching element.

If the drive circuit of Patent Document 1 is used, the resistance value of the gate resistance is adjusted to be small by turning on the semiconductor switching element at the beginning of the turn-off transition period (when the voltage between the main electrodes is small), and the gate current is steep. Fluctuates. As a result, the drain current of the transistor can be abruptly changed, and the time required for turn-off can be shortened. Further, at the end of the turn-off transition period (when the voltage between the main electrodes is large), the semiconductor switching element is turned off, so that the resistance value of the gate resistance is greatly adjusted, and the gate current fluctuates slowly. As a result, the drain current of the transistor can be changed slowly, and an increase in surge voltage can be suppressed.
Japanese Patent Laid-Open No. Hei 6-291631

  In the drive circuit of Patent Document 1, a high resistance state of the gate resistance is realized by using a high resistance fixed resistor. In order to suppress an increase in surge voltage, it is desirable to set the resistance value of the fixed resistor large. However, a high resistance fixed resistor increases turn-off loss. Therefore, in order to suppress an increase in turn-off loss, the timing for switching to a high-resistance fixed resistor by the on / off operation of the semiconductor switching element must be set at the end of the transition period in which the turn-off occurs. At the end of the transition period when the transistor is turned off, the voltage between the main electrodes of the transistor reaches a high level. In the drive circuit of Patent Document 1, the on / off operation of the semiconductor switching element must be controlled by accurately transforming the voltage between the main electrodes of the transistor to the threshold value of the on / off operation of the semiconductor switching element. Therefore, in order to realize such a circuit, the number of necessary parts increases, and an increase in cost is inevitable.

  The present invention provides a technique for adjusting a resistance value of a gate resistance of a transistor based on a voltage between main electrodes of an insulated gate transistor by a method different from that of Patent Document 1.

  The drive circuit for an insulated gate transistor according to claim 1, wherein a first diode having a gate electrode side of the insulated gate transistor as an anode electrode and a second diode having a gate electrode side of the insulated gate transistor as a cathode electrode are provided. The depletion type P-channel MOSFET is inserted and arranged between the anode electrode of the first diode and the cathode electrode of the second diode, connected in parallel and inserted in the gate drive signal line of the insulated gate transistor. The gate electrode of the depletion type P-channel MOSFET is connected to the output electrode of the insulated gate transistor through a resistor.

  The first diode and the second diode in the driving circuit are respectively inserted to select switching from on to off and switching from off to on of the gate drive signal (for example, a rectangular wave). Therefore, in the above drive circuit, when the gate drive signal (for example, rectangular wave) is switched from on to off, the depletion type P-channel MOSFET functions as follows in the gate drive signal line of the insulated gate transistor. .

  The depletion type P-channel MOSFET is an element that turns on when the gate potential of the depletion-type MOSFET is lowered and enters a low resistance state, and turns off when the gate potential of the depletion-type MOSFET rises and enters a normally-on high resistance state. The gate electrode of the depletion type P-channel MOSFET in the drive circuit is connected to the output electrode of the insulated gate transistor via a resistor. Therefore, after the gate drive signal is switched from on to off, the depletion type P-channel MOSFET can be set to switch from on to off (normally on state) while the output potential of the insulated gate transistor rises. Is possible. In other words, the resistance of the depletion type P-channel MOSFET inserted in the gate drive signal line of the insulated gate transistor is set to switch from the low resistance state to the high resistance state while the output potential of the insulated gate transistor rises. To do.

  As a result, at the beginning of the turn-off transition period (when the voltage between the main electrodes of the insulated gate transistor is small), the gate input resistance of the insulated gate transistor is adjusted to be small, and the drain (collector) current of the insulated gate transistor is abruptly changed. Thus, the time required for turn-off can be shortened. In addition, at the end of the turn-off transition period (when the voltage between the main electrodes of the insulated gate transistor is large), the gate input resistance of the insulated gate transistor is greatly adjusted, and the drain (collector) current of the insulated gate transistor is slowly changed, An increase in surge voltage (ringing) can be suppressed.

  As described above, according to the insulated gate transistor driving circuit, at the time of turn-off, two effects of suppressing an increase in switching loss while suppressing ringing noise of the insulated gate transistor can be achieved.

  In order to obtain the above effect, it is also possible to use a combination of two resistance elements having a low resistance value and a high resistance value and a switching element as in the prior art. However, in the drive circuit for the insulated gate transistor, the above effect can be realized by a single depletion type P-channel MOSFET, and the size and the manufacturing cost can be reduced as compared with the conventional one. Further, in order to obtain the above effect, a resistance value is obtained by spreading a depletion layer to the P conductivity type diffusion region by using a joined body of the P conductivity type diffusion region and the N conductivity type diffusion region instead of the depletion type P channel MOSFET. A so-called pinch resistor can be used. However, in the pinch resistor, the voltage dependency of the resistance value is almost linear, and the change is slow. On the other hand, the resistance value of the depletion type P-channel MOSFET changes rapidly by orders of magnitude near the threshold voltage. Therefore, the depletion type P-channel MOSFET is suitable for application to a steep change in a turn-off transition period.

  3. The insulated gate transistor drive circuit according to claim 2, wherein a first diode having an anode electrode on a gate electrode side of the insulated gate transistor and a second diode having a cathode electrode on the gate electrode side of the insulated gate transistor are provided. The depletion type N-channel MOSFET is inserted and arranged between the cathode electrode of the second diode and the anode electrode of the first diode, connected in parallel and inserted into the gate drive signal line of the insulated gate transistor. The gate electrode of the depletion type N-channel MOSFET is connected to the output electrode of the insulated gate transistor through a resistor.

  In the drive circuit, a depletion type N-channel MOSFET is inserted between the cathode electrode of the second diode and the anode electrode of the first diode, contrary to the drive circuit described in claim 1. Accordingly, in the above drive circuit, contrary to the drive circuit according to claim 1, when the gate drive signal is switched from OFF to ON, the depletion type N-channel MOSFET is connected to the gate drive signal line of the insulated gate transistor. It will function as follows.

  A depletion type N-channel MOSFET is an element that is turned off when the gate potential of the depletion type N-channel MOSFET is lowered to be in a normally-on high resistance state, and is turned on and turned into a low-resistance state when the gate potential is increased. The gate electrode of the depletion type N-channel MOSFET is connected to the output electrode of the insulated gate transistor through a resistor. Therefore, after the gate drive signal is switched from OFF to ON, the depletion type N-channel MOSFET can be set to switch from ON to OFF (normally ON state) while the output potential of the insulated gate transistor decreases. Is possible. In other words, the resistance of the depletion type N-channel MOSFET inserted and arranged in the gate drive signal line of the insulated gate transistor is set to switch from the low resistance state to the high resistance state while the output potential of the insulated gate transistor is lowered. To do.

  As a result, at the beginning of the turn-on transition period (when the voltage between the main electrodes of the insulated gate transistor is large), the gate input resistance of the insulated gate transistor is adjusted to be small, and the drain (collector) current of the insulated gate transistor is abruptly changed. The time required for turn-on can be shortened. Furthermore, at the end of the turn-on transition period (when the voltage between the main electrodes of the insulated gate transistor is small), the gate input resistance of the insulated gate transistor is greatly adjusted, and the drain (collector) current of the insulated gate transistor is slowly changed, An increase in surge voltage (ringing) can be suppressed.

  As described above, according to the insulated gate transistor drive circuit, the two effects of suppressing the increase in switching loss while suppressing the ringing noise of the insulated gate transistor at the time of turn-on can be achieved.

  The drive circuit is also reduced in size as compared with the case of using a combination of two resistance elements having a low resistance value and a high resistance value and a switching element as in the prior art. Needless to say, the manufacturing cost can be reduced. Further, the resistance value of the depletion type N-channel MOSFET changes rapidly in the vicinity of the threshold voltage as compared with the case where a pinch resistor composed of a junction of a P conductivity type diffusion region and an N conductivity type diffusion region is used. . Therefore, the depletion type N-channel MOSFET is suitable for application to a steep change in the turn-on transition period.

  As described in claim 3, in the drive circuit according to claim 1, the cathode electrode of the second diode and the main electrode on the gate electrode side of the insulated gate transistor in the depletion type P-channel MOSFET. A depletion type N-channel MOSFET is interposed therebetween, a gate electrode of the depletion type N channel MOSFET is connected to a gate electrode of the depletion type P channel MOSFET, and a gate electrode of the depletion type N channel MOSFET is connected to the resistor It is preferable to be connected to the output electrode of the insulated gate transistor via

  According to this, as described above, the combination of the first diode and the depletion type P-channel MOSFET can suppress an increase in switching loss while suppressing ringing noise when the insulated gate transistor is turned off. Further, the combination of the second diode and the depletion type N-channel MOSFET can suppress an increase in switching loss while suppressing ringing noise when the insulated gate transistor is turned on.

  The insulated gate transistor in the drive circuit may be a MOSFET or an IGBT as described in claim 4, for example.

  When the insulated gate transistor is a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), the output electrode is a drain electrode. When the insulated gate transistor is an IGBT (Insulated Gate Bipolar Transistor), the output electrode serves as a collector electrode.

  The drive circuit described above can suppress an increase in switching loss while suppressing ringing noise of the insulated gate transistor as described above. Therefore, as described in claim 5, the insulated gate transistor drive circuit is preferably used as an insulated gate transistor drive circuit in an inverter circuit.

  The drive circuit described above is small and inexpensive as described above, and exhibits high performance in suppressing ringing noise and switching loss of an insulated gate transistor. Therefore, as described in claim 6, the insulated gate transistor drive circuit is particularly suitable as a drive circuit for an automotive insulated gate transistor that is required to be small, inexpensive, and high performance.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

  FIG. 1 is a circuit diagram relating to a drive circuit K1 for an insulated gate transistor, which is an example of the present invention.

  A drive circuit K1 surrounded by a broken line in FIG. 1 is a circuit for driving the insulated gate transistor 20. Insulated gate transistor 20 is represented by a circuit symbol of an enhancement type N-channel MOSFET (hereinafter abbreviated as ENMOS) in FIG. 1, but may be another type of MOSFET (Metal Oxide Semiconductor Field Effect Transistor), for example. Alternatively, an IGBT (Insulated Gate Bipolar Transistor) may be used. When the insulated gate transistor 20 is a MOSFET, the output electrode on the power supply Vdd side is the drain electrode. When the insulated gate transistor 20 is an IGBT, the output electrode on the power supply Vdd side becomes a collector electrode. Note that a resistive load R3 and an inductive load L1 are connected in series to the insulated gate transistor 20 of FIG.

  In the drive circuit K1 surrounded by the broken line in FIG. 1, a first diode D1 having an anode electrode on the gate electrode side of the EMMOS 20 and a second diode D2 having a cathode electrode on the gate electrode side of the EMMOS 20 are connected in parallel. It is inserted into the gate drive signal line of the ENMOS 20. A depletion type P-channel MOSFET (hereinafter abbreviated as DPMOS) 10 is inserted between the anode electrode of the first diode D1 and the cathode electrode of the second diode D2. The gate electrode of the DPMOS 10 is connected to the output electrode of the ENMOS 20 through the resistor R2. The resistor R1 in the drive circuit K1 is a resistor for adjusting the gate current to the ENEMOS 20.

  The first diode D1 in the drive circuit K1 operates when the gate drive signal (rectangular wave in the figure) Vin is Lo, and functions when the gate accumulated charge of the EMMOS 20 is discharged and the gate voltage Vgs is lowered. The second diode D2 in the drive circuit K1 operates when the gate drive signal (rectangular wave in the drawing) Vin is Hi, charges the gate accumulated charge of the EMMOS 20, and functions when the gate voltage Vgs is increased. As described above, the first diode D1 and the second diode D2 in the drive circuit K1 respectively switch the gate drive signal (for example, a rectangular wave in the figure) Vin from on to off and from off to on. Has been inserted to select. Therefore, in the drive circuit K1 of FIG. 1, when the gate drive signal Vin is switched from on to off, the DPMOS 10 functions as follows in the gate drive signal line of the ENEMOS 20 that is the output transistor.

  FIG. 2 is a diagram (timing chart) showing operation waveforms of DPMOS 10 and ENMOS 20 when the gate drive signal Vin is switched from on to off in the drive circuit K1.

  The depletion type P-channel MOSFET (DPMOS 10) is turned on when its own gate potential vgs falls below its negative threshold voltage and enters a low resistance (less than several ohms) state, and its own gate potential vgs becomes its negative threshold voltage. When it is further raised, it is turned off and becomes a normally-on high resistance state (several hundred ohms or more). The gate electrode of the DPMOS 10 in the drive circuit K1 of FIG. 1 is connected to the drain electrode that is the output electrode of the EMMOS 20 via the resistor R2. Therefore, as shown in FIG. 2, after the gate drive signal Vin is switched from on to off at time t1, the gate potential vgs of the DPMOS 10 is negative while the output potential (drain voltage) Vds of the EMMOS 20 rises. It can be set so that the DPMOS 10 is switched from ON to OFF (normally ON state) when the threshold voltage is exceeded. In other words, the resistance of the DPMOS 10 inserted in the gate drive signal line of the EMMOS 20 is set to switch from the low resistance state to the high resistance state while the output potential Vds of the EMMOS 20 is rising.

  As a result, at the beginning of the turn-off transition period (between time t1 and time t2 when the voltage Vds between the main electrodes of the ENEMOS 20 is small), the gate input resistance of the ENEMOS 20 is adjusted to be small, and the drain current of the ENEMOS 20 varies rapidly. Thus, the time required for turn-off can be shortened. That is, at the beginning of the turn-off, the storage capacity of the gate of the EMMOS 20 flows to the Lo signal of the gate drive signal Vin through the DPMOS 10 in the low resistance state, the first diode D1, and the resistor R1, and the gate voltage Vgs of the EMMOS 20 is steep. Along with the decrease, the drain current of the EMMOS 20 also sharply decreases. As a result, switching switching can be performed quickly, so that switching loss can be reduced.

  At the end of the turn-off transition period (after time t2, when the voltage Vds between the main electrodes of the ENEMOS 20 is large), the gate input resistance of the ENEMOS 20 is adjusted to be large, and the drain current is slowly changed along with the gate voltage Vgs of the ENEMOS 20. The increase in surge voltage (ringing) at the drain voltage Vds shown in FIG. 7 can be suppressed as shown in FIG. That is, at the end of turn-off, the storage capacity of the gate of the EMMOS 20 flows to the Lo signal of the gate drive signal Vin through the DPMOS 10 in the high resistance state, the first diode D1, and the resistor R1, and the gate voltage Vgs of the EMMOS 20 is slow. descend. Further, since the drain current of the EMMOS 20 also slowly decreases, overshoot (ringing) of the output potential (drain voltage) Vds due to the L component existing around the inductive load L1 and the resistive load R3 can be prevented.

  As described above, according to the insulated gate transistor drive circuit K1 shown in FIG. 1, at the time of turn-off, the two effects of suppressing the increase of the switching loss while suppressing the ringing noise of the insulated gate transistor 20 are achieved. be able to.

  In order to obtain the above effect, it is also possible to use a combination of two resistance elements having a low resistance value and a high resistance value and a switching element as in the prior art. However, in the drive circuit K1 of FIG. 1, the above effect can be realized by a single depletion type P-channel MOSFET (DPMOS 10), and the size and the manufacturing cost can be reduced as compared with the conventional circuit. Further, in order to obtain the above effect, a depletion layer spreads to the P conductivity type diffusion region by using a junction of the P conductivity type diffusion region and the N conductivity type diffusion region instead of the depletion type P channel MOSFET (DPMOS 10). It is also possible to use a so-called pinch resistor whose resistance value is determined by. However, in the pinch resistor, the voltage dependency of the resistance value is almost linear, and the change is slow. On the other hand, the resistance value of the depletion type P-channel MOSFET (DPMOS 10) changes rapidly in the vicinity of the threshold voltage. Therefore, the depletion type P-channel MOSFET (DPMOS 10) is suitable for application to a sharp change in the turn-off transition period.

  FIG. 3 is another example and is a circuit diagram relating to a drive circuit K2 for an insulated gate transistor. 3 that are the same as those in the circuit diagram of FIG. 1 are assigned the same reference numerals.

  In the drive circuit K2 surrounded by the broken line in FIG. 3, the depletion is performed between the cathode electrode of the second diode D2 and the anode electrode of the first diode D1, contrary to the drive circuit K1 surrounded by the broken line in FIG. A type N-channel MOSFET (hereinafter abbreviated as DNMOS) 11 is inserted and arranged. The gate electrode of the DNMOS 11 is connected to the output electrode of the EMMOS 20 via the resistor R2. Therefore, in the drive circuit K2 of FIG. 3, contrary to the drive circuit K1 of FIG. 1, when the gate drive signal Vin is switched from OFF to ON, the DNMOS 11 is connected to the gate drive signal line of the ENEMOS 20 as an output transistor. It will function as follows.

  FIG. 4 is a diagram (timing chart) showing operation waveforms of DNMOS 11 and ENMOS 20 when the gate drive signal Vin is switched from OFF to ON in the drive circuit K2.

  The depletion type N-channel MOSFET (DNMOS 11) is turned off when its own gate potential vgs falls below its own positive threshold voltage, and is in a normally-on high resistance (several hundreds ohms) state. It is an element that turns on when it rises above the positive threshold voltage, and enters a low resistance (several ohms or less) state. The gate electrode of DNMOS 11 in the drive circuit K2 of FIG. 3 is connected to the drain electrode, which is the output electrode of ENEMOS 20, via a resistor R2. Therefore, as shown in FIG. 4, after the gate drive signal Vin is switched from OFF to ON at time t3, the gate potential vgs of the DNMOS 11 falls below its own positive threshold voltage while the output potential Vds of the NNMOS 20 decreases. Thus, it is possible to set so that the DNMOS 11 is switched from ON to OFF (normally ON state). In other words, while the output potential Vds of the EMMOS 20 is decreasing, the resistance of the DNMOS 11 inserted in the gate drive signal line of the EMMOS 20 is set to switch from the low resistance state to the high resistance state.

  As a result, at the beginning of the turn-on transition period (between time t3 and time t4, when the voltage Vds between the main electrodes of the ENEMOS 20 is large), the gate input resistance of the ENEMOS 20 is adjusted to be small, and the drain current of the ENEMOS 20 varies rapidly. Thus, the time required for turn-on can be shortened. That is, at the beginning of turn-on, the storage capacity of the gate of the EMMOS 20 flows from the Hi signal of the gate drive signal Vin through the resistor R1, the second diode D2, and the DNMOS 11 in the low resistance state, and the gate voltage Vgs of the EMMOS 20 is steep. As it rises, the drain current of the ENEMOS 20 also rises sharply. As a result, switching switching can be performed quickly, so that switching loss can be reduced.

  At the end of the turn-on transition period (after time t4, when the voltage Vds between the main electrodes of the ENEMOS 20 is small), the gate input resistance of the ENEMOS 20 is adjusted to be large, and the drain current is slowly changed along with the gate voltage Vgs of the ENEMOS 20. As shown by the drain voltage Vds of 4, the increase of the surge voltage (ringing) accompanying the turn-on of the gate drive signal can be suppressed. That is, at the end of turn-on, the storage capacity of the gate of the EMMOS 20 flows from the Lo signal of the gate drive signal Vin through the resistor R1, the second diode D2, and the DNMOS 11 in the high resistance state, and the gate voltage Vgs of the EMMOS 20 is slow. To rise. Further, since the drain current of the EMMOS 20 also rises slowly, overshoot (ringing) of the output potential (drain voltage) Vds due to the L component existing around the inductive load L1 and the resistance load R3 can be prevented.

  As described above, according to the insulated gate transistor drive circuit K2 shown in FIG. 3, at the time of turn-on, the two effects of suppressing the increase in switching loss while suppressing the ringing noise of the insulated gate transistor 20 are achieved. be able to.

  Note that the drive circuit K2 of FIG. 3 is also smaller than the case of using a combination of two resistance elements having a low resistance value and a high resistance value and a switching element as in the prior art, like the drive circuit K1 of FIG. Needless to say, the manufacturing cost can be reduced. In addition, the resistance value of the depletion type N-channel MOSFET (DNMOS 11) is orders of magnitude faster in the vicinity of the threshold voltage than in the case of using a pinch resistor composed of a junction of a P conductivity type diffusion region and an N conductivity type diffusion region. To change. Therefore, the depletion type N-channel MOSFET (DNMOS 11) is suitable for application to a sharp change in the turn-on transition period.

  FIG. 5 is another example and is a circuit diagram relating to a drive circuit K3 for an insulated gate transistor. 5 that are the same as those in the circuit diagram of FIG. 1 and those in the circuit diagram of FIG. 3 are denoted by the same reference numerals. FIG. 6 is a diagram (timing chart) showing operation waveforms of DPMOS 10, DNMOS 11, and ENMOS 20 in the drive circuit K3 when the gate drive signal Vin is switched from off to on and from on to off.

  In addition to the drive circuit K1 surrounded by the broken line in FIG. 1, the drive circuit K3 surrounded by the broken line in FIG. 5 is provided between the cathode electrode of the second diode D2 and the main electrode on the gate electrode side of the EMMOS 20 in the DPMOS 10. In addition, a depletion type N-channel MOSFET (DNMOS) 11 is inserted and arranged. The gate electrode of the DNMOS 11 and the gate electrode of the DPMOS 10 are connected to each other, and the gate electrode of the DNMOS 11 is also connected to the output electrode of the ENMOS 20 via the resistor R2. In other words, the drive circuit K3 surrounded by the broken line in FIG. 5 is a circuit in which the drive circuit K1 surrounded by the broken line in FIG. 1 and the drive circuit K2 surrounded by the broken line in FIG.

  Therefore, in the drive circuit K3 of FIG. 5, the DNMOS 11 functions when the gate drive signal Vin is switched from OFF to ON (near times t3 and t4 in FIG. 6), and the DPMOS 10 switches from the ON of the gate drive signal Vin to OFF. Function at the time of switching (near times t1 and t2 in FIG. 6). For this reason, the operation waveform of the EMMOS 20 in the drive circuit K3 shown in FIG. 6 is also a combination of the operation waveform of the EMMOS 20 in the drive circuit K1 shown in FIG. 2 and the operation waveform of the ENEMOS 20 in the drive circuit K2 shown in FIG.

  As described above, according to the insulated gate transistor drive circuit K3 shown in FIG. 5, the combination of the first diode D1 and the DPMOS 10 can suppress the ringing noise at the turn-off of the EMMOS 20 and suppress the increase in switching loss. it can. Further, the combination of the second diode D2 and DNMOS 11 can suppress an increase in switching loss while suppressing ringing noise when the EMMOS 20 is turned on.

  The depletion resistance value and threshold voltage value of DPMOS 10 and DNMOS 11 in the drive circuits K1 to K3 are appropriately set to values that can shorten the switching time in a range where the overshoot is small. For example, the resistance value during depletion is 1 kΩ, and the threshold voltage value is 1V.

  The insulated gate transistor drive circuits K1 to K3 described above can be configured in one IC. In addition, the structure using the SOI substrate and the trench isolation can be resistant to noise. Further, by using a structure using an SOI substrate and trench isolation, the output potential (drain voltage) Vds becomes higher (high voltage) than the power supply potential (power supply voltage) Vdd, or lower than the GND voltage. However, parasitic effects do not occur, and it is easy to make one chip, and the size can be reduced. For example, an SOI substrate and trench isolation are used together, the insulated gate transistor 20 is configured by LDMOS (Lateral Diffused Metal Oxide Semiconductor), the DPMOS 10 and DNMOS 11 are configured by CMOS (Complementary Metal Oxide Semiconductor, complementary MOS) transistors, and the first The diode D1 and the second diode D2 are composed of bulk diodes.

  Any of the insulated gate transistor drive circuits K1 to K3 described above can suppress an increase in switching loss while suppressing ringing noise of the insulated gate transistor 20. Therefore, the insulated gate transistor drive circuits K1 to K3 are preferably used as a drive circuit for the insulated gate transistor 20 in the inverter circuit.

  In addition, the insulated gate transistor drive circuits K1 to K3 described above are small and inexpensive as described above, and exhibit high performance in suppressing ringing noise and switching loss of the insulated gate transistor 20. Accordingly, the insulated gate transistor drive circuits K1 to K3 are particularly suitable as a drive circuit for an automotive insulated gate transistor that is required to be small, inexpensive, and high performance.

FIG. 4 is a circuit diagram relating to an insulated gate transistor drive circuit K1 according to an example of the present invention. FIG. 6 is a diagram (timing chart) showing operation waveforms of DPMOS 10 and ENMOS 20 when the gate drive signal Vin is switched from on to off in the drive circuit K1. In another example, it is a circuit diagram relating to a drive circuit K2 for an insulated gate transistor. FIG. 10 is a diagram (timing chart) showing operation waveforms of DNMOS 11 and ENMOS 20 when the gate drive signal Vin is switched from OFF to ON in the drive circuit K2. In another example, it is a circuit diagram relating to a drive circuit K3 for an insulated gate transistor. FIG. 7 is a diagram (timing chart) showing operation waveforms of DPMOS 10, DNMOS 11, and ENMOS 20 when the gate drive signal Vin is switched from off to on and from on to off in the drive circuit K3. It is a figure which shows the operation | movement waveform at the time of using a field effect type transistor (FET) in the conventional inverter circuit.

Explanation of symbols

K1 to K3 Insulated gate transistor drive circuit 10 Depletion type P-channel MOSFET (DPMOS)
11 Depletion type N-channel MOSFET (DNMOS)
20 Insulated gate transistor (ENMOS)
D1 1st diode D2 2nd diode R1, R2 Resistance R3 Resistance load L1 Inductive load

Claims (6)

A drive circuit for an insulated gate transistor,
A gate driving signal of the insulated gate transistor is connected in parallel with a first diode having the gate electrode side of the insulated gate transistor as an anode electrode and a second diode having a gate electrode side of the insulated gate transistor as a cathode electrode. Inserted into the line,
A depletion type P-channel MOSFET is inserted between the anode electrode of the first diode and the cathode electrode of the second diode,
A drive circuit for an insulated gate transistor, wherein a gate electrode of the depletion type P-channel MOSFET is connected to an output electrode of the insulated gate transistor through a resistor. A drive circuit for an insulated gate transistor,
A gate driving signal of the insulated gate transistor is connected in parallel with a first diode having the gate electrode side of the insulated gate transistor as an anode electrode and a second diode having a gate electrode side of the insulated gate transistor as a cathode electrode. Inserted into the line,
A depletion type N-channel MOSFET is disposed between the cathode electrode of the second diode and the anode electrode of the first diode,
A drive circuit for an insulated gate transistor, wherein a gate electrode of the depletion type N-channel MOSFET is connected to an output electrode of the insulated gate transistor via a resistor. A depletion type N-channel MOSFET is inserted between the cathode electrode of the second diode and the main electrode on the gate electrode side of the insulated gate transistor in the depletion type P-channel MOSFET,
A gate electrode of the depletion type N-channel MOSFET is connected to a gate electrode of the depletion type P-channel MOSFET;
2. The insulated gate transistor drive circuit according to claim 1, wherein a gate electrode of the depletion type N-channel MOSFET is connected to an output electrode of the insulated gate transistor via the resistor.   The drive circuit for an insulated gate transistor according to any one of claims 1 to 3, wherein the insulated gate transistor is a MOSFET or an IGBT.   5. The insulated gate transistor drive circuit according to claim 1, wherein the insulated gate transistor drive circuit is used as an insulated gate transistor drive circuit in an inverter circuit. 6.   6. The insulated gate transistor drive circuit according to claim 1, wherein the insulated gate transistor drive circuit is used as an automotive insulated gate transistor drive circuit.

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