JP4780924B2 - Manufacturing method of matrix array substrate - Google Patents

Description

The present invention relates to a method for manufacturing a matrix array substrate having a matrix wiring insulated conductive substrate by insulation layer or insulator.

  A thin film transistor (hereinafter referred to as TFT (Thin Film Transistor)) is used for a display device substrate (active matrix substrate) used in a liquid crystal display element, an electroluminescent (EL) display element, an electrophoretic display device, or the like. For example, in an electrophoretic display device, each pixel is used as an element for controlling a control electrode potential in order to apply an electric field to toner sealed in the electrophoretic liquid.

  A semiconductor film used for a TFT provided in each pixel includes an amorphous silicon thin film (a-Si thin film) and a polycrystalline silicon thin film (poly-Si thin film).

  Conventionally, in these technologies, for example, glass is often used as a substrate in a liquid crystal display application that is a display device, and therefore the display device has insufficient impact resistance and flexibility, depending on the application.

  In addition, in recent years, the development of a thin, durable, and supple paper-like display that has not been realized in the past using an electrophoretic display device as described above has been actively conducted. . Accordingly, it is considered to form a TFT backplane for driving the display element on a flexible thin metal plate or plastic plate that is hard to break and is not a conventional glass substrate.

  By the way, in the case of using a conductive substrate made of stainless steel (hereinafter referred to as SUS (Steel Use Stainless)), which is one of the conductive materials, a glass substrate that is widely used at present, and studies are now underway. There is a significant difference from the case of using a plastic plate or plastic film as a substrate. That is, when the conductive substrate is used as a substrate for a display device as described above, it is necessary to insulate at least the functional surface of the conductive substrate.

  As a method for insulating the conductive substrate, several methods such as forming an oxide film are conceivable. In addition, for example, a method of forming a silicon nitride layer on a conductive substrate and forming a scan electrode or an information electrode thereon can be considered.

For example, Patent Document 1 discloses a technique for forming a TFT backplane on a SUS substrate by insulating the functional surface of the SUS substrate.
JP-A-9-179106

  However, when a wiring or the like is formed on the functional surface of the substrate in a state where an insulating layer is formed on the functional surface of the substrate and further on the back surface thereof as in Patent Document 1, the metal is exposed on the end surface of the substrate. The substrate itself may be etched during the etching process for forming the wiring.

  Usually, so-called scanning signal lines and information signal lines are made of different materials because the manufacturing process is simplified and the semiconductor layer is formed at a high temperature when mounting semiconductor elements. It is often composed of.

  In order to simplify the manufacturing process, for example, a wiring material that can be etched with different etchants can be used as the wiring material of each signal line. For example, when forming the information signal line after forming the scanning signal line first, the wiring material of the scanning signal line formed first is not etched by the etchant used when forming the wiring of the information signal line later. With the wiring material, it is not necessary to protect the mounting terminals of the scanning signal line with a nitride film or the like when forming the information signal line later, and the manufacturing process can be simplified accordingly.

  For example, when a normal amorphous silicon layer is used as the semiconductor layer, the substrate temperature rises from about 300 ° C. to about 350 ° C. when the amorphous silicon layer is formed. The material of the layer) is required to have characteristics and shape that do not change even when the substrate temperature rises to the above temperature.

  Therefore, for example, chromium having high resistance but high resistance is used for the material of the wiring layer formed before the amorphous silicon layer, and the material of the wiring layer formed after the amorphous silicon layer has low heat resistance. An aluminum-based material having a low resistance value may be used. The etchant of chromium is acidic, and the etchant of aluminum material is alkaline. Since the etchants for these wiring layer materials are different from each other as described above, the manufacturing process can be simplified as described above. However, although depending on the material of the substrate, when the substrate is made of an aluminum-based material, SUS, or the like, there is a problem that the substrate itself is also etched by the etchant used when etching the wiring layer made of the aluminum-based material. Can occur.

  In addition, when the substrate is made of SUS, the characteristics differ depending on the type of SUS. For example, SUS430 is not excellent in corrosion resistance, and thus the substrate is corroded. As a result, the wiring layer made of an aluminum material is etched. This may cause a problem that the etchant used in the process is significantly contaminated.

  Further, when using the metal substrate as described above, the flatness of the substrate is important in determining the performance of the display device. For example, when a SUS substrate is used as the metal substrate, bright annealing, buffing, or the like can be given as a surface treatment method for improving flatness. In any method, the unevenness of the substrate surface can be made 100 nm or less, and the flatness of the substrate becomes very good.

  However, as a result of examining the SUS substrate subjected to the surface treatment as described above, when the SUS substrate is observed in a wide range, a random groove of about 500 nm, which is considered to be caused by the inclusion of foreign matters generated in the rolling process of the SUS plate. Was found on the SUS substrate. Therefore, when a nitride film is formed as a substrate insulating film on such a SUS substrate using a CVD (Chemical Vapor Deposition) method, the nitride film traces the groove on the substrate. As a result, when a display device is finally manufactured using such a SUS substrate, a pixel defect or the like occurs with a certain probability.

  Therefore, as a measure for improving the grooves and surface roughness on the substrate in advance, a method of applying an insulating film on the substrate surface after applying polyimide or the like to the substrate surface is considered. However, planarization of a substrate by a method of forming a polyimide film or the like on the substrate surface increases the cost of the substrate itself, and thus increases the cost of a display device manufactured using such a substrate.

The present invention, together with the conductive substrate prevents are etched, the insulating film formed on the surface of the conductive substrate to provide a method of manufacturing a matrix array substrate that enables planarization Objective.

In the method of manufacturing a matrix array substrate in which scanning electrodes and information electrodes are formed in a matrix on a conductive substrate made of stainless steel formed by a rolling process according to the present invention, both surfaces and each end surface of the conductive substrate. on the entire surface including the, and have a step of forming an insulating film by a wet process using a sol or gel-like material. The process of forming an insulating film by a wet process using a sol or gel material includes an immersion process in which the conductive substrate is immersed in the sol or gel material, and an immersion process in the sol or gel material. The insulating film is desired by repeating at least two times in this order a pulling step of pulling up the conductive substrate out of the material and a baking step of firing the sol or gel material adhering to the pulled conductive substrate. It is the process of forming to thickness. In the subsequent pulling step, the conductive substrate is lifted in a direction different from the previous pulling step, and the insulating film is planarized.

According to the method for manufacturing a substrate for a display device of the present invention, since the entire surface of the conductive substrate is covered with the insulating film, the functional surface of the conductive substrate is insulated, and in addition, the conductive substrate is formed in a later step. It can prevent being etched. Further, in the step of forming the insulating film, the dipping step, the pulling step, and the firing step are repeated at least twice in this order, and the subsequent pulling step is the previous pulling step. Since the conductive substrate is pulled up in a different direction, even if there are grooves formed in the rolling process or the like on the surface of the conductive substrate, the insulating film formed on the surface of the conductive substrate has the grooves. It can be flattened substantially uniformly including the part where it exists. In addition, according to the method for manufacturing a substrate for a display device of the present invention, it is not necessary to apply polyimide or the like to the surface of the conductive substrate to flatten the surface of the conductive substrate. As a result, the manufacturing cost can be reduced.

According to the method for manufacturing a matrix array substrate of the present invention, in addition to the functional surface of the conductive substrate being subjected to insulation processing, it is possible to prevent the conductive substrate from being etched in a subsequent process, and further, the conductive The insulating film formed on the surface of the substrate can be planarized.

  Next, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a view schematically showing a cross section of a part of a matrix array substrate in a display device according to an embodiment of the present invention.

  As shown in FIG. 1, in the display device according to the present embodiment, a silicon oxide film 101 is formed on a thin metal substrate 100 as a conductive substrate. This silicon oxide film 101 is formed by using a dipping method in which the metal substrate 100 is immersed in a sol-gel solution of silicon oxide. Therefore, the entire surface of the metal substrate 100 (including both surfaces and each end surface) is formed on the silicon oxide film. 101.

  In the case where the display device includes a bottom gate TFT, for example, a gate wiring 106 as a scanning electrode and a Cs (auxiliary capacitance) wiring 107 are formed on the silicon oxide film 101 on one surface of the metal substrate 100. Is formed.

  Here, a method for forming these wirings 106 and 107 will be briefly described. A wiring layer is formed using, for example, Al having a low resistivity as a material of these wirings, and the subsequent process exceeds the melting point of Al. When there is a process, a conductive film is formed by depositing Cr, Ta, or Al—Nd on the wiring layer by sputtering. Subsequently, a resist is applied on the conductive film, selectively exposed and developed, and the conductive film is patterned into a predetermined shape by etching. Thus, the wirings 106 and 107 are formed.

  An insulating layer 108 is formed on these wirings 106 and 107, and an amorphous semiconductor layer 109 is further formed thereon. Further, an ohmic contact layer 110 that is selectively removed after being formed by, for example, an ion implantation method is formed on the insulating layer 108. Further, on the ohmic contact layer 110, a source wiring 111 and a drain electrode 112 as information electrodes are formed. Further, a passivation layer 113 is formed on the wirings 111 and 112 and the amorphous semiconductor layer 109 where a part thereof is exposed.

  As described above, in the display device of this embodiment, the entire surface of the conductive thin metal substrate 100 which is a conductive substrate is formed by using a wet process (dipping method), and the silicon oxide film 101 as the substrate insulating layer is formed. The metal substrate 100 is not etched in the subsequent manufacturing process. Therefore, even when the conductive metal substrate 100 is used as the substrate of the TFT back plate, the etchant and the like are not significantly contaminated on the substrate 100 as in the case of using the glass substrate as in the prior art. A TFT or the like can be manufactured. Of course, the entire surface of the metal substrate 100 is insulated by the silicon oxide film 101 as a substrate insulating layer.

  FIG. 2 is a schematic view showing a part of a 300 × 250 column TFT active matrix array substrate in the display device according to the present embodiment.

  As shown in FIG. 2, a plurality of gate wirings 106 and a plurality of source wirings 111 are arranged in a matrix on the TFT matrix array substrate in the display device of this embodiment, and further, gate wirings that are scanning electrodes. A gate line driving circuit 125 which is a first driving means for driving 106 and a source line driving circuit 126 which is a second driving means for driving a source wiring 111 which is an information electrode are provided. For example, the gate line drive voltage has an on voltage of + 20V and an off voltage of −20V, and the source line drive voltage is 0V to 15V. In each region surrounded by the gate wiring 106 and the source wiring 111, a TFT 130 which is an active element is provided. A pixel electrode 114 is connected to the drain electrode side of each TFT 130.

  Next, the display device of the present embodiment described above will be described in more detail using examples.

  FIG. 3 is a cross-sectional view showing the metal substrate shown in FIG. 1 and an insulating layer covering the entire surface thereof. FIG. 4A is a diagram schematically showing a cross section of a part of display pixels of the display device according to the embodiment of the present invention. FIG. 4B is mainly shown by A in FIG. It is sectional drawing which expands and shows a part.

  As shown in FIG. 4A, in the display device of this embodiment, a second substrate 122 is bonded to a partition wall 119 on a TFT backplane 124 that is a display device substrate formed on a metal substrate 100. ing. In each pixel space partitioned by the partition wall 119, a dispersion liquid (optical modulation element) in which the electrophoretic particles 121 are dispersed in the insulating liquid 120 as a medium is provided. The optical modulation element of each pixel is driven by a pair of electrodes including a pixel electrode 114 and a Ti layer 117 provided for each pixel on the TFT backplane 124. More specifically, in the display device according to the present embodiment, positive and negative voltages are applied to the pixel electrode 114 and the Ti layer 117 so that the electrophoretic particles 120 are moved between the formation surface of the pixel electrode 114 and the vicinity of the partition wall 119. The optical modulation element is driven by moving between them to perform display. FIG. 4A shows a state where the electrophoretic particles 121 are attracted to the Ti layer 117 and moved to the vicinity of the partition wall 119.

(First embodiment)
The manufacturing process of the display device according to the first example of the present embodiment will be described below with reference to FIGS.
(1) First, an SiO ₂ film 101 as an insulating layer was formed to a thickness of 500 nm on a metal substrate 100 as a conductive substrate made of SUS having a thickness of 0.2 mm by dipping.

Specifically, after the metal substrate 100 immersed in a sol-gel solution of silicon oxide is pulled up from the solution at a pulling rate of 40 cm / min, the baking step of the SiO ₂ film 101 is performed at 250 ° C. for 60 minutes. It was. Further, the metal substrate 100 was again immersed in a silicon oxide sol-gel solution, and the metal substrate 100 was pulled out of the solution at the same pulling speed but in a direction different from the previous time, and a firing process under the same conditions was performed. As described above, the film formation process of the SiO ₂ film 101 in this embodiment includes performing dipping and baking a plurality of times. Here, the sol-gel solution is a semi-solid solution and has a sol or gel or intermediate material thereof.

As a result, as shown in FIG. 3, the entire surface of the metal substrate 100 (including both surfaces and each end surface) is covered with the SiO ₂ film 101 that is an insulating layer having a predetermined thickness (500 nm in this embodiment).
(2) On the SiO ₂ film 101, Al—Nd is formed to a thickness of 200 nm by sputtering to form a first conductive layer, and this first conductive layer is formed using a photomask (not shown). The lower electrode of the TFT 130 including the gate wiring 106 and the Cs wiring 107 was formed by wet etching. Note that since the electrophoretic display device as in this embodiment requires an auxiliary capacitor for holding and driving the TFT 130, the Cs (auxiliary capacitor) wiring 107 is formed in the same conductive layer as the gate wiring 106.
(3) On these wirings 106 and 107, an SiN film 108 is formed as an interlayer insulating film to a thickness of 250 nm by CVD, and an a-Si film 109 is formed thereon as an amorphous semiconductor layer to a thickness of 200 nm. A film was formed by CVD.
(4) In a predetermined region on the insulating layer 108 and the amorphous semiconductor layer 109, an a-Si (n ⁺ ) film 110 was formed to a thickness of 20 nm by CVD as an ohmic contact layer.
(5) A second conductive layer was formed by depositing Al on the ohmic contact layer 110 to a thickness of 200 nm by sputtering.
(6) The second conductive layer was wet etched using a photomask (not shown) to form the source wiring 111 and the drain electrode 112 including the TFT portion. Subsequently, the a-Si (n ⁺ ) layer 110 in the TFT channel portion is removed by dry etching using a predetermined resist pattern to expose part of the semiconductor layer 109, and the wirings 111, 112 and part are exposed. A SiN film 113 as a passivation layer was formed on the semiconductor layer 109 to a thickness of 300 nm.
(7) A contact hole was created in the SiN film 113 by dry etching as shown in part X of FIG. 4B, and a part of the drain electrode 112 was exposed.
(8) A third conductive layer was formed by sputtering Al to a thickness of 200 nm on the drain electrode 112 and the SiN film 113 that were partially exposed.
(9) A pixel electrode 114 was formed by patterning the third conductive layer by wet etching using a photomask (not shown).
(10) On the uppermost surface of the above configuration on the metal substrate 100, an acrylic resin containing TiO ₂ is applied to a thickness of 4 μm to form the white scattering layer 115.
(11) An acrylic resin was formed to a thickness of 1 μm on the white scattering layer 115 to form an insulating layer 116.
(12) A Ti layer 117 as a metal layer is formed on the insulating layer 116 to a thickness of 300 nm, and a carbon-containing photoresist is further formed thereon as a first photoresist layer. Layer 118 was deposited to a thickness of 300 nm.
(13) Next, a thick photoresist layer is formed as a second photoresist layer to a thickness of 15 μm on the photoresist layer 118 so that the thick photoresist layer forms the partition 119 between the pixels. The thick photoresist layer was developed and removed leaving a portion between the pixels.
(15) Using the partition wall 119 formed of a thick photoresist layer, the Ti layer 117 and the photoresist layer 118 were etched to form a TFT backplane 124.
(16) Finally, a dispersion liquid in which black electrophoretic particles 120 made of polystyrene resin containing carbon black are dispersed in an insulating liquid 120 containing a paraffinic hydrocarbon solvent as a main component is partitioned by partition walls 119. The transparent second substrate 122 was fixed on the partition wall 119 with an adhesive (not shown).

  Thus, the manufacturing process of the display device of this example is completed.

According to this embodiment, the entire surface of the metal substrate 100 made of SUS is covered with the SiO ₂ film 101 which is the substrate insulating layer, and the metal substrate 100 has no exposed region. Therefore, the metal substrate 100 was not etched in the subsequent manufacturing process. In addition, in order to prevent etching of the conductive substrate by an etchant during etching of the wiring layer during the manufacturing process, the entire surface of the conductive substrate is covered with an insulating layer at least during the manufacturing process (wiring layer etching process). It only has to be done. In the subsequent process, for example, even if the end portion is cut by a slice line, it can be applied from the viewpoint of etching the conductive substrate in the process.
In addition, since the substrate insulating layer 101 is formed to a thickness of 500 nm on the metal substrate 100 using a wet process (dipping method), the insulating layer 101 formed on the surface of the substrate 100 is rolled into the metal substrate 100 or the like. It was possible to flatten substantially uniformly including the portion where the groove formed in step 1 exists. As a result, even when the rolled metal substrate 100 made of SUS was used, a display device with good image quality could be manufactured without causing pixel defects and the like.

(Second embodiment)
In the first embodiment, the SiO ₂ film is used as the substrate insulating film covering the entire surface of the metal substrate 100. However, in this embodiment, the metal substrate 100 as a conductive substrate made of SUS having a thickness of 0.2 mm is used. Then, a TiO ₂ film as an insulating layer was formed to a thickness of 500 nm by dipping.

Specifically, after the metal substrate 100 immersed in the sol-gel solution of titanium oxide was pulled up from the solution at a pulling rate of 35 cm / min, a TiO ₂ film firing step was performed at 270 ° C. for 45 minutes. . Furthermore, the metal substrate 100 was again immersed in the sol-gel solution of titanium oxide, and the metal substrate 100 was pulled out from the solution at the same pulling speed but in a direction different from the previous time, and the firing process under the same conditions was performed. Here, as described above, the sol-gel solution is a semi-solid solution and has a sol-like, gel-like or intermediate material. Such immersion and firing were repeated 5 times while alternately changing the direction of pulling up the metal substrate 100, and the TiO ₂ film was formed to a thickness of 500 nm.

Even in a configuration in which the entire surface of the metal substrate is covered with a TiO ₂ film instead of the SiO ₂ film, the metal substrate 100 is not etched in the subsequent manufacturing process, and the TFT is formed on the substrate 100 without significantly contaminating the etchant or the like. Etc. could be produced. In addition, since the substrate insulating layer 101 is formed to a thickness of 500 nm on the metal substrate 100 using a wet process (dipping method), the insulating layer 101 formed on the surface of the substrate 100 is rolled into the metal substrate 100 or the like. It was possible to flatten substantially uniformly including the portion where the groove formed in step 1 exists. As a result, even when the rolled metal substrate 100 made of SUS was used, a display device with good image quality could be manufactured without causing pixel defects and the like. Of course, the entire surface of the metal substrate 100 is insulated by a TiO ₂ film as a substrate insulating layer.

Note that a substrate insulating film of the metal substrate 100 is formed using sol-gel silicon nitride (SiN) instead of the SiO ₂ film or the TiO ₂ film, and the insulating layer 101 formed on the surface of the substrate 100 is planarized. Even in the case of adopting the configuration, it is possible to obtain the same effect as in the case of the SiO ₂ film or the TiO ₂ film. Here, the sol-gel form is a semi-solid form and has a sol form, a gel form or an intermediate material thereof.

  In this embodiment, the case of the TFT backplane of the electrophoretic display device has been described. However, the present invention can be applied to, for example, a reflective liquid crystal display device. In this case, for example, a transparent conductive film such as an ITO (Indium Tin Oxide) film is formed on the second substrate 122 to form a common electrode, and a liquid crystal is sandwiched between the drain electrode and the drain electrode-common electrode. It is possible to perform display by applying a desired electric field therebetween.

  In the present embodiment, a reverse stagger type so-called bottom gate type configuration using amorphous silicon is adopted, but there is no problem if a top gate type configuration or the like is adopted instead. In addition to the TFT using amorphous silicon, for example, a polysilicon TFT using laser annealing or a transfer technique of a single crystal TFT may be used.

  In addition, the electrophoretic display device of the present embodiment manufactured by the above manufacturing method can be formed thin and has a flexible configuration that can cope with a certain degree of bending. It is suitably used as a display device. For example, it can be used as a display for an application such as a paper medium or an information terminal such as a personal digital assistant (PDA).

  The present invention is applicable to a thin and flexible substrate for a display device and a method for manufacturing the same, a display device including such a display device substrate, and an information device having the display device.

It is a figure which shows typically the cross section of a part of matrix array board | substrate in the display apparatus which concerns on one Embodiment of this invention. It is a schematic diagram which shows a part of 300-row x 250-column TFT active matrix array substrate in the display device according to the embodiment of the present invention. It is sectional drawing which shows the metal substrate shown in FIG. 1, and the insulating layer which covers the whole surface. FIG. (A) is a diagram schematically showing a cross section of a part of display pixels of a display device according to an embodiment of the present invention, and FIG. (B) is mainly an enlarged view of part A in FIG. (A). It is sectional drawing shown.

Explanation of symbols

100 Metal substrate (SUS substrate)
101 Insulating layer (silicon oxide film)
106 Gate wiring 107 Cs wiring 108 Insulating layer (SiN film)
109 Amorphous semiconductor layer (a-Si film)
110 Ohmic contact layer (a-Si (n ⁺ ) film)
111 Source wiring 112 Drain electrode 113 Passivation layer (SiN film)
114 Pixel electrode 115 White scattering layer 116 Insulating layer 117 Ti layer 118 Photoresist layer 119 Partition 120 Insulating liquid 121 Electrophoretic particle 122 Second substrate 124 TFT backplane 125 Gate line driving circuit 126 Source line driving circuit 130 TFT

Claims (2)

In a manufacturing method of a matrix array substrate in which scanning electrodes and information electrodes are formed in a matrix on a conductive substrate made of stainless steel formed in a rolling process ,
The entire surface including the both sides and the end face of the conductive substrate, have a step of forming an insulating film by a wet process using a sol or gel-like material,
The step of forming an insulating film by a wet process using the sol-like or gel-like material includes an immersion step of immersing the conductive substrate in the sol-like or gel-like material, and the sol-like or gel-like material. At least two steps in this order are a pulling step for pulling up the conductive substrate immersed in the material from the material and a firing step for firing the sol-like or gel-like material adhering to the pulled conductive substrate. A step of repeatedly forming the insulating film to a desired thickness,
In the subsequent pulling step, the conductive substrate is lifted in a different direction from the previous pulling step, and the insulating film is planarized . The step of forming an insulating film by a wet process using the sol-like or gel-like material includes repeating the immersion step, the pulling step, and the firing step at least three times in this order. which is a step of forming a desired thickness, the matrix array substrate manufacturing method according to claim 1.

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