JP4729625B2 - COMMUNICATION TERMINAL DEVICE, COMMUNICATION DEVICE, AND SIGNAL RECEIVING METHOD - Google Patents

Description

  The present invention relates to a communication terminal device connected to a network in which a plurality of bit rates are mixed, a communication device, and a communication terminal device, and a signal receiving method in the communication device. The present invention relates to a communication terminal device, a communication device, and a signal reception method capable of performing normal communication without degrading reception sensitivity even on a high-speed line.

  In order to respond to the explosive increase in data traffic represented by the Internet, construction of a high-speed and large-capacity optical access network is rapidly progressing. As a high-speed optical access system for constructing an optical access network, a G-PON (Gigabit) that enables high-speed transmission at a maximum of 1.25 Gbps and a maximum of 2.4 Gbps while sharing an optical fiber cable among a plurality of subscribers. -Passive Optical Network) is now widely used.

  For future higher speed transmission, it is possible to speed up only the subscriber who wants to speed up (for example, 10 Gbps) while following the already established optical access network due to problems such as economy. Development of a PON system capable of mixing bit rates is desired. A technique for enabling the realization of a bit rate mixed type PON system is disclosed in Patent Document 1, for example. This technology makes it possible to cope with a plurality of bit rates by providing a multi-rate burst circuit in an ONU (Optical Network Unit) of all subscribers.

JP-A-8-8954

  However, when the bit rate is mixed in accordance with the existing optical access network, a problem of reception sensitivity deterioration occurs for a subscriber who has shifted to a high bit rate. The higher the speed of the network (the wider the band), the lower the S / N (Signal / Noise) ratio. For this reason, when a part of an existing optical access network designed with a relatively low reception sensitivity is increased without assuming a higher speed, the S / N ratio is lowered with the increase in bandwidth, and the reception sensitivity is increased. Will deteriorate.

  For example, when a part of an optical access network designed for operation at 2.4 Gbps is accelerated to 10 Gbps, the amount of reception sensitivity deterioration in the communication terminal device of the increased user is, for example, about 4 dB. In addition, it may not be possible to realize high-speed communication as expected.

  Similarly, when some subscribers are speeded up following the existing optical access network, a problem of reception sensitivity also occurs in an OLT (Optical Line Terminal) which is a station-side concentrator. In other words, when the OLT is speeded up (broadband) to receive an upstream signal from a faster subscriber, the network was designed with a relatively low reception sensitivity due to the lower S / N ratio associated with the wider band. It becomes difficult to receive upstream signals from existing ONUs.

  The present invention has been made in view of the above, and even when a part of the existing network has been speeded up, the receiving speed is not deteriorated in the speeded-up line normally. An object of the present invention is to provide a communication terminal device, a communication device, and a signal receiving method capable of performing communication.

  In order to solve the above-described problems and achieve the object, in one aspect of the present invention, a management signal transmitted at a bit rate A and a data signal transmitted at a bit rate B (B is M times A) Is a communication terminal device for receiving a signal transmitted from the same line as a signal having a bit rate C (C is N times A) and reproduced by the signal reproduction means. A management signal converting means for analyzing the received signal and converting it into the 1-bit management signal every N bits, and a data signal addressed to the communication terminal device based on the management signal converted by the management signal conversion means Timing control means for controlling the acquisition timing of the data signal, and the data signal from the signal reproduced by the signal reproduction means in accordance with the timing control of the timing control means Characterized by comprising a data signal acquisition means for acquiring.

  In another aspect of the present invention, in a communication terminal apparatus that receives a management signal transmitted at a bit rate A and a data signal transmitted at a bit rate B (B is M times A) from the same line. A signal receiving method for reproducing a waveform transmitted through the line as a signal having a bit rate C (C is N times A), and analyzing the signal reproduced by the signal reproducing step to obtain N A management signal conversion step for converting each bit into the management signal of 1 bit, and a timing for controlling the acquisition timing of the data signal addressed to the communication receiving terminal based on the management signal converted by the management signal conversion step And a data signal for acquiring the data signal from the signal reproduced by the signal reproduction step according to the timing control of the control step and the timing control step. Characterized in that including an acquisition step.

  According to these aspects of the invention, the transmitted waveform is reproduced at a bit rate higher than the original bit rate of the management signal, and a plurality of bits are combined and analyzed and converted into a management signal. It is possible to reduce the signal error rate and improve the reception sensitivity.

  According to another aspect of the present invention, in the above aspect of the present invention, M is N.

  According to the aspect of the present invention, since the transmitted waveform is reproduced at the same bit rate as that of the data signal, it is not necessary to convert the bit rate of the data signal, and the configuration of the apparatus can be simplified. it can.

  According to another aspect of the present invention, in the above aspect of the invention, the management signal converting means converts the N-bit signal reproduced by the signal reproducing means into a majority decision to determine a 1-bit management signal. It is characterized by converting.

  According to the aspect of the present invention, when a plurality of bits are combined and converted into a management signal, the value of the management signal is determined by majority decision, so the error rate of the management signal is reduced and the reception sensitivity is reduced. Can be improved.

  In another aspect of the present invention, in the above aspect of the invention, the management signal conversion unit weights the N-bit signal reproduced by the signal reproduction unit for each bit and makes a majority decision. It is characterized by converting into a 1-bit management signal.

  According to the aspect of the present invention, when the majority decision is made, it is configured to be able to apply a weight to a bit in which an error is unlikely to occur. Therefore, the error rate of the management signal is further reduced and the reception sensitivity is further improved. be able to.

  In another aspect of the present invention, in the above aspect of the present invention, the management signal converting means compares a sequence of signals converted by shifting the synchronization timing with a predetermined signal pattern, and matches the signal pattern. The management signal is converted at the synchronization timing at which is detected.

  According to the aspect of the present invention, since the synchronization timing verification is configured to be executed in parallel for all candidates, the correct synchronization timing can be quickly detected.

  According to another aspect of the present invention, in the above aspect of the present invention, the present invention further includes error correction means for performing error correction of the data signal using an error correction code.

  According to the aspect of the present invention, since the error correction of the data signal is performed using the error correction code, the error rate of the data signal can be reduced and the reception sensitivity can be improved.

  In another aspect of the present invention, in the above aspect of the invention, N is an integral multiple of M, and the signal reproduced by the signal reproducing means is analyzed to analyze 1 bit data every N / M bits. Data signal conversion means for converting into a signal is further provided, wherein the data signal acquisition means acquires the data signal from the signal converted by the data signal conversion means in accordance with timing control of the timing control means. .

  According to the aspect of the present invention, the data signal is also configured to be analyzed by combining a plurality of bits and converted into the data signal, so that the error rate of the data signal can be reduced and the reception sensitivity can be improved. it can.

  According to another aspect of the present invention, in the above aspect of the invention, the data signal conversion means determines the majority of the N / M bit signal reproduced by the signal reproduction means, thereby determining 1-bit data. It converts into a signal, It is characterized by the above-mentioned.

  According to the aspect of the present invention, when a plurality of bits are combined and converted into a data signal, the value of the data signal is determined by majority decision. Therefore, the error rate of the data signal is reduced, and the reception sensitivity is reduced. Can be improved.

  In another aspect of the present invention, in the above aspect of the invention, the data signal conversion means weights the N / M bit signal reproduced by the signal reproduction means for each bit and makes a majority decision. Thus, the data is converted into a 1-bit data signal.

  According to the aspect of the present invention, when the majority decision is made, the bit that is unlikely to generate an error can be weighted, so that the error rate of the data signal is further reduced and the reception sensitivity is further improved. be able to.

  According to another aspect of the present invention, in the above aspect of the present invention, an intersymbol interference removing unit that removes the influence of intersymbol interference from the waveform input to the signal reproduction unit is further provided.

  According to the aspect of the present invention, since the intersymbol interference is removed from the waveform before reproduction, the error rate of the management signal and the data signal can be lowered and the reception sensitivity can be improved.

  In another aspect of the present invention, there is provided a communication apparatus that receives a low-speed signal transmitted at a bit rate A and a high-speed signal transmitted at a bit rate B (B> A) from the same line, Signal reproducing means for reproducing a waveform transmitted through the line as a signal of a bit rate C (C is N times A), identification phase synchronizing means for synchronizing the signal reproduced by the signal reproducing means with the low-speed signal, And a signal converting means for analyzing the signal reproduced by the signal reproducing means and converting it into the low-speed signal of 1 bit every N bits.

  According to another aspect of the present invention, there is provided a signal receiving method in a communication apparatus that receives a low-speed signal transmitted at a bit rate A and a high-speed signal transmitted at a bit rate B (B> A) from the same line. A signal reproduction step for reproducing a waveform transmitted through the line as a signal having a bit rate C (C is N times A), and an identification phase for synchronizing the signal reproduced by the signal reproduction step with the low-speed signal. The method includes a synchronization step and a signal conversion step of analyzing the signal reproduced by the signal reproduction step and converting the signal to the low-speed signal of 1 bit every N bits.

  According to these aspects of the invention, the transmitted waveform is reproduced at a bit rate higher than the original bit rate of the low-speed signal, and a combination of a plurality of bits is analyzed and converted into a low-speed signal. It is possible to reduce the signal error rate and improve the reception sensitivity.

  According to another aspect of the present invention, in the above aspect of the present invention, B is M times A.

  According to the aspect of the present invention, since the bit rate of the high speed signal is an integral multiple of the low speed signal, the reproduced waveform is reproduced at the same bit rate as that of the high speed signal by a single reproduction signal reproducing means. Therefore, it is not necessary to provide a plurality of reproduction signal reproducing means, and the configuration of the apparatus can be simplified.

  Another aspect of the present invention is characterized in that, in the above aspect of the invention, B = C (M = N).

  According to the aspect of the present invention, since the transmitted waveform is configured to be reproduced at the same bit rate as that of the high-speed signal, it is not necessary to convert the bit rate of the high-speed signal, and the configuration of the apparatus can be simplified. it can.

  In another aspect of the present invention, in the above aspect of the invention, B is M times A, and second identification phase synchronization means for synchronizing the signal reproduced by the signal reproduction means with the high-speed signal. And a second signal converting means for analyzing the signal reproduced by the signal reproducing means and converting it into the high-speed signal of 1 bit for every L (L = N / M) bits. To do.

  According to the aspect of the present invention, the high-speed signal is also configured to be analyzed by combining a plurality of bits and converted into the high-speed signal, so that the error rate of the high-speed signal can be reduced and the reception sensitivity can be improved. it can.

  Another aspect of the present invention is characterized by further comprising second signal reproducing means for reproducing a waveform transmitted through the line as a bit rate B signal.

  According to another aspect of the present invention, in the above aspect of the invention, a second signal reproducing means for reproducing a waveform transmitted through the line as a signal having a bit rate c (c is L times B); A second discriminating phase synchronizing means for synchronizing the signal reproduced by the second signal reproducing means with the high-speed signal, and analyzing the signal reproduced by the second signal reproducing means to analyze 1 bit for every L bits. And a second signal converting means for converting the high-speed signal.

  According to these aspects of the invention, since the means for reproducing the transmitted waveform at the bit rate of the high-speed signal or an integer multiple of the bit rate is further provided, the bit rate of the high-speed signal and the bit rate of the low-speed signal are Even when there is no integer multiple relationship, both the high-speed signal and the low-speed signal can be correctly reproduced.

  According to another aspect of the present invention, in the above aspect of the present invention, an error correction unit is further provided that performs error correction of the high-speed signal using an error correction code.

  According to the aspect of the present invention, since the error correction code is used to correct the error of the high-speed signal, the error rate of the high-speed signal can be reduced and the reception sensitivity can be improved.

  In another aspect of the present invention, in the above aspect of the invention, the signal conversion means converts the N-bit signal reproduced by the signal reproduction means into a 1-bit signal by making a majority decision. It is characterized by that.

  In another aspect of the present invention, in the above aspect of the invention, the signal converting means weights the N-bit signal reproduced by the signal reproducing means for each bit and makes a majority decision. It is characterized by converting into a bit signal.

  According to another aspect of the present invention, in the above aspect of the invention, the second signal converting means converts an L-bit signal into a 1-bit signal by majority decision. .

  According to these aspects of the invention, when a plurality of bits are combined and converted into a 1-bit signal, the signal value is determined by majority decision, so that the signal error rate is reduced and the reception sensitivity is reduced. Can be improved.

  According to another aspect of the present invention, in the above aspect of the present invention, an intersymbol interference removing unit that removes the influence of intersymbol interference from the waveform input to the signal reproduction unit is further provided.

  According to the aspect of the present invention, since the intersymbol interference is removed from the waveform before reproduction, the signal error rate can be reduced and the reception sensitivity can be improved.

  Further, in another aspect of the present invention, in the above aspect of the present invention, based on the timing control signal, timing control means for controlling the acquisition timing of the data signal of each bit rate, and timing control of the timing control means And a data signal acquisition means for acquiring the data signal from the signal converted by the signal conversion means.

  According to the aspect of the present invention, instead of obtaining the timing for acquiring the data signal from the reproduced signal, the timing for acquiring the data signal is determined based on a control signal different from the reproduced signal. Even when the reproduced signal does not include information indicating the timing for acquiring the data signal, the data signal can be acquired at the correct timing.

  According to one aspect of the present invention, a transmitted waveform is reproduced at a bit rate higher than the original bit rate, and a plurality of bits are combined and analyzed to be converted into a low-speed signal of 1 bit. Therefore, it is possible to reduce the error rate of a low-speed signal and improve the signal reception sensitivity.

  Further, according to another aspect of the present invention, the received waveform is configured to be reproduced at the same bit rate as that of the high-speed signal, so that processing for converting the bit rate of the high-speed signal is not required, and the configuration of the apparatus is reduced. There is an effect that it can be simplified.

  Also, according to another aspect of the present invention, when a plurality of bits are combined and converted into a 1-bit signal, the signal value is determined by majority decision, thereby reducing the signal error rate. There is an effect that the reception sensitivity of the signal can be improved.

  Further, according to another aspect of the present invention, when the majority decision is made, the bit that is less likely to cause an error can be weighted, so that the signal error rate can be further reduced and the signal reception can be performed. There is an effect that the sensitivity can be further improved.

  Further, according to another aspect of the present invention, the synchronization timing verification is configured to be executed in parallel for all candidates, so that the correct synchronization timing can be quickly detected. Play.

  In addition, according to another aspect of the present invention, since the intersymbol interference is removed from the waveform before reproduction, the signal error rate can be lowered and the reception sensitivity can be improved. .

  According to another aspect of the present invention, the error correction code is used to correct the error of the high-speed signal, so that the error rate of the high-speed signal can be reduced and the reception sensitivity can be improved. There is an effect.

  According to another aspect of the present invention, the means for reproducing the transmitted waveform at a high-speed signal bit rate or an integral multiple of the bit rate is further provided. Even when the bit rate is not an integer multiple, both high-speed signals and low-speed signals can be correctly reproduced.

  According to another aspect of the present invention, the timing for acquiring the data signal is determined based on a control signal different from the reproduced signal, instead of obtaining the timing for acquiring the data signal from the reproduced signal. As a result, the data signal can be acquired at the correct timing even when the reproduced signal does not include information indicating the timing for acquiring the data signal.

  Hereinafter, embodiments of a communication terminal device, a communication device, and a signal reception method according to the present invention will be described in detail with reference to the drawings. In the following embodiments, configurations of ONUs and OLTs in an optical access network will be described as an example of communication devices including communication terminal devices. However, the present invention is not limited to ONUs and OLTs, and is effective in various communication devices. It is. Further, the present invention is not limited to the embodiments.

First, an optical access network in which a plurality of bit rates are mixed will be described. FIG. 1 is a diagram illustrating an example of an optical access network in which a plurality of bit rates are mixed. The optical access network shown in the figure is constructed by the PON system, and an optical fiber cable 20 connected to an OLT (Optical Line Terminal) 100 provided in a station is branched by a power splitter 10 and is connected to a subscriber side. Of the ONUs 200 ₁ to 200 _x and the ONU 300.

In the optical access network shown in this example, ONUs 200 ₁ to 200 _x that perform communication at a bit rate A and ONUs 300 that perform communication at a bit rate B that is M times the bit rate A are mixed. This optical access network was initially operated at the bit rate A, and after that, the ONU of the subscriber #z was changed to the ONU 300 and the OLT on the station side was replaced with the OLT 100, thereby realizing a mixed bit rate. is there.

In this network, the exchange of information between the OLT 100 and the ONUs 200 ₁ to 200 _x and the ONU 300 is controlled in a time division manner. For example, communication in the downstream direction from the station side to the subscriber side is controlled by a TDM (Time Division Multiplexing) method, and the OLT 100 transmits data while switching the ONU to be transmitted for each time slot.

FIG. 2 is a diagram illustrating an example of a downstream signal. As shown in the figure, the downlink signal is time-division multiplexed and transmitted in a state where data for a plurality of subscribers are mixed. The OLT 100 periodically generates frame synchronization / management information for the ONUs 200 ₁ to 200 _x and the ONU 300 to perform frame synchronization, and knows the timing for acquiring data addressed to itself, and multiplexes the same as the data. Include in downstream signal.

In downstream communication, the same signal is transmitted to the ONUs 200 ₁ to 200 _x and the ONU 300. Then, the ONUs 200 ₁ to 200 _x and the ONU 300 discard data destined for other ONUs and perform data processing only on the frame synchronization / management information and the data destined for itself. With this mechanism, a virtual one-to-one connection is established between the OLT 100 and the ONUs 200 ₁ to 200 _x and the ONU 300.

  Here, paying attention to the bit rate, the frame synchronization / management information is transmitted at the bit rate A because it needs to be read by all ONUs. In addition, the time-division data is transmitted with a header portion including information specifying the destination ONU added, but the header portion also needs to be read by all the ONUs, so the bit rate A is used. Sent. The data itself is transmitted at a bit rate corresponding to the destination ONU.

That is, the ONUs 200 ₁ to 200 _x that communicate at the bit rate A receive all signals at the bit rate A. On the other hand, the ONU 300 that performs communication at the bit rate B receives the management signal for transmitting the header part and the frame synchronization / management information at the bit rate A, and receives the data signal for transmitting the data itself at the bit rate B. .

  Thus, in an environment where bit rates are mixed, the data signal is transmitted at a bit rate corresponding to the destination ONU, and the management signal is always transmitted at a low bit rate A. As already explained, ONUs designed to communicate at a high bit rate are affected by noise in a network designed on the assumption of a lower bit rate. The reception sensitivity deterioration becomes a problem particularly when the management signal is received.

  Since only the destination ONU needs to be able to read the data signal, there is no need to consider the influence on the existing ONU. For example, the reception sensitivity is deteriorated by using an error correction technique such as FEC (Forward Error Correction). Can be compensated. On the other hand, since it is necessary for all ONUs to read the management signal, it is not possible to adopt measures that affect existing ONUs.

  In order to solve the problem of reception sensitivity degradation at the time of management signal reception in a network in which bit rates are mixed without affecting the existing ONU, the ONU 300 according to the present embodiment uses a majority decision method as described later. It is used.

  Next, the configuration of the ONU 300 will be described. FIG. 3 is a block diagram showing the configuration of the ONU 300. In order to simplify the description, in the figure, illustrations of configurations not related to the present invention are omitted. For example, all the configurations related to signal transmission are not shown.

As shown in FIG. 3, the ONU 300 includes an optical receiver 310, a signal recovery unit (hereinafter referred to as “CDR (Clock Data Recovery)”) 320, a signal conversion unit 330, a management signal processing unit 340, and timing control. Unit 350, error correction unit 360, and data signal acquisition unit 370.

  The optical receiver 310 is a processing unit that converts an optical signal received by a photodiode or the like into an electrical waveform. The CDR 320 is a processing unit that generates a clock signal for operating the ONU 300 based on the electrical waveform converted by the optical receiver 310 and reproduces the waveform into a digital signal. Since the ONU 300 is a communication terminal device that receives data at the bit rate B, the CDR 320 reproduces the waveform into a digital signal at the bit rate B.

  The digital signal reproduced by the CDR 320 is received by the signal conversion unit 330 and the error correction unit 360. The signal conversion unit 330 is a processing unit that converts the digital signal of the bit rate B reproduced by the CDR 320 into a digital signal of the bit rate A so that the management signal can be read. And a synchronization unit 332.

  The majority decision unit 331 is a processing unit that converts an M-bit signal into a 1-bit management signal while correcting errors using the majority decision logic. An operation example of the majority decision determination unit 331 is shown in FIG. In this example, the bit rate B is four times the bit rate A, and a 4-bit management signal is converted into a 1-bit management signal.

  Originally, the digital signal reproduced by the CDR 320 should have the same value four times consecutively like “0000” or “1111”, and can be simply converted to “0” or “1”. An error may occur in some bits such as “1011” and “0001” due to the influence of noise accompanying the increase in speed.

  The majority decision determining unit 331 converts “1011” to “1” and “0001” to “0” by using the logic of majority decision. As described above, by using the majority decision logic, the error rate of the management signal can be greatly reduced as compared with the case where the value of the management signal is determined based only on the bit at a specific position.

For example, as in the example of FIG. 4, when majority decision is made with four values, 1-bit error correction is possible, and the probability of consecutive errors in a received signal with an error rate E (eg, 1 × 10 ⁻⁶ ) Is approximately E ² (for example, 1 × 10 ⁻¹² ), so that an improvement of, for example, 4 to 5 dB can be obtained as the reception sensitivity characteristic.

  Note that when a simple majority decision logic is used, the number of majority decisions (for example, 2 to 2 in 4 bits) is indefinite. Even in the case of a majority decision, the correct decision result can be obtained by adding a weight to a bit with less intersymbol interference from the preceding and following bits, that is, a bit with a low possibility of error (for example, the third bit out of 4 bits). It can be acquired with high probability.

  FIG. 5 shows an operation example of the majority decision determination unit 331 when a majority decision is made by adding weights to predetermined bits. As in the example of the figure, when the majority decision is made with four values, the first and fourth bits are likely to be erroneous due to intersymbol interference. Therefore, by adding a weight to the bits near the center (in the example of the figure, the third bit out of 4 bits), the accuracy of error correction by the majority decision is improved and the number of majority decisions does not cause logic indefiniteness. Can be.

  In the example of the figure, since a weight is added to the third bit, even if an error occurs in two bits and the number of 0s and 1s is the same number as “0101”, it is “0”. The majority decision result is obtained.

  Returning to the description of FIG. 3, the identification phase synchronization unit 332 determines the phase (bit) that is the head of the management signal when the majority decision unit 331 starts converting the signal reproduced by the CDR 320 into a management signal every M bits. It is a processing unit that identifies and notifies the majority result determination unit 331 of the specific result.

  The management signal processing unit 340 is a processing unit that reads the management signal converted into the bit rate A by the signal conversion unit 330, recognizes the frame synchronization / management information and the header part, and executes various control processes. For example, the management signal processing unit 340 realizes frame synchronization by recognizing a frame synchronization signal having a known signal pattern, and grasps the switching timing of the time slot.

  Further, the management signal processing unit 340 determines in which time slot the data addressed to the ONU is transmitted based on the frame synchronization / management information and the information included in the header part, and the result is the timing control unit. 350 is notified.

  The timing control unit 350 is a processing unit that instructs the data signal acquisition unit 370 to start and end acquisition of data addressed to the ONU based on information notified from the management signal processing unit 340.

  The error correction unit 360 is a processing unit that improves the reception sensitivity of the data portion by correcting an error in the data signal transmitted to the ONU. Error correction of a data signal can be realized using FEC, for example. In error correction by FEC or the like, data is made redundant at the transmission source, and therefore the data signal after error correction by the error correction unit 360 has a slightly lower bit rate by the amount of redundant data. Turn into.

  Note that the error correction unit 360 performs error correction on a signal constituting the management signal and a signal constituting data addressed to other ONUs, but these signals are discarded in the data signal acquisition unit 370. Therefore, no problem occurs.

  The data signal acquisition unit 370 is a processing unit that extracts the data addressed to the ONU by acquiring the data signal subjected to the error correction by the error correction unit 360 at the timing instructed by the timing control unit 350. . The data signal acquisition unit 370 delivers the acquired data to an appropriate processing unit (not shown) and performs necessary data processing.

  As described above, the ONU 300 according to the present embodiment improves the reception sensitivity by applying an error correction code such as FEC to a data signal that can be modified, and cannot be modified. For the management signal, the reception sensitivity is improved by applying the majority decision.

Here, a specific implementation example of the signal conversion unit 380 is shown in FIG. The signal conversion unit 380 shown in the figure is a processing unit that realizes frame synchronization, which is a part of the function of the management signal processing unit 340 shown in FIG. 3, in addition to the function of the signal conversion unit 330 shown in FIG. There are majority decision determination units 381 _{1 to} 381 _m , a known code detection unit 382, and a selector 383.

Majority determination units 381 _{1 to} 381 _m are circuits that determine the majority of the digital signal reproduced by the CDR 320 every M bits and convert it into a 1-bit management signal. The majority decision units 381 _{1 to} 381 _m are controlled so that the bit considered as the head of the management signal is shifted by one bit at the time of starting majority decision. For example, if the majority decision unit 381 ₁ starts majority decision is regarded as the head of the management signal to 1 bit, the majority decision unit 381 ₂ starts majority decision is regarded as the head of the management signal to the second bit, the majority The determination unit 381 _m regards the Mth bit as the head of the management signal and starts the majority decision.

The known code detection unit 382 stores the management signal sequence converted by the majority decision determination units 3811 _{1 to} 381 _m by a predetermined bit length for each majority decision determination unit, and compares it with a known signal pattern representing a frame synchronization signal. Part. The known code detection unit 382 is a majority decision determination unit in which the converted management signal sequence matches the known signal pattern with the lowest error rate (that is, the highest majority match) among any of the majority decision determination units. The number is notified to the selector 383.

  The selector 383 is a processing unit that sends the output of the majority decision unit corresponding to the number notified from the known code detection unit 382 as a management signal to the management signal processing unit 340 that is a subsequent processing unit. As described above, the signal conversion unit 380 is configured to realize the identification phase synchronization and the frame synchronization at the same time, so that it is possible to shorten the time until the ONU starts receiving data after the power is turned on.

  Next, the processing procedure of the ONU 300 shown in FIG. 3 will be described. FIG. 7 is a flowchart showing the processing procedure of the ONU 300. As shown in the figure, after the ONU 300 is turned on, the identification phase synchronization unit 332 performs identification phase synchronization on the signal reproduced by the CDR 320, and the majority decision determination unit 331 normally converts the management signal. (Step S101).

  Subsequently, the management signal processing unit 340 performs frame synchronization so that the frame synchronization / management information and the header part can be recognized normally (step S102). Thus, after the initial process is completed, the management signal processing unit 340 executes the following process every time a signal for one time slot is received.

  That is, the header portion of the acquired signal for one time slot is detected (step S103), and if it is found that the signal for one time slot is frame synchronization / management information (Yes in step S104), the management signal The processing unit 340 executes control processing corresponding to the content indicated by the frame synchronization / management information (step S105).

  On the other hand, when it is found that the acquired signal for one time slot is not frame synchronization / management information but data addressed to the ONU (No at Step S104, Yes at Step S106), the management signal processing unit 340 The timing control unit 350 is notified of information for acquiring the data, and the data signal acquisition unit 370 acquires the data (step S107).

  When it is found that the acquired signal for one time slot is neither frame synchronization / management information nor data addressed to the ONU (No at Step S104, No at Step S106), the management signal processing unit 340 The information for acquiring the data is discarded without notifying the timing controller 350 (step S108).

  As described above, in this embodiment, the management signal is reproduced at the same bit rate as that of the data signal, and then converted into the original management signal while correcting the error by majority decision. It is possible to reduce the error rate and improve the reception sensitivity.

  In the first embodiment, the example in which the signal is reproduced at the same bit rate as the data signal by the CDR and the majority of the signal is determined to improve the reception sensitivity of the management signal has been described. In the present embodiment, an example will be described in which a signal is reproduced at a bit rate higher than that of a data signal by CDR and the reception sensitivity of the data signal is improved by making a majority decision.

  FIG. 8 is a diagram illustrating a configuration of the ONU 400 according to the present embodiment. Similar to the ONU 300, the ONU 400 is an ONU that performs data communication at a bit rate B in an optical access network in which a bit rate A and a bit rate B that is M times faster than the bit rate A are mixed. 310, CDR 420, signal conversion unit 430, management signal processing unit 340, timing control unit 350, majority decision determination unit 460, and data signal acquisition unit 370.

  The optical receiver 310, the management signal processing unit 340, the timing control unit 350, and the data signal acquisition unit 370 are the same as those shown in FIG. The CDR 420 is a processing unit that generates a clock signal for operating the ONU 400 based on the electrical waveform converted by the optical receiver 310 and reproduces the waveform into a digital signal. The CDR 420 reproduces the waveform into a digital signal having a bit rate C that is N times faster than the bit rate A (N is an integer multiple of M).

  The digital signal reproduced by the CDR 420 is received by the signal conversion unit 430 and the majority decision determination unit 460. The signal conversion unit 430 is a processing unit that converts the digital signal of the bit rate C reproduced by the CDR 420 into a digital signal of the bit rate A so that the management signal can be read. And a synchronization unit 332. The identification phase synchronization unit 332 is the same as that shown in FIG.

  The majority decision unit 431 is a processing unit that converts an N-bit signal into a 1-bit management signal while correcting an error using the majority decision logic. As for the majority decision, as shown in the first embodiment, a simple majority decision may be used, or a majority decision obtained by adding a weight to a specific bit may be used.

  The majority decision unit 460 converts the digital signal of the bit rate C reproduced by the CDR 420 into a digital signal of the bit rate B and sends the conversion result to the data signal acquisition unit 370 so that the data signal can be read. Part. Specifically, majority decision unit 460 converts an N / M bit signal into a 1-bit data signal while correcting errors using the majority decision logic.

  As for the majority decision, a simple majority decision may also be used, or a majority decision with a weight added to a specific bit may be used. In error correction by majority decision, data is not made redundant unlike error correction by FEC or the like, so that the data signal acquisition unit 370 can receive a signal at the speed of the bit rate B as it is.

  As described above, in this embodiment, since the CDR 420 is configured to reproduce a signal at a bit rate higher than that of the data signal, not only the management signal but also the data signal has a lower error rate by majority decision, Reception sensitivity can be improved.

  The configuration of the ONU 300 shown in FIG. 3 according to the first embodiment is an example of a modification of the ONU 400 in which N = M and the error correction unit 360 performs error correction on the data signal instead of the majority decision determination unit 460. Can be regarded as one.

  In this embodiment, an example will be described in which an error rate in an ONU that performs communication at a high bit rate is further reduced by removing the influence of intersymbol interference in an optical access network in which bit rates are mixed.

  FIG. 9 is a diagram illustrating the configuration of the ONU 500 according to the present embodiment. Similar to the ONU 300, the ONU 500 is an ONU that performs data communication at a bit rate B in an optical access network in which a bit rate A and a bit rate B that is M times faster than the bit rate A are mixed. 310, an intersymbol interference removal unit 590, a CDR 320, a signal conversion unit 330, a management signal processing unit 340, a timing control unit 350, an error correction unit 360, and a data signal acquisition unit 370.

  Compared to the ONU 300 shown in FIG. 3, the ONU 500 has the same configuration as the ONU 300 except that an intersymbol interference removing unit 590 is provided between the optical receiver 310 and the CDR 320. FIG. 10 is a diagram illustrating the principle of intersymbol interference removal by the intersymbol interference removal unit 590. As shown in the figure, after receiving a waveform corresponding to “1”, the determination level of 0/1 is increased, and after receiving a waveform corresponding to “0”, the determination level of 0/1 is decreased. Thus, it is possible to eliminate the occurrence of errors due to intersymbol interference.

The function of the intersymbol interference removing unit 590 can be realized using, for example, a decision feedback equalizer 590a as shown in FIG. Here, the delay circuit 591 ₁ is a circuit that stores the previous determination result by the discriminator 594 that performs 0/1 determination, and the integrator 592 ₁ adds a predetermined coefficient to the value stored in the delay circuit 5911 _1. a circuit for multiplying, subtractor 593 is a circuit to produce a amount corresponding to the reduced waveform toward zero, 0/1 when raised determination level substantially similar to the effect of the delay circuit 591 ₁ of the calculation result is there.

The configuration shown in FIG. 11 is a configuration for performing intersymbol interference removal based on a signal for the past one bit, but it is also possible to perform intersymbol interference removal based on a signal for a plurality of past bits. FIG. 12 is a diagram illustrating a configuration of a decision feedback equalizer 590b that performs intersymbol interference cancellation based on signals for the past 4 bits. As shown in the figure, the decision feedback equalizer 590b includes delay circuits 591 _{1 to} 5914 ₄ for storing the determination results of the discriminator 594 for the past 4 bits, and a predetermined coefficient for the value stored in each delay circuit. a multiplier 592 _{1-592 4} multiplying, summing the calculated result of the accumulator 592 _{1-592 4,} and an adder 595 for outputting the result to the subtractor 593.

  As described above, in this embodiment, since the intersymbol interference is removed from the waveform before reproduction by the CDR 320, it is possible to reduce the error rate of the management signal and the data signal and improve the reception sensitivity. it can.

  In the above embodiment, an example of reducing the error rate in an ONU that performs communication at a high bit rate in an optical access network in which bit rates are mixed has been described. However, by using the present invention, a low bit rate can be achieved. It is also possible to reduce the error rate in the ONU that performs communication.

  FIG. 13 is a diagram illustrating a configuration of the ONU 600 according to the present embodiment. The ONU 600 is an ONU that performs data communication at a bit rate A in an optical access network in which a bit rate A and a bit rate B that is M times faster than the bit rate A are mixed. , A signal conversion unit 330, a management signal processing unit 340, a timing control unit 350, and a data signal acquisition unit 670.

  Compared to the ONU 300 shown in FIG. 3, in the ONU 600, the data signal acquisition unit 370 that receives a data signal at the bit rate B (−α) is replaced with a data signal acquisition unit 670 that receives a data signal at the bit rate A. ing. In addition, since the majority decision determination unit 331 corrects not only the management signal but also the data signal, the error correction unit 360 is eliminated, and the data signal acquisition unit 670 receives the data signal from the majority decision determination unit 331.

  As described above, in this embodiment, since the management signal and the data signal are reproduced at a higher bit rate than the original, and the error is corrected by majority decision, the error is corrected and converted to the original bit rate. An error rate can be reduced even in an ONU that performs communication at a bit rate.

  In each of the above embodiments, it is assumed that the accelerated bit rate B is an integer multiple of the bit rate A. However, in this embodiment, the bit rate B is set to the bit rate A as in the example of FIG. The correspondence when it is not an integer multiple of will be described. In the example of FIG. 14, since the bit rate B is not an integer multiple of the bit rate A, it is possible to obtain a management signal of the bit rate A by determining the majority of the bit rate b every M bits. It is not possible to obtain a management signal of bit rate A by making a majority decision every time.

  FIG. 15 is a diagram illustrating the configuration of the ONU 301 according to the present embodiment. The ONU 301 is a modified version of the ONU 300 shown in the first embodiment so that it can cope with a case where the bit rate B is not an integral multiple of the bit rate A, and is newly provided with a CDR 321. The CDR 321 is a processing unit that generates a clock signal for operating the ONU 301 based on the electrical waveform converted by the optical receiver 310 and reproduces the waveform into a digital signal.

  The CDR 320 reproduces a signal synchronized with the bit rate B based on the waveform output from the optical receiver 310 and outputs the signal to the error correction unit 360, whereas the CDR 321 outputs the waveform output from the optical receiver 310. Based on this, a signal synchronized with the bit rate b is reproduced and output to the majority decision determination unit 331. For this reason, the majority decision determination unit 331 can determine the majority of the input signal for each M bits and generate a management signal of the bit rate A. By using a CDR that can be synchronized with both a bit rate B signal and a bit rate b signal, the same CDR 320 and CDR 321 can be used.

  As described above, in this embodiment, in addition to the CDR 320 that generates the data signal of the bit rate B, the CDR 321 that generates the signal of the bit rate b that is M times the bit rate A is provided. Even when the bit rate A is not an integer multiple, a management signal with a low error rate can be obtained by majority decision.

  In the present embodiment, a modification of the ONU 300 shown in the first embodiment is shown. However, in the same manner, the ONU shown in the other embodiments is also used when the bit rate B is not an integral multiple of the bit rate A. Can be matched.

  In this embodiment, an OLT configuration in an optical access network in which a plurality of bit rates are mixed will be described. As already described, in an optical access network in which a plurality of bit rates are mixed, not only the ONU arranged on the user side but also the OLT arranged on the station side has a low S / N ratio due to the increase in bandwidth. As a result, it becomes difficult to normally receive upstream signals from existing ONUs.

  First, an upstream signal received by the OLT will be described. FIG. 16 is a diagram illustrating an example of an uplink signal. As shown in the figure, the uplink signal is time-division multiplexed and transmitted in a state where data from a plurality of subscribers are mixed. For example, upstream communication from the subscriber to the station side is controlled by a TDMA (Time Division Multiple Access) method, and the OLT receives data while switching ONUs to be received for each time slot. The uplink signal in this case is a signal in which packets having different optical intensities are transmitted in bursts due to the transmission path loss difference for each subscriber. In the uplink signal, management information corresponding to the frame synchronization / management information in the downlink signal is not transmitted, and only data is transmitted.

  Next, the configuration of the OLT 700 according to the present embodiment will be described. FIG. 17 is a block diagram illustrating the configuration of the OLT 700 according to the present embodiment. In order to simplify the description, in the figure, illustrations of configurations not related to the present invention are omitted. For example, all the configurations related to signal transmission are not shown.

  The OLT 700 is an OLT connected to an optical access network in which a bit rate A and a bit rate B that is M times faster than the bit rate A are mixed, and includes an optical receiver 710, a CDR 720, a signal conversion unit 730, A data processing unit 740, an error correction unit 750, a data processing unit 760, and a timing control unit 770 are included.

  The optical receiver 710 is a processing unit that converts an optical signal received by a photodiode or the like into an electrical waveform. The CDR 720 is a processing unit that generates a clock signal for operating the OLT 700 based on the electrical waveform converted by the optical receiver 710 and reproduces the waveform into a digital signal. Since the OLT 700 is a communication device that supports data reception at the bit rate B, the CDR 720 reproduces the waveform into a digital signal at the bit rate B.

  The digital signal reproduced by the CDR 720 is received by the signal conversion unit 730 and the error correction unit 750. The signal conversion unit 730 is a processing unit that converts a bit rate B digital signal reproduced by the CDR 720 into a bit rate A digital signal in order to obtain a data signal from the ONU that has transmitted data at the bit rate A. A majority decision determination unit 731 and an identification phase synchronization unit 732 are included.

  The majority decision unit 731 is a processing unit that converts an M-bit signal into a 1-bit signal while correcting an error using the majority decision logic. As described above, by converting the bit rate B signal to the bit rate A signal while correcting the error by majority decision, it is possible to improve the decrease in the reception sensitivity characteristic due to the wide band.

  Note that the majority decision in the majority decision unit 731 may be simply based on the number of 0s and 1s, or by adding a weight to a bit with little inter-code interference (for example, the third bit out of 4 bits). It is good to do.

  The identification phase synchronization unit 732 specifies the phase (bit) that is the head of conversion in units of M bits when the majority decision unit 731 starts converting the signal reproduced by the CDR 720 into a 1-bit signal every M bits. The processing unit notifies the majority decision determination unit 731 of the specific result.

  The data processing unit 740 is a processing unit that takes out the data signal converted to the bit rate A by the signal conversion unit 730 at a timing instructed by the timing control unit 770 and performs predetermined data processing. If necessary, the data processing unit 740 transfers the processed data signal to another device.

  The error correction unit 750 is a processing unit that improves the reception sensitivity of the data signal of the bit rate B by correcting the error of the data signal of the bit rate B. Error correction of a data signal can be realized using FEC, for example. In error correction by FEC or the like, data is made redundant at the transmission source, so that the data signal after the error correction by the error correction unit 750 has a bit rate slightly lower by the amount of redundant data. Turn into.

  The data processing unit 760 is a processing unit that takes out the data signal of the bit rate B whose error has been corrected by the error correction unit 750 at the timing instructed by the timing control unit 770 and performs predetermined data processing. If necessary, the data processing unit 760 transfers the processed data signal to another device.

  The timing control unit 770 instructs the data processing unit 740 and the data processing unit 760 to acquire the data signal corresponding to each ONU according to the reception timing of the data signal from each ONU that is known in advance. It is.

  As described above, in this embodiment, an error is corrected by majority decision for a low bit rate data signal, and an error is corrected by an error correction code for a high bit rate data signal. OLT reception sensitivity in an optical access network in which bit rates are mixed can be improved. In the above embodiment, an optical access network in which two bit rates are mixed has been described. For example, a bit rate of A ′ (= B / M ′) is further mixed, and three or more bit rates are mixed. Needless to say, the present invention has the same effect on the optical access network.

  In the sixth embodiment, the example in which the signal is reproduced at the same bit rate as that of the data signal of the high bit rate by the CDR and the reception sensitivity of the signal of the low bit rate is improved by making a majority decision. In this embodiment, an example will be described in which a signal is reproduced at a bit rate higher than that of a high bit rate data signal by CDR, and the reception sensitivity of a high bit rate data signal is improved by majority decision. .

  FIG. 18 is a diagram illustrating the configuration of the OLT 800 according to the present embodiment. Similar to the OLT 700, the OLT 800 is an OLT connected to an optical access network in which a bit rate A and a bit rate B that is M times faster than the bit rate A are mixed. The OLT 800 includes an optical receiver 710, a CDR 820, A conversion unit 830, a data processing unit 740, a signal conversion unit 850, a data processing unit 760, and a timing control unit 770 are included.

  Since the optical receiver 710, the data processing unit 740, the data processing unit 760, and the timing control unit 770 are the same as those shown in FIG. 17, description thereof is omitted here. The CDR 820 is a processing unit that generates a clock signal for operating the OLT 800 based on the electrical waveform converted by the optical receiver 710 and reproduces the waveform into a digital signal. The CDR 820 reproduces the waveform into a digital signal having a bit rate C that is N times faster than the bit rate A (N is an integer multiple of M).

  The digital signal reproduced by the CDR 820 is received by the signal conversion unit 830 and the signal conversion unit 850. The signal conversion unit 830 is a processing unit that converts a digital signal of the bit rate C reproduced by the CDR 820 into a digital signal of the bit rate A in order to obtain a data signal from the ONU that has transmitted data at the bit rate A. A majority decision determination unit 831 and an identification phase synchronization unit 732 are included.

  The majority decision unit 831 is a processing unit that converts an N-bit signal into a 1-bit signal while correcting an error using the majority decision logic. In this way, by converting the bit rate C signal to the bit rate A signal while correcting the error by majority decision, it is possible to improve the reduction in the reception sensitivity characteristic due to the wide band. The identification phase synchronization unit 732 is the same as that shown in FIG.

  The signal conversion unit 850 is a processing unit that converts a digital signal of the bit rate C reproduced by the CDR 820 into a digital signal of the bit rate B in order to obtain a data signal from the ONU that has transmitted data at the bit rate B. A majority decision determination unit 851 and an identification phase synchronization unit 852 are included.

  The majority decision unit 851 is a processing unit that converts an N / M bit signal into a 1-bit signal while correcting an error using the majority decision logic. In this way, by converting the bit rate C signal to the bit rate B signal while correcting the error by majority decision, it is possible to improve the reduction in the reception sensitivity characteristic due to the wide band. The identification phase synchronization unit 852 is a processing unit similar to the identification phase synchronization unit 732 illustrated in FIG.

  As for the majority decision, a simple majority decision may be used, or a majority decision obtained by adding a weight to a specific bit may be used. In error correction by majority decision, data is not made redundant unlike error correction by FEC or the like, so that the data signal acquisition unit 370 can receive a signal at the speed of the bit rate B as it is.

  As described above, in this embodiment, the CDR 820 is configured to reproduce a signal at a higher bit rate than the data signal. Therefore, not only the low bit rate data signal but also the high bit rate data signal is determined by majority decision. As a result, the error rate can be reduced and the reception sensitivity can be improved.

  In the above embodiment, an example of reducing the error rate in the OLT that receives a signal with a mixed bit rate has been described. However, by using the present invention, in the OLT that receives a signal of only an ONU having a low bit rate. The error rate can also be reduced.

  FIG. 19 is a diagram illustrating a configuration of the OLT 900 according to the present embodiment. The OLT 900 is an OLT that performs communication at a bit rate A, and includes an optical receiver 710, a CDR 720, a signal conversion unit 730, a data processing unit 740, and a timing control unit 970.

  Compared with the OLT 700 shown in FIG. 17, the OLT 900 has the same configuration for improving the reception sensitivity of the data signal of the bit rate A by majority decision, while processing the data signal of the bit rate B. Therefore, the error correction unit 750 and the data processing unit 760 are not provided. In addition, the timing control unit 770 is replaced with a timing control unit 970 that instructs the data acquisition timing only to the data processing unit 740.

  As described above, in this embodiment, the data signal is reproduced at a higher bit rate than the original, and is converted to the original bit rate while correcting the error by majority decision. The error rate can be reduced even in an OLT connected to an optical access network composed only of ONUs.

  In the present embodiment, a case where the bit rate B is not an integer multiple of the bit rate A as in the example of FIG. 20 will be described. In the example of FIG. 20, since the bit rate B is not an integral multiple of the bit rate A, it is possible to obtain a signal of the bit rate A by majority determination of the bit rate b every M bits, but the bit rate B is changed every M bits. It is impossible to obtain a signal of bit rate A by making a majority decision.

  FIG. 21 is a diagram illustrating the configuration of the OLT 701 according to the present embodiment. The OLT 701 is a modification of the OLT 700 shown in the sixth embodiment so that it can cope with a case where the bit rate B is not an integral multiple of the bit rate A, and newly includes a CDR 721. The CDR 721 is a processing unit that generates a clock signal for operating the OLT 701 based on the electrical waveform converted by the optical receiver 710 and reproduces the waveform into a digital signal.

  The CDR 720 reproduces a signal synchronized with the bit rate B based on the waveform output from the optical receiver 710 and outputs the signal to the error correction unit 750, whereas the CDR 721 outputs the waveform output from the optical receiver 710. Based on the above, a signal synchronized with the bit rate b is reproduced and output to the majority decision unit 731. For this reason, the majority decision determination unit 731 can determine the majority of the input signal for each M bits and generate a signal of bit rate A. By using a CDR that can synchronize with both a bit rate B signal and a bit rate b signal, the same CDR 720 and CDR 721 can be used.

  As described above, in this embodiment, in addition to the CDR 720 that generates the data signal of the bit rate B, the CDR 721 that generates the signal of the bit rate b that is M times the bit rate A is provided. Even when the bit rate is not an integral multiple of the bit rate A, the error rate of the low bit rate can be reduced by the majority decision.

  In the present embodiment, a modification example of the OLT 700 shown in the sixth embodiment is shown. However, in the same manner for the ONUs shown in the other embodiments, the bit rate B is not an integral multiple of the bit rate A. Can be matched. For example, the OLT 800 shown in the seventh embodiment can be dealt with when the bit rate B is not an integral multiple of the bit rate A by newly providing a CDR 821 like the OLT 801 shown in FIG.

  The various configurations shown in the above embodiments can be variously modified without departing from the gist of the present invention. In addition, the configurations of the respective embodiments can be arbitrarily combined. For example, the intersymbol interference removing unit shown in the third embodiment can be provided in the ONU and OLT shown in the other embodiments.

  As described above, the communication terminal device, the communication device, and the signal receiving method according to the present invention are useful in a network in which a plurality of bit rates are mixed, and particularly when a part of the existing network is speeded up. Even so, it is suitable for the case where it is necessary to perform normal communication without degrading the reception sensitivity on the high-speed line.

FIG. 1 is a diagram illustrating an example of an optical access network in which a plurality of bit rates are mixed. FIG. 2 is a diagram illustrating an example of a downstream signal. FIG. 3 is a block diagram illustrating the configuration of the ONU according to the first embodiment. FIG. 4 is a diagram illustrating an operation example of the majority decision determination unit when the bit rate B is four times the bit rate A. FIG. 5 is a diagram illustrating an operation example of the majority decision determination unit in the case where a majority decision is made by adding a weight to the third bit. FIG. 6 is a diagram illustrating a specific implementation example of the signal conversion unit. FIG. 7 is a flowchart showing the processing procedure of the ONU. FIG. 8 is a block diagram illustrating the configuration of the ONU according to the second embodiment. FIG. 9 is a block diagram illustrating the configuration of the ONU according to the third embodiment. FIG. 10 is a diagram illustrating the principle of intersymbol interference removal by the intersymbol interference removal unit. FIG. 11 is a diagram illustrating a configuration of a decision feedback type equalizer when performing intersymbol interference cancellation based on a signal for the past one bit. FIG. 12 is a diagram illustrating a configuration of a decision feedback type equalizer when intersymbol interference cancellation is performed based on a signal for the past 4 bits. FIG. 13 is a block diagram illustrating the configuration of the ONU according to the fourth embodiment. FIG. 14 is a diagram illustrating an example of a downstream signal when the bit rate B is not an integer multiple of the bit rate A. FIG. 15 is a block diagram illustrating the configuration of the ONU according to the fifth embodiment. FIG. 16 is a diagram illustrating an example of an uplink signal. FIG. 17 is a block diagram illustrating the configuration of the OLT according to the sixth embodiment. FIG. 18 is a block diagram illustrating the configuration of the OLT according to the seventh embodiment. FIG. 19 is a block diagram illustrating the configuration of the OLT according to the eighth embodiment. FIG. 20 is a diagram illustrating an example of an upstream signal when the bit rate B is not an integer multiple of the bit rate A. FIG. 21 is a block diagram illustrating the configuration of the OLT according to the ninth embodiment. FIG. 22 is a block diagram illustrating the configuration of another OLT according to the ninth embodiment.

Explanation of symbols

10 power splitter 20 optical fiber cable 100 OLT
200 ₁ ~200 _x, 300,301 ONU
310 Optical receiver 320, 321 CDR
330 Signal Converter 331 Majority Determination Unit 332 Discrimination Phase Synchronization Unit 340 Management Signal Processing Unit 350 Timing Control Unit 360 Error Correction Unit 370 Data Signal Acquisition Unit 380 Signal Conversion Unit 381 _{1 to} 381 _m Majority Determination Unit 382 Known Code Detection Unit 383 Selector 400 ONU
420 CDR
430 Signal conversion unit 431 Majority determination unit 460 Majority determination unit 500 ONU
590 Intersymbol interference cancellation unit 590a, 590b Decision feedback type equalizer 591 _{1 to} 591 ₄ Delay circuit 592 _{1 to} 592 ₄ Accumulator 593 Subtractor 594 Discriminator 595 Adder 600 ONU
670 Data signal acquisition unit 700, 701 OLT
710 Optical receiver 720, 721 CDR
730 Signal conversion unit 731 Majority determination unit 732 Identification phase synchronization unit 740 Data processing unit 750 Error correction unit 760 Data processing unit 770 Timing control unit 800, 801 OLT
820, 821 CDR
830 Signal conversion unit 831 Majority determination unit 850 Signal conversion unit 851 Majority determination unit 852 Identification phase synchronization unit 900 OLT
970 Timing control unit

Claims (23)

A communication terminal device that receives a management signal transmitted at a bit rate A and a data signal transmitted at a bit rate B (B is M times A) from the same line,
Signal reproducing means for reproducing a waveform transmitted through the line as a signal of a bit rate C (C is N times A);
Management signal conversion means for analyzing the signal reproduced by the signal reproduction means and converting it into the management signal of 1 bit every N bits;
Timing control means for controlling the acquisition timing of the data signal addressed to the communication terminal device based on the management signal converted by the management signal conversion means;
A communication terminal apparatus comprising: a data signal acquisition unit configured to acquire the data signal from a signal reproduced by the signal reproduction unit according to timing control of the timing control unit.   The communication terminal apparatus according to claim 1, wherein M is N.   3. The communication terminal according to claim 1, wherein the management signal conversion unit converts the N-bit signal reproduced by the signal reproduction unit into a 1-bit management signal by performing a majority decision. apparatus.   The management signal converting means converts the N-bit signal regenerated by the signal regenerating means into a 1-bit management signal by weighting each bit and making a majority decision. 2. The communication terminal device according to 2.   The management signal converting means compares a signal sequence converted by shifting the synchronization timing with a predetermined signal pattern, and converts the management signal at a synchronization timing at which a sequence matching the signal pattern is detected. The communication terminal device according to claim 1 or 2.   3. The communication terminal apparatus according to claim 1, further comprising error correction means for performing error correction of the data signal using an error correction code. N is an integer multiple of M,
Further comprising data signal conversion means for analyzing the signal reproduced by the signal reproduction means and converting it into a 1-bit data signal every N / M bits;
The communication terminal apparatus according to claim 1, wherein the data signal acquisition unit acquires the data signal from the signal converted by the data signal conversion unit in accordance with timing control of the timing control unit.   The data signal converting means converts the N / M bit signal reproduced by the signal reproducing means into a 1-bit data signal by weighting each bit and performing majority decision. 8. The communication terminal device according to 7.   The communication terminal apparatus according to claim 1, further comprising an intersymbol interference removing unit that removes an influence of intersymbol interference from a waveform input to the signal reproducing unit. A signal reception method in a communication terminal apparatus that receives a management signal transmitted at a bit rate A and a data signal transmitted at a bit rate B (B is M times A) from the same line,
A signal reproduction step of reproducing a waveform transmitted through the line as a signal of a bit rate C (C is N times A);
A management signal conversion step of analyzing the signal reproduced by the signal reproduction step and converting the signal into N-bit management signals every N bits;
A timing control step for controlling the acquisition timing of the data signal addressed to the communication receiving terminal based on the management signal converted by the management signal conversion step;
And a data signal acquisition step of acquiring the data signal from the signal reproduced by the signal reproduction step in accordance with the timing control of the timing control step. A communication device that receives a low-speed signal transmitted at a bit rate A and a high-speed signal transmitted at a bit rate B (B> A) from the same line,
Signal reproducing means for reproducing a waveform transmitted through the line as a signal of a bit rate C (C is N times A);
Identification phase synchronization means for synchronizing the signal reproduced by the signal reproduction means with the low-speed signal;
And a signal conversion means for analyzing the signal reproduced by the signal reproduction means and converting it into the low-speed signal of 1 bit every N bits. The communication apparatus according to claim 11 , wherein B is M times A. The communication apparatus according to claim 12 , wherein B = C (M = N). B is M times A,
Second identification phase synchronization means for synchronizing the signal reproduced by the signal reproduction means with the high-speed signal;
And a second signal converting means for analyzing the signal regenerated by the signal regenerating means and converting the L (L = N / M) bits into the high-speed signal of 1 bit. Item 12. The communication device according to Item 11 . 12. The communication apparatus according to claim 11 , further comprising second signal reproduction means for reproducing a waveform transmitted through the line as a bit rate B signal. Second signal reproducing means for reproducing a waveform transmitted through the line as a signal having a bit rate c (c is L times B);
Second identification phase synchronization means for synchronizing the signal reproduced by the second signal reproduction means with the high-speed signal;
12. The apparatus according to claim 11 , further comprising second signal conversion means for analyzing the signal reproduced by the second signal reproduction means and converting the signal to the high-speed signal of 1 bit every L bits. Communication equipment. 16. The communication apparatus according to claim 11 , further comprising error correction means for performing error correction of the high-speed signal using an error correction code. 16. The signal conversion unit according to claim 11 , wherein the signal conversion unit converts the N-bit signal reproduced by the signal reproduction unit into a 1-bit signal by performing a majority decision. Communication equipment. Said signal converting means, a signal of N bits reproduced by said signal reproducing means, by majority decision by weighting each bit of claim 11 to 15, wherein the conversion into 1-bit signal The communication apparatus as described in any one. 17. The communication apparatus according to claim 14, wherein the second signal conversion unit converts an L-bit signal into a 1-bit signal by performing a majority decision. The communication apparatus according to claim 11 , further comprising intersymbol interference removing means for removing the influence of intersymbol interference from the waveform input to the signal reproducing means. Timing control means for controlling the acquisition timing of the data signal of each bit rate based on the timing control signal;
12. The communication apparatus according to claim 11 , further comprising: a data signal acquisition unit that acquires the data signal from the signal converted by the signal conversion unit in accordance with timing control of the timing control unit. A signal reception method in a communication apparatus that receives a low-speed signal transmitted at a bit rate A and a high-speed signal transmitted at a bit rate B (B> A) from the same line,
A signal reproduction step of reproducing a waveform transmitted through the line as a signal of a bit rate C (C is N times A);
An identification phase synchronization step of synchronizing the signal reproduced by the signal reproduction step with the low-speed signal;
And a signal conversion step of analyzing the signal reproduced by the signal reproduction step and converting the signal reproduced into N-bit low-speed signals every 1 bit.

Images