JP4689309B2 - Amplification circuit and electronic equipment - Google Patents

Description

  The present invention relates to an operational amplifier, and more particularly to a multi-input operational amplifier having a plurality of differential inputs.

  An operational amplifier is widely used in various applications as a basic circuit constituting an electronic circuit. The operational amplifier is configured using a MOSFET, a bipolar transistor, or the like, and differentially amplifies and outputs a signal input to a differential pair provided in an input stage.

  Conventional operational amplifiers have two input terminals, a non-inverting input terminal and an inverting input terminal, and by changing the feedback configuration from the output terminal to the two input terminals, an inverting amplifier circuit and a non-inverting amplifier circuit are used depending on the application. Used as such.

  For example, in an audio signal amplifier circuit that amplifies an audio signal, an inverting amplifier circuit configured by using an operational amplifier is widely used. The gain of such an inverting amplifier circuit can be controlled by providing a variable resistor between the output terminal and the inverting input terminal of the operational amplifier and changing the value of this variable resistor. For example, Patent Document 1 discloses an amplifier circuit using a variable resistor. Such a variable gain amplifier circuit is used as a volume control circuit.

JP 2004-336129 A

  However, since the resistance value of the variable resistor is switched with a discrete value, the gain of the amplifier circuit is also switched discretely. If the gain of the amplifier circuit is switched discretely, the voltage value of the audio signal output from the amplifier circuit changes abruptly, which is undesirable because it causes noise.

  The present invention has been made in view of the above problems, and an object thereof is to provide an amplifier circuit capable of seamlessly switching gains and an operational amplifier that can be used therefor.

  In order to solve the above-described problem, an operational amplifier according to an aspect of the present invention is an operational amplifier including two sets of differential input terminals, each of which has a first non-inverting input terminal and a first inverting input terminal. A first differential pair including first and second transistors connected to each other, and a second differential circuit including third and fourth transistors each having a control terminal connected to a second non-inverting input terminal and a second inverting input terminal. A differential pair; a current mirror load provided in common to the first and second differential pairs; and first and second current sources for supplying a bias current to each of the first and second differential pairs. .

  According to this aspect, which differential pair is activated can be switched depending on which of the first and second differential pairs is supplied with the bias current. As a result, an amplifier circuit configured using the first non-inverting input terminal and the first inverting input terminal on the first differential pair side, and the second non-inverting input terminal and the second inverting side on the second differential pair side An amplifier circuit configured using the input terminal can be switched and used.

The operational amplifier further includes a current control unit that controls a bias current supplied to the first and second differential pairs by the first and second current sources, and the current control unit includes the first and second differential pairs. Control may be performed so that the sum of the bias currents supplied to becomes a constant value.
By making the sum of the bias currents supplied to the first and second differential pairs constant, the current flowing through the current mirror load is maintained at a constant value, and stable differential amplification can be performed. .

The current control unit includes a capacitor, a charge / discharge circuit that charges and discharges the capacitor, a voltage-current conversion circuit that converts a voltage that appears at one end of the capacitor into a current, and a constant current source that generates a predetermined constant current. Also good. The bias current supplied to the first differential pair is the current converted by the voltage-current converter, and the difference between the predetermined constant current and the current converted by the voltage-current converter is supplied to the second differential pair. It is good.
According to this current control unit, the bias current can be adjusted by charging and discharging the capacitor.

  Another embodiment of the present invention is an amplifier circuit. The amplifier circuit includes the above-described operational amplifier, a first feedback path provided between the output terminal of the operational amplifier and the first inverting input terminal, and a first feedback path provided between the output terminal of the operational amplifier and the second inverting input terminal. 2 return paths. An input signal to be amplified is input to the first non-inverting input terminal and the second non-inverting input terminal.

  According to this aspect, the non-inverting amplifier constituted by the first differential pair and the first feedback path and the non-inverting amplifier constituted by the second differential pair and the second feedback path are adjusted to adjust the bias current of the operational amplifier. Can be used by switching.

  Yet another embodiment of the present invention is also an amplifier circuit. The amplifier circuit includes the above-described operational amplifier, a first feedback path provided between the output terminal of the operational amplifier and the first inverting input terminal, and a first feedback path provided between the output terminal of the operational amplifier and the second inverting input terminal. 2 return paths. An input signal to be amplified is input to the first inverting input terminal and the second inverting input terminal via an input resistor, and a predetermined reference voltage is input to the first non-inverting input terminal and the second non-inverting input terminal.

  According to this aspect, the inverting amplifier configured by the first differential pair and the first feedback path and the inverting amplifier configured by the second differential pair and the second feedback path are switched by adjusting the bias current of the operational amplifier. Can be used.

  Yet another embodiment of the present invention is also an amplifier circuit. The amplifier circuit includes the above-described operational amplifier, a first feedback path provided between the output terminal of the operational amplifier and the first inverting input terminal, and a first feedback path provided between the output terminal of the operational amplifier and the second inverting input terminal. 2 return paths. An input signal to be amplified is input to a first inverting input terminal and a second non-inverting input terminal via an input resistor, and a predetermined reference voltage is input to the first non-inverting input terminal.

  According to this aspect, the inverting amplifier constituted by the first differential pair and the first feedback path and the non-inverting amplifier constituted by the second differential pair and the second feedback path are adjusted by adjusting the bias current of the operational amplifier. Can be used by switching.

  Yet another embodiment of the present invention is also an amplifier circuit. The amplifier circuit includes the above-described operational amplifier, a first feedback path provided between the output terminal of the operational amplifier and the first inverting input terminal, and a first feedback path provided between the output terminal of the operational amplifier and the second inverting input terminal. 2 return paths. The input signal to be amplified is input to the first inverting input terminal via the input resistor, and a predetermined reference voltage is input to the first non-inverting input terminal and the second non-inverting input terminal.

  According to this aspect, an inverting amplifier is configured by the first differential pair and the first feedback path, and a voltage source that outputs a fixed voltage is configured by the second differential pair and the second feedback path. By adjusting the bias current of the operational amplifier, a signal obtained by inverting and amplifying the input signal or a fixed voltage can be switched and output.

  At least one of the first feedback path or the second feedback path may include a variable resistor. By providing a variable resistor in the feedback path, it can be used as a variable gain amplifier.

  Yet another embodiment of the present invention is also an amplifier circuit. This amplifier circuit includes the above-described operational amplifier, a plurality of resistors connected in series, one end of which is connected to the output terminal of the operational amplifier, and each connection node of the plurality of resistors included in the resistor group, A first switch group including a plurality of switches provided between the first inverting input terminal, a first switch group including a plurality of switches provided between the connection nodes of the plurality of resistors and the second inverting input terminal. And a switch control unit that selects and turns on one switch from each of the two switch groups and the first switch group and the second switch group. A predetermined reference voltage is applied to the first and second non-inverting input terminals, and an input signal to be amplified is applied to the other end of the resistor group.

  According to this aspect, the value of the feedback resistor can be switched by the first switch group and the second switch group, and a variable gain amplifier circuit can be configured.

  Yet another embodiment of the present invention is an operational amplifier. The operational amplifier includes a plurality of differential pairs, a load provided in common to the plurality of differential pairs, and a plurality of current sources that supply a bias current to each of the plurality of differential pairs.

  According to this aspect, an operational amplifier having an arbitrary number of differential input pairs can be provided.

The operational amplifier may further include a current control unit that controls a bias current supplied to the plurality of differential pairs. The current control unit may control the plurality of current sources so that the sum of the currents generated by the plurality of current sources becomes a constant value.
The load may be a current mirror load.

  The plurality of differential pairs may be field effect transistors, and the plurality of differential pairs may be bipolar transistors.

  Still another embodiment of the present invention relates to an electronic device. This electronic apparatus includes an audio output unit and the above-described amplifier circuit that drives the audio output unit. The audio output unit includes a speaker and an earphone.

  Note that any combination of the above-described constituent elements and the constituent elements and expressions of the present invention replaced with each other among methods, apparatuses, systems, etc. are also effective as an aspect of the present invention.

  ADVANTAGE OF THE INVENTION According to this invention, the amplifier circuit which can switch a gain seamlessly, and the operational amplifier which can be used for it can be provided.

FIG. 1 is a circuit diagram showing a configuration of an operational amplifier according to the present embodiment. The operational amplifier 100 includes two sets of differential input terminals. The first differential input terminal is an A channel, and the second differential input terminal is a B channel.
The operational amplifier 100 includes a first transistor M1 to a sixth transistor M6, a first current source 10, a second current source 12, and an output amplification stage 20.

The operational amplifier 100 includes a first differential pair corresponding to the A channel constituted by the first transistor M1 and the second transistor M2, and a B channel constituted by the third transistor M3 and the fourth transistor M4. Two differential pairs are provided.
The first transistor M1 to the fourth transistor M4 are P-channel MOS transistors, and the gate terminals that are the control terminals thereof are the first non-inverting input terminal 102, the first inverting input terminal 104, and the second non-inverting input terminal. 106, a second inverting input terminal 108.

A first bias current Ibias1 is supplied as a tail current from the first current source 10 to the first differential pair constituted by the first transistor M1 and the second transistor M2.
Similarly, a second bias current Ibias2 is supplied as a tail current from the second current source 12 to the second differential pair formed by the third transistor M3 and the fourth transistor M4.
The current values of the first bias current Ibias1 and the second bias current Ibias2 generated by the first current source 10 and the second current source 12 are variable.

The fifth transistor M5 and the sixth transistor M6 are current mirror loads commonly connected to the first differential pair and the second differential pair. The fifth transistor M5 and the sixth transistor M6 are N-channel MOS transistors, the source terminal is grounded, and the gate terminal is connected to the drain terminal of the fifth transistor M5.
The drain terminal of the fifth transistor M5 is connected to the drain terminals of the first transistor M1 and the third transistor M3. Similarly, the drain terminal of the sixth transistor M6 is connected to the drain terminals of the second transistor M2 and the fourth transistor M4. Is done.
The fifth transistor M5 and the sixth transistor M6 function as constant current loads for the first differential pair and the second differential pair.

  The output amplification stage 20 is connected to the drain terminal of the sixth transistor M6. The output amplifier stage 20 amplifies the output current Iout generated by the two differential pairs and outputs it from the output terminal 110. The output amplifying stage 20 only needs to constitute the output stage of a general operational amplifier, and the circuit format is not particularly limited in the present embodiment.

The operation of the operational amplifier 100 configured as described above will be described.
The mutual conductance gm1 of the first differential pair is given by gm1 = √ (β × Ibias1). Here, β is given by β = W / L × μCox using the gate width W, gate length L, mobility μ, and capacitance Cox of the gate oxide film. Now, if the difference between the voltages input to the first non-inverting input terminal 102 and the first inverting input terminal 104, that is, the differential input voltage is Vin1, the differential current Iout1 generated by the first differential pair is Iout1. = Gm1 × Vin1.
Similarly, the mutual conductance gm2 of the second differential pair is given by gm2 = √ (β × Ibias2), and when the differential input voltage is Vin2, the differential current Iout2 generated by the second differential pair is Iout2 = gm2 × Vin2.

The output current Iout amplified by the output amplification stage 20 is given by the sum of the differential currents Iout1 and Iout2 generated by the first differential pair and the second differential pair, respectively. That is, Iout = Iout1 + Iout2 = gm1 × Vin1 + gm2 × Vin2.
As described above, the mutual conductances gm1 and gm2 of the differential pair are given as functions of the first bias current Ibias1 and the second bias current Ibias2, respectively. Therefore, in the operational amplifier 100, by controlling the first bias current Ibias1 and the second bias current Ibias2, any one of the A channel and the B channel corresponding to the first differential pair and the second differential pair is made active. Can be switched continuously.

In the present embodiment, the sum of the bias currents flowing through the first differential pair and the second differential pair is controlled to be a constant value Iss. Which of the A channel and the B channel is dominant can be adjusted by setting Ibias1 + Ibias2 = Iss and increasing the bias current flowing in either the first differential pair or the second differential pair.
For example, when Ibias1 = 0 and Ibias2 = Iss, the voltages input to the second non-inverting input terminal 106 and the second inverting input terminal 108 are differentially amplified, and when Ibias1 = Iss and Ibias2 = 0, The voltage input to the first non-inverting input terminal 102 and the first inverting input terminal 104 can be differentially amplified. When a bias current is supplied to both the first and second differential pairs, the differential input voltages of the A channel and B channel are amplified in proportion to the square root of the bias current.

Next, an amplifier circuit using the operational amplifier 100 configured as described above will be described based on some embodiments.
(First embodiment)
FIG. 2 is a circuit diagram showing a configuration of the amplifier circuit 200 according to the first embodiment. The amplifier circuit 200 includes an operational amplifier 100, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, and a current control unit 30. In the figure, + A and -A of the operational amplifier 100 are the first non-inverting input terminal 102 and the first inverting input terminal 104 in FIG. 1, and + B and -B are the second non-inverting input terminal 106 and the second non-inverting input terminal 106, respectively. This is the inverting input terminal 108.

In FIG. 2, a first resistor R1 and a second resistor R2 are connected between the output terminal of the operational amplifier 100 and the first inverting input terminal 104 (+ A). The first resistor R1 and the second resistor R2 are provided as a first feedback path that divides the voltage Vout at the output terminal of the operational amplifier 100 and feeds it back to the first inverting input terminal 104 (-A).
Similarly, a third resistor R3 and a fourth resistor R4 are connected between the output terminal 110 of the operational amplifier 100 and the second inverting input terminal 108 (+ B). The third resistor R3 and the fourth resistor R4 are provided as a second feedback path.

  The input signal Vin to be amplified is input to the first non-inverting input terminal 102 (+ A) and the second non-inverting input terminal 106 (+ B).

  In the amplifier circuit configured as described above, each of the A channel and the B channel constitutes a non-inverting amplifier, and the gains of the respective channels are the first gain g1 = (1 + R2 / R1) and the second gain g2 = (1 + R4 / R3).

  The current control unit 30 controls the first bias current Ibias1 and the second bias current Ibias2 supplied to the first differential pair and the second differential pair by the first current source 10 and the second current source 12 of the operational amplifier 100. To do. The current control unit 30 controls the bias current of the operational amplifier 100 so that Ibias1 + Ibias2 = Iss. FIG. 3 is a circuit diagram illustrating a configuration example of the current control unit 30.

The current control unit 30 includes a capacitor C 1, a charge / discharge circuit 40, a voltage / current conversion circuit 50, and a constant current source 60.
The charge / discharge circuit 40 includes current sources 42 and 44, and charges and discharges the capacitor C1. In the charge / discharge circuit 40, the capacitor C1 is charged when the current source 42 is turned on, the voltage Vx appearing at one end of the capacitor C1 rises, and the capacitor C1 is discharged when the current source 44 is turned on. Descend.

The voltage-current conversion circuit 50 converts the voltage Vx appearing at one end of the capacitor C1 into a current. This voltage-current conversion circuit 50 includes transistors M10 to M16.
A voltage Vx is input to the gate terminal of the transistor M10, and a predetermined reference voltage Vref is input to the gate terminal of the transistor M11. A tail current source 52 is connected to the transistors M10 and M11. A current Ix1 corresponding to the voltage Vx flows through the transistor M12.

The transistors M12 and M13 constitute a current mirror circuit, and a current Ix2 obtained by amplifying the current Ix1 flows through the transistor M13. A constant current source 54 for generating a constant current Ic is connected to the drain terminal of the transistor M13. A current Ix3 = (Ic−Ix2) flows through the transistor M14.
The transistor M14 and the transistors M15 and M18 form a current mirror circuit, and a current Ix4 obtained by amplifying the current Ix3 flows through the transistors M15 and M18.
The current Ix4 flowing through the transistor M18 is output as the first bias current Ibias1.

  The constant current source 60 generates a predetermined constant current Iss. A transistor M15 and a transistor M16 are connected to the constant current source 60. As described above, since the current Ix4 flows through the transistor M15, Ix5 = Iss-Ix4 flows through the transistor M16. The transistors M16 and M17 form a current mirror circuit, and Ix5 = Iss−Ix4 also flows through the transistor M17. The current Ix5 flowing through the transistor M17 is output as the second bias current Ibias2.

The first bias current Ibias1 and the second bias current Ibias2 generated in this way are given by Ibias1 + Ibias2 = Iss. When the capacitor C1 is charged, the first bias current Ibias1 increases. When the capacitor C1 is discharged, the second bias current Ibias2 increases.
The transistors M18 and M17 are respectively connected to the first current source 10 and the second current source 12 of the operational amplifier 100, and the bias currents generated by the first current source 10 and the second current source 12 are controlled.

Returning to FIG. As described above, when the bias current of the operational amplifier 100 is controlled by the current control unit 30, it is possible to adjust which of the A channel and the B channel is dominant.
When the first bias current Ibias1 = Iss, the A channel is turned on and the B channel is turned off. Therefore, the input signal Vin is amplified with the first gain g1 = (1 + R2 / R1). Conversely, when the second bias current Ibias2 = Iss, the B channel is turned on and the A channel is turned off, so that the input signal Vin is amplified with the second gain g2 = (1 + R4 / R3).

  FIG. 4 is a diagram illustrating the operation of the amplifier circuit 200 according to the first embodiment. An input signal Vin having a constant amplitude is input to the amplifier circuit 200. From time T0 to time T1, the bias current of the operational amplifier 100 is controlled by the current control unit 30 so that Ibias1 = Iss and Ibias2 = 0. As a result, the A channel of the operational amplifier 100 becomes active, and the input signal Vin is amplified with the first gain g1.

At time T1, the current control unit 30 gradually decreases the first bias current Ibias1 and gradually increases the second bias current Ibias2. As a result, the B channel of the operational amplifier 100 becomes gradually active, and the gain of the amplifier circuit 200 gradually changes from the first gain g1 to the second gain g2.
At time T2, Ibias2 = Iss, only the B channel becomes active, and the gain of the amplifier circuit 200 becomes the second gain g2.

  According to the amplifier circuit 200 according to the present embodiment, the current control unit 30 continuously changes the first bias current Ibias1 and the second bias current Ibias2 to thereby change between the first gain g1 and the second gain g2. Can be changed continuously. As a result, the output signal Vout output from the amplifier circuit 200 is not discontinuous, and the amplitude can be gradually changed.

(Second embodiment)
FIG. 5 is a circuit diagram showing a configuration of the amplifier circuit 210 according to the second embodiment. In the subsequent drawings, the same or equivalent components as in FIGS. 1 to 3 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.
A sixth resistor R6 is connected between the output terminal of the operational amplifier 100 and the first inverting input terminal 104 (-A). The sixth resistor R6 corresponds to a first feedback path through which the voltage Vout at the output terminal of the operational amplifier 100 returns to the first inverting input terminal 104 (−A). An input signal Vin to be amplified is input to the first inverting input terminal 104 (-A) via a fifth resistor R5 that is an input resistor. A predetermined reference voltage Vc is input to the first non-inverting input terminal 102 (+ A).
In this way, the A channel and the first feedback path of the operational amplifier 100 function as an inverting amplifier whose gain is given by g1 = −R6 / R5.

On the other hand, a third resistor R3 and a fourth resistor R4 are connected between the output terminal 110 of the operational amplifier 100 and the second inverting input terminal 108 (+ B). The third resistor R3 and the fourth resistor R4 are provided as a second feedback path. The input signal Vin to be amplified is divided by the ninth resistor R9 and the tenth resistor R10 and input to the second non-inverting input terminal 106 (+ B).
The B channel and the second feedback path of the operational amplifier 100 function as a non-inverting amplifier whose gain is given by g2 = R9 / (R9 + R10) × (1 + R4 / R3).

According to the amplifying circuit 210 according to the present embodiment, it is possible to seamlessly switch which of the A channel and the B channel is activated by the current control unit 30 as in the first embodiment.
Also, if resistance values are selected so that R5 = R6, R9 = R10, and R3 = R4, then g1 = 1 and g2 = −1, so that the phase of the input signal Vin can be arbitrarily controlled. can do.

(Third embodiment)
FIG. 6 is a circuit diagram showing a configuration of the amplifier circuit 220 according to the third embodiment. The amplifier circuit 220 is a variable gain amplifier, and can be used as a volume adjustment circuit in a circuit for amplifying an audio signal.
The amplifier circuit 220 includes a resistor group including resistors R20 to R24, a first switch group SWa including switches SW1a to SW4a, a second switch group SWb including switches SW1b to SW4b, a switch control unit 70, and a current control unit 30.
The resistors R20 to R24 are connected in series, and one end thereof is connected to the output terminal of the operational amplifier 100. An input signal Vin to be amplified is input to the other ends of the resistors R20 to R24.

  The switches SW1a to SW4a included in the first switch group are provided between the connection nodes of the plurality of resistors R20 to R24 and the first inverting input terminal 104 (−A) of the operational amplifier 100. Similarly, the switches SW1b to SW4b included in the second switch group are provided between connection nodes of the plurality of resistors R20 to R24 and the second inverting input terminal 108 (−B) of the operational amplifier 100.

The switch control unit 70 selects one switch from the first switch group SWa and the second switch group SWb and turns it on. FIG. 6 shows a state in which the switch SW4a of the first switch group SWa is selected and the switch SW2b of the second switch group SWb is selected and turned on.
A predetermined reference voltage Vc is applied to the first non-inverting input terminal 102 (+ A) and the second non-inverting input terminal 106 (+ B) of the operational amplifier 100.

In the amplifier circuit 220 according to the third embodiment, the A channel of the operational amplifier 100, resistors R20 to R24, and the first switch group SWa constitute one inverting amplifier, and the B channel of the operational amplifier 100, resistors R20 to R24, The second switch group SWb constitutes one inverting amplifier.
The amplification circuit 220 can switch the gain g1 of the A channel and the gain g2 of the B channel by the switch control unit 70. In addition, which of the A channel and the B channel is activated is switched by the current control unit 30.

An operation when the amplifier circuit 220 is used as a volume adjustment circuit in a circuit for amplifying an audio signal will be described. At a certain time, the channel A becomes active while the switch SW2a is turned on, and the audio signal Vin is amplified with a gain g1.
When receiving a volume change instruction from the user at a certain time, the switch control unit 70 sets any of the second switch groups SWb in order to set the gain of the B channel that is not currently active to the value g2 corresponding to the changed volume. Turn on the switch.

Thereafter, the current control unit 30 gradually decreases the first bias current Ibias1 and gradually increases the second bias current Ibias2. As a result, the gain of the amplifier circuit 220 is gradually switched from g1 to g2, the amplitude of the amplified audio signal Vout is also continuously changed, and the volume is smoothly switched.
Thereafter, when receiving a volume change instruction again from the user, the switch control unit 70 sets the gain of the A channel that is not currently active to a value g1 corresponding to the volume after the change, and the current control unit 30 sets the first bias current Ibias1. Is gradually increased to switch the A channel to active.

  As described above, by using the amplifier circuit 220 according to the present embodiment for volume control of the audio signal, the A channel and the B channel can be alternately used every time the volume is changed. By smoothly changing the bias current of the A channel and the B channel each time the volume is changed, that is, when the gain of the amplifier circuit 220 is changed, noise called click sound is prevented from being generated when the gain is switched. Can do.

(Fourth embodiment)
FIG. 7 is a circuit diagram showing a configuration of an amplifier circuit 230 according to the fourth embodiment. This amplifier circuit 230 is provided in the front stage of the speaker in the circuit for amplifying the audio signal, functions as a final stage amplifier, and is used as a mute circuit that forcibly silences the sound output from the speaker or earphone. be able to.

In the amplifier circuit 230, the A channel of the operational amplifier 100 operates as an inverting amplifier in the same manner as the amplifier circuit 210 according to the second embodiment shown in FIG.
On the other hand, a feedback resistor Rmute is provided between the output terminal of the operational amplifier 100 and the second inverting input terminal 108 (-B) , and the output voltage Vout is fully fed back. A predetermined fixed voltage Vc is input to the second non-inverting input terminal 106 (+ B) of the operational amplifier 100. A constant current circuit 80 is connected to the feedback resistor Rmute. A current generated by the constant current circuit 80 is referred to as a slope current Islp.
The B channel operates as a voltage follower that outputs the fixed voltage Vc as it is.

  FIG. 8 is a diagram showing an operation state of the amplifier circuit 230 of FIG. Prior to time T0, Ibias2 = Iss and Ibias1 = 0, and the B channel of the operational amplifier 100 is active. During this time, the slope current Islp generated by the constant current circuit 80 is Imax. This slope current Islp flows through the feedback resistor Rmute, and a voltage drop of Islp × Rmute occurs. As a result, the voltage at the output terminal of the operational amplifier 100 is forcibly set to 0V.

At time T0, the mute release operation is started, and the slope current Islp begins to gradually decrease. As a result, the voltage drop at the feedback resistor Rmute gradually decreases, and the output signal Vout approaches the predetermined fixed voltage Vc that is the original output voltage of the B channel.
At time T1, the slope current Islp becomes 0 and the output signal Vout = Vc.
At time T2, bias current control is started by the current control unit 30, the first bias current Ibias1 gradually increases, and the second bias current Ibias2 gradually decreases. As the bias current changes, in the amplifier circuit 230, the active channel gradually transitions from the B channel to the A channel, the audio signal Vin is inverted and increased, and the component of the audio signal Vin begins to appear in the output signal Vout. When Ibias1 = Iss at time T3, the A channel becomes completely active, and the audio signal Vin is inverted and amplified and output.

The transition to the mute state is performed as follows. At time T4, the control of the bias current is started by the current control unit 30, the first bias current Ibias1 is gradually decreased, and the active channel is gradually switched from the A channel to the B channel. Along with this, the output signal Vout decreases in the component of the audio signal Vin and approaches the DC voltage.
When Ibias2 = Iss at time T5, the B channel becomes completely active, and the amplifier circuit 230 operates as a voltage follower that outputs the fixed voltage Vc.

  From time T6, the slope current Islp generated by the constant current circuit 80 starts to increase. As a result, the voltage drop Rmute × Islp generated at the feedback resistor Rmute increases and the output signal Vout approaches 0V. When Islp = Imax at time T7, the output signal Vout becomes 0V, and then the amplifier circuit 230 is turned off.

  Thus, the amplifier circuit according to the present embodiment can seamlessly switch between the mute state and the audio reproduction state of the audio signal Vin.

FIG. 11 is a block diagram showing a configuration of a mobile phone terminal 600 using the amplifier circuits according to the first to fourth embodiments.
The mobile phone terminal 600 includes a processing unit 510, a communication processing unit 520, an operation unit 530, an audio management IC 500, a first speaker SP1, and a second speaker SP2.

The processing unit 510 includes a CPU 512 and a memory 514, and is a unit that comprehensively controls the mobile phone terminal 600, and is connected to each functional block via a bus. The memory 514 is loaded with a program or data necessary for each process of the mobile phone terminal 600.
The operation unit 530 is an interface for a user to input a telephone number, characters, and the like, and includes buttons.
The communication processing unit 520 is a communication unit that executes processing necessary for communication. Specifically, the communication processing unit 520 detects an incoming call from an external telephone or server, or transmits to an external telephone or server. Here, the term “incoming call” includes not only incoming calls but also incoming calls of packet communication from a server via a network. The same applies to outgoing calls. As the mobile phone system, a PDC (Personal Digital Cellular System) system may be adopted, and a simple mobile phone system, a CDMA (Code Division Multiple Access) system, or a GSM mobile communication system may be used. Also good.

The audio management IC 500 according to this embodiment will be described below.
The audio management IC 500 is connected to a first speaker SP1 and a second speaker SP2. The first speaker SP1 is a speaker for calling, and the second speaker SP2 is a speaker for reproducing a ring tone or reproducing other audio information.
The audio management IC 500 converts the digital data output from the communication processing unit 520 into an analog audio signal and outputs it to the first speaker SP1 during a call. The user has a conversation with the other party using the audio signal output from the first speaker SP1.
Further, when reproducing voice information such as a ringtone or ringtone melody other than during a call, the digital data output from the processing unit 510 is converted into an analog voice signal and output from the second speaker SP2. The volume of the audio signal output from the first speaker SP1 and the second speaker SP2 is independently controlled by the audio management IC 500.

  The audio management IC 500 includes an audio signal amplifier 300, a DSP 310, and a D / A converter 312 and is integrated as a single semiconductor circuit. The DSP 310 is a digital signal processing circuit that comprehensively controls the entire audio management IC 500, and has an interface function for transmitting and receiving data to and from the processing unit 510 and a function for coding and decoding audio data. The DSP 310 outputs audio data to be reproduced from the first speaker SP1 or the second speaker SP2 to the D / A converter 312 as digital data.

The D / A converter 312 D / A converts the digital data and outputs analog audio signals SIG 1 and SIG 2 to the audio signal amplifying apparatus 300.
The analog audio signal SIG1 is mainly obtained by converting the voice generated from the other party during a call into an analog electric signal, and the analog audio signal SIG2 is obtained by converting, for example, a ring tone into an analog electric signal. It is a thing.

The audio signal amplifier 300 includes a bias current control circuit 90, a first amplifier circuit 200a, and a second amplifier circuit 200b. The first amplifier circuit 200a amplifies the audio signal SIG1 and outputs it to the first speaker SP1. Similarly, the second amplifier circuit 200b amplifies the audio signal SIG2 and outputs it to the second speaker SP2. The first amplifier circuit 200a and the second amplifier circuit 200b are variable gain amplifiers, and the volume adjustment of the sound output from the first speaker SP1 and the second speaker SP2 is performed by adjusting the first amplifier circuit 200a and the second amplifier circuit 200b. By changing the gain. As the first amplifier circuit 200a and the second amplifier circuit 200b, the amplifier circuits 200 to 240 according to the first to fourth embodiments described above can be used.
In an actual circuit, an amplifier having a fixed gain is provided before or after the first amplifier circuit 200a or the second amplifier circuit 200b, but this is omitted for the sake of simplicity.

  When the user performs an operation corresponding to the volume change on the operation unit 530, the processing unit 510 gives an instruction to change the volume to the audio management IC 500. When receiving an instruction from the CPU, the DSP 310 instructs the audio signal amplifying apparatus 300 to control the gains of the first amplifier circuit 200a and the second amplifier circuit 200b. Since the volume levels of the first speaker SP1 and the second speaker SP2 are controlled independently, the gains of the first amplifier circuit 200a and the second amplifier circuit 200b are also controlled independently.

  The bias current control circuit 90 controls the bias current of the first amplifier circuit 200a and the second amplifier circuit 200b, and controls the gain of the first amplifier circuit 200a and the second amplifier circuit 200b by controlling the bias current.

  As described above, the amplifier circuits according to the first to fourth embodiments can be suitably used for an electronic apparatus having an audio output unit such as a mobile phone terminal, and are output from the speaker when the volume is changed. Click sound can be reduced.

  As above, the embodiments of the present invention have been described with respect to the amplifier circuits according to the first to fourth examples. Those skilled in the art will understand that the above-described embodiment is an exemplification, and that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are also within the scope of the present invention. is there.

  The operational amplifier 100 described in FIG. 1 may be configured by replacing a P-channel MOS transistor and an N-channel MOS transistor as shown in FIG. As shown in FIG. 10, a bipolar transistor may be used instead of the MOS transistor. Further, the NPN bipolar transistor and the PNP bipolar transistor of FIG. 10 can be replaced with each other.

  The operational amplifier 100 may be a current output type amplifier such as a mutual conductance amplifier (gm amplifier). Further, the operational amplifier 100 may be configured as a fully differential amplifier having a differential output with respect to a differential input. These operational amplifiers can be realized by changing the configuration of the output amplification stage 20.

  In the embodiment, the operational amplifier 100 having two differential pairs of the first differential pair and the second differential pair has been described. However, the present invention is not limited to this, and three or more differential amplifiers are provided. You may have a pair. Also in this case, any of the three or more channels is activated by connecting a current source that supplies a bias current to each differential pair and controlling the total value of each bias current to be a constant value. Can be switched seamlessly.

  In the embodiment, the case where the audio signal is amplified or muted has been described, but the use of the operational amplifier and the amplifier circuit according to the present invention is not limited to this, and is widely used for signal processing such as communication. be able to.

It is a circuit diagram which shows the structure of the operational amplifier which concerns on embodiment. 1 is a circuit diagram illustrating a configuration of an amplifier circuit according to a first embodiment. FIG. FIG. 3 is a circuit diagram illustrating a configuration example of a current control unit in FIG. 2. It is a figure which shows operation | movement of the amplifier circuit which concerns on a 1st Example. It is a circuit diagram which shows the structure of the amplifier circuit which concerns on a 2nd Example. It is a circuit diagram which shows the structure of the amplifier circuit which concerns on a 3rd Example. It is a circuit diagram which shows the structure of the amplifier circuit which concerns on a 4th Example. It is a figure which shows the operation state of the amplifier circuit of FIG. FIG. 6 is a circuit diagram illustrating a modification of the operational amplifier in FIG. 1. FIG. 10 is a circuit diagram showing another modification of the operational amplifier in FIG. 1. FIG. 11 is a block diagram showing a configuration of a mobile phone terminal using the amplifier circuits according to the first to fourth embodiments.

Explanation of symbols

  M1 first transistor, M2 second transistor, M3 third transistor, M4 fourth transistor, M5 fifth transistor, M6 sixth transistor, 10 first current source, 12 second current source, 20 output amplification stage, 30 current control , 100 operational amplifier, 102 first non-inverting input terminal, 104 first inverting input terminal, 106 second non-inverting input terminal, 108 second inverting input terminal, 110 output terminal.

Claims (5)

An amplifier circuit that amplifies an input signal and outputs it from an output terminal,
An input terminal to which the input signal is input;
An operational amplifier having two sets of differential input terminals and having a predetermined reference voltage input to the first non-inverting input terminal and the second non-inverting input terminal ;
An input resistor provided between the input terminal and a first inverting input terminal of the operational amplifier;
A feedback resistor provided between a first inverting input terminal of the operational amplifier and an output terminal of the operational amplifier;
A mute feedback resistor provided between a second inverting input terminal of the operational amplifier and an output terminal of the operational amplifier;
A current source having an output terminal connected to a second inverting input terminal of the operational amplifier and generating a slope current having a variable current value;
With
The operational amplifier is
A first differential pair including first and second transistors, each control terminal connected to a first non-inverting input terminal and a first inverting input terminal;
A second differential pair including third and fourth transistors, each control terminal connected to a second non-inverting input terminal and a second inverting input terminal;
A current mirror load provided in common to the first and second differential pairs;
First and second current sources for supplying a bias current to each of the first and second differential pairs;
Equipped with a,
A bias current is supplied to the first differential pair to amplify the input signal and output from the output terminal; a bias current is supplied to the second differential pair; An amplifying circuit configured to be able to switch between a mute state in which a voltage lower than the reference voltage by a voltage drop generated in the mute feedback resistor according to the slope current is generated .   A current control unit configured to control a bias current supplied to the first and second differential pairs by the first and second current sources, the current control unit being connected to the first and second differential pairs; 2. The amplifier circuit according to claim 1, wherein the sum of the bias currents to be supplied is controlled to be a constant value. The current controller is
A capacitor;
A charge / discharge circuit for charging / discharging the capacitor;
A voltage-current conversion circuit for converting a voltage appearing at one end of the capacitor into a current;
A first constant current source for generating a predetermined first constant current,
The current converted by the voltage-current conversion circuit is used as a bias current to be supplied to the first differential pair, and the difference between the predetermined constant current and the current converted by the voltage-current conversion circuit is the second differential pair. The amplifier circuit according to claim 2, wherein a bias current is supplied to the capacitor. The voltage-current converter circuit is
A tail current source;
A fifth transistor having one end connected to the tail current source and a voltage appearing at one end of the capacitor applied to the control terminal;
A sixth transistor having one end connected to the one end of the fifth transistor and the tail current source, and a reference voltage applied to the control terminal;
A first current mirror circuit that copies a first current flowing through the sixth transistor and generates a second current;
A second constant current source for generating a second constant current;
A second current mirror circuit that copies a third current, which is a difference current between the second constant current and the second current, generates a bias current to be supplied to the first differential pair, and generates a fourth current When,
A third current mirror circuit that copies a fifth current, which is a difference current between the first constant current and the fourth current, and generates a bias current to be supplied to the second differential pair;
The amplifier circuit according to claim 3, further comprising: An audio output unit;
The amplifier circuit according to any one of claims 1 to 4, which drives the audio output unit;
An electronic device comprising:

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