JP4662842B2 - Time correction system - Google Patents

Description

  The present invention relates to a time correction system, and more particularly to a system for correcting the time of a clock function of a plurality of lower-level devices by a center device (high-level device) connected to a network.

  Of various devices connected to the network, a device having a clock function includes a unique clock circuit, and the clock information is generally updated using the unique circuit. In this case, since the time is updated in each device, there is a problem that an error of clock information occurs for each device due to the characteristics of the clock circuit of each device.

  In order to solve this problem, a time management device with reference clock information is installed in the network, and each device having a clock function periodically refers to the time management device to update its own clock information. Means for eliminating an error in clock information of each device in the network is known. For example, a time information protocol NTP (RFC-1305) that is standardly used on the Internet is an example.

  In addition, the transmission / reception device described in Patent Document 1 has a clock that a specific device (multi-link center) supplies clock information to a plurality of devices that do not have a self-running clock at once, and that has a free-running clock. The clock display can be performed even with no device.

  Furthermore, the time signal supply system described in Patent Document 2 transmits time information to slave devices at the same time according to a predetermined schedule.

JP-A-4-37391 JP 2001-136411 A

  However, in the above conventional technique, if the time is updated in each device and the state in which the clock information error occurs for each device due to the characteristics of the clock circuit of each device, the error between the devices is amplified. Therefore, when there is a function linkage between the devices, there is a possibility that an operation failure may occur between the functions. In addition, even in the case of a device alone, for example, a device that requires accurate time information, such as a billing device that generally measures the amount of data communication over time, an error occurs in the time, so that the performance of the device is sufficiently improved. There is a possibility that it can not be demonstrated.

  On the other hand, since time adjustment by NTP, which is a general means on the Internet, is performed based on a periodic cycle or schedule, a constant network load is applied regardless of the clock accuracy of each device. It becomes.

  In addition, the transmitting / receiving device described in Patent Document 1 is a self-propelled watch because a specific device (multilink center) collectively supplies clock information to a plurality of devices that do not have a self-propelled watch. A device that does not have a clock can display a clock. However, in order to perform an accurate clock display on a device that does not have a self-propelled clock, several tens of milliseconds to several hundreds of milliseconds (in the embodiment of this document, 100 It is necessary to supply information in milliseconds). For this reason, when this technology is applied to a network in which a wide variety of data such as voice, image, text, etc. coexist in a finite bandwidth, a large amount of network bandwidth is required to supply time information. There was a problem that it could obstruct other data traffic. As a result, for example, when audio data is transmitted, there is a possibility that audio delay or sound interruption may occur.

  In addition, the time signal supply system described in Patent Document 2 specifies an abnormal device by setting an allowable error range in advance, but even if the clock accuracy of each device under the slave time device varies, it is constant. Since the clock adjustment is executed simultaneously according to the period, when the clock adjustment is executed at a period that matches the apparatus having high clock accuracy, there is a possibility that an apparatus exceeding the allowable error range may occur. On the other hand, if time adjustment is performed at a period that matches a device with low clock accuracy, the time adjustment period is shortened, and a great load is imposed on the network. As described above, it is difficult to set a time adjustment period suitable for the clock accuracy of each device, and there is a problem that the time of each device cannot be maintained within an allowable error range without imposing a load on the network. .

  Therefore, the present invention has been made in view of the above-described problems in the prior art, and can correct the time before exceeding an error time value (error allowable range value) of a predetermined timepiece. Another object of the present invention is to provide a time correction system that can reduce the load on the network.

To achieve the above object, the present invention provides a system for performing time correction of a plurality of lower-level devices connected to a higher-level device via a network, and the upper-level device includes an error tolerance range value of the clock of the lower-level device. Storage means for accumulating the maximum value and minimum value of the time correction period for the subordinate apparatus, and storage means for accumulating the time correction execution time and the time correction execution interval for each of the subordinate apparatuses. provided further, and the error tolerance value, and means for setting the maximum value and the minimum value of the period for each of the sub system, means for setting the value of the value of the time correction execution time the time correction execution interval And means for acquiring the current error time value of each clock of the lower device each time the time correction is performed, and time correction that can be accommodated within the allowable error range value for each of the lower devices. Next time Means for calculating an interval value; means for calculating a next time correction time from the calculated next execution interval value; and dynamically generating an execution schedule for the next time correction based on the calculated next time correction time. Means for continuing the time correction operation.

According to the present invention, when the device corrects the time of each subordinate device connected to the network, the error time value of the subordinate device is collected, and the error tolerance value is based on the collected error time value. The time correction next execution interval that can be within the range value is calculated, and the next time correction execution schedule is dynamically generated based on the calculated result to continue the time correction operation. The network load required for time correction can be automatically maintained at the optimum value while keeping the time value within the allowable error range value.

  Here, the next time correction execution interval T is, for example, T = (T1 ÷ T2) × T3 based on the preset allowable error range value T1, the current error time value T2, and the current execution interval value T3. calculate. If the current error time value of the lower device is 0, T = the maximum execution interval time value. Also, there is no current execution interval value at the time of the first time correction of the lower device, but in this case, T = minimum execution interval time value.

  By calculating the next time correction execution interval with this calculation means, it is possible to perform time correction while keeping the error time value of the lower device within the allowable error range value, and the network load necessary for performing time correction. Can be automatically optimized. The obtained next time correction execution interval is added to the execution time value of the lower apparatus, and the next time correction execution schedule is dynamically generated to continue the time correction operation.

  In the time correction system, when the calculated next execution interval is less than the minimum value of the cycle, the next execution interval is set to the minimum value of the cycle, and an alarm is transmitted.

  If the next execution interval is less than the minimum value of the set cycle, the clock accuracy of the lower device is lower than the accuracy of the clock assumed by the system. By notifying the outside of the clock circuit of the subordinate device that corrects the time to the administrator, etc., and promptly responding to the failure Can be done early.

  Further, in the time correction system, a memory for storing the allowable error range value and the maximum and minimum values of the period is provided for each of the subordinate devices, and the permissible error range value and the period of each subordinate device are provided. Using the means for setting the maximum value and the minimum value, the error tolerance range value for each lower-level device, and the maximum value and minimum value of the period, and within the range of the error tolerance range value for each lower-level device. Means for calculating a next execution interval value of time correction that can be stored can be provided. As a result, the system can be flexibly operated even when the clock accuracy required for each lower-level device is different, and alarms are sent to different notification destinations for each lower-level device, even when the maintenance staff is different for each lower-level device. It is also possible to do.

  As described above, according to the present invention, it is possible to provide a time correction system that can correct the time before exceeding a predetermined allowable error value of the clock and reduce the network load. Can do.

  Next, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 shows the configuration of an embodiment of a time correction system according to the present invention. This system corrects the time of a plurality of lower devices 400 and 401 by a center device (higher device) 100 connected to a network 200. The center device 100 connected to the network 200, the terminal 300, the lower devices 400 and 401, and the administrator terminal 600 are configured.

  The center device 100 includes a clock circuit 105 having an accurate world standard time, a start timer 103 that periodically notifies the occurrence of an event, and a memory 101 that stores schedule information and device information necessary for performing time correction. A schedule management unit 104 that controls and monitors the schedule, a time correction execution unit 108 that sets a time in each device by a known means, a memory 102 and a memory 110 of a work memory that temporarily stores data, and a terminal 300 The setting data reception processing unit 106 that stores the setting data received from the memory 101 and the alarm notification processing unit 107 that notifies the administrator terminal 600 of an alarm.

  The terminal 300 also includes means for making a setting request for schedule information and device information of the lower devices 400 and 401 to the setting data reception processing unit 106 of the center device 100 via the network 200.

  The lower devices 400 and 401 each have a clock circuit inside the device, and include means for setting clock information from the outside via the network 200. In addition, the administrator terminal 600 includes means for receiving alarm information from the outside.

  Next, the operation of the time correction system shown in FIG. 1 will be described with reference to FIGS. In addition, the component which does not have description of a figure number in particular shows the element of FIG.

  First, the administrator uses the terminal 300 in advance to set the error time value of the clocks of the lower devices 400 and 401 (hereinafter referred to as “error allowable range value”) and the maximum time correction for the lower devices 400 and 401. The period (hereinafter referred to as “maximum execution interval time value”), the minimum period (hereinafter referred to as “minimum execution interval time value”), information for notifying the alarm, and the time of each of the lower devices 400 and 401 The correction execution date and the device information of each of the lower devices 400 and 401 are input.

  Next, the terminal 300 transmits the input setting data to the setting data reception processing unit 106 of the center apparatus 100 via the network 200. The setting data reception processing unit 106 stores the received setting data in the memory 101 having a configuration as shown in FIG.

  Next, when the activation timer 103 periodically generates an event, the schedule management unit 104 detects the event, acquires the current time from the clock circuit 105, and based on the acquired time information, the time of the memory 101 By searching for the presence or absence of a schedule for performing time correction with reference to the correction execution date and time, and when a device that performs time correction is found (in this example, the lower device 400), the device of the device that performs time correction The identification index is stored in the device identification index of the memory 102 and the time correction execution unit 108 is called.

  The time correction execution unit 108 uses a means for setting clock information from the outside via the network 200, performs processing for setting an accurate time in a clock circuit held by the lower-level device 400, and includes error information acquisition means described later. After obtaining the error time value of the clock circuit held by the lower-level device 400, the error time value is stored in the memory 102 having the configuration as shown in FIG. 3, and the completion of processing is notified to the schedule management unit 104.

  Upon receiving the processing completion notification from the clock correction execution unit 108, the schedule management unit 104 calculates the execution interval value and the execution time value of the lower apparatus 400. Hereinafter, the flow of this calculation method will be described with reference to FIGS. 5 and 6.

  First, based on the device identification index of the memory 102, in step S1, the execution interval value (lower device 400) of the memory 101 is referred to. If no value is set (during the first time correction), step S5 is performed. Then, the minimum execution interval time value of the memory 101 is set as the next execution interval of the memory 102, and the process is terminated. On the other hand, when the execution interval value (lower device 400) of the memory 101 is set (during the second and subsequent time correction), in step S4, the value (t2) obtained by the following calculation formula A is stored in the memory 102. Set to the next execution interval.

[Calculation Formula A]
If the error time value of the memory 102 is 0 in step S2, the process proceeds to step S6, where t2 = the maximum execution interval time value of the memory 101.
In step S2, when the error time value of the memory 102 is other than 0, the process proceeds to step S3.
t2 = (error allowable range value of memory 101 (millisecond) / error time value of memory 102 (millisecond)) × execution interval value of memory 101 (lower device 400).

  Next, the schedule management unit 104 refers to the next execution interval set in the memory 102 as described above, and the next execution interval value of the memory 102 is the minimum execution interval time value of the memory 101 and the maximum execution interval time value of the memory 101. (In the case of “same or larger” in step S7 and “same or smaller” in step S8), in step S9, the value of the next execution interval of the memory 102 is set to the execution interval of the memory 101 (subordinate device 400). In step S10, the execution interval (lower device 400) of the memory 101 is added to the time correction execution date and time (lower device 400) of the memory 101.

  On the other hand, when the value of the next execution interval of the memory 102 is larger than the maximum execution interval of the memory 101 (“same or larger” in step S7, “large” in step S8), in step S13, the execution interval ( The maximum execution interval of the memory 101 is written in the subordinate device 400), and in step S10, the execution interval of the memory 101 (subordinate device 400) is added to the time correction execution date and time of the memory 101 (subordinate device 400).

  If the value of the next execution interval in the memory 102 is less than the minimum execution interval of the memory 101 (“small” in step S7), the minimum execution interval of the memory 101 is written in the execution interval of the memory 101 (lower device 400). In step S10, the execution interval (lower device 400) of the memory 101 is added to the time correction execution date and time (lower device 400) of the memory 101.

  In this way, by dynamically correcting the execution interval at the time of execution of time correction, the load on the network is reduced, and time correction is performed before the error generated in the clock held by the lower level device 400 falls outside the allowable range. It can be performed. Note that if the next execution interval of the memory 102 is less than the minimum execution interval, there is a possibility that a failure has occurred in the clock circuit held by the lower-level device 400, so the schedule management unit 104 notifies the alarm notification processing unit 107. The device information of the memory 101 is transmitted. In step S12 of FIG. 6, the alarm notification processing unit 107 notifies the administrator terminal 600 of an alarm via the network 200 based on the delivered device information. As a result, the failure of the clock circuit held by the lower-level device 400 can be promptly communicated to the administrator, and the failure can be quickly dealt with.

  In the above-described operation, the error allowable range value, the minimum execution interval time value, the maximum execution interval time value, and the alarm communication information accumulated in the memory 101 are one type in the entire system, that is, these pieces of information are subordinate to a plurality of subordinate values. Although the case where the devices 400 and 401 are used in common has been described, a storage area for each device identification index of the lower devices 400 and 401 is prepared in the memory 101, and an allowable error range value and a minimum execution value are provided for each of the lower devices 400 and 401. The interval time value, the maximum execution interval time value, and the alarm communication information can be stored and operated.

  In this case, the error tolerance range value used when calculating the next execution interval, the minimum execution interval time value, the maximum execution interval time value are detected, and the next execution interval is less than the minimum execution interval time value. When detecting alarm contact information, necessary information is extracted from the memory 101 based on the device identification index of the lower devices 400 and 401, and the next execution interval is calculated for each of the lower devices 400 and 401. As a result, a value such as an allowable error range value can be set for each of the lower devices 400 and 401, and the system can be flexibly operated even when the required clock accuracy differs for each of the lower devices 400 and 401. In addition, even when the person in charge of maintenance is different for each of the lower level devices 400 and 401, it is possible to notify an alarm to different notification destinations.

  Next, a specific example of setting the execution interval after the schedule management unit 104 acquires the error of the lower device 400 will be described.

  The error tolerance range value of the memory 101 is “2000 milliseconds”, the minimum execution interval time value is “720 minutes”, the maximum execution interval time value is “43200 minutes”, the alarm communication information is “abc@def.co.jp”, It is assumed that the execution interval value (lower device 400) is “10080 minutes”.

  [Example 1] A case where the error time value of the memory 102 is “1000 milliseconds” and is smaller than the allowable error range value of the memory 101 will be described.

The schedule management unit 104 first refers to the execution interval value (lower device 400) in the memory 101, and since the value is set, the next execution interval is obtained by using the calculation formula A and the next execution of the memory 102. Set to interval. Since the error time value of the memory 102 is “1000 milliseconds”,
t2 = (2000 ÷ 1000) × 10080
t2 = 20160 (minutes)
Next execution interval of the memory 102 = 20160 minutes Since the next execution interval of the memory 102 is within the range of the minimum execution interval time value of the memory 101 and the maximum execution interval time value of the memory 101, the execution interval value of the memory 101 (subordinate device) 400) = 20160 minutes.

  [Example 2] An example in which the error information of the memory 102 is "40000 milliseconds" and is larger than the allowable error range value of the memory 101 will be described.

The schedule management unit 104 first refers to the execution interval value (lower device 400) in the memory 101, and since the value is set, the next execution interval in the memory 102 is obtained by using the above formula A to obtain the next execution interval. Set to. Since the error time value of the memory 102 is “40000 milliseconds”,
t2 = (2000 ÷ 40000) × 10080
t2 = 504 (minutes)
Next execution interval of the memory 102 = 504 minutes Since the next execution interval of the memory 102 is less than the minimum execution interval time value of the memory 101, the execution interval value of the memory 101 (lower device 400) = 720 minutes (minimum execution of the memory 101) Interval time value).
In this case, an alarm notification is given to the administrator.

  Next, an example of the error information acquisition method in the time correction system according to the present invention will be described.

  The time correction execution unit 108 transmits a request to the lower-level device 400 via the network, acquires the current time from the clock circuit 105, and writes it in t1 of the memory 110 having the configuration shown in FIG. The lower device 400 uses the time (t2) when the request is received and the time (t3) in response to the time correction execution unit 108 as response data, and transmits the response data to the time correction execution unit 108. The time correction execution unit 108 acquires the time when the response data is received from the clock circuit 105 and writes it in t4 of the memory 110.

  The time correction execution unit 108 reads the device information of the memory 101 from the device identification index of the memory 102, converts the response data t2 and t3 to world standard time, converts the converted data t2 to t2 of the memory 110, and the converted data t3. Write to t3 of the memory 110.

  From the data in the memory 110, the required transmission time is obtained by ((t4−t1) − (t2−t3)) / 2, and the error between the center device 100 and the lower device 400 is ((t2−t1) + (t3−t4). )) Divided by 2. The time setting to the lower device 400 is performed by adding the required transmission time obtained above to the time read by the time correction execution unit 108 from the clock circuit 105 and reading the device information in the memory 101 from the device identification index in the memory 102. This can be done by converting to the time of the locale of the lower device 400 and transmitting it to the lower device 400 via the network 200.

  The above configuration and operation are an example of an error information acquisition method, and any means may be used as long as the time correction execution unit 108 can acquire error information of the clock circuit held by the lower-level device 400.

It is a block diagram which shows the structure of one Embodiment of the time correction system concerning this invention. It is a figure which shows the structural example of the memory 101 of the center apparatus of FIG. It is a figure which shows the structural example of the memory 102 of the center apparatus of FIG. It is a figure which shows the structural example of the memory 110 of the center apparatus of FIG. It is a flowchart which shows the flow of the calculation method of the execution interval value of a low-order apparatus, and the execution time value in the time correction system of this invention. It is a flowchart which shows the flow of the calculation method of the execution interval value of a low-order apparatus, and the execution time value in the time correction system of this invention.

Explanation of symbols

100 Center device 101, 102, 110 Memory 103 Start timer 104 Schedule management unit 105 Clock circuit 106 Setting data reception processing unit 107 Alarm notification processing unit 108 Time correction execution unit 200 Network 300 Terminal 400, 401 Subordinate device 600 Administrator terminal

Claims (3)

In a system that performs time correction of a plurality of lower-level devices connected to a higher-level device via a network,
In the host device, there is provided storage means for accumulating the allowable error value of the clock of the lower device and the maximum value and the minimum value of the period for performing time correction on the lower device,
For each of the lower-level devices, a storage unit that accumulates a time correction execution time and a time correction execution interval is provided,
Further, the error allowable range value, means for setting the maximum value and the minimum value of the period,
Means for setting the value of the time correction execution time and the value of the time correction execution interval for each of the subordinate devices;
Means for obtaining a current error time value of each clock of the lower device each time time correction is performed;
Means for calculating a next execution interval value of time correction that can be within the range of the allowable error range value for each of the subordinate devices;
Means for calculating a next time correction time from the calculated next execution interval value;
A time correction system comprising: means for dynamically generating an execution schedule for the next time correction based on the calculated next time correction time and continuing the time correction operation.   The apparatus according to claim 1, further comprising means for sending an alarm while setting the next execution interval to the minimum value of the cycle when the calculated next execution interval is less than the minimum value of the cycle. Time correction system.   A memory for storing the allowable error range value and the maximum and minimum values of the cycle is provided for each of the lower devices, and the allowable error range value and the maximum and minimum values of the cycle are set for each of the lower devices. Using the error tolerance range value for each lower-level device and the maximum and minimum values of the period, and the next time correction that can fall within the range of the error tolerance range value for each lower-level device. The time correction system according to claim 1, further comprising means for calculating an execution interval value.

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