JP4618065B2 - Wiring pattern design apparatus and method, and program - Google Patents

Description

  The present invention relates to a wiring pattern design apparatus, method, and program for designing an arbitrary wiring pattern on a substrate by an application program for designing a wiring pattern of an electric circuit.

  Currently, in the production of printed circuit boards, layout patterns and electronic circuits in integrated circuits such as LSIs are designed using a CAD (computer-aided design) system before the actual production of printed circuit boards. (For example, refer to Patent Document 1).

  By the way, according to the wiring pattern designed by the CAD system, a dipping process by soldering, a flow process (a process of passing a printed circuit board through a solder bath), a reflow process (a process of passing through a heating furnace for melting solder) ) Etc. to fix the electronic component on the printed circuit board.

  In these steps, the printed wiring board is heated, so that the board is warped and deformed due to the difference in the equivalent linear expansion coefficient between the laminated insulating material and the conductive material.

  In recent years, printed wiring boards have become multilayered due to high-density mounting, and the copper wiring pattern of each layer affects each other in a complicated manner, and the warping direction due to the difference in linear expansion between the copper wiring and the base material becomes complicated. Become.

JP-A-4-340172

  Under such circumstances, until now, it was impossible to determine whether or not the printed wiring board would warp unless a sample was made and tested. Therefore, in order to correct a solder joint defect (tempered plastic) or the like caused by warping of the printed wiring board, it may take a great deal of labor, leading to an increase in design and manufacturing costs.

  Accordingly, the present invention provides a wiring pattern design apparatus, method, and program for predicting warpage (deformation) of a printed wiring board that occurs in a process of fixing (joining) electronic components without producing a sample of the printed wiring board. To do.

In order to solve the above-described problems, a wiring pattern design apparatus according to the present invention is a design means for designing an arbitrary wiring pattern on one side and the other side of a base material, and the one side and the other side by the design means. An adjustment value for setting an adjustment value for adjusting an effect caused by stacking a plurality of layers of the base material by the stacking means, and a stacking means for stacking the base material on which an arbitrary wiring pattern is designed. A setting unit, a dividing unit that divides one side and the other side of the base material on which an arbitrary wiring pattern is designed by the design unit into a plurality of areas with an arbitrary size, and an area within the area divided by the dividing unit Area ratio calculating means for calculating the area ratio of the wiring pattern included in each area, and the area ratio for each area of one side of each substrate calculated by the area ratio calculating means Based on the area ratio for each area of the other surface of each base material calculated by the area ratio calculation means and the adjustment value set by the adjustment value setting means, A warp amount calculating means for calculating the warp amount of the surface for each area is provided.
Furthermore, the wiring pattern design apparatus according to the present invention includes a design means for designing an arbitrary wiring pattern on one surface and the other surface of the base material, and an arbitrary wiring pattern on the one surface and the other surface of the base material by the design means. After designing, a resist layer laminating means for laminating a resist layer at an arbitrary location on the outermost surface of one side and the other surface of the base material, and a resist layer is laminated at an arbitrary location by the resist layer laminating means The dividing means for dividing the outermost surface of one side and the outermost surface of the other side of the base material into a plurality of areas, and the area ratio of the resist layer contained in the area divided by the dividing means An area ratio calculating means for calculating each area, an area ratio of the wiring pattern on one surface of the base material calculated by the area ratio calculating means, and a wiring on the other surface of the base material calculated by the area ratio calculating means The area ratio of the turn, the area ratio of the resist layer on one side of the base material calculated by the area ratio calculating means, and the area ratio of the resist layer on the other side of the base material calculated by the area ratio calculating means And a warp amount calculating means for calculating a warp amount for each area of the substrate surface.

In addition, in order to solve the above-described problem, the wiring pattern design method according to the present invention includes a design process in which the design means designs an arbitrary wiring pattern on one side and the other side of the base material, and the lamination means A laminating step of laminating a plurality of layers of the base material on which the arbitrary wiring pattern is designed on the one side and the other side by a design unit, and an adjustment value setting unit laminating the plurality of layers of the base material by the laminating unit An adjustment value setting step for setting an adjustment value for adjusting the influence caused by the above, and the dividing means, the one side and the other side of the base material on which the arbitrary wiring pattern is designed by the design means are of arbitrary size The area ratio calculating process in which the dividing step for dividing the area into a plurality of areas and the area ratio calculating means calculate the area ratio of the wiring pattern included in the area divided by the dividing means for each area. And an area ratio for each area of one surface of each of the base materials calculated by the area ratio calculating means, and an area of the other surface of each base material calculated by the area ratio calculating means. A warping amount calculating step of calculating, for each area, the warping amount of the outermost surface of the base material laminated with the plurality of layers based on the area ratio for each and the adjustment value set by the adjustment value setting means.
Furthermore, in the wiring pattern design method according to the present invention, the design means designs an arbitrary wiring pattern on one side and the other side of the base material, and the resist layer stacking means After designing an arbitrary wiring pattern on one side and the other side, a resist layer laminating step for laminating a resist layer at an arbitrary location on the outermost surface of the one side and the outermost side of the other side, and a dividing means, A dividing step of dividing the outermost surface of one side and the outermost surface of the other side of the base material in which the resist layer is laminated at an arbitrary place by the resist layer laminating unit, and an area ratio calculating unit, An area ratio calculating step for calculating, for each area, an area ratio of the resist layer included in the area divided by the dividing means, and a warp amount calculating means are provided on the base material calculated by the area ratio calculating means. Direction The area ratio of the wiring pattern, the area ratio of the wiring pattern on the other surface of the base material calculated by the area ratio calculating means, and the area of the resist layer on the one surface of the base material calculated by the area ratio calculating means A warpage amount calculating step of calculating a warpage amount for each area of the substrate surface based on the ratio and the area ratio of the resist layer on the other surface of the substrate calculated by the area ratio calculation means.

In addition, in order to solve the above-described problem, the program according to the present invention includes a design process in which a design unit designs an arbitrary wiring pattern on one side and the other side of the base material, and a stacking unit includes the design unit. The stacking step of stacking a plurality of layers of the base material on which the arbitrary wiring pattern is designed on the one surface and the other surface, and the adjustment value setting means are generated by stacking the base material by a plurality of layers by the stacking means. An adjustment value setting step for setting an adjustment value for adjusting the influence, and a dividing unit that includes a plurality of one side and the other side of the base material on which an arbitrary wiring pattern is designed by the design unit at an arbitrary size. A dividing step of dividing into areas, an area rate calculating means for calculating the area ratio of the wiring pattern included in the area divided by the dividing means for each area, and warping The calculation means calculates the area ratio for each area of one side of each base material calculated by the area ratio calculation means, and the area ratio for each area of the other base material calculated by the area ratio calculation means. And a warp amount calculating step of calculating for each area the warpage amount of the outermost surface of the base material laminated by the plurality of layers based on the adjustment value set by the adjustment value setting means. It is.
Further, the program according to the present invention includes a design process in which the design means designs an arbitrary wiring pattern on one side and the other side of the base material, and a resist layer laminating means has the one side of the base material and After designing an arbitrary wiring pattern on the other side, a resist layer laminating step for laminating a resist layer at an arbitrary position on the outermost surface of one side and the outermost side of the other side of the base material, and a dividing means include the resist layer A dividing step of dividing the outermost surface of one side and the outermost surface of the other side of the base material on which a resist layer is laminated at an arbitrary position by a laminating unit, and an area ratio calculating unit are divided by the dividing unit The area ratio calculation step for calculating the area ratio of the resist layer included in the divided area for each area, and the warpage amount calculation means is a wiring on one side of the base material calculated by the area ratio calculation means Patter Area ratio of the wiring pattern on the other surface of the base material calculated by the area ratio calculation means, and the area ratio of the resist layer on the one surface of the base material calculated by the area ratio calculation means And a warp amount calculating step of calculating a warp amount for each area of the base material surface based on the area ratio of the resist layer on the other surface of the base material calculated by the area ratio calculating means. Is for.

  In the present invention, the warpage (deformation) of the printed wiring board that occurs in the process of fixing (joining) the electronic components is predicted without making a sample of the printed wiring board, so that the completed printed wiring board does not warp. It is possible to quickly design a simple wiring pattern shape and electronic component arrangement.

  Hereinafter, the best mode for carrying out the present invention will be described in detail with reference to the drawings.

  First, the structure of a printed wiring board manufactured by a predetermined manufacturing process is shown in FIG. In the manufacturing process of the printed wiring board 1, a layout pattern such as wiring is designed in advance by an electric CAD (computer-aided design) or the like. Based on the design, both surfaces (one surface 11) of the base material 10 that is an insulating material are designed. Then, an arbitrary copper pattern is formed on the other surface 12), and then soldering of the electronic component is performed by a dipping process, a reflow process, or the like.

  In the copper pattern formation process, the printed wiring board 1 is formed by the linear expansion coefficient and rigidity resulting from the area of the copper pattern formed on the one surface 11 and the linear expansion resulting from the area of the copper pattern formed on the other surface 12. When there is a difference between the rate and the rigidity, the printed wiring board 1 is warped and deformed due to heating during the soldering process.

  Here, the relationship between the warp of the printed wiring board 1 and the area (remaining copper ratio) of the copper pattern will be described with reference to FIG. The area (remaining copper ratio) of the copper pattern formed on one surface 11 of the printed wiring board 1 is A, and the remaining copper ratio of the copper pattern formed on the other surface 12 is B. Here, when A / B> 1, that is, when A> B, the printed wiring board 1 is deformed so that the one surface 11 becomes convex, and when A / B <1, that is, A <B. Sometimes, the printed wiring board 1 is deformed so that the other surface 12 is convex.

  Further, when the printed wiring board 1 is deformed so as to be convex on the one surface 11 or the other surface 12, the degree (level) of warpage becomes a problem (FIG. 3). For example, as shown in FIGS. 3A and 3B, the remaining copper ratio of the one surface 11 of the first substrate 10A is A1, and the remaining copper ratio of the other surface 12 of the first substrate 10A is B1. The remaining copper ratio of the one surface 11 of the second base material 10B is A2, the remaining copper ratio of the other surface 12 of the second base material 10B is B2, and A1 / B1 <1, A2 / B2 <1 When A1 / B1> A2 / B2, the warpage amount ε is ε1 <ε2.

  In the present invention, warping (deformation) of the printed wiring board 1 is predicted at the stage of design by electric CAD, and based on the prediction, the shape of the copper pattern formed on one side 11 and the other side 12 of the printed wiring board 1 is determined. The purpose is to reduce the design and manufacturing costs by making changes, changing, adding and deleting parts arrangements, and reviewing the layer structure and materials.

  For example, as shown in FIG. 4, the design of the wiring pattern and the prediction of the warpage of the printed wiring board according to the present invention are performed according to the operation of the CPU 20 that performs a predetermined calculation, the display unit 21 that displays an image, This is performed by a PC (personal computer) 2 including a pointing device 22 that generates a signal, a storage unit 23 that stores a predetermined application program, and a working memory 24 that is used when the CPU 20 performs various calculations.

  The pointing device 22 generates a predetermined operation signal in accordance with a user operation, and supplies the generated operation signal to the CPU 20.

  The CPU 20 reads an application program A for designing a wiring pattern from the storage unit 23 in response to an operation signal supplied from the pointing device 22, expands the read program A in the working memory 24, and displays a GUI (graphical user interface) is displayed on the display unit 21.

  Here, a configuration for performing wiring pattern design and board warpage prediction according to the present invention by the PC 2 will be described with reference to a functional block diagram shown in FIG. In the following description, a device that performs wiring pattern design and substrate warpage prediction is referred to as a wiring pattern design device.

  The wiring pattern design device 3 includes a design unit 30 that designs an arbitrary wiring pattern on the one surface 11 and the other surface 12 of the substrate 10, and one surface of the substrate 10 on which the arbitrary wiring pattern is designed by the design unit 30. 11 and the other surface 12 are divided into a plurality of areas of an arbitrary size, and the area ratio (remaining copper ratio) of the wiring pattern included in the area divided by the divider 31 is calculated for each area. Based on the area ratio calculation unit 32 to perform, the area ratio for each area of the one surface 11 of the base material 10 calculated by the area ratio calculation unit 32, and the area ratio for each area of the other surface 12 of the base material 10. And a warp amount calculation unit 33 that calculates a warp amount (a warp direction, a warp shape, a warp degree, etc.) for each area of the material surface. Further, the area ratio calculation unit 32 determines whether or not there is a wiring pattern at an arbitrary position in each area divided by the dividing unit 31, and calculates the area ratio of the wiring pattern for each area according to the determination result. To do.

  In addition, the wiring pattern design device 3 visualizes the amount of warpage of the substrate surface by shading or color difference based on the amount of warpage of each area of the substrate surface calculated by the warpage amount calculation unit 33. And a division size setting unit 35 for setting the size of the area when the division unit 31 divides the one surface 11 and the other surface 12 of the base material 10 into a plurality of areas. The visualization unit 34 visually displays the amount of warpage of the substrate surface on the display unit 21.

  Here, a method for predicting the warpage of the printed wiring board 1 by the wiring pattern design device 3 will be described with reference to the flowchart shown in FIG.

  In step S <b> 1, the design unit 30 designs an arbitrary wiring pattern on the one surface 11 and the other surface 12 of the base material 10.

  In step S2, the dividing unit 31 divides the one surface 11 and the other surface 12 of the base material 10 into a plurality of areas with an arbitrary size. At this time, the division size may be designated by the division size setting unit 35. The division size designating unit 25 designates the division size between one side and about 0.5 mm to 5 mm. In this embodiment, the shape of the division size is a square, but is not limited thereto. Further, for example, when the entire base material 10 is to be divided, the division size designating unit 25 designates the division size so that one side is 5 mm, and enlarges a part of the base material 10, When a part is to be divided, the division size is designated so that one side is 0.5 mm.

  In step S3, the area ratio calculation unit 32 calculates the area ratio of the wiring pattern for each area.

  In step S4, the area ratio calculation unit 32 calculates the remaining copper ratio for each area from the area ratio calculated in the process of step S3.

  In step S <b> 5, the warpage amount calculation unit 33 calculates the warpage amount of the substrate surface for each area based on the remaining copper ratio of each area of the one surface 11 and the remaining copper ratio of each area of the other surface 12.

  In step S <b> 6, the visualization unit 34 visualizes the warpage amount for each area of the base material surface calculated in step S <b> 5 by shading or color difference. Here, the distribution of the warpage of the substrate surface visualized by the color difference is shown in FIG. FIG. 7 shows a plan view viewed from one side. In the area O, many areas that warp on one side are distributed, and in area P, many areas that warp on the other side are distributed. It is shown that.

  Further, another method for predicting the warpage of the printed wiring board 1 by the wiring pattern design apparatus 3 will be described with reference to the flowchart shown in FIG.

  In step S <b> 10, the design unit 30 designs an arbitrary wiring pattern on the one surface 11 and the other surface 12 of the base material 10.

  In step S11, the dividing unit 31 divides the one surface 11 and the other surface 12 of the base material 10 into a plurality of areas with an arbitrary size. The designation of the division size is as described in the step S2 described above.

  In step S12, the area ratio calculation unit 32 determines whether there is a wiring pattern at an arbitrary position in each area divided by the division unit 31 in the step S11, for example, in the center of the area. The area ratio of the wiring pattern is calculated. Here, the determination operation by the area ratio calculation unit 32 will be described.

  The dividing unit 31 divides the printed wiring board 1 on which an arbitrary wiring pattern is designed into an arbitrary size (FIGS. 9A, 9B, and 9C). FIG. 9A is a diagram showing an example of a copper pattern on the printed wiring board 1, and FIG. 9B is a schematic diagram showing areas for dividing the printed wiring board 1 generated by the dividing unit 31. FIG. 9C is a schematic diagram when an area is arranged on the printed wiring board 1.

  The area ratio calculation unit 32 determines whether or not there is a wiring pattern in the central portion of each area. If there is a wiring pattern in the central portion, the entire area is set to 100%, while the wiring is formed in the central portion. When there is no pattern, the entire area is set to an area ratio of 0% (FIG. 9D). In addition, FIG.9 (d) is a figure which shows a mode that it is determined whether a wiring pattern exists in the center of each area.

  When this state is visualized by the visualization unit 34, it is possible to grasp the distribution pattern distribution pattern designed on the base material 10 at a glance (FIG. 9E). In addition, FIG.9 (e) is a figure which shows the mode of each area after determination.

  Moreover, in step S13, the area ratio calculation part 32 determines the combination of the presence or absence of the wiring pattern for every area in the one surface 11 of the base material 10, and the other surface 12 based on the area ratio calculated by the process of step S12. . For example, when the area ratio calculating unit 32 has a wiring pattern in one area of the one surface 11 but does not have a wiring pattern in the area of the back surface (the other surface 12) corresponding to the area 11, the area ratio calculating unit 32 determines “determination 1”. When there is no wiring pattern in one area of the one surface 11, but there is a wiring pattern in the area of the back surface (the other surface 12) corresponding to the area, it is determined as “determination 2” and one area of the one surface 11. And when there is a wiring pattern in the area of the back surface (the other surface 12) corresponding to the area, it is determined as “determination 3” and wiring is performed for both the area of the one surface 11 and the area of the back surface (the other surface 12) corresponding to the area. When there is no pattern, “determination 4” is set.

  In step S14, the area ratio calculation unit 32 calculates the remaining copper ratio for each area according to the determination result of step S13.

  In step S15, the warpage amount calculation unit 33 calculates the warpage amount of the base material surface based on the remaining copper ratio of each area of the one surface 11 and the remaining copper ratio of each area of the other surface 12 calculated in the process of step S14. Calculate for each area.

  In step S <b> 16, the visualization unit 34 visualizes the warpage amount for each area of the base material surface calculated in step S <b> 15 by shading or color difference.

  In addition, the wiring pattern design device 3 includes a stacking unit 36 that stacks a plurality of base materials 10 on which an arbitrary wiring pattern is designed on the one surface 11 and the other surface 12 by the design unit 30, and the base material 10 by the stacking unit 36. And an adjustment value setting unit 37 for setting an adjustment value for adjusting an influence caused by stacking a plurality of layers. In the case of such a configuration, the warpage amount calculation unit 33 calculates the area ratio for each area of the one surface 11 of each substrate calculated by the area ratio calculation unit 32 and the area for each area of the other surface 12 of each substrate. Based on the rate and the adjustment value set by the adjustment value setting unit 37, the warpage amount of the outermost surface of the base material 10 laminated in a plurality of layers is calculated for each area.

  In the case where a plurality of layers of the base material 10 on which an arbitrary wiring pattern is designed on the one surface 11 and the other surface 12 are stacked by the stacked portion 36, the warp is the more the layer formed at a position away from the center layer. The effect of the residual copper rate difference becomes large. Accordingly, the adjustment value set by the adjustment value setting unit 37 reflects the weight based on the layer distance from the center layer to the calculation of the remaining copper ratio difference.

  In addition, the wiring pattern design device 3 designs an arbitrary wiring pattern on the one surface 11 and the other surface 12 of the substrate 10 by the design unit 30, and then the outermost surface of the one surface 11 and the other surface 12 of the substrate 10. A resist layer laminating portion 38 for laminating a resist layer at an arbitrary position on the surface is provided. In the case of such a configuration, the dividing portion 22 includes a plurality of outermost surfaces of the one surface 11 and the other surface 12 of the base material 10 on which the resist layer is laminated at an arbitrary position by the resist layer stacking portion 38. Divide into areas. Further, the area ratio calculation unit 32 calculates the area ratio of the resist layer included in the area divided by the division unit 31 for each area. Further, the warpage amount calculation unit 33 calculates the area ratio of the wiring pattern on the one surface 11 of the base material 10 calculated by the area ratio calculation 22, the area ratio of the wiring pattern on the other surface 12 of the base material 10, and the base material 10. Based on the area ratio of the resist layer on the one surface 11 and the area ratio of the resist layer on the other surface 12 of the substrate 10, the amount of warpage for each area of the substrate surface is calculated. Further, the area ratio calculation unit 32 determines whether or not the resist layer is present at an arbitrary position in each area divided by the division unit 31, and calculates the area ratio of the resist layer for each area according to the determination result. Such a configuration may be adopted.

  Here, a cross-sectional structure of the printed wiring board 1 in which a plurality of base materials 10 on which an arbitrary wiring pattern is designed is formed on one surface 11 and the other surface 12 and a resist layer is formed on both outermost surfaces. The weighting by the adjustment value setting unit 37 will be described with reference to FIG. Hereinafter, the weighting (adjustment value) set by the adjustment value setting unit 37 is expressed as an evaluation index S.

When a plurality of base materials 10 as shown in FIG. 9 are laminated, one side and the other side of each base material 10 are A1, A2,..., B1, B2,. distance each _l of each surface _{(layer) A1, l A2 ···, l} B1, l B2 ··· and, _Z A1 residual copper rate of the substrate 10, _{respectively, Z} A2 _···, Z _B1 , Z _B2 ... And the thicknesses of the wiring (copper) patterns designed on one surface and the other surface of each base material 10 are tA1, tA2,..., TB1, tB2,. S can be expressed by equation (1).
S = Z _A1 * 1 _A1 ³ * t _A1 + Z _A2 * 1 _A2 ³ * t _A2 + ...- (Z _B1 * 1 _B1 ³ * t _B1 + Z _B2 * 1 _B2 ³ * t _B2 ) (1) )
In addition, when resist layers are formed on both outermost surfaces of the printed wiring board 1 on which a plurality of layers of the base material 10 are laminated, the residual resist rate of the resist layer formed in one direction from the center position X is expressed as _RA When the residual resist rate of the resist layer formed on the other surface from the center position X is R _B , the evaluation index S can be expressed by the equation (2).
S = R _A × 1 _A1 ³ + Z _A1 × 1 _A1 ³ × t _A1 + Z _A2 × 1 _A2 ³ × t _A2 +...-(R _B × 1 _B1 ³ + Z _B1 × 1 _B1 ³ × t _B1 + Z _B2 × l _B2 ³ × t _B2 ) (2)
Further, when materials having different rigidity, linear expansion coefficient, curing shrinkage ratio, and the like are employed depending on the interlayer resin to be laminated, residual strain is generated in the pressing process during the manufacturing process of the printed wiring board 1.

In such a case, it is assumed that the residual resin ratio represented by the formula (3) is used instead of the residual copper ratio, and J _A1 , J _A2 ..., J _B1 , J _B2 . The evaluation index S can be expressed by equation (4), where the degrees of contribution to warpage resulting from the differences are M _A1 , M _A2 ..., M _B1 , M _B2 .
J _A1 = (1-Z _A1 ) (3)
S = J _A1 * M _A1 * 1 _A1 ³ + J _A2 * M _A2 * 1 _A2 ³ + ...- (J _B1 * M _B1 * 1 _B1 ³ + J _B2 * MB _B2 * 1 _B2 ³ + ...) (4)
Further, the adjustment value setting unit 37 may add the contribution by the molding process in the manufacturing process of the printed wiring board 1 in addition to the contribution of the warp by the material.

For example, when the number of times of pressing differs from layer to layer as in a built-up substrate, the degree of influence on the warp when the residual strain applied in the pressing process is released in the reflow process is P _A1 , P _A2. If P _B1 , P _B2 ..., The evaluation index S can be expressed by equation (5).
S = J _A1 * M _A1 * P _A1 * 1 _A1 ³ + J _A2 * M _A2 * P _A2 * 1 _A2 ³ + ...- (J _B1 * M _B1 * P _B1 * 1 _B1 ³ + J _B2 * M _B2 * P _B2 × l _B2 ³ + ...) (5)
In addition, since the warping direction changes depending on whether the value of the evaluation index S is positive (one side is convex) or negative (the other side is convex), the visualization unit 34 changes the positive value to red and negative value, for example. It is desirable that the color difference is in a complementary color relationship such as blue-green.

  In this way, the wiring pattern design device 3 according to the present invention designs an arbitrary wiring pattern on the one surface 11 and the other surface 12 of the substrate 10 by the design unit 30, and the arbitrary wiring pattern is designed by the design unit 30. The one surface 11 and the other surface 12 of the substrate 10 are divided into a plurality of areas of an arbitrary size by the dividing unit 31, and the area ratio of the wiring pattern included in the area divided by the dividing unit 31 (residual Copper ratio) is calculated for each area by the area ratio calculation unit 32, and the area ratio for each area of the one surface 11 of the base material 10 calculated by the area ratio calculation unit 32 and each area of the other surface 12 of the base material 10 are calculated. Since the warpage amount (warpage direction, warpage shape, warpage degree, etc.) for each area of the base material surface is calculated by the warpage amount calculation unit 33 based on the area ratio of the substrate, a step of fixing (joining) the electronic components (dip) Craft Or warping (deformation) of the printed wiring board 1 occurring in the reflow process or the like) can be predicted without making a sample of the printed wiring board, and the pattern distribution in the same layer on the printed wiring board 1 is considered. Since the warpage shape can be predicted, it is possible to quickly carry out an optimal design for the shape of the printed wiring board, the shape of the copper foil pattern, the arrangement of the electronic components, etc., thereby reducing the design and manufacturing costs. It becomes possible.

  Further, according to the present invention, the remaining copper ratio of each layer can be calculated by a simple method, and the calculation time can be shortened.

  Further, according to the present invention, it is possible to easily predict a warped shape in consideration of the pattern distribution in the same layer on the printed wiring board 1, and it is possible to reduce design and manufacturing costs.

  In addition, according to the present invention, when the printed wiring board 1 is composed of a plurality of layers, it is possible to predict a detailed warped shape in consideration of the influence of the remaining copper ratio of each layer, thereby reducing design and manufacturing costs. It becomes possible.

  Furthermore, according to the present invention, it is possible to arbitrarily set the center layer distance of a plurality of layers, the characteristics of the interlayer resin, the residual strain, and the like, and it is possible to predict the detailed warped shape, and the design and manufacturing costs. Can be reduced.

  In the present invention, the series of processing by the wiring pattern design apparatus 3 described above can also be performed by software. When a series of processing is performed by software, a program constituting the software is installed in a general-purpose computer or the like. The program may be recorded on a removable medium such as a CD-ROM and distributed to the user, or may be distributed by being downloaded to the user's computer via a network.

It is sectional drawing of a printed wiring board. It is a figure where it uses for description about the relationship between the curvature of a printed wiring board, and the area (residual copper ratio) of a copper pattern. It is a figure where it uses for description about the curvature direction of a printed wiring board. It is a block diagram which shows the structure of the apparatus which performs the design of the wiring pattern based on this invention, and the curvature prediction of a printed wiring board. It is a block diagram which shows the structure of the wiring pattern design apparatus which performs the design of the wiring pattern which concerns on this invention, and the curvature prediction of a printed wiring board. It is a flowchart with which it uses for description about the method of estimating the curvature of a printed wiring board by the wiring pattern design apparatus shown in FIG. It is a figure which shows distribution of the curvature of the base-material surface visualized by the color tone difference. It is a flowchart with which it uses for description about the other method of estimating the curvature of a printed wiring board with the wiring pattern design apparatus shown in FIG. It is a figure where it uses for description about the determination operation | movement by an area ratio calculation part. It is a figure where it uses for description about the weighting by an adjustment value setting part.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Printed wiring board, 2 PC (personal computer), 3 Wiring pattern design apparatus, 10 Base material, 11 One side, 12 The other side, 20 CPU, 21 Display part, 22 Pointing device, 23 Memory | storage part, 24 Working memory, 30 Design unit, 31 division unit, 32 area ratio calculation unit, 33 warp amount calculation unit, 34 visualization unit, 35 division size setting unit, 36 lamination unit, 37 adjustment value setting unit, 38 resist layer lamination unit

Claims (9)

Design means for designing an arbitrary wiring pattern on one side and the other side of the substrate;
Laminating means for laminating a plurality of layers of the base material on which an arbitrary wiring pattern is designed on the one side and the other side by the design means;
An adjustment value setting means for setting an adjustment value for adjusting the influence caused by laminating the plurality of layers of the substrate by the lamination means;
A dividing unit that divides one side and the other side of the base material on which an arbitrary wiring pattern is designed by the design unit into a plurality of areas with an arbitrary size;
An area ratio calculating means for calculating the area ratio of the wiring pattern included in the area divided by the dividing means for each area;
The area ratio for each area of one surface of each base material calculated by the area ratio calculation means, the area ratio for each area of the other surface of each base material calculated by the area ratio calculation means, and the adjustment based on the adjustment value set by the value setting means, said plurality of layers stacked Ru wiring pattern designing apparatus comprising a warp amount calculating means for calculating an amount of warpage of the uppermost surface for each area of the substrate. Design means for designing an arbitrary wiring pattern on one side and the other side of the substrate;
A resist layer in which an arbitrary wiring pattern is designed on one side and the other side of the base material by the design means, and then a resist layer is laminated at an arbitrary position on the outermost surface of the one side and the other side of the base material. Laminating means;
Dividing means for dividing the outermost surface of one side of the base material and the outermost surface of the other side of the base material in which the resist layer is laminated at an arbitrary place by the resist layer laminating means ,
An area ratio calculating means for calculating, for each area, the area ratio of the resist layer included in the area divided by the dividing means ;
The area ratio of the wiring pattern on one surface of the base material calculated by the area ratio calculating means, the area ratio of the wiring pattern on the other surface of the base material calculated by the area ratio calculating means, and the area ratio calculation Based on the area ratio of the resist layer on one side of the base material calculated by the means and the area ratio of the resist layer on the other side of the base material calculated by the area ratio calculation means, the area of the base material surface Ru wiring pattern designing apparatus comprising a warp amount calculating means for calculating an amount of warpage of each. The area ratio calculation means determines whether the resist layer at any location within each area divided by the dividing means is, that to calculate the area ratio of the resist layer in accordance with the determination result for each area The wiring pattern design apparatus according to claim 2 . A design process in which a design means designs an arbitrary wiring pattern on one side and the other side of the substrate;
A stacking step of stacking a plurality of layers of the base material on which the arbitrary wiring pattern is designed on the one side and the other side by the design unit;
An adjustment value setting step for setting an adjustment value for adjusting an effect caused by the lamination means stacking a plurality of layers of the base material by the lamination means;
Dividing means, a dividing step of dividing the one surface and the other surface of the substrate any of the wiring pattern is designed in a plurality of areas of any size by the design unit,
An area ratio calculating means for calculating an area ratio of the wiring pattern included in the area divided by the dividing means for each area;
The amount of warpage calculating means calculates the area ratio for each area of one surface of each of the base materials calculated by the area ratio calculating means, and the area for the other surface of each base material calculated by the area ratio calculating means. A wiring pattern design method including a warpage amount calculation step of calculating, for each area, a warpage amount of the outermost surface of the base material laminated with the plurality of layers based on an area ratio and an adjustment value set by the adjustment value setting means. . A design process in which a design means designs an arbitrary wiring pattern on one side and the other side of the substrate;
After the resist layer laminating means designs an arbitrary wiring pattern on the one surface and the other surface of the base material by the design means, the resist layer is registered at an arbitrary position on the outermost surface of the one surface and the outermost surface of the other surface. A resist layer laminating step of laminating layers;
A dividing step of dividing the outermost surface of the one side and the outermost surface of the other side of the base material in which the resist layer is laminated at an arbitrary position by the resist layer laminating unit into a plurality of areas ;
An area ratio calculating means for calculating, for each area, the area ratio of the resist layer included in the area divided by the dividing means ;
The warp amount calculating means calculates the area ratio of the wiring pattern on the one surface of the base material calculated by the area ratio calculating means, and the area ratio of the wiring pattern on the other surface of the base material calculated by the area ratio calculating means. And based on the area ratio of the resist layer on one side of the base material calculated by the area ratio calculation means, and the area ratio of the resist layer on the other side of the base material calculated by the area ratio calculation means, A wiring pattern design method comprising: a warpage amount calculating step of calculating a warpage amount for each area of the substrate surface .   In the area ratio calculation step, the area ratio calculation means determines whether or not there is a resist layer at an arbitrary position in each area divided by the dividing means, and the area ratio of the resist layer is determined according to the determination result. The wiring pattern design method according to claim 5, wherein: is calculated for each area. A design process in which a design means designs an arbitrary wiring pattern on one side and the other side of the substrate;
A stacking step of stacking a plurality of layers of the base material on which the arbitrary wiring pattern is designed on the one side and the other side by the design unit;
An adjustment value setting step for setting an adjustment value for adjusting an effect caused by the lamination means stacking a plurality of layers of the base material by the lamination means;
Dividing means, a dividing step of dividing the one surface and the other surface of the substrate any of the wiring pattern is designed in a plurality of areas of any size by the design unit,
An area ratio calculating means for calculating an area ratio of the wiring pattern included in the area divided by the dividing means for each area;
The amount of warpage calculating means calculates the area ratio for each area of one surface of each of the base materials calculated by the area ratio calculating means, and the area for the other surface of each base material calculated by the area ratio calculating means. and the area ratio, based on the adjustment value set by the adjustment value setting means, for executing the warpage calculation step in the computer to calculate the amount of warpage of the multilayer laminated outermost surface of the substrate for each area Program. A design process in which a design means designs an arbitrary wiring pattern on one side and the other side of the substrate;
After the resist layer laminating means designs an arbitrary wiring pattern on the one surface and the other surface of the base material by the design means, the resist layer is registered at an arbitrary position on the outermost surface of the one surface and the outermost surface of the other surface. A resist layer laminating step of laminating layers;
A dividing step of dividing the outermost surface of the one side and the outermost surface of the other side of the base material in which the resist layer is laminated at an arbitrary position by the resist layer laminating unit into a plurality of areas ;
An area ratio calculating means for calculating, for each area, the area ratio of the resist layer included in the area divided by the dividing means ;
The warp amount calculating means calculates the area ratio of the wiring pattern on one side of the base material calculated by the area ratio calculating means, and the area ratio of the wiring pattern on the other side of the base material calculated by the area ratio calculating means. And based on the area ratio of the resist layer on one side of the base material calculated by the area ratio calculation means, and the area ratio of the resist layer on the other side of the base material calculated by the area ratio calculation means, program for executing a warpage calculation step in the computer to calculate the amount of warpage of each area of the substrate surface.   In the area ratio calculation step, the area ratio calculation means determines whether or not there is a resist layer at an arbitrary position in each area divided by the dividing means, and the area ratio of the resist layer is determined according to the determination result. The program for making a computer run according to Claim 8 which calculates for every area.

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