JP4609335B2 - Dry etching method for silicon carbide semiconductor substrate - Google Patents

Description

  The present invention relates to a dry etching method for forming a trench in a semiconductor substrate when manufacturing a high breakdown voltage, high current silicon carbide (hereinafter, SiC) semiconductor device.

  As a silicon (hereinafter referred to as Si) semiconductor power device used for an inverter, power control, and the like, a power MOSFET, an IGBT, and the like are well known and widely used. However, Si as a semiconductor material has been used in power devices, which are considered to be close to the limits of physical properties from the viewpoint of semiconductor characteristics. Thus, attention has been focused on semiconductor SiC, which is a material having a higher physical limit than semiconductor Si. This semiconductor SiC (4H-SiC crystal form) material has a dielectric breakdown electric field that is an order of magnitude higher than that of semiconductor Si, and further has a band gap of 2.9 times, a thermal conductivity of 3.2 times, and an intrinsic semiconductor temperature. When used as a power device material, which is 3 to 4 times higher than Si, the characteristics of semiconductor characteristics excellent in physical properties are greatly exhibited. Accordingly, a power device using this semiconductor SiC material is expected as a device having both a high breakdown voltage and a low on-resistance, and in recent years, many approaches to commercialization have been attempted. However, there are still many problems to be solved in the manufacturing process for commercialization as a power device.

  On the other hand, in recent years, trench gates have been adopted to reduce the on-resistance of power MOSFETs and IGBTs using semiconductor Si. In the trench MOSFET manufacturing method, it is indispensable to precisely form the trench shape, and the etching process is very important. When the trench gate structure is formed, the depth of the trench varies depending on the withstand voltage or the like, but requires several μm with a withstand voltage of several hundred volts. Such a desired depth control and an etching process technique for obtaining a precise-shaped trench are possible in a semiconductor Si substrate.

However, in the case of MOSFETs and IGBTs using semiconductor SiC, even a practical etching solution that enables wet etching has not yet been found, and usually dry etching is used as a precise trench forming process. However, the current known dry etching technique has a low etching rate of semiconductor SiC and a low etching selectivity with a material serving as a mask. Therefore, the depth is a problem, and it is easy to form a deep trench. is not. For example, it is not easy to form even a trench having a depth of about several μm. Usually, in order to increase the etching rate, dry etching is performed using high-density plasma by a known ICP (inductively coupled plasma) method or the like, but it still takes a long time to form the above-mentioned deep (several μm) trench. Cost. For this reason, if the material used for the etching mask is chemically and physically low in etching selectivity with the semiconductor SiC, the trench formed in the semiconductor SiC substrate will reach the target etching depth. In other words, the mask is etched away. For example, when a SiC substrate is etched using a ₂ μm thick SiO ₂ film as a mask, the selectivity is about 3. Therefore, when the SiC is etched by about 6 μm, the SiO ₂ film of the mask disappears and a trench is formed beyond that. become unable. When the thickness of the mask is increased, it takes a long time to form the film, and a new problem arises that it becomes difficult to perform patterning with good accuracy on the thickened mask material, and it is very difficult to say that the problem is solved.

As a mask material having a high etching selectivity in dry etching of a GaN-based semiconductor substrate or SiC substrate, a laminated film of a Ti film and an alloy film of Ni and Ag, Sn, P, B, etc. is known. There is also a description that the etching selectivity is 30 or more (Patent Document 1-Example 1).
JP 2005-322811 A

  However, since the etching mask using the Ti film and the Ni alloy film described in Patent Document 1 described above is a metal film formed by vacuum deposition or sputtering, metal particles from the surface of the metal mask are formed during trench etching. There is a problem that it is easy to form a micromask by scattering on the etched surface or reattaching the dissolved metal to the etched surface, and it is difficult to make the entire etched surface smooth.

  The present invention has been made in view of such problems, and easily creates an etching mask having high etching resistance to dry etching using plasma generated by ionizing a gas containing fluoride to a SiC semiconductor substrate. Another object of the present invention is to provide a dry etching method for a SiC semiconductor substrate, which can easily peel off the etching mask after dry etching.

According to the first aspect of the present invention, in the dry etching method, after forming a selective etching mask on a silicon carbide semiconductor substrate, a trench is formed using plasma in the exposed semiconductor substrate portion. The object of the present invention is achieved by employing a dry etching method for a silicon carbide semiconductor substrate, wherein the etching mask is a laminated film in which silicon oxide and tin oxide are formed in this order .

  According to the second aspect of the present invention, the etching mask is formed on the silicon carbide semiconductor substrate with a silicon oxide thickness of 0.1 μm to 0.5 μm and a thickness of 0.5 μm to 1 μm. 2. The silicon carbide semiconductor substrate dry etching method according to claim 1, wherein the tin oxide is a laminated film formed in this order.

  3. The silicon carbide semiconductor according to claim 1, wherein the plasma used for the dry etching is inductively coupled plasma obtained by ionizing a gas containing fluoride. More preferably, a dry etching method for the substrate is used.

According to the present invention, it is possible to easily create an etching mask having high etching resistance against dry etching using plasma generated by ionizing a gas containing fluoride to a SiC semiconductor substrate, and the etching mask can be easily formed after dry etching. A dry etching method for a SiC semiconductor substrate to be peeled can be provided.

(Embodiment)
Hereinafter, a dry etching method for a silicon carbide semiconductor substrate according to the present invention will be described in detail with reference to the drawings. The present invention is not limited to the description of the examples described below unless it exceeds the gist.

  FIG. 1 is a cross-sectional view of a principal part of a semiconductor substrate at a stage where an etching mask is formed on the silicon carbide semiconductor substrate according to the dry etching method for a silicon carbide semiconductor substrate of the present invention. FIG. 2 is a fragmentary cross-sectional view of a semiconductor substrate at a stage where a photoresist pattern is formed before forming an etching mask according to the present invention. FIG. 3 is a fragmentary cross-sectional view of the semiconductor substrate at a stage where an etching mask is formed on the silicon carbide semiconductor substrate according to the silicon carbide semiconductor substrate dry etching method of the present invention. FIG. 4 is a relationship diagram between the etching time and the etching amount of dry etching according to the present invention.

FIG. 1 shows stacked structures 2 and 3 of etching masks used when dry etching the SiC substrate 1 according to the present invention. An SiO ₂ film 2 is formed on the SiC substrate 1, and an SnO ₂ film 3 is further formed thereon. The SiO ₂ film 2 and the SnO ₂ film 3 form a desired pattern by photolithography. Hereinafter, the process will be described in detail with reference to FIGS. After thoroughly cleaning SiC substrate 1, a photoresist is applied over the entire surface by spin coating. Then, it was put into a clean oven at 85 ° C. for 30 minutes, and the photoresist was baked. After baking, initial exposure was performed using a photomask having a desired pattern with an exposure apparatus using ultraviolet rays. After the initial exposure, baking was performed at 115 ° C. for 15 minutes, and then the entire substrate was exposed without using a mask. After the entire surface exposure, development was performed to remove unnecessary photoresist other than the desired pattern, and a photoresist pattern 4 as shown in FIG. 2 was formed. At this time, the film thickness of the photoresist 4 is about 2 μm.

After forming the photoresist pattern 4, the SiO ₂ film 2 is formed at room temperature by sputtering. The SiO ₂ film 2 was formed to a thickness of 0.5 μm under the film forming conditions where the film forming pressure was 1 Pa and the SiO ₂ target was sputtered by RF in Ar + 10% O ₂ gas. Subsequently, the SnO ₂ film 3 was formed at room temperature by sputtering without breaking the vacuum. The SnO ₂ film 3 was formed to a thickness of 0.5 μm under the film forming conditions where the film forming pressure was 1 Pa and the SnO ₂ target was sputtered by RF in Ar + 10% O ₂ gas. Of the SiO ₂ film 2 and SnO ₂ film 3 formed in this way, the SnO ₂ film 3 on the surface side, in particular, is hardly etched even during trench etching, so it melts and reattaches to the trench etching planned surface. However, a phenomenon that prevents smooth trench etching hardly occurs. _SiO 2 / SnO so-called lift-off method for removing the photoresist with a SiC substrate SiO ₂ and SnO ₂ of the laminated film (hereinafter _SiO 2 / SnO ₂ and described) is placed in the total thickness 1μm on photoresist stripping solution _Two laminated films were patterned. The patterned line width is 2 μm in this embodiment. FIG. 3 shows a cross section of the laminated mask structures 2 and 3 on the SiC substrate 1 patterned by the lift-off method. Since the SiO ₂ film is difficult to etch the SnO ₂ film, it is a film provided because patterning cannot be performed if the SnO ₂ film is a single film. By forming the SiO ₂ film on the lower side of the SnO ₂ film is to allow patterning of the SnO ₂ film by a lift-off method. Therefore, the thickness of the SiO ₂ film does not need to be increased, and may be 0.1 μm or more, and the upper limit is preferably 0.5 μm or less in view of the thermal expansion coefficient of the laminated film. Since a thicker SnO ₂ film enables deep trench etching, 0.5 μm or more is preferable. Further, if the thickness is too large due to the thermal expansion coefficient of the laminated film, a problem arises in the process due to the warpage of the wafer, and therefore a thickness of 1 μm or less is preferable.

The lift-off method is used because the SnO ₂ film 3 is also very difficult to be etched by either dry etching or wet etching, so that patterning by the lift-off method is suitable. Next, dry etching was performed with an ICP-RIE apparatus (not shown) using the obtained SiO ₂ / SnO ₂ laminated films 2 and 3 as a mask for dry etching of the SiC substrate 1. At this time, trench etching was performed at a pressure of 1 Pa using SF ₆ + 50% O ₂ gas with an ICP power of 200 W and a bias power of 25 W. According to this ICP-RIE apparatus, high-density plasma formed by high-power plasma excitation by an inductively coupled coil can be used for etching a SiC substrate. Etching is carried out for a predetermined time to form a trench having a desired depth, and then taken out from the ICP-RIE apparatus. An SiC substrate is attached to buffered hydrofluoric acid to dissolve the SiO ₂ film portion of the mask material, and SiO ₂ / SnO _Two masks were removed. The SnO ₂ film is not dissolved, but is removed together with the removal of the SiO ₂ film.
FIG. 4 shows the etching amount of the SiO ₂ / SnO ₂ laminated film mask and the etching amount of the SiC substrate with respect to the etching time when the SiC substrate is etched using the high-density plasma formed using the ICP-RIE apparatus. . Since the etching of the SiO ₂ / SnO ₂ laminated film mask is about 1 nm / min, the etching amount is 0.06 μm or less even if it is etched for 1 hour, and the mask is hardly etched. . The slight etching is due to physical (sputtering) factors, and it can be seen that the etching resistance is extremely high chemically. At this time, the etching amount of the SiC substrate is about 50 nm / min, the etching amount of the mask / the etching amount of SiC = 1/50, and it can be seen that the selectivity is extremely high. When a metal or alloy film such as Ni or Al is used for the etching mask material, metal particles may be scattered depending on the etching conditions, which may cause micromasks and hinder etching, but SnO ₂ is an oxide. Can hardly be etched by either dry etching with fluorine-based gas or wet etching with acid / alkali. For this reason, there is no generation of a micromask and it is excellent for use as a mask for dry etching or wet etching. Thus, since the outermost surface of the mask is SnO ₂ , the mask is hardly etched and SiC can be deeply dry etched.

Although etching was performed for 4 hours under these conditions, it was confirmed that SnO _{2 on the} surface of the mask was etched by about 0.25 μm, but SiC could be etched by about 12 μm and a deep trench could be formed. Although it has not been confirmed, half of the mask still remains in this etching time, so it is considered that etching of 20 μm or more is possible. By using this trench formation technique, the breakdown voltage of power devices such as MOSFETs and IGBTs using a SiC substrate can be dramatically improved.

It is principal part sectional drawing of the semiconductor substrate of the stage which formed the etching mask on the silicon carbide semiconductor substrate concerning the dry etching method of the silicon carbide semiconductor substrate of this invention. It is principal part sectional drawing of the semiconductor substrate of the stage in which the photoresist pattern was formed before forming the etching mask concerning this invention. It is principal part sectional drawing of the semiconductor substrate of the stage which formed the etching mask on the silicon carbide semiconductor substrate concerning the dry etching method of the silicon carbide semiconductor substrate of this invention. FIG. 6 is a relationship diagram between an etching time and an etching amount of dry etching according to the present invention.

Explanation of symbols

1 Silicon carbide (SiC) substrate 2 SiO ₂ film (mask)
3 SnO ₂ film (mask)
4 Photoresist film.

Claims (3)

In a dry etching method in which a trench is formed using plasma in the exposed semiconductor substrate portion after a selective etching mask is formed on a silicon carbide semiconductor substrate, the etching mask forms silicon oxide and tin oxide in this order. A dry etching method for a silicon carbide semiconductor substrate, characterized by comprising the laminated film formed. The etching mask is a laminated film in which silicon oxide having a thickness of 0.1 μm to 0.5 μm and tin oxide having a thickness of 0.5 μm to 1 μm are formed in this order on the silicon carbide semiconductor substrate. The method for dry etching a silicon carbide semiconductor substrate according to claim 1, wherein the silicon carbide semiconductor substrate is dry-etched. 3. The method for dry etching a silicon carbide semiconductor substrate according to claim 1, wherein the plasma used for the dry etching is inductively coupled plasma obtained by ionizing a gas containing fluoride.

Images