JP4591398B2 - Method for manufacturing plasma display panel - Google Patents

Description

The present invention relates to a method of manufacturing a plasma display panel, particularly to a dielectric layer of the front substrate.

  A plasma display panel (hereinafter referred to as “PDP”) has a structure in which peripheral portions of a front substrate and a rear substrate arranged opposite to each other are sealed by a sealing member, and is formed between the front substrate and the rear substrate. The discharge space is filled with a discharge gas such as neon (Ne) and xenon (Xe).

  The front substrate includes a plurality of display electrode pairs formed of scan electrodes and sustain electrodes formed in stripes on one surface of a glass substrate, and a dielectric layer and a protective layer that cover these display electrode pairs. Each of the display electrode pairs includes a transparent electrode and a bus electrode made of a metal material formed on the transparent electrode.

  The back substrate divides a plurality of address electrodes formed in stripes in a direction orthogonal to the display electrode pair on one side of the glass substrate, a base dielectric layer covering these address electrodes, and a discharge space for each address electrode. Stripe-shaped barrier ribs and red, green and blue phosphor layers sequentially applied to the grooves between the barrier ribs.

  The display electrode pair and the address electrode are orthogonal to each other, and the intersection thereof becomes a discharge cell. These discharge cells are arranged in a matrix, and three discharge cells having red, green, and blue phosphor layers arranged in the direction of the display electrode pair become pixels for color display. The PDP sequentially applies a predetermined voltage between the scan electrode and the address electrode and between the scan electrode and the sustain electrode to generate a gas discharge, and excites the phosphor layer with the ultraviolet rays generated by the gas discharge to emit light. A color image is displayed.

  Such a dielectric layer on the front substrate of the PDP serves as a capacitor for controlling the discharge current of each discharge cell. And this dielectric material layer is normally formed by apply | coating and baking a low melting glass paste.

  Here, when the electric field strength on the surface of the dielectric layer on the scan electrode is increased, the discharge between the scan electrode and the address electrode and between the scan electrode and the sustain electrode is discharged even at a low applied voltage. For this reason, the driving voltage of the PDP can be lowered and the light emission efficiency can be improved. Thus, methods for increasing the electric field strength on the surface of the dielectric layer have been studied. Two methods are conceivable. One is a method of reducing the arrangement interval of the display electrode pairs, and the other is a method of reducing the thickness of the dielectric layer. If the thickness of the dielectric layer is reduced here, the electric capacity between the scan electrode and the surface of the dielectric layer on the scan electrode is increased, and the electric field strength on the surface of the dielectric layer on the scan electrode may be increased. it can.

  However, in the former method, the electric field applied between the display electrodes becomes excessive, and there is a risk of causing electrode destruction due to electromigration or ion bombardment. In the latter method, when the dielectric layer is formed with the above-described low melting point glass paste, as the dielectric layer becomes thinner, dielectric breakdown due to dust contamination and generation of bubbles during the formation of the dielectric layer is likely to occur.

However, the latter method of reducing the thickness of the dielectric layer has the advantage that the capacitance of the capacitor between the display electrodes can be ensured as described above even if the area of each discharge cell is reduced as the definition becomes higher. is there. For this reason, a manufacturing method that does not cause dielectric breakdown even when the dielectric layer is formed thin is studied. Particularly, when a chemical vapor deposition method (hereinafter referred to as “CVD method”) is used, high-purity silicon oxide is produced. It is known that a dielectric layer having a low dielectric constant and a high withstand voltage can be obtained (see, for example, Patent Document 1).
Japanese Patent Laid-Open No. 11-195382

  However, a dielectric layer formed by a vapor deposition method such as a CVD method is easily peeled off from the glass substrate, so that the panel characteristics are likely to change with time and the panel life is short.

  For example, a dielectric layer formed by a CVD method may be peeled off during a PDP manufacturing process such as a protective layer forming process or a bonding process with a back substrate. Even if the dielectric layer does not peel off during the manufacturing process, if the PDP has been used for a long period of time, it may be peeled off due to physical or thermal shock caused by plasma particles.

As a cause of peeling of the dielectric layer, a glass substrate (thermal expansion coefficient 7 to 9 × 10 ⁻⁶ / ° C.) and a silicon oxide film (thermal expansion coefficient 2 to 2.5 × 10 ⁻⁶ / ° C.) which is a dielectric layer are used. ) And a thermal expansion coefficient, and it is considered that thermal stress is generated in the silicon oxide film by the heating process in the manufacturing process of the PDP.

  In view of the above problems, an object of the present invention is to provide a PDP having excellent light emission efficiency and a method for manufacturing the same, by forming a thin dielectric layer with good adhesion by a vapor phase growth method, reducing the driving voltage. Yes.

In order to achieve the above object, the present invention forms a pattern of a first conductive film on a first glass substrate, and has a particle size of 1 μm or more with respect to the first glass substrate and the first conductive film. Irradiated with accelerated fine particles of 20 μm or less to form uneven shapes on the surfaces of the first glass substrate and the first conductive film, and the first conductive film and the first conductive film having the uneven shape formed thereon A dielectric substrate is formed on a glass substrate using a vapor deposition method to produce a first substrate, and a second conductive film, partition walls, and a phosphor layer are formed on the second glass substrate. This is a method of manufacturing a PDP that is disposed opposite to the substrate.

  According to such a method of manufacturing a PDP, minute irregularities are formed on the surfaces of the first glass substrate and the first conductive film by the fine particle irradiation. On top of that, when a dielectric layer is formed using a vapor phase growth method, the adhesiveness is improved by minute unevenness, and the dielectric layer is not easily peeled off. In addition, since the dielectric layer is formed by vapor deposition, a thin film having a high withstand voltage can be obtained, a driving voltage can be lowered, and a PDP excellent in luminous efficiency and a method for manufacturing the same can be provided.

  The first conductive film of the PDP manufacturing method of the present invention forms a transparent electrode film, and then bakes an electrode glass paste and patterns it by photolithography to form a bus electrode having higher conductivity than the transparent electrode film. May be.

  When the bus electrode is formed by such a manufacturing method, an edge curl in which the end of the bus electrode is turned up may occur. When the edge curl occurs, a void where a film is not formed is generated at the edge curl portion even if the vapor deposition method is performed so as to cover the bus electrode. Then, the nest becomes the starting point, and film peeling tends to occur. However, since the edge curl is removed by the above-mentioned fine particle irradiation, the film peeling does not occur.

  The bus electrode of the first conductive film of the method for manufacturing a PDP of the present invention is formed by forming a first bus electrode having a lower visible light transmittance than the transparent electrode film on the transparent electrode film, and on the first bus electrode. A second bus electrode having a higher visible light reflectance than the first bus electrode may be formed.

  In the bus electrode having such a configuration, edge curl is likely to occur in the second bus electrode. However, edge curl can be removed by the above-described fine particle irradiation, and an electrode configuration without reflection can be realized.

  The dielectric layer of the PDP manufacturing method of the present invention is formed by forming a first dielectric layer by vapor deposition and firing a dielectric glass paste on the first dielectric layer. A layer may be formed.

  When the dielectric layer is formed by such a manufacturing method, the first dielectric layer suppresses the reaction with the bus electrode, and the second dielectric layer functions to control the discharge current. It can be set as the dielectric material layer which suppressed reaction with an electrode and prevented coloring.

  As described above, according to the present invention, fine irregularities are formed on the surfaces of the first glass substrate and the first conductive film by irradiation with fine particles, and a dielectric layer is formed thereon using a vapor phase growth method. Since it is formed, the adhesiveness is improved by the minute unevenness, and the dielectric layer is difficult to peel off. In addition, since the dielectric layer is formed by vapor deposition, a thin film having a high withstand voltage can be obtained, a driving voltage can be lowered, and a PDP excellent in luminous efficiency and a method for manufacturing the same can be provided.

  Hereinafter, a PDP according to an embodiment of the present invention will be described with reference to the drawings.

(Embodiment)
FIG. 1 is a perspective view showing a structure of a PDP according to an embodiment of the present invention. As shown in FIG. 1, a PDP 100 is a sealing member in which a front plate 12 as a first substrate and a back plate 20 as a second substrate are opposed to each other, and the outer peripheral portion thereof is made of glass frit or the like. Is hermetically sealed. A discharge gas such as neon (Ne) and xenon (Xe) is sealed in the sealed discharge space 26 inside the PDP 100 at a pressure of 400 Torr to 600 Torr.

  On the front glass substrate 13 which is the first glass substrate of the front plate 12, a pair of strip-like display electrodes 16 composed of the scan electrodes 14 and the sustain electrodes 15 which are the first conductive films, and black stripes (light shielding layers). 17 are arranged in a plurality of rows in parallel with each other. A dielectric layer 18 serving as a capacitor is formed on the front glass substrate 13 so as to cover the display electrodes 16 and the black stripes 17, and the surface of the dielectric layer 18 is made of magnesium oxide (MgO) or the like. A protective layer 19 is formed.

  On the back glass substrate 21 that is the second glass substrate of the back plate 20, a plurality of strip-like address electrodes 22 that are the second conductive films in a direction orthogonal to the scan electrodes 14 and the sustain electrodes 15 of the front plate 12. Are arranged in parallel with each other, and the underlying dielectric layer 23 covers them.

  Further, on the base dielectric layer 23 between the address electrodes 22, barrier ribs 24 having a predetermined height are formed to divide the discharge space 26. For each address electrode 22, a phosphor layer 25 that emits red, blue, and green light by ultraviolet rays is sequentially applied to the grooves between the barrier ribs 24. A discharge cell is formed at a position where the scan electrode 14 and the sustain electrode 15 intersect with the address electrode 22, and the discharge cell having the red, blue and green phosphor layers 25 aligned in the direction of the display electrode 16 has a color display. It becomes a pixel for.

  FIG. 2 is a cross-sectional view showing the configuration of the front plate 12 of the PDP 100 according to the embodiment of the present invention. FIG. 2 shows FIG. 1 upside down. As shown in FIG. 2, display electrodes 16 including scanning electrodes 14 and sustain electrodes 15 and black stripes 17 are formed in a pattern on a front glass substrate 13 manufactured by a float process or the like.

Scan electrode 14 and sustain electrode 15 are transparent electrodes 14a and 15a, which are transparent electrode films made of indium oxide (ITO), tin oxide (SnO ₂ ), and the like, and metal electrodes formed on transparent electrodes 14a and 15a, respectively. 14b and 15b. The metal electrodes 14b and 15b are used for the purpose of imparting conductivity in the longitudinal direction of the transparent electrodes 14a and 15a, and are formed of a conductive material mainly composed of a silver (Ag) material. Furthermore, the metal electrodes 14b and 15b are black first bus electrodes 41b and 51b for shielding external light, respectively, and white for reducing electric resistance, and are more visible than the first bus electrodes 41b and 51b. The second bus electrodes 42b and 52b have a high light reflectance. Therefore, the first bus electrodes 41b and 51b have higher conductivity and lower visible light transmittance than the transparent electrodes 14a and 15a.

  The dielectric layer 18 includes a first dielectric layer 81 provided on the front glass substrate 13 so as to cover the transparent electrodes 14a and 15a, the metal electrodes 14b and 15b, and the black stripes 17, and a first dielectric layer. The second dielectric layer 82 is formed on the body layer 81, and the protective layer 19 is formed on the second dielectric layer 82.

  Next, a method for manufacturing the PDP 100 will be described.

  First, the transparent electrodes 14a and 15a constituting the scan electrode 14 and the sustain electrode 15 are formed on the front glass substrate 13 by patterning using a photolithography method or the like. Then, the respective paste layers to be the metal electrodes 14b and 15b are patterned on the black stripe 17 and the transparent electrodes 14a and 15a by using a photolithography method and are formed by baking. Here, the material of the metal electrodes 14b and 15b is an electrode glass paste containing conductive black particles or a silver (Ag) material, and the material of the black stripe 17 is also a paste containing a black pigment.

  Next, a first dielectric layer 81 is formed on front glass substrate 13 by plasma CVD so as to cover scan electrode 14, sustain electrode 15, and black stripe 17. Further, a dielectric glass paste is applied and baked by a die coating method or the like so as to cover the first dielectric layer 81 to form the second dielectric layer 82. Here, the dielectric glass paste is a paint containing powdery dielectric glass frit, a binder and a solvent.

  Next, a protective layer 19 made of magnesium oxide (MgO) is formed on the dielectric layer 18 to a thickness of 0.3 μm to 1 μm by vacuum deposition. Through the above steps, predetermined constituent members are formed on the front glass substrate 13, and the front plate 12 is completed.

  The back plate 20 is formed as follows. First, a method for screen-printing a paste containing a silver (Ag) material on the rear glass substrate 21 or a method of patterning using a photolithography method after forming a metal film on the entire surface is used. A material layer to be a constituent is formed. Then, the material layer is baked at a desired temperature to form the address electrode 22.

  Next, a dielectric glass paste is applied on the rear glass substrate 21 on which the address electrodes 22 are formed by a die coating method or the like so as to cover the address electrodes 22 to form a dielectric paste layer. After that, the base dielectric layer 23 is formed by firing the dielectric paste layer. The dielectric glass paste is a paint containing powdery dielectric glass frit, a binder and a solvent.

  Next, a partition wall forming paste containing a partition wall material is applied on the base dielectric layer 23, patterned into a predetermined shape to form a partition wall material layer, and then fired to form the partition walls 24. Here, as a method of patterning the partition wall paste applied onto the base dielectric layer 23, a photolithography method or a sand blast method can be used.

  Next, the phosphor layer 25 is formed by applying and baking a phosphor paste containing a phosphor material on the base dielectric layer 23 between the adjacent barrier ribs 24 and on the side surfaces of the barrier ribs 24. Through the above steps, predetermined constituent members are formed on the rear glass substrate 21, and the rear plate 20 is completed.

  In this way, the front plate 12 and the back plate 20 provided with predetermined constituent members are arranged so that the display electrodes 16 and the address electrodes 22 are orthogonal to each other, and the periphery thereof is sealed with a sealing member. The discharge space 26 is filled with a discharge gas containing neon (Ne), xenon (Xe), etc., thereby completing the PDP 100.

  Next, a method of forming a first conductive film for forming the display electrode 16 that is the first conductive film of the front plate 12, a method of fine particle irradiation for irradiating the front glass substrate 13 and the display electrode 16 with fine particles, a dielectric layer A method of forming the dielectric layer for forming 18 will be described in detail.

  3 shows from the first conductive film to the formation of the dielectric layer of the PDP according to the embodiment of the present invention. FIG. 3A is a sectional view after the formation of the first conductive film, FIG. FIG. 3B is a cross-sectional view after completion of fine particle irradiation, and FIG. 3C is a cross-sectional view after completion of dielectric layer formation. FIG. 3A shows a state in which the transparent electrode 14 a, the first bus electrode 41 b, and the second bus electrode 42 b serving as the first conductive film are formed on the front glass substrate 13. Here, the transparent electrode 14a is formed by a thin film process such as a sputtering method, but the first bus electrode 41b and the second bus electrode 42b are applied by a printing method using an electrode glass paste. The film is formed and patterned by photolithography.

  More specifically, a first bus electrode paste layer to be the first bus electrode 41b is applied to the entire surface of the transparent electrode 14a and dried. After that, a second bus electrode paste layer to be the second bus electrode 42b is applied on the entire surface of the first bus electrode paste layer and dried. Then, patterning is performed by exposure and development using a photolithography method. At this time, the first bus electrode paste layer is more easily etched into the developer than the second bus electrode paste layer, and the amount of exposure light that reaches the first bus electrode paste layer is reduced, resulting in an undercut. The second bus electrode paste layer is dried and baked, and the edge of the second bus electrode 42b is contracted to produce an edge curl 30 that is turned up.

  FIG. 3B shows a state after the fine particles are irradiated in the state of FIG. 3A, and the edge curl 30 at the end of the second bus electrode 42b is removed, and the front glass substrate 13, the transparent electrode 14a, and The roughened surface 31 of the second bus electrode 42b is shown.

  FIG. 3C shows a plasma CVD method of a thin film process for forming the first dielectric layer 81 so as to cover the front glass substrate 13, the transparent electrode 14a, the first bus electrode 41b, and the second bus electrode 42b. A state in which the second dielectric layer 82 is formed by firing a dielectric glass paste is shown.

  As described above, in the configuration in which the first bus electrode 41b formed by the thick film process and the second bus electrode 42b are stacked, the edge curl 30 is likely to be generated in the second bus electrode 42b, but the fine particles are irradiated. By doing so, the edge curl 30 is removed. Therefore, a nest that is a portion where no film is formed due to the edge curl 30 does not occur, and even if a dielectric layer is formed by a thin film process, it is not easily peeled off. Further, since the edge curl 30 is removed, the line width including the edge curl 30 is sufficient at the time of exposure, and the exposure accuracy can be roughened.

  Furthermore, the formation method of the first conductive film, the fine particle irradiation method, and the formation method of the dielectric layer will be described in detail.

  First, the first conductive film is formed by forming indium oxide (ITO) having a thickness of about 0.12 μm on the entire surface of the front glass substrate 13 by sputtering, and then forming a width of 150 μm by photolithography. The stripe-shaped transparent electrodes 14a and 15a are formed. Next, one type of black metal fine particle or metal oxide selected from the group of iron (Fe), cobalt (Co), nickel (Ni), manganese (Mn), ruthenium (Ru), and rhodium (Rh) 70% to 90% by weight, 1% to 15% by weight of glass frit, 8% to 15% by weight of photosensitive organic binder component including photosensitive polymer, photosensitive monomer, photopolymerization initiator, solvent, etc. A first bus electrode paste comprising the following is applied to the entire surface of the front glass substrate 13 by a printing method or the like to form a first bus electrode paste layer.

  Thereafter, at least 70% to 90% by weight of silver (Ag) particles, 1% to 15% by weight of glass frit, and a photosensitive polymer, a photosensitive monomer, a photopolymerization initiator, a solvent, and the like. A second bus electrode paste comprising 8 wt% to 15 wt% of the organic binder component is applied onto the first bus electrode paste layer by a printing method or the like to form a second bus electrode paste layer. Then, the first bus electrode paste layer and the second bus electrode paste layer applied to the entire surface are patterned using a photolithography method. In this way, the display electrode 16 which is the first conductive film is formed.

  Next, the fine particle irradiation method will be described. FIG. 4 is a front view of a sandblasting apparatus that performs fine particle irradiation in the method of manufacturing a PDP according to the embodiment of the present invention. The sand blasting device 60 includes a cabinet 62 having a nozzle 61 for injecting accelerated fine particles on a front glass substrate on which display electrodes are formed, and a classification tank 63 for classifying dust and fine particles generated in the cabinet 62. . In addition, a dust collector 64 that accumulates the dust classified in the classification tank 63 and discharges only clean air to the outside air, and a fine particle tank 65 for storing fine particles classified in the classification tank 63 are provided. The sandblasting device 60 further includes a supply unit 69 that communicates with the bottom of the fine particle tank 65 via a duct 66, a fine particle material adjustment valve 67, and a dump valve 68 and supplies fine particles to the nozzle 61.

  Here, as the material of the fine particles, at least one selected from glass, zirconia, calcium carbonate, aluminum oxide, and silicon carbide is selected. These fine particle materials have high hardness and can form irregularities on the surface electrode and the surface of the front glass substrate in a short time.

  The cabinet 62 includes a carry-in / out port 70 for receiving the front glass substrate from the transfer line, and a slide cylinder 71 that opens and closes the slide door is provided at the carry-in / out port 70. A loader / unloader for taking out the front glass substrate from the transfer line, mounting it on the work mounting tool 73 on the transfer table 72, and taking out the processed front glass substrate from the work mounting tool 73 outside the slide door. 74 is provided.

  Here, the front glass substrate on which the display electrodes are formed is mounted on the work mounting tool 73, and fine particles are irradiated from the nozzle 61 while being moved at a relative conveyance speed with respect to the nozzle 61. The particle diameter of the fine particles is preferably 1 μm or more and 20 μm or less. If the particle size is smaller than 1 μm, sufficient impact force cannot be applied, and thus roughening becomes insufficient. Conversely, if the particle diameter is larger than 20 μm, the display electrode is etched, which is not preferable.

  Further, the injection amount of the fine particles from the nozzle 61 is 10 g / min or more and 150 g / min or less, the injection pressure is 0.01 MPa or more and 0.2 MPa or less, the injection width is 50 mm or more and 200 mm or less, and the work attachment tool 73 for the nozzle 61 is used. It is desirable that the conveyance speed of the sheet be 50 mm / min or more and 300 mm / min or less.

  If the injection amount of fine particles is smaller than 10 g / min, it takes a long time to obtain a predetermined surface roughness, which is not practical. On the contrary, if the injection amount of the fine particles is larger than 150 g / min, the display electrode is etched, which is not preferable.

  Further, if the injection pressure of the fine particles is smaller than 0.01 MPa, a sufficient impact force cannot be applied, and the degree of roughening the surface becomes insufficient. On the contrary, if the spray pressure of the fine particles is larger than 0.2 MPa, the display electrode is etched, which is not preferable.

  On the other hand, if the injection width of the fine particles is smaller than 50 mm, it is necessary to scan the nozzle 61 finely when processing a large area uniformly, which is complicated. On the contrary, if the injection width of the fine particles is larger than 200 mm, a sufficient impact force cannot be applied, and the degree of roughening the surface becomes insufficient.

  On the other hand, if the conveying speed is less than 50 mm / min, the productivity is extremely poor and not practical. On the other hand, if the conveyance speed is greater than 300 mm / min, the uniformity of the process cannot be ensured.

  A classification tank 63 is provided above the cabinet 62, and the upper side surface of the classification tank 63 and the cabinet 62 are connected by a pipe 75. The bottom of the classification tank 63 communicates with the bottom of the cabinet 62 so that the reusable fine particles classified in the classification tank 63 and collected at the bottom fall into the cabinet 62 and accumulate at the bottom of the cabinet 62. ing. The upper part of the classification tank 63 and the dust collector 64 communicate with each other via a pipe 76.

  The bottom of the cabinet 62 communicates with a screw conveyor 77 having a screw that rotates in the pipe, and the screw conveyor 77 communicates with a basket conveyor 78 constituted by a plurality of baskets that can move by circulating inside the pipe. . The basket conveyor 78 communicates with the upper part of the fine particle tank 65. Accordingly, the fine particles collected at the bottom of the cabinet 62 are stored in the fine particle tank 65 via the screw conveyor 77 and the basket conveyor 78.

  The compressed air supplied into the supply unit 69 pressure-feeds the fine particles dropped into the supply unit 69 from the joint 85 connected to the lower end of the supply unit 69 to the fine particle supply pipe 86. Further, the fine particle supply pipe 86 communicates with the nozzle 61 in the cabinet 62, and the compressed air and fine particles merged in the joint 85 pass through the fine particle supply pipe 86 and are ejected from the nozzle 61. Here, by supplying an amount of fine particles necessary for one processing step of the front glass substrate into the hopper 87, a desired set amount of fine particles can be always dropped to the supply unit 69.

  The front glass substrate irradiated with the fine particles in the cabinet 62 is carried out of the cabinet 62 from the carry-in / out entrance 70 by the rotation of the carrying table 72, and is removed from the work mounting tool 73 by the loader / unloader 74 to the carrying line or the storage container. It is carried out.

  The fine particles ejected from the nozzle 61 into the cabinet 62 and the dust generated at this time are carried into the classification tank 63 through the pipe 75. The particles are classified by the fan motor 88 of the dust collector 64 above the classification tank 63, and usable fine particles are collected at the bottom of the classification tank 63. On the other hand, the dust collected in the classification tank 63 is accumulated in the dust collector 64 by the airflow in the classification tank 63.

  In addition, it is also possible to perform the fine particle irradiation process on the front glass substrate in a short time by using a large sandblasting apparatus in which a large number of nozzles 61 are arranged.

  The surface roughness of the front glass substrate and the display electrode whose surfaces are thus roughened will be described. FIG. 5 is a diagram for explaining the surface roughness coefficient Ra of the front glass substrate and the display electrode of the PDP according to the embodiment of the present invention.

  Ra is an index of roughness specified in JIS B0601-1994 “Surface Roughness—Definition and Display”, and is extracted from the roughness curve by a reference length L in the direction of the average line, and is shown in FIG. Like the curve, when the X axis is taken in the direction of the average line taken, the Y axis is taken in the direction of the vertical magnification, and the roughness curve is expressed by y = f (x), it is obtained by (Equation 1). The value is expressed in micrometers (μm).

  The Ra on the surface of the front glass substrate and the display electrode on which the dielectric layer is formed is preferably 0.1 μm or more and 1 μm or less. When Ra is smaller than 0.1 μm, the adhesion between the front glass substrate and the dielectric layer formed after the display electrode is not sufficiently improved, and the effect of preventing film peeling is small. If Ra is larger than 1 μm, the visible light scattering called haze becomes remarkable, and the display characteristics as a PDP deteriorate. In particular, when the Ra of the display electrode is larger than 1 μm, the cross-sectional area of the display electrode is reduced, and a large compressive stress is generated inside the display electrode, resulting in an increase in specific resistance and a decrease in luminous efficiency of the PDP. Resulting in.

  More preferably, Ra is desirably 0.3 μm or less. If Ra is 0.3 μm or less, visible light is not scattered at all, and there is an advantage that display characteristics as a PDP are not impaired. This is because Ra is smaller than any wavelength of visible light.

  Further, when the metal electrodes 14b and 15b shown in FIG. 2 have a two-layer configuration of the first bus electrodes 41b and 51b and the second bus electrodes 42b and 52b, respectively, the second bus electrodes 42b and 52b The edge curl often turns up at the end. As described above, the second bus electrodes 42b and 52b are formed by applying a silver (Ag) paste, drying, and firing, but the ends of the electrodes are turned up when firing. When edge curl occurs, voids, which are portions where no film is formed, are generated when a silicon oxide film as a dielectric layer is formed by vapor deposition. And this nest becomes a starting point, and a dielectric material layer will peel off. However, edge curl can be removed by the fine particle irradiation described above.

  FIG. 6 is a cross-sectional view of the end shape of the second bus electrode of the PDP according to the embodiment of the present invention. Since the end portions of the second bus electrode 42b and the second bus electrode 52b are the same in the embodiment of the present invention, the second bus electrode 42b will be described.

  The second bus electrode 42b is laminated on the front glass substrate 13 in the order of the transparent electrode 14a and the first bus electrode 41b, and is formed in a rectangular shape when viewed from the thickness direction of the front glass substrate 13. And the end shape of the cross section which cut | disconnected the 2nd bus electrode 42b in the plane perpendicular | vertical with respect to the front glass substrate 13 of a rectangular long side direction or a short side direction is the shape chamfered as shown in FIG. It is. An angle θ between the chamfered surface 90 and the front glass substrate 13 is set to 30 ° or more and 60 ° or less.

  In order to form such a chamfered surface 90, an arbitrary angle θ can be obtained by controlling the irradiation angle of the fine particles by the fine particle irradiation method described above. Here, if θ is smaller than 30 °, the cross-sectional area becomes too small, and the line resistance as a bus electrode increases. On the other hand, when θ is larger than 60 °, there is a possibility that voids are generated because the step coverage (step coverage) when the dielectric layer is formed later is not sufficient.

  In this way, by providing appropriate irregularities on the front glass substrate and the display electrode, and removing edge curl of the display electrode, the irregularities enhance adhesion, and there is no nest where the dielectric layer is not formed. Is difficult to peel off.

  Next, formation of the dielectric layer will be described. As shown in FIG. 2, the dielectric layer 18 of the PDP according to the embodiment of the present invention has a configuration in which a first dielectric layer 81 and a second dielectric layer 82 are laminated. First, a method for forming the first dielectric layer 81 will be described.

FIG. 7 is a schematic cross-sectional view of a plasma CVD apparatus for forming a dielectric layer in the method for manufacturing a PDP according to the embodiment of the present invention. In the plasma CVD apparatus 200, a glass plate 213 in which the display electrode 16 and the black stripe 17 are formed on the front glass substrate 13 of FIG. 2 is placed on the lower electrode 212 in the vacuum vessel 211. Then, TEOS (Si (OC ₂ H ₅ ) ₄ ), helium (He), and oxygen (O ₂ ) gas are supplied from a gas supply device (not shown) through a shower head 215 provided below the upper electrode 214. Further, high-frequency power of 13.56 MHz is supplied to the upper electrode 214 from the high-frequency power source 216 for the upper electrode while evacuating with a pump (not shown) and maintaining the inside of the vacuum vessel 211 at a predetermined pressure. Further, a high frequency power of 1 MHz is supplied from the lower electrode high frequency power source 217 to the lower electrode 212, thereby forming a silicon oxide film (SiO ₂ ) on the glass plate 213.

  The inter-electrode distance 218 from the shower head 215 to the lower electrode 212 is preferably about 10 mm to 50 mm. The thickness of the dielectric layer is 5 μm to 10 μm.

  Thus, when the first dielectric layer 81 is formed using the plasma CVD apparatus 200, a silicon oxide film with high purity can be easily obtained, the relative dielectric constant is as low as 4 to 5, and the withstand voltage is high. A dielectric layer is obtained.

The second dielectric layer 82 on the first dielectric layer 81 formed by this plasma CVD method is formed by baking glass paste. The dielectric glass material used as this glass paste is comprised from the following material composition. That is, zinc oxide (ZnO) 25 wt% to 40 wt%, boron oxide (B ₂ O ₃ ) 35 wt% to 60 wt%, silicon oxide (SiO ₂ ) 5 wt% to 10 wt%, aluminum oxide (Al ₂ O ₃ ) is contained in an amount of 0.1 wt% to 5 wt%, and an alkali metal oxide is contained in an amount of 2 wt% to 10 wt%.

  A dielectric glass frit is produced by pulverizing a dielectric glass material having such a composition with a wet jet mill or a ball mill so that the average particle diameter is 0.5 μm to 2.5 μm. Next, 55% by weight to 70% by weight of the dielectric glass frit and 30% by weight to 45% by weight of the binder component are kneaded with three rolls to form a second dielectric layer paste for die coating or printing. Make it. The binder component is ethyl cellulose, or terpineol containing 1% to 20% by weight of acrylic resin, or butyl carbitol acetate. In addition, dioctyl phthalate, dibutyl phthalate, triphenyl phosphate and tributyl phosphate are added to the paste as needed, and glycerol monooleate, sorbitan sesquioleate, homogenol (Kao Corporation) as a dispersant. The product name), phosphoric esters of alkylallyl groups, and the like may be added to improve printability.

  The second dielectric layer paste is printed on the first dielectric layer 81 by a screen printing method or a die coating method and dried, and then fired at a temperature of 550 ° C. to 600 ° C. to a thickness of 10 μm. A second dielectric layer 82 of ˜15 μm is formed.

  In this way, the dielectric layer 18 has a configuration in which the first dielectric layer 81 and the second dielectric layer 82 are stacked, and the first dielectric layer 81 is formed by the plasma CVD method, and the second dielectric layer 82 is formed by baking glass paste. In the dielectric layer formed by firing glass paste, an alkali metal oxide is included in some degree as in the embodiment of the present invention, which reacts with the bus electrode to form a colloid, which causes coloring. Become. However, the dielectric layer 18 reacts with the bus electrode by sandwiching the first dielectric layer 81 formed by the plasma CVD method between the second dielectric layer 82 formed of glass paste and the bus electrode. There is nothing. As a result, the first dielectric layer 81 suppresses the reaction with the bus electrode, and the second dielectric layer 82 mainly functions to control the discharge current, thereby suppressing the reaction with the bus electrode at a low cost. Thus, the dielectric layer 18 in which coloring is prevented can be obtained.

  In this way, fine unevenness is formed on the surfaces of the first glass substrate and the first conductive film by the fine particle irradiation, and the edge curl of the first conductive film is removed. Therefore, even if a dielectric layer is formed on the surface of the first glass substrate or the like by using a vapor phase growth method such as a plasma CVD method, there are no minute irregularities and portions that are not formed, so that the dielectric is difficult to peel off. Become a layer. In addition, since the dielectric layer is formed by vapor deposition, a thin film having a high withstand voltage can be obtained, and the driving voltage can be lowered and a method for manufacturing a PDP excellent in luminous efficiency can be provided.

In the embodiment of the present invention, the method of forming the silicon oxide film (SiO ₂ ) as the dielectric layer has been described by the plasma CVD method. However, other chemical vapor deposition methods such as high temperature CVD and low temperature CVD are used. It may be formed. Alternatively, the silicon oxide film may be formed by sputtering or vacuum deposition, which are physical vapor deposition methods.

  Further, in the embodiment of the present invention, the bus electrode is described as being configured by the first bus electrode and the second bus electrode, but the bus electrode is configured by only one layer or by a plurality of layers. May be.

  As described above, the PDP manufacturing method of the present invention is useful as a PDP having excellent display quality because a dielectric layer having a high withstand voltage can be formed with improved adhesion.

The perspective view which shows the structure of PDP of embodiment of this invention Sectional drawing which shows the structure of the front plate of the PDP (A) Cross-sectional view after completion of first conductive film formation of PDP (b) Cross-sectional view after completion of fine particle irradiation of PDP (c) Cross-sectional view after completion of dielectric layer formation of PDP Front view of a sandblasting apparatus that performs fine particle irradiation in the manufacturing method of the PDP The figure explaining the surface roughness coefficient Ra of the front glass substrate and display electrode of the PDP Sectional drawing of the edge part shape of the 2nd bus electrode of the PDP Schematic sectional view of a plasma CVD apparatus for forming a dielectric layer in the method for manufacturing the PDP

Explanation of symbols

12 Front plate 13 Front glass substrate 14 Scan electrode 14a, 15a Transparent electrode 14b, 15b Metal electrode 15 Sustain electrode 16 Display electrode 17 Black stripe (light shielding layer)
18 Dielectric layer 19 Protective layer 20 Back plate 21 Back glass substrate 22 Address electrode 23 Base dielectric layer 24 Partition 25 Phosphor layer 26 Discharge space 30 Edge curl 31 Roughened surface 41b, 51b First bus electrodes 42b, 52b Second bus electrode 60 Sand blasting device 61 Nozzle 62 Cabinet 63 Classification tank 64 Dust collector 65 Particulate tank 66 Duct 67 Particulate material adjustment valve 68 Dump valve 69 Supply unit 70 Carrying in / out port 71 Slide cylinder 72 Carrying table 73 Work mounting tool 74 Loader / loader Unloader 75, 76 pipe 77 screw conveyor 78 basket conveyor 81 first dielectric layer 82 second dielectric layer 85 joint 86 particulate supply pipe 87 hopper 88 fan motor 90 chamfered surface 100 PDP
200 Plasma CVD apparatus 211 Vacuum vessel 212 Lower electrode 213 Glass plate 214 Upper electrode 215 Shower head 216 High frequency power source for upper electrode 217 High frequency power source for lower electrode 218 Distance between electrodes

Claims (4)

A pattern of a first conductive film is formed on a first glass substrate, and accelerated fine particles having a particle size of 1 μm to 20 μm are irradiated to the first glass substrate and the first conductive film. Then, a concavo-convex shape is formed on the surfaces of the first glass substrate and the first conductive film, and a vapor phase growth method is formed on the first conductive film and the first glass substrate on which the concavo-convex shape is formed. A dielectric layer is formed using a first substrate to form a first substrate, and is disposed opposite to the second substrate on which the second conductive film, the partition walls, and the phosphor layer are formed on the second glass substrate. A method for manufacturing a plasma display panel. The first conductive film is characterized in that after forming a transparent electrode film, an electrode glass paste is baked and patterned by photolithography to form a bus electrode having higher conductivity than the transparent electrode film. 2. A method for producing a plasma display panel according to 1. The bus electrode forms a first bus electrode having a lower visible light transmittance than the transparent electrode film on the transparent electrode film, and a visible light reflectance from the first bus electrode on the first bus electrode. 3. The method of manufacturing a plasma display panel according to claim 2, wherein a second bus electrode having a high height is formed. The dielectric layer is formed by forming a first dielectric layer by the vapor phase growth method, and firing a dielectric glass paste on the first dielectric layer to form a second dielectric layer. The method for manufacturing a plasma display panel according to any one of claims 1 to 3, wherein:

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