JP4589743B2 - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device the electric connection of which to a printed wiring board can be stabilized. <P>SOLUTION: The semiconductor device 1 disclosed herein is provided with a mount board 2, a circuit board 4 mounted on the mount board 2, and a semiconductor chip 6 mounted on the circuit board 4. The lower side 2b of the mount board 2 includes a lower side region 12 wherein no external terminal 10 is formed, and the circuit board 4 is mounted on an upper side region 14 located just above the lower side region 12 in an upper side 2a of the mount board 2. <P>COPYRIGHT: (C)2006,JPO&amp;NCIPI

Description

  The present invention relates to a semiconductor device.

  As a conventional semiconductor device, for example, there is one described in Patent Document 1. A semiconductor device described in this document is shown in FIG. The semiconductor device 100 includes a mounting substrate 102 and a semiconductor chip 104 that is flip-chip mounted on an upper surface 102 a of the mounting substrate 102. The semiconductor chip 104 includes a terminal 106 and a sheet layer 108 at a predetermined position on the element formation surface 104a. A flexible lead 110 is installed between the terminal 106 and the sheet layer 108. The flexible lead 110 and the wiring of the mounting substrate 102 are electrically connected by solder balls 112, and the semiconductor chip 104 is electrically connected to the wiring of the mounting substrate 102. Thus, the semiconductor chip 104 mounted on the upper surface 102a of the mounting substrate 102 is molded with the encapsulating resin 116, and the semiconductor device 100 is formed. The semiconductor device 100 includes an external terminal 114 on the lower surface 102 b of the mounting substrate 102 and can be mounted on the printed wiring board 200.

As described above, the semiconductor device 100 includes the flexible sheet layer 108 and the flexible lead 110 between the semiconductor chip 104 and the solder ball 112, and the solder ball 112 is movable with respect to the semiconductor chip 104. It is comprised so that. The solder balls 112 are connected to the mounting substrate 102, and the external terminals 114 of the mounting substrate 102 can move in a direction parallel to the semiconductor chip 104. Therefore, even if the semiconductor chip 104 and the printed wiring board 200 are thermally expanded, the difference in thermal expansion is absorbed by the sheet layer 108 and the flexible lead 110.
JP-T 6-504408

  According to such a semiconductor device described in Patent Document 1, the influence due to the difference in thermal expansion between the semiconductor chip 104 and the printed wiring board 200 is reduced. Therefore, compared with the conventional semiconductor device, the electrical connection between the semiconductor device and the printed wiring board can be stabilized.

  However, the difference in coefficient of thermal expansion between the semiconductor chip 104 and the printed wiring board 200 is very large. The thermal expansion coefficient of the semiconductor chip 104 is about 3 ppm / ° C., whereas the thermal expansion coefficient of the printed wiring board 200 is about 16 ppm / ° C. Therefore, after being mounted on the printed circuit board 200, the thermal expansion and contraction are repeated due to the temperature change during use, so that a crack is formed at the connection portion between the flexible lead 110 and the solder ball 112 located under the semiconductor chip 104. It is easy to enter, and the semiconductor device 100 and the printed wiring board 200 are electrically disconnected. Therefore, there has been a demand for a semiconductor device in which the electrical connection between the semiconductor device and the printed wiring board is stable.

According to the present invention, it comprises a mounting substrate, a circuit substrate mounted on the mounting substrate, and a semiconductor chip mounted on the circuit substrate,
The mounting board has a lower surface area in which external terminals are not formed on the lower surface,
The circuit board is mounted on an upper surface area located immediately above the lower surface area on the upper surface of the mounting substrate ,
The semiconductor chip is provided with a semiconductor device that covers at least a part of the upper surface region and has an overhanging portion that exceeds an outer peripheral edge of the upper surface region .

  In this semiconductor device, a circuit board is mounted on a mounting substrate immediately above a lower surface area where no external terminal is formed, and a semiconductor chip is mounted on the circuit board. In other words, the external terminal is formed in the lower surface area where the circuit board or the semiconductor chip is not disposed close to the mounting board. In such a region, the strain stress due to the difference between the thermal expansion coefficient of the circuit board or the semiconductor chip and the thermal expansion coefficient of the mounting board is reduced, and damage to the external terminals due to the strain stress can be prevented. . Therefore, by forming the external terminal in such a region, the electrical connection between the semiconductor device and the printed wiring board can be stably maintained.

  According to the present invention, on the upper surface of the mounting substrate, the circuit board is mounted on the upper surface region located immediately above the lower surface region where the external terminals are not formed, and the semiconductor chip is mounted on the circuit substrate. A semiconductor device capable of stably maintaining the electrical connection between the device and the printed wiring board is realized.

  A semiconductor device according to the present invention includes a mounting board, a circuit board mounted on the mounting board, and a semiconductor chip mounted on the circuit board. The mounting board has a lower surface area in which external terminals are not formed on the lower surface, and the circuit board is mounted on an upper surface area located immediately above the area on the upper surface of the mounting board.

  Here, the circuit board includes not only a substrate on which an integrated circuit is formed but also a plate-like member on which no integrated circuit is formed. As this circuit board, a spacer or a semiconductor chip is used.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. The case where a spacer is used as the circuit board will be described as a first embodiment, and the case where a semiconductor chip is used as a circuit board will be described as a second embodiment. In all the drawings, the same components are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

  FIG. 1 is a schematic cross-sectional view showing a first embodiment of a semiconductor device according to the present invention.

  As shown in FIG. 1, the semiconductor device 1 includes a mounting substrate 2, a spacer 4 mounted on the upper surface 2a of the mounting substrate 2, a first semiconductor chip 6 mounted on the upper surface 4a of the spacer 4, and a first And a second semiconductor chip 8 mounted on the element formation surface 6a of the semiconductor chip 6. The mounting board 2 has an external terminal 10 as a connecting member used when mounted on a printed wiring board on the lower surface 2b.

  FIG. 2 shows a schematic view seen from the lower surface 2 b side of the mounting substrate 2. As shown in FIG. 2, the lower surface 2 b of the mounting substrate 2 has a lower surface region 12 surrounded by the external terminals 10 where the external terminals 10 are not formed. In FIG. 2, the lower surface region 12 is a region where the external terminals 10 are not formed. However, it does not exclude that the external terminal 10 is a region where a predetermined number of external terminals are formed at a low density. . Moreover, in FIG. 2, although the shape of the lower surface area | region 12 shows a substantially square shape, the shape is not specifically limited.

  The spacer 4 is mounted by a chip mount adhesive 16 on the upper surface region 14 located immediately above the lower surface region 12 on the upper surface 2 a of the mounting substrate 2. The upper surface region 14 has substantially the same area and shape as the lower surface region 12. A first semiconductor chip 6 is mounted on the upper surface 4 a of the spacer 4 by a chip mount adhesive 16 so that the element formation surface 6 a faces upward. By using the spacer 4, it is not necessary to consider the shape and area of each other in the lower surface region 12 and the first semiconductor chip 6, and the area of the lower surface region 12 is the lower surface (back surface) of the first semiconductor chip 6. ) A semiconductor chip can be mounted even if the area is smaller than 6b.

  The spacer 4 is preferably mounted so as to be within the upper surface region 14. That is, the external terminal 10 is not formed in the area of the lower surface located immediately below the area where the spacer 4 is mounted. In other words, the external terminal is formed in a region where the spacer or the semiconductor chip is not disposed close to the mounting substrate. In such a region, the strain stress due to the difference between the thermal expansion coefficient of the spacer or the semiconductor chip and the thermal expansion coefficient of the mounting substrate is reduced, and damage to the external terminals due to the strain stress can be prevented. Therefore, by forming the external terminal in such a region, the electrical connection between the semiconductor device and the printed wiring board can be stably maintained.

  In the spacer 4, the area of the lower surface 4 b is preferably smaller than the area of the lower surface (back surface) 6 b of the first semiconductor chip 6. Thereby, the area of the upper surface region 14 (lower surface region 12) can be made smaller than the area of the lower surface 6b of the first semiconductor chip 6.

  On the other hand, in the conventional semiconductor device, the first semiconductor chip 6 is directly mounted on the mounting substrate 2. In this case, in order to obtain the effect as in the present application, the area of the lower surface region 12 needs to be equal to or larger than the area of the lower surface 6 b of the first semiconductor chip 6. However, if the lower surface region 12 is widened, the number of external terminals decreases, making it difficult to mount the semiconductor device 1 on a printed wiring board using many external terminals. However, if the area of the lower surface 4b of the spacer 4 is made smaller than the area of the lower surface 6b of the first semiconductor chip 6, the area of the lower surface region 12 can be made smaller than the area of the lower surface 6b. The number can be increased as compared with the conventional semiconductor device. Therefore, the semiconductor device 1 can be mounted on the printed wiring board using many external terminals.

  The spacer 4 may be mounted beyond the upper surface region 14 as long as the effects of the present invention are not impaired. Moreover, the spacer 4 has heat resistance against heat at the time of molding with a sealing resin and heat at the time of actual use. Specifically, silicon etc. are mentioned.

  A first semiconductor chip 6 is further mounted on the upper surface 4 a of the spacer 4. The first semiconductor chip 6 covers at least a part of the upper surface region 14 and has an overhanging portion exceeding the outer peripheral edge 14 a of the upper surface region 14. Such a size relationship between the first semiconductor chip 6 and the upper surface region 14 will be described with reference to FIG.

  FIG. 3 is a schematic perspective view seen from the upper surface 2 a side, in a state where the first semiconductor chip 6 is placed on the upper surface 2 a of the mounting substrate 2 so as to cover the upper surface region 14. As shown in FIG. 3A, the first semiconductor chip 6 has an overhanging portion 17 that extends beyond the outer peripheral edge 14 a of the upper surface region 14. In addition, for example, the positional relationship as shown in FIG. That is, the first semiconductor chip 6 has such a size that an overhanging portion 17 that exceeds the outer peripheral edge 14 a of the upper surface region 14 is generated no matter how the first semiconductor chip 6 is placed so as to cover the upper surface region 14. That's it.

  In the conventional semiconductor device, the semiconductor chip is directly mounted on the upper surface of the mounting substrate. Therefore, even if the lower surface of the mounting substrate has a lower surface area where no external terminal is provided, when the first semiconductor chip 6 having such a size is directly mounted on the mounting substrate, A semiconductor chip exists immediately above the external terminal. Therefore, as described above, there is a possibility that the semiconductor device and the printed wiring board are electrically disconnected.

  In contrast, in the present application, the first semiconductor chip 6 having such a size is mounted on the mounting substrate 2 via the spacer 5. Further, the external terminal 10 is not formed in the lower surface region 12 located immediately below the upper surface region 14 on which the spacer 5 is mounted. In other words, the external terminal is formed in a region where the spacer 5 or the first semiconductor chip 6 is not disposed close to the mounting substrate 2. In such a region, the strain stress resulting from the difference between the thermal expansion coefficient of the spacer or the semiconductor chip and the thermal expansion coefficient of the mounting substrate is reduced, and damage to the external terminals due to the strain stress can be prevented. Therefore, by forming the external terminal in such a region, the electrical connection between the semiconductor device and the printed wiring board can be stably maintained.

  A second semiconductor chip 8 is further mounted on the element formation surface 6 a of the first semiconductor chip 6 by a chip mount adhesive 16 so that the element formation surface 8 a is on the upper side. As the chip mount adhesive 16, it is preferable to use an insulating paste from the viewpoint of circuit protection.

  The first semiconductor chip 6 and the wiring of the mounting substrate 2 are formed by bonding a bonding pad 18 formed on the element forming surface 6a of the semiconductor chip 6 and a bonding pad (not shown) on the upper surface 2a of the mounting substrate 2 to each other. By connecting with the wire 20, it is electrically connected. On the other hand, the wiring of the second semiconductor chip 8 and the mounting substrate 2 includes a bonding pad 18 formed on the element formation surface 8a of the semiconductor chip 8 and a bonding pad (not shown) on the upper surface 2a of the mounting substrate 2. By connecting with the bonding wire 20, they are electrically connected.

  The first semiconductor chip 6 and the second semiconductor chip 8 stacked on the upper surface 2a of the substrate 2 are sealed with an encapsulating resin 22 to form the semiconductor device 1 of the present invention.

  As shown in FIG. 4, the semiconductor device according to the present invention may be configured to have two lower surface regions 12 where the external terminals 10 are not formed on the lower surface 2 b of the mounting substrate 2. Moreover, it is not limited to the aspect of FIG. 1 and FIG. 4, It is good also as a structure which has the lower surface area | region 12 3 or more places.

  Hereinafter, a second embodiment of the semiconductor device 1 according to the present invention will be described. Since only the circuit board is different from the first embodiment, description of other parts is omitted. In the second embodiment, a semiconductor chip on which an integrated circuit is formed is used as a circuit board.

  FIG. 5 is a sectional view showing a second embodiment of the semiconductor device according to the present invention.

  As shown in FIG. 5, the semiconductor device 1 includes a mounting substrate 2, a semiconductor chip 5, a first semiconductor chip 6, and a second semiconductor chip 8 that are stacked in order. The semiconductor chip 5 is flip-chip mounted on the upper surface 2a of the mounting substrate 2 with bumps 5c so that the element formation surface 5a is on the mounting substrate 2 side. The first semiconductor chip 6 is mounted on the lower surface (back surface) 5 b of the semiconductor chip 5 with a chip mount adhesive 16.

  The semiconductor chip 5 is fixed by a chip mount adhesive 16 in the upper surface region 14 located immediately above the lower surface region 12 on the upper surface 2 a of the mounting substrate 2. As in the first embodiment, the semiconductor chip 5 is preferably mounted so as to be within the upper surface region 14, and the area of the element formation surface 5 a (lower surface 5 b in FIG. 6) is the first area. The area of the lower surface (back surface) 6b of the semiconductor chip 6 is also preferably smaller. Thereby, the same effect as the first embodiment can be obtained.

  In a conventional semiconductor device, when a plurality of semiconductor chips having different areas are stacked, the semiconductor chips are mounted on a mounting substrate from a semiconductor chip having a large area. In this case, in order to obtain the effect as described in the present application, it is necessary to provide a lower surface area where the external terminals 10 are not formed on the lower surface 2b of the mounting substrate 2 located immediately below the semiconductor chip. However, when a semiconductor chip having a large area is directly mounted on a mounting board, the number of external terminals formed on the lower surface of the mounting board is reduced, and thus it is difficult to mount a semiconductor device using many external terminals. become. On the other hand, in the present application, even if the first semiconductor chip 6 has a portion 17 protruding outward from the outer peripheral edge 14 a of the lower surface region 14, many external terminals are provided via the semiconductor chip 5. It can be mounted on the mounting board 2 having Therefore, the electrical connection between the semiconductor device and the printed wiring board can be stably maintained.

  On the other hand, as shown in FIG. 6, the semiconductor chip 5 may be mounted with a chip mount adhesive 16 on the upper surface region 14 positioned immediately above the lower surface region 12 on the upper surface 2 a of the mounting substrate 2. In this case, the first semiconductor chip 6 is stacked on the element formation surface 5 a via the interlayer connection member 24. In the semiconductor chip 5, bonding wires 20 for electrically connecting to the wiring of the mounting substrate 2 are connected to the bonding pads 18 on the element formation surface 5 a. Therefore, by using the interlayer connection member 24, the semiconductor chip 5 and the first semiconductor chip 6 can be separated from each other by a predetermined distance so as not to contact the bonding wire 20.

  As the interlayer connection member 24, an insulating paste that can be formed into a thick film, a sheet-type chip mount material, a silicon spacer, or the like can be used.

  The semiconductor chip 5 may be mounted beyond the upper surface region 14 as long as the effects of the present invention are not impaired. Also in this embodiment, a configuration in which a plurality of lower surface regions 12 are provided may be used, as in the first embodiment.

  As mentioned above, although embodiment of this invention was described with reference to drawings, these are the illustrations of this invention, Various structures other than the above are also employable.

  For example, in the above description, the example in which the first semiconductor chip 6 and the second semiconductor chip 8 are laminated on the circuit board (spacer 4 and semiconductor chip 5) has been described. However, the present invention is not limited to this. Instead, the semiconductor chip may have one or more layers.

FIG. 1 is a schematic cross-sectional view showing a first embodiment in a semiconductor device of the present invention. FIG. 2 is a schematic view of the semiconductor device as viewed from the lower surface side of the mounting substrate. 3A and 3B are schematic perspective views seen from the upper surface 2a side of the mounting substrate 2. FIG. FIG. 4 is a schematic cross-sectional view showing the first embodiment in the semiconductor device of the present invention. FIG. 5 is a schematic cross-sectional view showing a second embodiment in the semiconductor device of the present invention. FIG. 6 is a schematic cross-sectional view showing another example of the second embodiment in the semiconductor device of the present invention. FIG. 7 is a schematic cross-sectional view of a conventional semiconductor device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Mounting board 2a Upper surface 2b Lower surface 4 Spacer 4a Upper surface 5 Semiconductor chip 5a Element formation surface 5b Lower surface 6 First semiconductor chip 6a Element formation surface 6b Lower surface 8 Second semiconductor chip 8a Element formation surface 10 External terminal 12 Lower surface Region 12a Outer peripheral edge 14 Upper surface region 16 Chip mount adhesive 17 Overhang portion 18 Bonding pad 20 Bonding wire 22 Encapsulating resin 100 Semiconductor device 102 Mounting substrate 102a Upper surface 104 Semiconductor chip 104a Element formation surface 106 Terminal 108 Sheet layer 110 Flexible lead 112 Solder Ball 114 External terminal 116 Encapsulated resin 200 Printed wiring board

Claims (7)

A mounting board, a circuit board mounted on the mounting board, and a semiconductor chip mounted on the circuit board;
The mounting board has a lower surface area in which external terminals are not formed on the lower surface,
The circuit board is mounted on an upper surface area located immediately above the lower surface area on the upper surface of the mounting substrate ,
The semiconductor device has a protruding portion that covers at least a part of the upper surface region and extends beyond an outer peripheral edge of the upper surface region . A mounting board, a circuit board mounted on the mounting board, and a semiconductor chip mounted on the circuit board;
The mounting board has a lower surface area in which external terminals are not formed on the lower surface,
The circuit board is mounted on an upper surface area located immediately above the lower surface area on the upper surface of the mounting substrate,
An area of a lower surface of the circuit board is smaller than an area of a lower surface of the semiconductor chip. A mounting board, a circuit board mounted on the mounting board, and a semiconductor chip mounted on the circuit board;
The mounting board has a lower surface area in which external terminals are not formed on the lower surface,
The semiconductor device according to claim 1, wherein the circuit board is mounted in an upper surface region located immediately above the lower surface region on the upper surface of the mounting substrate. The semiconductor device according to claim 1, wherein the circuit board is a spacer. A mounting board, a circuit board mounted on the mounting board, and a semiconductor chip mounted on the circuit board;
The mounting board has a lower surface area in which external terminals are not formed on the lower surface,
The circuit board is mounted on an upper surface area located immediately above the lower surface area on the upper surface of the mounting substrate,
2. The semiconductor device according to claim 1, wherein the circuit board has a device formation surface, and is a semiconductor chip mounted on the mounting substrate such that the device formation surface is on the mounting substrate side. The said circuit board is a semiconductor chip mounted on the said mounting board | substrate so that the back surface located on the opposite side to the said element formation surface may become the said mounting board | substrate side. Semiconductor device. The semiconductor device according to claim 1, wherein a plurality of the lower surface regions are provided.

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