JP4561401B2 - Data conversion apparatus and method, data reverse conversion apparatus and method, information processing system, recording medium, and program - Google Patents

Description

  The present invention relates to a data conversion device and method, a data reverse conversion device and method, an information processing system and method, a recording medium, and a program, and particularly causes inconveniences such as an image not being displayed or an increase in circuit scale. In the second and subsequent encodings and decoding, the data conversion apparatus and method, and the data reverse conversion apparatus, which can prevent illegal copying using an analog image signal by remarkably degrading the image data And a method, an information processing system and method, a recording medium, and a program.

  FIG. 1 shows a configuration example of a conventional image display system. This image display system includes a playback device 1 and a display device 2.

  The playback device 1 includes a decoding unit 11 and a D / A conversion unit 12. The decoding unit 11 decodes an encoded digital image signal reproduced from a recording medium such as an optical disk (not shown), and supplies a digital image signal Vdg0 obtained as a result to the D / A conversion unit 12. The D / A conversion unit 12 performs D / A (Digital-to-Analog) conversion on the digital image signal Vdg0 and outputs the resulting analog image signal Van to the outside. That is, the analog image signal Van is output from the playback device 1 and supplied to the display device 2.

  The display device 2 is configured by, for example, a CRT (Cathode-Ray Tube) display, an LCD (Liquid Crystal Display), or the like, and displays an image corresponding to the analog image signal Van supplied from the playback device 1.

  Conventionally, there is an encoding apparatus 3 including an A / D conversion unit 21, an encoding unit 22, and a recording unit 23 as shown in FIG. Using this encoding device 3 and the analog image signal Van output from the reproduction device 1 may cause unauthorized copying.

  That is, when the analog image signal Van output from the reproduction device 1 is input to the encoding device 3, the A / D converter 21 performs A / D (Analog-to-Digital) conversion of the analog image signal Van. Then, the digital image signal Vdg ′ obtained as a result is supplied to the encoding unit 22. The encoding unit 22 encodes the digital image signal Vdg ′ and supplies the encoded digital image signal Vcd ′ obtained as a result to the recording unit 23. The recording unit 23 records the encoded digital image signal Vcd ′ on a recording medium such as an optical disk (not shown). In this way, illegal copying is performed.

  Therefore, in Patent Document 1, in order to prevent such illegal copying using the analog image signal Van, the copyright-protected analog image signal Van is output after being scrambled or output. The method of prohibiting is disclosed.

  In Patent Document 2, a noise information generation unit is provided in one or both of the compression side of the reproduction side and the recording side, and noise information that cannot be identified at the time of image reproduction by digital processing is digitally recorded. A technique has been disclosed in which copying itself is possible by embedding in an image signal, but if copying is repeated a plurality of times, the image is significantly deteriorated, thereby substantially limiting the number of copies.

  However, in the method of Patent Document 1, as described above, the analog image signal Van output from the playback apparatus 1 is scrambled and output, or the output thereof is prohibited. On the other hand, there is a problem that a normal image is not displayed on the display device 2.

  Further, the method of Patent Document 2 has a problem in that it is essential to install a noise information generation unit and a circuit for embedding the noise information generation unit on the reproduction side or the recording side, and the circuit scale increases. .

  That is, in the methods of Patent Document 1 and Patent Document 2 and the like, illegal copy prevention using the analog image signal Van is attempted, but as a side effect, an appropriate image is not displayed on the display device 2 or the circuit scale is increased. There is a problem that inconvenience such as an increase in the number of occurrences occurs.

  Therefore, a method for preventing unauthorized copying using an analog image signal without causing inconvenience such as an image not being displayed or an increase in circuit scale has been proposed by the present applicant (for example, (See Patent Document 3).

  Therefore, a method for preventing unauthorized copying using an analog image signal without causing inconvenience such as an image not being displayed or an increase in circuit scale has been proposed by the present applicant (for example, (See Patent Document 3).

That is, the technique of Patent Document 3 focuses on the phase shift of a digital image signal obtained by A / D conversion of an analog image signal, and performs encoding on the digital image signal focusing on the phase shift. Thus, it is possible to prevent copying while maintaining a good quality without degrading the quality of the image before copying, thereby preventing illegal copying using an analog image signal.
JP 2001-245270 A Japanese Patent Laid-Open No. 10-289522 Japanese Patent Application Laid-Open No. 2004-289685

  As described above, it is possible to prevent unauthorized copying by applying the method of Patent Document 3. However, in recent years when the distribution of digital contents has become common, in addition to Patent Document 3, a proposal for another technique for preventing unauthorized copying has been requested.

  The present invention has been made in view of such a situation, and image data is not obtained in the second and subsequent encodings without causing inconveniences such as an image not being displayed and an increase in circuit scale. In order to prevent illegal copying using an analog image signal, the technique different from the technique of Patent Document 3 is proposed.

  In the data conversion device according to the first aspect of the present invention, the first access unit of the input data composed of at least the first access unit and the second access unit is converted into one or more first blocks. A setting unit for dividing, and each of the one or more first blocks set by the setting unit are sequentially set as processing targets one by one, and the second block for the first block to be processed Motion vector estimation means for estimating the motion vector for the access unit; and the motion vector for the first block to be processed from the position of the first block to be processed in the second access unit. Are extracted as analysis regions, and the extracted second blocks are divided into a plurality of minutes. Analysis that generates a basis for converting the expression format of the first block to be processed individually for each analysis region by performing principal component analysis on a plurality of analysis data by dividing the data into data Means, and conversion means for generating output data obtained by converting the expression format of the first block to be processed using a predetermined one of the generated bases for each analysis region. It is characterized by.

The output data and the base used by the conversion means when the output data is generated may be associated with each other and superimposed, and output means for outputting the resulting data may be further provided.

The conversion means can generate the output data by converting the expression format of each of the plurality of small blocks constituting the first block to be processed.

A difference block generation unit that generates a difference block by calculating a difference between the first block to be processed and the second block is further provided, and the conversion unit includes the difference block to be processed. The output data can be generated by converting the expression format of each of the plurality of constituent small blocks.

Analog distortion generating means for generating analog distortion to the data may be further provided, and data to which analog noise is added by the analog distortion generating means may be input to the setting means as the input data.

  A data conversion method according to a first aspect of the present invention is a data conversion method for a data conversion apparatus that converts at least a part of an expression format of input data composed of at least a first access unit and a second access unit. A setting step of dividing the first access unit into one or more first blocks and one or more of the first blocks set by the processing of the setting step are set as 1 to be processed. A motion vector estimating step of sequentially setting the motion vectors for the second access unit for the first block to be processed, and the processing target in the second access unit. From the position of the first block, the amount corresponding to the motion vector for the first block to be processed Extracting the separated second blocks as analysis areas, dividing the extracted second blocks into a plurality of analysis data, and performing a principal component analysis on the plurality of analysis data, Using an analysis step for individually generating a base for converting the expression format of the first block to be processed for each analysis region, and a predetermined one of the generated bases for each analysis region A conversion step of generating output data obtained by converting the expression format of the first block to be processed.

  The recording medium according to the first aspect of the present invention provides a computer for controlling an apparatus that converts an expression format of at least a part of input data composed of at least a first access unit and a second access unit. A setting step of dividing the first access unit into one or more first blocks and one or more of the first blocks set by the processing of the setting step are sequentially set as processing targets one by one. , A motion vector estimation step for estimating the motion vector for the second access unit for the first block to be processed, and the first block to be processed in the second access unit. The position is separated from the position by an amount corresponding to the motion vector for the first block to be processed. The second block is extracted as an analysis region, the extracted second block is divided into a plurality of analysis data, and a principal component analysis is performed on the plurality of analysis data. An analysis step for individually generating a basis for converting the expression format of one block for each analysis region, and using a predetermined one of the generated bases for each analysis region, the processing target A computer-readable recording medium recording a program for executing a process including a conversion step of generating output data obtained by converting the expression format of the first block.

A program according to a first aspect of the present invention provides a computer for controlling an apparatus that converts an expression format of at least a part of input data composed of at least a first access unit and a second access unit. A setting step for dividing one access unit into one or more first blocks, and one or more of the first blocks set by the processing of the setting step are sequentially set as processing targets one by one, A motion vector estimation step for estimating the motion vector for the second access unit for the first block to be processed; and a position of the first block to be processed in the second access unit. From the first block to be processed by a distance corresponding to the motion vector. The second block is extracted as an analysis region, the extracted second block is divided into a plurality of analysis data, and a principal component analysis for a plurality of the analysis data is performed, whereby the processing target An analysis step for individually generating a basis for converting the expression format of the first block for each analysis region, and using the predetermined one of the generated bases for each analysis region, the processing target And a conversion step of generating output data obtained by converting the expression format of the first block .

In the first aspect of the present invention, the first access unit is divided into one or more first blocks, and each of the one or more first blocks is sequentially set as a processing target one by one. The motion vector for the second access unit is estimated for the first block, and the motion vector for the first block to be processed is determined from the position of the first block to be processed in the second access unit. A second block separated by a corresponding amount is extracted as an analysis region, the extracted second block is divided into a plurality of analysis data, and a principal component analysis is performed on the plurality of analysis data. A base for converting the expression format of the first block to be processed is individually generated for each analysis region, and a predetermined one of the generated bases for each analysis region is generated. Using the output data representation format is converted in the first block to be processed is generated.

  In the data reverse conversion device according to the second aspect of the present invention, at least data composed of the first access unit and the second access unit is used as the original data, and the first block includes the first block. Is set to one or more, each of the set one or more first blocks is sequentially set as a processing target, and the movement of the first block to be processed with respect to the second access unit A vector is estimated, and a second block that is separated from the position of the first block to be processed in the second access unit by an amount corresponding to the motion vector is set as an analysis region, and the processing A basis for converting the representation format of the first block of interest divides the second block into a plurality of analysis data, and a plurality of previous data By performing principal component analysis on the analysis data, it is generated individually for each analysis region, and a predetermined one of the bases for each generated analysis region is used, and the first of the processing targets is used. Data inverse transformation in which converted data generated by converting the representation format of one block is input as at least a part of input data, in which data is superimposed in association with the base used at that time An apparatus for separating the converted data and the base from the input data, and expressing the converted data separated from the input data by the separating means using the separated base And inverse transform means for generating the first block by inverse transform.

  Instead of the base used when the conversion data is generated, data on which base generation information, which is information necessary for generating the base, is superimposed is at least a part of the input data. When the conversion data is generated, the separation means separates the conversion data and the base generation information and uses the separated base generation information. A base generation means for generating the base used may be further provided.

The converted data is obtained by dividing the first block into a plurality of small blocks, and the representation format of each of the small blocks is converted. The first block can be generated by inversely transforming the expression format using the base obtained by separation.

The conversion data includes a plurality of difference blocks that are differences between the second block of the second access unit and the first block that are separated by an amount corresponding to the motion vector of the first block. Are divided into small blocks, and the representation formats of the small blocks are converted, and the inverse transformation means includes the base obtained by separating the representation formats of the plurality of small blocks. The first block can be generated by performing inverse transformation using .

  The original data may have analog distortion.

  In the data reverse conversion method according to the second aspect of the present invention, data comprising at least a first access unit and a second access unit is used as original data, and a first block is received from the first access unit. Is set to one or more, each of the set one or more first blocks is sequentially set as a processing target, and the movement of the first block to be processed with respect to the second access unit A vector is estimated, and a second block that is separated from the position of the first block to be processed in the second access unit by an amount corresponding to the motion vector is set as an analysis region, and the processing A basis for converting the representation format of the first block of interest divides the second block into a plurality of analysis data, and a plurality of previous data By performing principal component analysis on the analysis data, it is generated individually for each analysis region, and a predetermined one of the bases for each generated analysis region is used, and the first of the processing targets is used. Data inverse transformation in which converted data generated by converting the representation format of one block is input as at least a part of input data, in which data is superimposed in association with the base used at that time A data inverse transformation method of the apparatus, wherein the separation step of separating the transformation data and the base from the input data, and the transformation data separated from the input data by the processing of the separation step, And an inverse transformation step of generating the first block by inversely transforming the expression format using a base.

  In the recording medium according to the second aspect of the present invention, at least data composed of the first access unit and the second access unit is used as original data, and the first block is 1 from the first access unit. Each of the set one or more first blocks is sequentially set as a processing target, and a motion vector for the second access unit for the first block to be processed is set. A second block that is estimated and is separated from the position of the first block to be processed in the second access unit by an amount corresponding to the motion vector is set as an analysis region, and the processing target A basis for converting the representation format of the first block divides the second block into a plurality of analysis data, and a plurality of the analysis data. Are generated individually for each analysis region, and a predetermined one of the generated bases for each analysis region is used, and the first of the processing targets is used. Controls a device in which the converted data generated by converting the representation format of the block is input as at least part of the input data, with the superimposed data associated with the base used at that time being superposed In the computer, a separation step for separating the conversion data and the base from the input data, and a representation format of the conversion data separated from the input data by the processing of the separation step using the separated base Is readable by a computer recording a program for executing a process including an inverse conversion step of generating the first block by inversely converting A Do recording medium.

  In the program according to the second aspect of the present invention, data including at least a first access unit and a second access unit is used as original data, and one or more first blocks are included from the first access unit. Each of the set one or more first blocks is sequentially set as a processing target, and a motion vector for the second access unit is estimated for the first block to be processed. A second block that is separated from the position of the first block to be processed in the second access unit by an amount corresponding to the motion vector is set as an analysis region, and the processing target is the second block A basis for converting the expression format of the first block divides the second block into a plurality of analysis data, and a plurality of the analysis The principal component analysis is performed on the data, and is generated individually for each analysis region, and a predetermined one of the generated bases for each analysis region is used, and the first of the processing targets is used. Controls a device in which converted data generated by converting the representation format of one block is input as at least a part of input data, in which superimposed data is associated with the base used at that time. A separation step of separating the conversion data and the base from the input data, and expressing the conversion data separated from the input data by the processing of the separation step using the separated base A program for executing a process including an inverse conversion step of generating the first block by inversely converting a format.

In the second aspect of the present invention, the converted data and the base are separated from the input data, and the separated converted data uses the separated base to inversely convert the expression format, thereby providing the first block. Is generated.

  An information processing system according to a third aspect of the present invention includes: a conversion unit that converts an expression format of image data; and an inverse conversion unit that inversely converts the expression format of the image data converted by the conversion unit. In the information processing system including, the conversion unit sequentially sets one or more of the first blocks set by the setting unit as processing targets one by one, and about the first block to be processed Motion vector estimation means for estimating the motion vector for the second access unit, and from the position of the first block to be processed in the second access unit, the first to be processed A second block separated by an amount corresponding to the motion vector for the block is extracted as an analysis region, and the extracted second block is extracted. The basis for converting the expression format of the first block to be processed is analyzed for each analysis region by performing principal component analysis on a plurality of analysis data. Conversion that generates output data obtained by converting the expression format of the first block to be processed using an analysis means that is individually generated and a predetermined one of the generated bases for each analysis region Means.

  In the third aspect of the present invention, in the conversion unit, the first access unit is divided into one or more first blocks, and each of the one or more first blocks is sequentially set as a processing target one by one. The motion vector for the second access unit is estimated for the first block to be processed, and the first block to be processed is determined from the position of the first block to be processed in the second access unit. A second block that is separated by an amount corresponding to the motion vector is extracted as an analysis region, and the extracted second block is divided into a plurality of analysis data, and the principal component analysis is performed on the plurality of analysis data. By performing the above, a base for converting the expression format of the first block to be processed is generated for each analysis region, and the base for each generated analysis region is generated. Chino using a predetermined one, output data representation format is converted in the first block to be processed is generated.

  An information processing system according to a fourth aspect of the present invention includes a conversion unit that converts an expression format of image data, and an inverse conversion unit that inversely converts the expression format of the image data converted by the conversion unit. In the information processing system including the first access, the conversion unit or the device other than the conversion unit uses at least the first access unit and the second access unit as the original data. From the unit, one or more first blocks are set, each of the set one or more first blocks is sequentially set as a processing target, and the first block of the processing target A motion vector for the second access unit is estimated and is the position of the first block to be processed in the second access unit. A second block that is separated by an amount corresponding to the motion vector is set as an analysis region, and a basis for converting the expression format of the first block to be processed is the second block. By dividing the analysis data into a plurality of analysis data and performing principal component analysis on the plurality of analysis data, a specific one of the bases generated for each analysis region is generated individually for each analysis region. The converted data generated by converting the expression format of the first block to be processed is superimposed on the input data in association with the base used at that time. Is input to the inverse transform unit as at least a part of the input data. The inverse transform unit separates the converted data and the base from the input data, and the separation unit determines whether the input data is the input data. The separated the converted data, by inversely converting the representation format by using the separated said base, and having an inverse transform means for generating the first block.

  In the fourth aspect of the present invention, the inverse transform unit separates the converted data and the base from the input data, and the separated converted data uses the separated base to inversely convert the expression format. A first block is generated.

  As described above, according to the present invention, encoding and decoding of image data can be performed. In particular, illegal copying using analog image signals can be achieved by significantly degrading image data in the second and subsequent encodings without causing inconveniences such as no longer displaying images or increasing the circuit scale. Can be prevented.

  Embodiments of the present invention will be described below. Correspondences between constituent elements described in the claims and specific examples in the embodiments of the present invention are exemplified as follows. This description is to confirm that specific examples supporting the invention described in the claims are described in the embodiments of the invention. Therefore, even if there are specific examples that are described in the embodiment of the invention but are not described here as corresponding to the configuration requirements, the specific examples are not included in the configuration. It does not mean that it does not correspond to a requirement. On the contrary, even if a specific example is described here as corresponding to a configuration requirement, this means that the specific example does not correspond to a configuration requirement other than the configuration requirement. not.

  Further, this description does not mean that all the inventions corresponding to the specific examples described in the embodiments of the invention are described in the claims. In other words, this description is an invention corresponding to the specific example described in the embodiment of the invention, and the existence of an invention not described in the claims of this application, that is, in the future, a divisional application will be made. It does not deny the existence of an invention that is added by correction.

  The data conversion device according to the first aspect of the present invention provides:
  Setting that divides the first access unit of input data composed of at least a first access unit and a second access unit into one or more first blocks (for example, large block BL in FIG. 4). Means (for example, the large block unit 122 in FIG. 3 or FIG. 13);
  Each of the one or more first blocks set by the setting unit is sequentially set as a processing target one by one, and the motion vector for the second access unit for the first block to be processed A motion vector estimation means (for example, the motion vector detection unit 123 in FIG. 3 or FIG. 13),
  In the second access unit, a second block (for example, separated from the position of the first block to be processed by an amount corresponding to the motion vector for the first block to be processed) 7 is extracted as an analysis region, the extracted second block is divided into a plurality of analysis data, and a principal component analysis is performed on the plurality of analysis data. Then, an analysis unit (for example, an orthogonal transform base generation unit 125 in FIG. 3 or FIG. 13) that individually generates a base for converting the expression format of the first block to be processed for each analysis region;
  Conversion means (for example, FIG. 3 or FIG. 3) that generates output data obtained by converting the expression format of the first block to be processed using a predetermined one of the generated bases for each analysis region. 13 orthogonal transform coding units 128) and
  It is characterized by providing.

  The output data and the base used by the conversion means when the output data is generated are superimposed in association with each other, and output means for outputting the resulting data (for example, the superposition in FIG. 3 or FIG. 13). Unit 129 and output unit 132).

  A difference block generating means for generating a difference block (for example, a residual large block BLD in FIG. 8) by calculating a difference between the first block and the second block to be processed;
  The conversion means generates the output data by converting each representation format of a plurality of small blocks (for example, the small block BD in FIG. 8) constituting the difference block to be processed.

  Analog distortion generating means (for example, an analog distortion adding unit 451 in FIG. 21) that generates analog distortion with respect to data is further provided.
  Data to which analog noise is added by the analog distortion generating means is input to the setting means as the input data.

  The data reverse conversion device according to the second aspect of the present invention provides:
    The data composed of at least the first access unit and the second access unit is the original data,
  One or more first blocks are set from the first access unit,
  Each of the set one or more first blocks is sequentially set as a processing target, and a motion vector for the second access unit is estimated for the first block to be processed,
  A second block that is separated from the position of the first block to be processed by an amount corresponding to the motion vector in the second access unit is set as an analysis region, and the second block to be processed is The basis for converting the expression format of one block divides the second block into a plurality of analysis data, and performs principal component analysis on the plurality of analysis data, so that each analysis area individually Generated on
  The conversion data generated by converting the expression format of the first block to be processed using the predetermined one of the bases for each generated analysis region is used at that time. A data inverse conversion device in which data superimposed in association with a base is input as at least part of input data,
  Separating means for separating the converted data and the base from the input data (for example, the data decomposing unit 172 in FIG. 11 or FIG. 15),
  Inverse conversion means for generating the first block by inversely transforming the converted data separated from the input data by the separation means using the separated base (for example, FIG. 11). Or the inverse orthogonal transform decoding unit 175) of FIG.
  It is characterized by providing.

  Instead of the base used when the conversion data is generated, data on which base generation information, which is information necessary for generating the base, is superimposed is at least a part of the input data. Is entered as
  The separation means separates the conversion data and the base generation information,
  Using the separated base generation information, base generation means for generating the base used when the conversion data is generated (for example, the motion vector small block forming unit 173 in FIG. 11 or FIG. 15). And an orthogonal transform base generation unit 174).

  Next, embodiments of the present invention will be described with reference to the drawings.

  FIG. 2 shows a configuration example of an image processing system to which the present invention is applied.

  In the image processing system of FIG. 2, the same reference numerals are given to the portions corresponding to those of the conventional image display system of FIG. 1, and the description thereof will be omitted as appropriate. However, the code of the analog image signal output from the reproducing apparatus 1 is Van in FIG. 1 but is Van1 in FIG. This is for distinguishing from an analog image signal Van2 output from a D / A converter 55 described later.

  In the example of FIG. 2, the image processing system includes a playback device 1, a display device 2, and a recording / playback device 31. That is, a system in which the recording / reproducing apparatus 31 is added to the conventional image display system of FIG. 1 is an embodiment of an image processing system to which the present invention is applied.

  The analog image signal Van1 output from the playback device 1 is a signal with analog distortion. The analog distortion here refers to distortion generated in a signal when the signal is D / A converted, that is, noise on the signal. Therefore, this analog distortion includes, for example, distortion generated in the signal when the signal is D / A converted by the D / A converter 12 of the reproducing apparatus 1, specifically, for example, high frequency components are removed from the signal. This includes distortion generated in the signal, distortion generated in the signal due to a phase shift of the signal, and the like. As a method for evaluating image degradation due to the analog distortion, there are S / N (Signal-to-Noise) evaluation, visual evaluation (evaluation of visual deterioration), and the like. The analog distortion may be naturally generated or may be intentionally generated (see an analog distortion adding unit 451 in FIG. 21 described later).

  In the example of FIG. 2, the recording / reproducing device 31 includes an encoding device 41 and a decoding device 42. That is, the encoding device 41 is an embodiment of an encoding device that is a data conversion device to which the present invention is applied, and the decoding device 42 is a decoding device 42 that is a data inverse conversion device to which the present invention is applied. It is one Embodiment. In the example of FIG. 2, one recording / reproducing device 31 is configured by one encoding device 41 and one decoding device 42. However, the encoding device 41 and the decoding device 42 are separated from each other. Thus, an image processing system can be easily configured.

  In the example of FIG. 2, the encoding device 41 includes an A / D conversion unit 51, an encoding unit 52, and a recording unit 53.

  The A / D conversion unit 51 performs A / D conversion on the analog image signal Van1 output from the reproduction apparatus 1, and supplies the digital image signal Vdg1 obtained as a result to the encoding unit 52. The encoding unit 52 encodes the digital image signal Vdg1 and supplies the encoded digital image signal Vcd obtained as a result to the recording unit 53. The recording unit 53 records the encoded digital image signal Vcd on a recording medium such as an optical disk (not shown).

  In the example of FIG. 2, the decoding unit 54 includes a decoding unit 54, a D / A conversion unit 55, and a display unit 56.

  The decoding unit 54 decodes the encoded digital image signal Vcd output from the encoding unit 52 of the encoding device 41 and supplies the resulting digital image signal Vdg2 to the D / A conversion unit 55. The D / A converter 55 performs D / A conversion on the digital image signal Vdg2, and supplies the analog image signal Van2 obtained as a result to the display unit 56. The display unit 56 is configured by, for example, a CRT display, an LCD, or the like, and displays an image corresponding to the analog image signal Van2 supplied from the D / A conversion unit 55.

  What should be noted here is that the digital image signal Vdg2 obtained when the encoded digital image signal Vcd output from the encoding unit 52 of the encoding device 41 of FIG. Unlike the digital image signal obtained when the encoded digital image signal Vcd ′ output from the encoding unit 22 of the encoding device 3 in FIG. 1 is decoded again, it is output from the decoding unit 11 of the reproduction device 1. The digital image signal Vdg0 is significantly deteriorated. In other words, an encoding process is performed such that the digital image signal Vdg2 obtained when decoded again by the decoding unit 54 is significantly deteriorated as compared with the digital image signal Vdg0 output from the decoding unit 11 of the reproducing apparatus 1. This is the point that the encoding unit 52 executes.

  Due to this point, an image obtained by reproducing the encoded digital image signal Vcd recorded on the recording medium by the recording unit 53 is an image corresponding to the analog image signal Van1 output from the reproducing device 1, that is, the display device 2. Compared with the image displayed on the screen, the image quality is greatly deteriorated. In addition, the degree of deterioration increases each time the encoding by the encoding device 41 or a similar encoding device and the decoding by the decoding device 42 or a similar decoding device are repeated. Therefore, the encoding device 41 in FIG. 2 cannot perform copying while maintaining good image quality. That is, illegal copying can be prevented.

  In the image processing system of FIG. 2, as described above, the recording / playback apparatus 31 performs a process for making a copy impossible while maintaining good image quality. The analog image signal Van1 supplied to 2 is not subjected to any processing, and as a result, the image quality of the image displayed on the display device 2 is not degraded. That is, the image processing system of FIG. 2 can solve the problem of the above-described Patent Document 1.

  Furthermore, in the image processing system of FIG. 2, as is apparent from the configuration of FIG. 2, a special circuit such as a noise information generation unit or a circuit for embedding the noise information is mounted on both the reproduction side and the recording side. There is no need to increase the circuit scale. That is, the image processing system of FIG. 2 can solve the problem of the invention of Patent Document 2 described above.

  In other words, in order to solve the conventional problem, as described above, the digital image signal Vdg2 obtained when the decoding unit 54 re-decodes the digital image signal output from the decoding unit 11 of the reproduction apparatus 1. The encoding unit 52 only needs to execute an encoding process that significantly deteriorates compared to Vdg0. That is, it is sufficient for the encoding unit 52 to be able to execute such encoding processing, and the form thereof is not particularly limited, and various embodiments can be taken. Further, depending on various embodiments of the encoding unit 52, the decoding unit 54 can take various embodiments.

  Therefore, hereinafter, an embodiment of each of the encoding unit 52 with principal component analysis and the decoding unit 54 that executes the corresponding decoding process will be described with reference to FIGS. 3 to 16.

  FIG. 3 shows a configuration example of the encoding unit 52 with principal component analysis. In the example of FIG. 3, the encoding unit 52 includes an input unit 121 to an output unit 132. The principal component analysis will be described later.

  The input unit 121 inputs, for example, one frame of the digital image signal Vdg1 from the A / D conversion unit 51 of FIG. 2 and supplies the digital image signal Vdg1 to the large block unit 122.

  The large block unit 122 divides the digital image signal Vdg1 for one frame supplied from the input unit 121 into a plurality of large blocks, and supplies the large block to the motion vector detection unit 123 and the residual calculation unit 126.

  Needless to say, the size of the large block is not particularly limited. The same applies to other blocks (such as small blocks) described later.

  The motion vector detection unit 123 stores the large block to be processed and the frame memory 131 for each of a plurality of large blocks of the processing target frame (hereinafter referred to as the current frame) supplied from the large block converting unit 122. The motion vector of the large block to be processed is detected using the decoded digital image signal corresponding to the previous frame (hereinafter referred to as the previous frame). Then, the motion vector detection unit 123 uses each piece of information indicating each of the motion vectors of the large blocks for the current frame as a digital signal Vcdmv, and uses the motion vector destination block unit 124, the residual calculation unit 126, and the superimposition unit 129. To supply.

  Specifically, for example, in the present embodiment, in the large block unit 122, the image signal of one effective screen among the digital image signals Vdg1 is 16 pixels in the horizontal direction as shown in FIG. 4, for example. It is divided into large blocks BL each having a size of 16 pixels in the vertical direction. Hereinafter, the size of h pixels in the horizontal direction and v pixels in the vertical direction is referred to as the size of (h × v) pixels. That is, in the example of FIG. 4, the large block BL has a size of (16 × 16) pixels. In FIG. 4, circles (circles) indicate pixel data constituting one effective screen image signal of the digital image signal Vdg1.

  In this case, as shown in FIG. 5, for example, the motion vector detection unit 123 processes a large block BL (hereinafter, the large block BL to be processed) as a target large block BL in the digital image signal FLn for the current frame. A predetermined search range sb including the large block BLb0 at the same position as the target large block BL in the digital image signal FLb for the previous frame is set. Then, the motion vector detection unit 123 performs, for example, so-called block matching in the search range sb. Specifically, for example, the motion vector detection unit 123 detects, from the search range sb, a large block in which the sum of absolute differences from the pixel values of the target large block BL is minimum. In the present embodiment, the search range sb is, for example, an area from −8 pixels to +8 pixels in the horizontal direction and from −8 pixels to +8 pixels in the vertical direction from the large block BLb0.

  For example, it is assumed that the large block BLbc shown in FIG. 6 is detected as the block having the smallest sum of absolute differences from the target large block BL. In this case, the motion vector detection unit 123 detects the vector mv shown in FIG. 6 as a motion vector of the target large block BL. Therefore, the motion vector detection unit 123 generates information indicating the motion vector mv of the target large block BL, includes the information in the digital signal Vcdmv, and includes the motion vector small block forming unit 124, the residual calculation unit 126, and the superimposition To the unit 129. Note that the form of information indicating the motion vector mv is not particularly limited, but in the present embodiment, it is a relative coordinate from the coordinate position of the target large block BL.

  Note that the block having the smallest sum of absolute differences from the target large block BL, that is, the large block BLbc in the example of FIG. 6, for example, is viewed from the target large block BL. It can be said that it is a large block in the direction. Therefore, hereinafter, the block having the smallest sum of absolute differences from the target large block BL is referred to as a motion vector predecessor block.

  Returning to FIG. 3, the motion vector small block forming unit 124, for each large block for the current frame, the motion vector of the processing target large block specified by the digital signal Vcdmv supplied from the motion vector detection unit 123. Based on the above, the motion vector pre-large block corresponding to the large block to be processed is extracted from the decoded digital image signal of the previous frame stored in the frame memory 131. Then, for each large block for the current frame, the motion vector small block forming unit 124 further subdivides the small motion vector block corresponding to the large block to be processed into M small blocks (N pixels). And is supplied to the orthogonal transform base generation unit 125.

  Specifically, for example, it is assumed that the large block to be processed (target large block) is the large block BL in FIG. 6, and the motion vector mv in the example in FIG. . In this case, the motion vector destination small block forming unit 124 extracts the large block BLbc in FIG. Then, for example, in this embodiment, the motion vector pre-small block forming unit 124 further converts the motion vector pre-large block BLbc into 16 small blocks having a size of (4 × 4) pixels as shown in FIG. Divide into block BS. In FIG. 7, circles (circles) indicate pixel data constituting the motion vector predecessor block BLbc in the digital image signal of the previous frame.

  Returning to FIG. 3, the orthogonal transform base generation unit 125 divides the motion vector predecessor block corresponding to the large block to be processed by the motion vector prescaler block unit 124 for each of the large blocks for the current frame. By performing principal component analysis on the M small blocks obtained as a result, an orthogonal transform base is adaptively generated for the large block to be processed (the corresponding motion vector pre-large block). In this way, bases different from other large blocks are individually generated for each large block of the current frame. Then, the orthogonal transform base generation unit 125 supplies the orthogonal transform base for each of the large blocks for the current frame to the orthogonal transform encoding unit 128.

  That is, for example, the orthogonal transform base generation unit 125 extracts M small blocks constituting the motion vector predecessor block to be processed for each motion vector predecessor block corresponding to each large block for the current frame. To do. Assuming that the M small blocks are data expressed in N dimensions, the orthogonal transform base generation unit 125 vectorizes each of the M small blocks extracted for each motion vector predecessor block. Hereinafter, the M N-dimensional vectors obtained for each motion vector predecessor block in this way are referred to as processing vectors.

  For example, assuming that a small block is composed of pixel data for N pixels, the orthogonal transform base generation unit 125 converts each value (pixel value) of pixel data for N pixels from among N components. An N-dimensional processing vector can be generated by substituting it into a predetermined one. Specifically, for example, in the present embodiment, as shown in FIG. 7, the motion vector pre-large block BLbc is divided into 16 (= M) small blocks BS each having a size of (4 × 4) pixels. Divided. That is, since one small block BS is composed of pixel data for 16 (= N) pixels, the value (pixel value) of these 16 pixel data is set for one motion vector predecessor block BLbc. A processing vector as each component value is generated for each of the 16 small blocks BS. That is, 16 process vectors are generated for each motion vector predecessor block BLbc.

  The orthogonal transform base generation unit 125 performs principal component analysis on the M processing vectors obtained from the motion vector predecessor block to be processed for each of the motion vector predecessor blocks for the current frame, N N-dimensional orthonormal bases for the motion vector pre-large block to be processed are generated.

  In the present specification, such N N-dimensional orthonormal bases are collectively referred to as orthogonal transform bases. That is, an orthogonal transform base is generated for each large motion vector block for the current frame.

  Specifically, for example, the orthogonal transform base generation unit 125 can execute the following processing.

  That is, for each of the motion vector predecessor blocks for the current frame, the orthogonal transform base generation unit 125 uses the M N-dimensional processing vectors obtained from the motion vector predecessor block to be processed as column components. Each having a matrix D having N rows and M columns. Then, the orthogonal transform base generation unit 125 performs singular value decomposition on each matrix D for each motion vector predecessor block for the current frame, so that each matrix D is expressed by the following equation (1). Decomposes each of the component matrices U, Σ, and V to be satisfied. In Equation (1), the component matrix U is a left singular matrix with N rows and N columns, the component matrix V is a right singular matrix with M rows and M columns, and the component matrix Σ is a singular matrix with N rows and M columns, respectively. Show. V ~ represents a transposed matrix of the component matrix V.

  D = UΣV ~ (1)

  Here, if the rank of the matrix D is r (r is an integer value less than or equal to N), each of the first r column components (left singular vectors) of the component matrix U becomes an orthonormal basis, and is important in order from the left. It becomes a basic basis. Hereinafter, the first r column components (left singular vectors) of the component matrix U, that is, the fth from the left of the r orthonormal basis vectors (f is any one of 1 to r) (Integer value) is appropriately referred to as the f-th principal component. Here, for simplicity of explanation, the rank of the matrix D is N. That is, here, it is assumed that N principal components are obtained for each large motion vector block for the current frame. That is, one matrix D indicates the basis of orthogonal transformation for one motion vector predecessor block.

  The residual calculation unit 126 performs basically the same processing as each of the large blocks for the current frame supplied from the large block unit 122 for the motion vector destination block unit 124, thereby The motion vector predecessor block corresponding to each of the large blocks is extracted from the frame memory 131. Next, the residual calculation unit 126 calculates, for each large block for the current frame, a residual between the large block to be processed and the corresponding motion vector predecessor block, and the resulting block, that is, A large block (hereinafter referred to as a residual large block) having a difference value between each pixel value constituting the large block to be processed and a corresponding pixel value of the corresponding motion vector predecessor block as a small pixel value is referred to as a small residual block. The data is supplied to the blocking unit 127.

  For each large block for the current frame, the small block converting unit 127 determines a residual large block corresponding to the large block to be processed among the large residual blocks supplied from the residual calculating unit 126 as M The data is divided into small blocks (pixel data having a size corresponding to N pixels) and supplied to the orthogonal transform coding unit 128. That is, the small block generated by the small block forming unit 127 has the same size as the small block generated by the motion vector pre-decreasing block 124.

  Specifically, for example, in the present embodiment, a residual large block BLD having a size of (16 × 16) pixels as shown in FIG. 8 is supplied from the residual calculating unit 126 to the small blocking unit 127. In this case, as shown in the figure, the small block converting unit 127 further divides the large residual block BLD into 16 small blocks BD each having a size of (4 × 4) pixels. In FIG. 8, circles (circles) indicate pixel data constituting the large residual block BLD.

  Returning to FIG. 3, the orthogonal transform encoding unit 128 is supplied from the orthogonal transform base generation unit 125 for each large block for the current frame (the motion vector destination large block corresponding to the large block to be processed). ) Using the basis of orthogonal transform, orthogonal transform coding processing is performed on the residual large block (corresponding to the large block to be processed) divided into M small blocks by the small block forming unit 127; The processing result is supplied to the superimposing unit 129 as a digital signal Vcdo. That is, for each large block of the current frame, a corresponding base (a base different from other large blocks) is used.

  The orthogonal transform coding process refers to a series of processes as follows, for example.

  That is, the orthogonal transform coding unit 128 extracts, for example, M small blocks constituting the large residual block to be processed for each large residual block for the current frame. Assuming that the M small blocks extracted for each residual large block for the current frame are data represented in N dimensions, the orthogonal transform coding unit 128 performs each of the large residual blocks for the current frame. With respect to the above, by vectorizing each of the M small blocks constituting the large residual block to be processed, only N M-dimensional processing vectors for the large residual block to be processed are generated. That is, M processing vectors are generated for each large residual block for the current frame.

  Specifically, for example, in the present embodiment, as shown in FIG. 8, one residual large block BLD is composed of 16 (= M) small blocks BD having a size of (4 × 4) pixels. It is divided into. That is, since one small block BD is composed of pixel data for 16 (= N) pixels, the value (pixel value) of these 16 pieces of pixel data is set for each large residual block BLD. A processing vector as a component value is generated for each of the 16 small blocks BD. That is, 16 processing vectors are generated for each large residual block BLD for the current frame.

  Therefore, the orthogonal transform coding unit 128, for example, for each of the large residual blocks for the current frame, from the original N-dimensional first coordinate system, the second coordinates with N principal components as axes. An axis conversion process for converting into a system is performed on each of the M N-dimensional processing vectors obtained from the large residual block to be processed. Specifically, for example, the orthogonal transform encoding unit 128 calculates the following equation (2).

  Va = U ~ Vb (2)

  In Equation (2), Vb is a matrix (column vector) of N rows and 1 column, and is a predetermined one of M N-dimensional processing vectors obtained from the residual large block to be processed. That is, a predetermined one of M N-dimensional processing vectors indicating each of M small blocks constituting the large residual block to be processed, in other words, expressed in the first coordinate system. A predetermined one of the processing vectors is shown. Va is a matrix of N rows and 1 column (column vector), and indicates a processing vector re-expressed in the second coordinate system. U˜ is a transposed matrix of the component matrix U of Equation (1), that is, a transposed matrix of a matrix U indicating a base of orthogonal transform for the large residual block to be processed supplied from the orthogonal transform base generation unit 125. Is shown.

  In this way, the orthogonal transform coding unit 128 uses each of the M processing vectors Vb obtained from the large residual block to be processed for each large residual block for the current frame, Each of the M processing vectors Va is calculated by repeating the operation of the above-described expression (2) M times. That is, the orthogonal transform encoding unit 128 converts each of the M processing vectors Vb into each of the M processing vectors Va for each residual large block for the current frame.

  Then, the orthogonal transform encoding unit 128 performs predetermined encoding on each of the large residual blocks for the current frame, with the M processed vectors Va after conversion for the large residual block to be processed as one unit. The encoding process according to the method is executed, and the result of the encoding process for the large residual block to be processed is included in the digital signal Vcdo and supplied to the superimposing unit 129.

  Note that the “predetermined encoding scheme” here does not indicate a specific one encoding scheme, but is simply a code employed in the orthogonal transform encoding unit 128 among various encoding schemes. Refers to the conversion method. That is, the orthogonal transform encoding unit 128 can employ various encoding methods.

  For example, the orthogonal transform coding unit 128 sequentially sets each of the large residual blocks for the current frame one by one as a processing target, and M processed vectors Va after conversion for the large residual block to be processed. , Each of the component values of the f-th row (where f is an integer value from 1 to N as described above) is extracted, and each of the extracted M component values is determined as a pixel value. By arranging in this order, one digital image signal (block) can be generated. Of the component values of the processing vector Va, the component value of the f-th row (in the case of a column vector, the f-th component value from the top) is the coordinate value of the axis of the f-th principal component (hereinafter referred to as the f-th principal component value). Designated). Therefore, this block becomes a digital image signal having each pixel value as the f-th principal component value of the M processed vectors Va after conversion for one large residual block. Therefore, hereinafter, such a block is referred to as an f-th principal component block.

  As a result, the orthogonal transform coding unit 128 can generate N first principal component blocks to Nth principal component blocks for each residual large block for the current frame.

  Therefore, in this case, the orthogonal transform encoding unit 128 sequentially sets each of the large residual blocks for the current frame one by one as a processing target, and performs the first principal component block to the processing of the large residual block of the processing target. For each N-th principal component block, each pixel value (corresponding principal component value) constituting the principal component block to be processed can be quantized. In this case, for example, the following quantization method can be employed. In other words, a quantization method is employed in which the same value is used for all of the first principal component block to the Nth principal component block as a value divided for each pixel value constituting one principal component block. can do. Alternatively, as a value to be divided for each pixel value constituting a higher-order principal component block (a principal component block whose f-th principal component number f is younger) than a value used in a lower-order principal component block It is also possible to employ a quantization method such as using a large value.

  Then, the orthogonal transform encoding unit 128 sequentially sets each of the large residual blocks for the current frame one by one as a processing target, and the first principal component block to the Nth principal component of the residual large block to be processed. For each of the blocks, a code allocation process such as a Huffman code is performed on each quantized value, and the processing result of the large residual block to be processed is included in the digital signal Vcdo and supplied to the superimposing unit 129. be able to.

  Alternatively, for example, the orthogonal transform coding unit 128 sequentially sets each of the large residual blocks for the current frame one by one as a processing target, and the first principal component block to the Nth main block of the large residual block to be processed. Each of the component blocks may be subjected to an ADRC (Adaptive Dynamic Range Coding) encoding process, and the processing result for the large residual block to be processed may be included in the digital signal Vcdo and supplied to the superimposing unit 129. .

  In the present specification, a series of processes executed by the orthogonal transform coding unit 128 as described above is referred to as an orthogonal transform coding process.

  In this way, the result of the orthogonal transform coding process for each of the large residual blocks for the current frame by the orthogonal transform coding unit 128 is included in the digital signal Vcdo and supplied to the superimposing unit 129. Therefore, the superimposing unit 129 superimposes the digital signal Vcdmv (information indicating the motion vector for each large block for the current frame) supplied from the motion vector detecting unit 123 on the digital signal Vcdo, and is obtained as a result. The digital signal is supplied to the local decoding unit 130 and the output unit 132 as an encoded digital image signal Vcd that is a decoded signal of the digital signal Vdg1 for the current frame, that is, as an encoded digital image signal Vcd for the current frame.

  When the processing target of the encoding unit 52 in the example of FIG. 3 moves from the current frame to the next frame, that is, when the next frame becomes a new current frame, the local decoding unit 130 A digital image signal for the previous frame that is a reference destination of the motion vector for (next frame) is generated. That is, the local decoding unit 130 performs a decoding process on the encoded digital image signal Vcd for the current frame supplied from the superimposing unit 129, and the resulting digital image signal is converted into the previous frame for the next frame. It is stored in the frame memory 131 as a digital image signal.

  Such a local decoding unit 130 can be configured as shown in FIG. 9, for example. However, the local decoding unit 130 in the example of FIG. 9 has basically the same configuration and function as the dotted line portion 181 in the decoding unit 54 in the example of FIG. That is, each of the data decomposing unit 151 to the block decomposing unit 156 in FIG. 9 has basically the same configuration and function as each of the data decomposing unit 172 to the block decomposing unit 177 in FIG. Accordingly, the description of the dotted line portion 181 in FIG. That is, description of the local decoding unit 130 is omitted here.

  Returning to FIG. 3, the frame memory 131 stores the digital image signal for the previous frame, that is, the digital image signal for the previous frame as viewed from the current frame to be processed. Therefore, in the present embodiment, it is assumed that the storage content (digital image signal) of the frame memory 131 is rewritten when the processing target of the encoding unit 52 moves from the current frame to the next frame.

  The output unit 132 outputs the encoded digital image signal Vcd for the current frame supplied from the superimposing unit 129 to the recording unit 53 and the decoding unit 54 in FIG.

  The configuration of the encoding unit 52 in the example of FIG. 3 has been described above. It is assumed that the digital image signal Vdg1 for the first frame is transmitted through the encoding unit 52 in the example of FIG. 3 without distortion due to encoding.

  Next, an example of the encoding process of the encoding unit 52 of the example of FIG. 3 will be described with reference to the flowchart of FIG.

  In step S81, the input unit 121 inputs the digital image signal Vdg1 for one frame, for example. That is, in step S81, the input unit 121 inputs the digital image signal Vdg1 for the current frame. When the digital image signal Vdg1 for the current frame is supplied from the input unit 121 to the large block unit 122, the process proceeds to step S82.

  In step S82, the large block unit 122 divides the digital image signal Vdg1 for the current frame. That is, a plurality of large blocks are divided from the digital image signal Vdg1 for the current frame. When each of the large blocks for the current frame is supplied from the large block unit 122 to the motion vector detection unit 123 and the residual calculation unit 126, the process proceeds to step S83.

  In step S83, the motion vector detection unit 123 detects a motion vector for each large block for the current frame. Each piece of information indicating a motion vector for each large block for the current frame is supplied as a digital signal Vcdmv for the current frame to the motion vector small block forming unit 124, the residual calculating unit 126, and the superimposing unit 129. Then, the process proceeds to step S84.

  In step S84, the motion vector pre-blocking unit 124 and the orthogonal transform base generation unit 125 adaptively generate orthogonal transform bases for each large block (corresponding motion vector pre-large block) for the current frame. To do. When the orthogonal transform base for each large block for the current frame is supplied from the orthogonal transform base generation unit 125 to the orthogonal transform encoding unit 128, the process proceeds to step S85.

  In step S85, the residual calculation unit 126 calculates a residual for each large block for the current frame. When the processing result of step S85, that is, the residual large block corresponding to each of the large blocks for the current frame is supplied from the residual calculation unit 126 to the small block unit 127, the processing proceeds to step S86.

  In step S86, the small block forming unit 127 and the orthogonal transform coding unit 128, for each residual large block corresponding to each large block for the current frame, for each large block corresponding to the current frame. An orthogonal transform encoding process is performed using a corresponding orthogonal transform basis among the orthogonal transform bases for the motion vector predecessor vector. When the digital signal Vcdo for the current frame obtained as a result of the process of step S86 is supplied from the orthogonal transform encoding unit 128 to the superimposing unit 129, the process proceeds to step S87.

  In step S87, the superimposing unit 129 outputs the digital signal Vcdo for the current frame output from the orthogonal transform coding unit 128 as the processing result of step S86, and outputs it from the motion vector detection unit 123 as the processing result of step S83. By superimposing the digital signal Vcdmv for the current frame, an encoded digital image signal Vcd for the current frame is generated. When the encoded digital image signal Vcd for the current frame is provided from the superimposing unit 129 to the output unit 132, the process proceeds to step S88.

  In step S88, the output unit 132 outputs the encoded digital image signal Vcd to the outside.

  In step S89, the encoding unit 52 determines whether or not the processing for all the frames to be processed has been completed.

  If the processing for all the frames has not been completed yet, it is determined as NO in step S89, and the encoded digital image signal Vcd for the current frame generated by the processing in step S87 is also sent to the local decoding unit 130. Supplied. Thereby, a process progresses to step S90.

  In step S90, the local decoding unit 130 locally decodes (encodes) the encoded digital image signal Vcd for the current frame, and uses the resulting digital image signal as the digital image of the previous frame for the next frame. The signal is stored in the frame memory 131 as a signal.

  Thereafter, the process returns to step S81, and the subsequent processes are repeated. That is, the digital image signal Vdg1 for the next one frame is input in the process of step S81, and the encoding process described above is performed in the processes of steps S82 to S87. As a result, the encoded digital signal for the next frame is encoded. An image signal Vcd is obtained, and this encoded digital image signal Vcd is output in the process of step S88.

  When the loop processing of steps S81 to S90 is performed on all the frames and the encoded digital image signal Vcd for the last frame is output, it is determined as YES in the next step S89, and FIG. The encoding process of the tenth example ends.

  The example of the encoding process of the encoding unit 52 in the example of FIG. 3 has been described above with reference to FIG.

  Next, an embodiment of a decoding unit 54 corresponding to the encoding unit 52 in the example of FIG. 3 will be described with reference to FIGS. 11 and 12.

  FIG. 11 shows a configuration example of a decoding unit 54 corresponding to the encoding unit 52 in the example of FIG. In the example of FIG. 11, the decoding unit 54 includes an input unit 171 to an output unit 179.

  The input unit 171 inputs, for example, one frame of the encoded digital image signal Vcd output from the encoding unit 52 in the example of FIG. 3, that is, inputs the encoded digital image signal Vcd for the current frame, The data is supplied to the data decomposition unit 172.

  The data decomposing unit 172 outputs the encoded digital image signal Vcd for the current frame, the digital signal Vcdmv for the current frame that is the output of the motion vector detecting unit 123 of FIG. 3, and the output of the orthogonal transform encoding unit 128 of FIG. And the digital signal Vcdmv for the current frame is supplied to the motion vector diminishing block 173, and the digital signal Vcdo for the current frame is converted into the inverse orthogonal transform decoding unit 175. To supply.

  The motion vector destination small block unit 173 has basically the same function and configuration as the motion vector destination small block unit 124 of FIG. That is, the motion vector small block unit 173 generates a frame based on the motion vector of the large block to be processed included in the digital signal Vcdmv supplied from the data decomposition unit 172 for each large block for the current frame. The motion vector pre-large block corresponding to the large block to be processed is extracted from the decoded digital image signal of the previous frame stored in the memory 178. Each motion vector pre-large block corresponding to each large block for the current frame is supplied to the adder 176. Then, the motion vector destination small block forming unit 173 converts each of the motion vector destination large blocks corresponding to each of the large blocks for the current frame into smaller M blocks (the size of N pixels). Are supplied to the orthogonal transform base generation unit 174.

  The orthogonal transform base generation unit 174 has basically the same function and configuration as the orthogonal transform base generation unit 125 of FIG. That is, the orthogonal transform base generation unit 174 is obtained as a result of dividing the motion vector predecessor block corresponding to the large block to be processed by the motion vector precompact blocker 173 for each large block for the current frame. Performs principal component analysis on M small blocks to adaptively generate orthogonal transform bases (first to Nth principal components) for the large block to be processed (corresponding motion vector predecessor block) And supplied to the inverse orthogonal transform decoding unit 175. That is, for each large block of the current frame, a base of orthogonal transform different from that of other large blocks is individually generated and supplied to the inverse orthogonal transform decoding unit 175.

  The inverse orthogonal transform decoding unit 175 applies each large block (corresponding motion vector destination) for the current frame supplied from the orthogonal transform base generation unit 174 to the digital signal Vcdo for the current frame supplied from the data decomposition unit 172. The inverse orthogonal transform decoding process is performed in units of large blocks using the corresponding base among the bases of each orthogonal transform for the large block). That is, for each large block of the current frame, a corresponding orthogonal transform base (a base different from other large blocks) is used.

  The inverse orthogonal transform decoding process refers to, for example, the following series of processes.

  The inverse orthogonal transform decoding unit 175 performs decoding processing (inverse quantization processing, etc.) of the decoding method corresponding to the coding method employed in the orthogonal transform coding unit 128 of FIG. 3 on the digital signal Vcdo for the current frame. ). By this decoding process, for example, the first principal component block to the Nth principal component block described above are obtained for each large block (corresponding residual large block) for the current frame.

  Next, the inverse orthogonal transform decoding unit 175 performs, for each residual large block corresponding to each large block for the current frame, the first principal component block to the N-th principal block for the residual large block to be processed. From the component block, M processing vectors Va expressed by the above-described equation (2), that is, M processing vectors Va expressed by the second coordinate system with the first to N-th principal components as axes are generated (restored). ) That is, M processing vectors Va are generated (restored) for each residual large block for the current frame.

  Next, the inverse orthogonal transform decoding unit 175 performs an inverse axis transformation process for inversely transforming each residual large block for the current frame from the second coordinate system to the original N-dimensional first coordinate system, It applies to each of the M processing vectors Va corresponding to the large residual block to be processed. Specifically, for example, the inverse orthogonal transform decoding unit 175 generates (restores) M processing vectors Vb for the large residual block to be processed by calculating the following equation (3).

Vb = (U ~) ^-1 Va (3)

In Equation (3), (U˜) ⁻¹ indicates an inverse matrix of the transposed matrix U˜ of the component matrix U of Equation (1) described above. This component matrix U is a matrix indicating the basis of orthogonal transformation for the large residual block to be processed, and each component value (coefficient group) is supplied from the orthogonal transformation basis generation unit 174. Therefore, the inverse orthogonal transform decoding unit 175 can generate a matrix (U˜) ⁻¹ from this coefficient group.

  Next, the inverse orthogonal transform decoding unit 175 constructs a processing target residual large block from each of the M processing vectors Vb for the processing target residual large block for each of the residual large blocks for the current frame. Generate (restore) M small blocks. That is, M small blocks are generated (restored) for each residual large block for the current frame.

  Then, the inverse orthogonal transform decoding unit 175 generates (restores) the processing target large residual block by arranging each of the M small blocks constituting the processing target large residual block at the original position. That is, the inverse orthogonal transform decoding unit 175 generates (restores) each large block for the current frame by repeatedly executing such processing for each residual large block for the current frame.

  In the present specification, the series of processes described above of the inverse orthogonal transform decoding unit 175 is referred to as an inverse orthogonal transform decoding process.

  Then, the inverse orthogonal transform decoding unit 173 supplies each residual large block for the current frame generated (restored) in this way to the adding unit 176.

  The adding unit 176 corresponds to each of the residual large blocks for the current frame supplied from the inverse orthogonal transform decoding unit 175 and the motion vector predecessor block supplied from the motion vector prescaler unit 173. One is added and each large block for the current frame obtained as a result is supplied to the block decomposing unit 177.

  The block decomposing unit 177 arranges each large block for the current frame supplied from the adding unit 176 at a position before division, and decodes the digital image signal obtained as a result of the encoded digital image signal Vcd for the current frame. The digital image signal Vdg2 as a signal, that is, the digital image signal Vdg2 for the current frame is supplied to the output unit 179 and the frame memory 178.

  The frame memory 178 stores the digital image signal for the previous frame, that is, the digital image signal for the previous frame as viewed from the current frame to be processed. Therefore, in the present embodiment, it is assumed that the storage content (digital image signal) of the frame memory 178 is rewritten when the processing target of the decoding unit 54 moves from the current frame to the next frame.

  The output unit 179 outputs the digital image signal Vdg2 for the current frame supplied from the block decomposition unit 177 to the D / A conversion unit 55 in FIG.

  It should be noted that the local decoding unit 130 in the example of FIG. 9 has basically the same configuration and function as the dotted line portion 181 in the decoding unit 54 in the example of FIG. That is, each of the data decomposing unit 151 to the block decomposing unit 156 in FIG. 9 has basically the same configuration and function as each of the data decomposing unit 172 to the block decomposing unit 177 in FIG.

  The configuration of the decoding unit 54 in the example of FIG. 11 has been described above. Next, a decoding process example of the decoding unit 54 in the example of FIG. 11 will be described with reference to the flowchart of FIG.

  In step S101, the input unit 171 inputs the encoded digital image signal Vcd, for example, for one frame. That is, in step S101, the input unit 171 inputs, for example, the encoded digital image signal Vcd for the current frame. When the encoded digital image signal Vcd for the current frame is supplied from the input unit 171 to the data decomposing unit 172, the process proceeds to step S102.

  In step S102, the data decomposition unit 172 decomposes the encoded digital image signal Vcd for the current frame into a digital signal Vcdmv for the current frame and a digital signal Vcdo for the current frame. When the digital signal Vcdmv for the current frame is supplied to the motion vector small block forming unit 173 and the digital signal Vcdo for the current frame is supplied to the inverse orthogonal transform decoding unit 175, the process proceeds to step S103.

  In step S103, the motion vector pre-blocking unit 173 generates (restores) each motion vector pre-large block for the current frame. Further, the motion vector destination small block unit 173 subdivides each motion vector destination large block for the current frame into small blocks, and the motion vector destination large block for the current frame that has been made into a small block is an orthogonal transform base generation unit. 174. Thereby, the process proceeds to step S104.

  In step S <b> 104, the orthogonal transform base generation unit 174 generates (restores) an orthogonal transform base for each of the motion vector predecessor blocks for the current frame that has been made into small blocks. When the orthogonal transform base for each motion vector pre-large block for the current frame is supplied to the inverse orthogonal transform decoding unit 175, the process proceeds to step S105.

  In step S105, the inverse orthogonal transform decoding unit 175 uses the corresponding one of the bases of the orthogonal transform for each motion vector predecessor block for the current frame to generate the digital signal Vcdo for the current frame. On the other hand, inverse orthogonal transform decoding processing is performed in units of large blocks (residual large blocks). Further, as described above, the inverse orthogonal transform decoding unit 175 generates large residual blocks for the current frame from the result of the inverse orthogonal transform decoding process. When each residual large block for the current frame is supplied from the inverse orthogonal transform decoding unit 175 to the adding unit 176, the process proceeds to step S106.

  In step S <b> 106, the adding unit 176 includes each of the motion vector predecessor blocks for the current frame generated in the process of step S <b> 103 and each residual large block for the current frame that is the processing result of step S <b> 105. Add the corresponding one. Then, as described above, each large block for the current frame is obtained. When the large blocks for the current frame are supplied from the adding unit 176 to the block decomposing unit 177, the process proceeds to step S107.

  In step S107, the block decomposing unit 177 generates a digital image signal Vdg2 for the current frame by arranging a plurality of large blocks for the current frame, which is the processing result of step S106, at the original arrangement position. When the digital image signal Vdg2 for the current frame is supplied from the block decomposing unit 177 to the output unit 179, the process proceeds to step S108.

  In step S108, the output unit 179 outputs the digital image signal Vdg2 for the current frame to the outside.

  In step S109, the decoding unit 54 determines whether or not the processing for all the frames to be processed has been completed.

  If the processing for all the frames has not been completed yet, it is determined as NO in Step S109, and the processing proceeds to Step S110.

  In step S110, the decoding unit 54 rewrites the frame memory 178. That is, the digital image signal Vdg2 for the current frame output from the block decomposing unit 177 in the process of step S108 is written in the frame memory 178.

  Thereafter, the process returns to step S101, and the subsequent processes are repeated. That is, the encoded digital image signal Vcd for the next one frame is input in the process of step S101, and the decoding process described above is performed in the processes of steps S102 to S107. As a result, the digital image for the next one frame is obtained. A signal Vdg2 is obtained, and this digital image signal Vdg2 is output in the process of step S108.

  When the loop processing of steps S101 to S110 is performed on all frames and the digital image signal Vdg2 for the last frame is output, it is determined as YES in the next step S109, and FIG. The example decryption process ends.

  The example of the decoding process of the decoding unit 54 in the example of FIG. 11 has been described above with reference to FIG.

  Next, a modification of the encoding unit 52 in the example of FIG. 3 and a modification of the decoding unit 54 in the example of FIG. 11 will be described with reference to FIGS.

  FIG. 13 shows a configuration example of the encoding unit 52 with principal component analysis (configuration example different from the examples of FIGS. 15 and 3 described above).

  In the encoding unit 52 in the example of FIG. 13, the same reference numerals are given to the portions corresponding to the encoding unit 52 in the example of FIG. 3, and description thereof is omitted as appropriate.

  Comparing FIG. 13 and FIG. 3, it can be seen that the configuration of the encoding unit 52 in the example of FIG. 13 is a configuration in which the residual calculation unit 126 is removed from the encoding unit 52 of the example of FIG.

  That is, in the encoding unit 52 in the example of FIG. 3, the small block unit 127 makes the residual large block supplied from the residual calculation unit 126 into small blocks, and the orthogonal transform coding unit 128 makes the small block. An orthogonal transform encoding process is performed on the residual large block.

  On the other hand, in the encoding unit 52 in the example of FIG. 13, the small block forming unit 127 makes the large block supplied from the large block forming unit 122 into small blocks, and the orthogonal transform coding unit 128 uses the small block. An orthogonal transform encoding process is performed on the converted large block.

  For this reason, the encoding process of the encoding unit 52 in the example of FIG. 13 is basically the same as the encoding process of the encoding unit 52 in the example of FIG. However, the process of “residual calculation” in step 85 is omitted. Therefore, the encoding process of the encoding unit 52 in the example of FIG. 13 is as shown in the flowchart of FIG. 14, for example. That is, the processes in steps S121 to S124 in FIG. 14 are basically the same as the processes in steps S81 to S84 in FIG. Further, the processes in steps S125 to S129 in FIG. 14 are basically the same as the processes in steps S86 to S90 in FIG. However, the targets of the orthogonal transform encoding processing in steps S125 and S86 are different as described above.

  FIG. 15 shows a configuration example of the decoding unit 54 corresponding to the encoding unit 52 of the example of FIG. 13 (the modified example of FIG. 11 described above).

  In the decoding unit 54 in the example of FIG. 15, the same reference numerals are given to the portions corresponding to the decoding unit 54 in the example of FIG. 11, and description thereof will be omitted as appropriate.

  15 is compared with FIG. 11, it can be seen that the configuration of the encoding unit 52 in the example of FIG. 15 is a configuration in which the adding unit 176 is removed from the decoding unit 54 of the example of FIG. 11. This is because the digital signal Vcdo output from the data decomposing unit 172 is the same signal as the output signal of the orthogonal transform encoding unit 128 in the example of FIG. That is, the processing target of the orthogonal transform encoding unit 128 in the example of FIG. 13 is a plurality of large blocks divided from the digital image signal Vdg1 for the current frame, as described above, This is because a plurality of large blocks are directly output from the inverse orthogonal transform coding unit 175 in FIG. 15 because the result of the orthogonal transform coding process is the digital signal Vcdo. That is, it is not necessary to add the movement vector predecessor block.

  Therefore, the decoding process of the decoding unit 54 in the example of FIG. 15 is basically the same as the decoding process of the decoding unit 54 of the example of FIG. 11, that is, basically the same as the flowchart of FIG. However, the processing of “addition of motion vector pre-large block and residual large block (large block generation)” in step 106 is omitted. Accordingly, the decoding process of the decoding unit 54 in the example of FIG. 15 is as shown in the flowchart of FIG. 16, for example. That is, the processes in steps S141 to S145 in FIG. 16 are basically the same as the processes in steps S101 to S105 in FIG. However, the motion vector predecessor block generated in the process of step S143 is only used in the process of “direct transformation base generation” in the next step S144. Further, the processes in steps S146 to S148 in FIG. 16 are basically the same as the processes in steps S107 to S110 in FIG.

  As described above, the analog image signal Van1 with analog distortion output from the reproduction apparatus 1 in FIG. 2 is supplied to the A / D conversion unit 51 and A / D converted, and as a result, as the digital image signal Vdg1. , And supplied to the encoding unit 52 in the example of FIG. 3 or FIG.

  Then, the encoding unit 52 in the example of FIG. 3 or FIG. 13 divides, for example, the digital image signal Vdg1 for the current frame into a plurality of large blocks. Next, the encoding unit 52 in the example of FIG. 3 or FIG. 13 supports the large block to be processed by detecting the motion vector of the large block to be processed for each of a plurality of large blocks for the current frame. A motion vector predecessor block to be obtained is obtained, and an adaptive orthogonal transform base is generated using the motion vector predecessor block. That is, an orthogonal transform base is individually generated for each of a plurality of large blocks for the current frame.

  Next, in the case of the example of FIG. 3, the encoding unit 52 performs orthogonal transform using a corresponding orthogonal transform base for each of the residual large blocks corresponding to each of a plurality of large blocks for the current frame. Encoding process is performed. The encoding unit 52 in the example of FIG. 3 outputs a digital signal composed of a digital signal Vcdo for the current frame indicating the result of the orthogonal transform encoding process and a digital signal Vcdmv indicating each motion vector for the current frame. The encoded digital image signal Vcd for the current frame is output.

  On the other hand, in the case of the example in FIG. 13, the encoding unit 52 performs orthogonal transform coding processing using a corresponding orthogonal transform base on each of a plurality of large blocks for the current frame. Then, the encoding unit 52 in the example of FIG. 13 outputs a digital signal composed of a digital signal Vcdo for the current frame indicating the result of the orthogonal transform encoding process and a digital signal Vcdmv indicating each motion vector for the current frame. The encoded digital image signal Vcd for the current frame is output.

  The encoded digital image signal Vcd output from the encoding unit 52 in the example of FIG. 3 or FIG. 13 is supplied to the recording unit 53 of FIG. The recording unit 53 records the encoded digital image signal Vcd on a recording medium such as an optical disk. In this manner, the recording unit 53 performs copying based on the analog image signal Van1.

  When the analog image signal Van1 output from the reproduction apparatus 1 is a signal that has undergone the first encoding and decoding, the encoded digital image signal Vcd recorded on the recording medium by the recording unit 53 is the signal shown in FIG. The digital image signal obtained as a result of decoding by another device (not shown) including the decoding unit 54 in the example is a signal that has undergone the second encoding and decoding. In this case, the digital image signal that has been subjected to the second encoding and decoding is significantly deteriorated as compared with the digital image signal Vdg0 output from the decoding unit 11 of the reproducing apparatus 1.

  This is because the analog image signal Van1 is accompanied by analog distortion as described above.

  That is, for example, when the analog image signal Van1 is accompanied by analog distortion caused by the above-described signal phase shift, the A / D conversion unit 51 is caused by the sampling phase fluctuation that occurs when the analog image signal Van1 is converted into a digital signal. Further, each position of a plurality of large blocks obtained by dividing the digital image signal Vdg1 for the current frame by the encoding unit 52 in the example of FIG. 3 or FIG. 13 is relative to the position in the first encoding and decoding. Shift.

  Therefore, the encoding unit 52 in the example of FIG. 3 or FIG. 13 calculates a large block different from that of the first encoding as a motion vector destination large block corresponding to each of a plurality of large blocks for the current frame. Is done. As a result, an orthogonal transform base different from the orthogonal transform base used in the first encoding is generated for each large block, and each of the multiple large blocks is obtained using the orthogonal transform base, Or, since orthogonal transform coding processing is performed on each of a plurality of large residual blocks corresponding to them, new quantization distortion different from the quantization distortion generated in the first encoding is further generated. As a result, the distortion becomes large.

  From the above, the encoded digital image signal Vcd output from the encoding unit 52 in the example of FIG. 3 or FIG. 13 and recorded on the recording medium by the recording unit 53 of FIG. 2 is reproduced and obtained as a result. The image has a significantly deteriorated image quality as compared with the image corresponding to the analog image signal Van1 output from the playback device 1, that is, the image displayed on the display device 2.

  Furthermore, when the analog image signal Van1 output from the playback apparatus 1 is a signal that has undergone encoding and decoding for the second time and thereafter, it is encoded by the encoding unit 52 in the example of FIG. 3 or FIG. The digital image signal thus obtained is subjected to the encoding and decoding after the third time, and is further deteriorated.

  Therefore, when the encoded digital image signal that has undergone the third encoding and decoding is recorded on the recording medium by the recording unit 53, and the encoded digital image signal is subsequently reproduced, the resulting image is: Compared with the image corresponding to the analog image signal Van1 output from the playback device 1, that is, the image displayed on the display device 2, the image quality is further greatly deteriorated. Therefore, in this encoding device 41, it is impossible to copy while maintaining good image quality. That is, illegal copy prevention is achieved.

  For the same reason, also in the decoding device 42 having the decoding unit 54 in the example of FIG. 11 or FIG. 15, the image displayed on the display unit 56, that is, the analog signal Van 2 output from the D / A conversion unit 55. The corresponding image has a significantly deteriorated image quality as compared with the image corresponding to the analog image signal Van1 output from the playback device 1, that is, the image displayed on the display device 2. Further, the degree of deterioration of the image quality increases as the encoding and decoding are repeated.

  Also, the image processing system of FIG. 2 including the encoding unit 52 of the example of FIG. 3 and the decoding unit 54 of the example of FIG. 11, or the encoding unit 52 of the example of FIG. 13 and the decoding unit 54 of the example of FIG. 2 includes the encoding unit 52 in the example of FIG. 3 or FIG. 13 and the example of FIG. 11 or FIG. 15 for making the copy impossible while maintaining good image quality. Therefore, the analog image signal Van1 supplied from the playback device 1 to the display device 2 is not subjected to any processing, and as a result, displayed on the display device 2. The image quality of the generated image is not degraded. That is, the image processing system of FIG. 2 including the encoding unit 52 of the example of FIG. 3 and the decoding unit 54 of the example of FIG. 11, the encoding unit 52 of the example of FIG. 13, and the decoding unit 54 of the example of FIG. 2 can solve the problem of the invention of the above-mentioned Patent Document 1.

  Furthermore, the image processing system of FIG. 2 including the encoding unit 52 of the example of FIG. 3 and the decoding unit 54 of the example of FIG. 11, or the encoding unit 52 of the example of FIG. 13 and the decoding unit of the example of FIG. 2 includes a noise information generator and a special circuit such as a circuit for embedding it on both the reproduction side and the recording side, as is apparent from the configuration of FIG. Need not be mounted, and the circuit scale does not increase. That is, the image processing system of FIG. 2 including the encoding unit 52 of the example of FIG. 3 and the decoding unit 54 of the example of FIG. 11, the encoding unit 52 of the example of FIG. 13, and the decoding unit 54 of the example of FIG. 2 can solve the problems of the above-described invention of Patent Document 2.

  If there is no analog distortion in the analog signal Van1, the large block BL at the same position as the previous time is used in most cases in the second and subsequent encodings. As a result, the previous time encoding is performed. Since the base (principal component) of the orthogonal transformation generated in step 2 is reproduced in the same manner in the second and subsequent times, the quantization distortion in the second and subsequent encodings is extremely small, and reproduction with normal quality is possible. Become.

  As described above, with reference to FIGS. 3 to 16, two examples have been described as the embodiments of the encoding unit 52 and the decoding unit 54 of FIG. 2 to which the present invention is applied. That is, first, the encoding unit 52 in the example of FIG. 3 and the decoding unit 54 in the example of FIG. 11 have been described. The encoding unit 52 in the example of FIG. 13 and the decoding unit 54 in the example of FIG. 15 have been described.

  However, as described above, the encoding unit 52 in FIG. 2 to which the present invention is applied is not limited to the two examples described above, and can take various forms. Similarly, the decoding unit 54 of FIG. 2 to which the present invention is applied is not limited to the two examples described above, and can take various forms.

  In other words, the encoding unit 52 of FIG. 2 to which the present invention is applied only needs to have the functional configuration of FIG. 17, for example, and the embodiment for realizing the functional configuration of FIG. 17 is particularly limited. Not. That is, some of the various embodiments are the encoding units 52 in the examples of FIGS. 3 and 13 described above. As described above, FIG. 17 illustrates a more general functional configuration example of the encoding unit 52 of FIG. 2 to which the present invention is applied (a configuration example of a superordinate concept of some examples described above). Further, the flowchart of FIG. 18 illustrates an example of an encoding process executed by the encoding unit 52 having the functional configuration of FIG.

  Similarly, the decoding unit 54 of FIG. 2 to which the present invention is applied only needs to have the functional configuration of FIG. 19, and the embodiment for realizing the functional configuration of FIG. 19 is not particularly limited. That is, some of the various embodiments are the encoding units 52 in the examples of FIGS. 11 and 15 described above. Thus, FIG. 19 shows a more general functional configuration example of the decoding unit 54 of FIG. 2 to which the present invention is applied (a configuration example of a superordinate concept of some examples described above). Further, the flowchart of FIG. 19 illustrates an example of a decoding process executed by the decoding unit 54 having the functional configuration of FIG.

  Hereinafter, the encoding unit 52 and the decoding unit 54 of FIG. 2 to which the present invention is applied will be further described with reference to FIGS. 17 to 19.

  In the example of FIG. 17, the encoding unit 52 includes a setting unit 401, an analysis unit 402, a conversion unit 403, and a superimposition unit 404.

  The setting unit 401 sets processing data expressed in N dimensions from the digital image signal Vdg1 that is input data, sets M processing data as analysis units, and divides the input data by the analysis units. , One or more data groups composed of M pieces of processing data are generated. Then, the setting unit 401 supplies one or more data groups to the analysis unit 402 and the conversion unit 403.

  In addition, in the setting unit 401, information necessary for generating the conversion information to be described later on the demodulation unit 54 side in the example of FIG. 19 (hereinafter referred to as conversion information generation information) is generated or used. Accordingly, the conversion information generation information is supplied to the superimposing unit 404 as a digital signal Vb. Furthermore, in the setting unit 401, information necessary for generating other information used for the decoding process on the demodulating unit 54 side in the example of FIG. 19 (hereinafter referred to as decoding information generation information) is generated or When used, the decoded information generation information is supplied to the superimposing unit 404 as a digital signal Vb as necessary.

  For example, in the encoding unit 52 in the example of FIG. 3, the setting unit 401 includes a large block unit 122, a motion vector detection unit 123, a motion vector destination small block unit 124, a residual calculation unit 126, and a small block unit 127. , A local decoding unit 130, and a frame memory 131. That is, in the encoding unit 52 in the example of FIG. 3, a small block including N pixel values generated by the small block forming unit 127 or the motion vector destination small block forming unit 124 is employed as the processing data. A large block composed of M small blocks, that is, a residual large block calculated by the residual calculating unit 126 or a motion vector predecessor block extracted by the motion vector detecting unit 123, Adopted as a unit of analysis. 3, the digital signal Vcdmv output from the motion vector detection unit 123 is employed as the digital signal Vb in FIG. 17 that is conversion information generation information.

  For example, in the encoding unit 52 in the example of FIG. 13, the setting unit 401 includes a large block unit 122, a motion vector detection unit 123, a motion vector destination small block unit 124, a small block unit 127, a local decoding unit 130, And a frame memory 131. That is, in the encoding unit 52 in the example of FIG. 13, a small block made up of N pixel values generated by the small block forming unit 127 or the motion vector destination small block forming unit 124 is employed as the processing data. Then, a large block composed of M small blocks, that is, a large block divided from the digital image signal Vdg1 by the large block forming unit 122 or a motion vector predecessor extracted by the motion vector detecting unit 123. A block is adopted as an analysis unit. In the encoding unit 52 in the example of FIG. 13, the digital signal Vcdmv output from the motion vector detection unit 123 is adopted as the digital signal Vb of FIG. 17 that is conversion information generation information.

  The analysis unit 402 in FIG. 17 sequentially sets each of one or more data groups supplied from the setting unit 401 as a processing target, and analyzes the processing target data group, thereby changing the expression format of the processing target data group. Conversion information for conversion is individually generated for each processing target and supplied to the conversion unit 403.

  Note that the conversion information itself or corresponding conversion information generation information is supplied as a digital signal Vb from the analysis unit 402 to the superimposition unit 404 as necessary. Furthermore, when the decoding information generation information is generated or used by the analysis unit 402, it is supplied from the analysis unit 402 to the superimposition unit 404 as a digital signal Vb as necessary.

  For example, in the encoding unit 52 in the example of FIG. 3, the analysis unit 402 includes an orthogonal transform base generation unit 125. That is, in the encoding unit 52 in the example of FIG. 3, the orthogonal transform bases (first to Nth principal components) for each large motion destination block (for each corresponding large block) generated by the orthogonal transform base generation unit 125 are obtained. It is adopted as conversion information.

  For example, in the encoding unit 52 in the example of FIG. 13, the analysis unit 402 includes an orthogonal transform base generation unit 125. That is, in the encoding unit 52 in the example of FIG. 3, the orthogonal transform bases (first to Nth principal components) for each large motion destination block (for each corresponding large block) generated by the orthogonal transform base generation unit 125 are obtained. It is adopted as conversion information.

  For each of one or more data groups supplied from the setting unit 401, the conversion unit 403 in FIG. 17 uses the conversion information about the data group to be processed among the conversion information supplied from the analysis unit 402. The expression format of each of the M pieces of processing data constituting the data group to be processed is converted. Then, the conversion unit 403 supplies one or more data groups, each of which has been converted in expression format, to the superposition unit 404 as a digital signal Va.

  As described above, the conversion information refers to the relationship between the first expression format before conversion by the conversion unit 403 and the second expression format after conversion by the conversion unit 403 in the processing data expression format. It can be said that it is information to be shown or specified.

  The expression format conversion mentioned here may or may not include encoding (quantization or the like) by a predetermined encoding method in addition to the above-described expression format conversion by axis conversion or the like. . In the former case, the encoding unit 52 can be said to be a data conversion device that converts the data representation format or a part thereof. In the latter case, the conversion unit 403 encodes one or more data groups whose expression formats are converted, and supplies the resulting signal to the superposition unit 404 as a digital signal Va.

  For example, in the encoding unit 52 in the example of FIG. 3, the conversion unit 403 is configured by an orthogonal transform encoding unit 128. That is, in the encoding unit 52 in the example of FIG. 3, the digital signal Vcdo output from the orthogonal transform encoding unit 128 is adopted as the digital signal Va in FIG.

  For example, in the encoding unit 52 in the example of FIG. 13, the conversion unit 403 includes an orthogonal transform encoding unit 128. That is, in the encoding unit 52 in the example of FIG. 13, the digital signal Vcdo output from the orthogonal transform encoding unit 128 is adopted as the digital signal Va in FIG.

  The superimposing unit 404 applies the digital signal Vb (conversion information, conversion information generation information, and the like) supplied from at least one of the setting unit 401 and the analysis unit 402 to the digital signal Va supplied from the conversion unit 403. At least one of the decoding information generation information) is superimposed, and the resulting digital signal is output as the encoded digital image signal Vcd to the recording unit 53 and the decoding unit 54 in FIG.

  For example, in the encoding unit 52 in the example of FIGS. 3 and 13, the superimposing unit 404 is composed of a superimposing unit 129.

  The functional configuration of the encoding unit 52 in FIG. 2 has been described above with reference to FIG.

  Next, an example of the encoding process of the encoding unit 52 having the functional configuration of FIG. 17 will be described with reference to the flowchart of FIG.

  In step S201, the setting unit 401 inputs the digital image signal Vdg1 for one frame, for example.

  In step S202, the setting unit 401 sets processing data and an analysis unit from the digital image signal Vdg1 for one frame. A plurality of pieces of processing data for one frame are divided by analysis unit, and one or more data groups including M pieces of processing data obtained as a result, that is, one or more data groups for one frame are set in the setting unit 401. Is supplied to the analysis unit 402 and the conversion unit 403, the process proceeds to step S203.

  In step S203, the analysis unit 402 generates conversion information for one frame for each analysis unit. That is, the analysis unit 402 generates conversion information for each of one or more data groups for one frame. When the conversion information for each analysis unit for one frame is supplied from the analysis unit 402 to the conversion unit 403, the process proceeds to step S204.

  In step S204, the conversion unit 403 converts the expression format of the image signal Vdg1 for one frame for each analysis unit using the conversion information for each analysis unit for one frame. That is, the conversion unit 403 converts the representation format of the data group to be processed using conversion information on the data group to be processed for each of one or more data groups for one frame. As a result of the processing in step S204, a digital signal Va for one frame is obtained. When this digital signal Va is supplied from the conversion unit 403 to the superimposing unit 404, the processing proceeds to step S205.

  In step S205, the superimposition unit 404 superimposes the digital signal Vb supplied from at least one of the setting unit 401 and the analysis unit 402 on the digital signal Va for one frame supplied from the conversion unit 403. Thus, the encoded digital image signal Vcd is generated.

  In step S206, the superimposing unit 404 outputs the encoded digital image signal Vcd to the outside.

  In step S207, the encoding unit 52 determines whether or not processing for all frames to be processed has been completed.

  If the processing for all the frames has not been completed yet, it is determined as NO in Step S207, the processing returns to Step S201, and the subsequent processing is repeated. That is, the digital image signal Vdg1 for the next frame is input in the process of step S201, and the encoding process described above is performed in the processes of steps S202 to S205. As a result, the encoded digital signal for the next frame is encoded. An image signal Vcd is obtained, and this encoded digital image signal Vcd is output in the process of step S206.

  When the loop processing of steps S201 to S207 is performed on all the frames and the encoded digital image signal Vcd for the last frame is output, it is determined as YES in the next step S207, and FIG. The encoding process in the example 18 ends.

  The example of the encoding process of the encoding unit 52 having the functional configuration of FIG. 17 has been described above with reference to FIG.

  Next, a functional configuration example of the decoding unit 54 corresponding to the encoding unit 52 having the functional configuration of FIG. 17 will be described with reference to FIGS. 19 and 20.

  In the example of FIG. 19, the decoding unit 54 includes a data decomposition unit 411 to a decoded image generation unit 414. However, as will be described later, the analysis unit 412 can be omitted as necessary.

  The data decomposition unit 411 is supplied with the encoded digital image signal Vcd output from the encoding unit 52 having the functional configuration of FIG.

  The data decomposing unit 411 outputs the encoded digital image signal Vcd as an output of at least one of the digital signal Va that is the output of the converting unit 403 in FIG. 17 and the setting unit 401 and the analyzing unit 402 in FIG. Disassembled into digital signal Vb.

  As described above, the digital signal Vb includes at least one of the conversion information itself, conversion information generation information corresponding to the conversion information, and decoded information generation information. Therefore, when the digital signal Vb includes conversion information, the data decomposition unit 411 supplies the conversion information to the inverse conversion unit 413. On the other hand, when the digital signal Vb includes conversion information generation information, the data decomposition unit 411 supplies the conversion information generation information to the analysis unit 412. In addition, when the digital signal Vb includes decoding information generation information, the data decomposition unit 411 supplies the decoding information generation information to at least one of the analysis unit 412 to the decoded image generation unit 414. .

For example, in the decryption unit 54 in the examples of FIGS. 11 and 15, the data decomposition unit 411 includes a data decomposition unit 172.

  When the digital signal Vb, which is conversion information generation information, is supplied from the data decomposition unit 411, the analysis unit 412 uses the conversion information generation information to convert conversion information for each analysis unit (analysis unit in FIG. 17). Each conversion information corresponding to the output 402 is generated and supplied to the inverse conversion unit 413. That is, the analysis unit 412 generates conversion information for each of one or more data groups and supplies the conversion information to the inverse conversion unit 413.

  For example, in the decoding unit 54 in the examples of FIGS. 11 and 15, the analysis unit 412 includes a motion vector destination block forming unit 173, an orthogonal transform base generation unit 174, and a frame memory 178.

  The inverse conversion unit 413 uses the conversion information for each analysis unit supplied as the digital signal Vb from the data decomposition unit 411 or the conversion information for each analysis unit supplied from the analysis unit 412, from the data decomposition unit 411. The representation format of the supplied digital signal Va is restored. In other words, the inverse conversion unit 413 converts the expression format for each piece of processing data (one or more data groups) for each analysis unit whose expression format has been converted, using the conversion information for the data group to be processed. Restore the representation format of the target data group. Then, the inverse transform unit 413 supplies the processing data (one or more data groups) for each analysis unit whose expression format has been restored to the decoded image generation unit 414.

  Note that “returning the expression format” here refers to decoding of a decoding method corresponding to the encoding method employed in the conversion unit 403 in FIG. (Inverse quantization, etc.) may or may not be included. In the former case, it can be said that the decoding unit 54 is a data reverse conversion device that reversely converts the data representation format or a part thereof. In the latter case, the inverse conversion unit 413 decodes the digital signal Va supplied from the data decomposition unit 411 and restores the representation format of the signal obtained as a result.

  For example, in the decoding unit 54 in the examples of FIGS. 11 and 15, the inverse transform unit 413 includes an inverse orthogonal transform decoding unit 175.

  The decoded image generation unit 414 uses the processing data (one or more data groups) for each analysis unit whose expression format is returned to the original by the inverse conversion unit 413, and encodes the digital image input to the data decomposition unit 411. A digital image signal Vdg2, which is a decoded signal of the signal Vcd, is generated and supplied to the D / A converter 55 and the like in FIG.

  For example, in the decoding unit 54 in the example of FIG. 11, the decoded image generation unit 414 includes an addition unit 176 and a block decomposition unit 177. For example, in the decoding unit 54 in the example of FIG. 15, the decoded image generation unit 414 includes a block decomposition unit 177.

  Note that the analysis unit 412 to the decoded image generation unit 414 described above, when supplied with the digital signal Vb that is decoding information generation information, uses the decoding information generation information as described above to perform the various operations described above. Execute the process.

  The configuration of the decoding unit 54 having the functional configuration of FIG. 15 has been described above. Next, an example of decoding processing of the decoding unit 54 having the functional configuration of FIG. 15 will be described with reference to the flowchart of FIG.

  In step S221, the data decomposing unit 411 inputs the encoded digital image signal Vcd, for example, for one frame.

  In step S222, the data decomposing unit 411 decomposes the encoded digital image signal Vcd for one frame into a digital signal Va for one frame and a digital signal Vb for one frame.

  In step S223, the data decomposition unit 411 determines whether the conversion information has been decomposed.

  If the digital signal Vb decomposed from the encoded digital image signal Vcd in the process of step S222 includes conversion information for each analysis unit for one frame, it is determined in step S223 that the conversion information has been decomposed, The process proceeds to step S225 without executing the process of step S224. At this time, the digital signal Vb, which is conversion information for each analysis unit for one frame, is provided from the data decomposition unit 411 to the inverse conversion unit 413.

  On the other hand, the conversion information is not included in the digital signal Vb decomposed from the encoded digital image signal Vcd in the process of step S222, and conversion information generation information for each analysis unit for one frame is included. If it is determined that the conversion information is not decomposed in step S223, the digital signal Vb, which is conversion information generation information for each analysis unit for one frame, is provided from the data decomposition unit 411 to the analysis unit 412. The As a result, the process proceeds to step S224.

  In step S224, the analysis unit 412 generates conversion information for each analysis unit for one frame using each piece of conversion information generation information for each analysis unit for one frame. When the conversion information for each analysis unit for one frame is provided from the analysis unit 412 to the inverse conversion unit 413, the process proceeds to step S225.

  In step 225, the inverse conversion unit 413 uses the conversion information for each analysis unit for one frame provided from the data decomposition unit 411 or the analysis unit 412, and expresses the encoded digital image signal Vcd for one frame. Is restored to each analysis unit. That is, it can be said that the process of step S225 is the reverse process (inverse conversion process) of the conversion process of step S204 of FIG.

  The expression format of the encoded digital image signal Vcd is restored for each analysis unit, as described above, processing data (one or more data groups) for each analysis unit whose expression format is restored is obtained. Say that. Therefore, as a result of the processing in step S225, the processing data (one or more data groups) for each analysis unit whose expression format has been restored is provided from the inverse conversion unit 413 to the decoded image generation unit 414. Thereby, the process proceeds to step S226.

  In step S226, the decoded image generation unit 414 encodes one frame of the encoded digital image input in the process of step S221 from the processing data (one or more data groups) for each analysis unit whose expression format is restored. A digital image signal Vdg2 for one frame, which is a decoded signal of the signal Vcd, is generated.

  In step S227, the decoded image generation unit 414 outputs the digital image signal Vdg2 for one frame.

  In step S228, the decoding unit 54 determines whether or not processing for all frames to be processed has been completed.

  If the processing for all the frames has not been completed yet, it is determined as NO in Step S228, the processing is returned to Step S221, and the subsequent processing is repeated. That is, the encoded digital image signal Vcd for the next one frame is input in the process of step S221, and the decoding process described above is performed in the processes of steps S222 to S226. As a result, the digital image for the next one frame is obtained. A signal Vdg2 is obtained, and this digital image signal Vdg2 is output in the process of step S227.

  When the loop processing of steps S221 to S228 is performed on all frames and the digital image signal Vdg2 for the last frame is output, it is determined as YES in the next step S228, and FIG. The example decryption process ends.

  The example of the decoding process of the decoding unit 54 having the functional configuration of FIG. 19 has been described above with reference to FIG.

  That is, the details of the encoding unit 52 and the decoding unit 54 corresponding thereto in FIG. 2 have been described above with reference to FIGS. 3 to 20.

  By the way, the image processing system to which the present invention is applied is not limited to the example of FIG. 2 and can take various embodiments. That is, the image processing system to which the present invention is applied may be configured to include, for example, the encoding unit 52 having the functional configuration of FIG. 17 described above and the decoding unit 54 having the functional configuration of FIG. 19 described above. For example, the configuration is not particularly limited. Specifically, for example, an image processing system to which the present invention is applied can be configured as shown in FIG.

  That is, FIG. 21 shows a configuration example of an image processing system to which the present invention is applied.

  In the image processing system in the example of FIG. 21, the same reference numerals are given to portions corresponding to those in the example of the image processing system in FIG. 2, and the description thereof will be omitted as appropriate.

  21 is compared with FIG. 2, the encoding device 41 in the example of FIG. 21 is configured to further include an analog distortion adding unit 451 with respect to the encoding device 41 in the example of FIG. 2.

  As the name suggests, the analog distortion generation unit 451 positively generates analog distortion (forcibly adds analog noise) to the analog image signal Van1 output from the playback device 1. Then, the analog distortion generation unit 451 supplies the analog image signal Van1 to which analog noise is forcibly added to the A / D conversion unit 51.

  The arrangement position of the analog distortion generation unit 451 is not limited to the example of FIG. 58, and may be an arbitrary position. For example, the analog distortion generation unit 451 may be arranged after the D / A conversion unit 55 of the decoding device 42 or after the D / A conversion unit 12 of the playback device 1.

  Other configurations in the image processing system in the example of FIG. 21 are basically the same as the corresponding configurations in the image processing system in the example of FIG. Accordingly, the operation of the image processing system of the example of FIG. 21 is the same as that of the image processing system of the example of FIG. 2 except that analog distortion is forcibly added to the analog image signal Van1 by the analog distortion adding unit 451. The operation is basically the same. Therefore, the description is omitted.

  By the way, the above-described series of processes (or a part of them) can be executed by hardware, but can also be executed by software.

  In this case, the whole or a part of the encoding device 41 and the decoding device 42 (for example, the encoding unit 52 and the decoding unit 54) in the image processing system of FIG. 2 or FIG. It can be configured with a computer having a configuration.

  In FIG. 22, a CPU (Central Processing Unit) 501 executes various processes according to a program recorded in a ROM (Read Only Memory) 502 or a program loaded from a storage unit 508 to a RAM (Random Access Memory) 503. To do. The RAM 503 also appropriately stores data necessary for the CPU 501 to execute various processes.

  The CPU 501, ROM 502, and RAM 503 are connected to each other via a bus 504. An input / output interface 505 is also connected to the bus 504.

  The input / output interface 505 includes an input unit 506 including a keyboard and a mouse, an output unit 507 including a display, a storage unit 508 including a hard disk, and a communication unit 509 including a modem and a terminal adapter. It is connected. A communication unit 509 performs communication processing with other devices via a network including the Internet.

  A drive 510 is also connected to the input / output interface 505 as necessary, and a removable recording medium 511 made of a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like is appropriately installed, and a computer program read therefrom is read. Are installed in the storage unit 508 as necessary.

  When a series of processing is executed by software, a program constituting the software executes various functions by installing a computer incorporated in dedicated hardware or various programs. For example, a general-purpose personal computer is installed from a network or a recording medium.

  As shown in FIG. 22, the recording medium including such a program is distributed to provide the program to the user separately from the apparatus main body, and the magnetic disk (including the floppy disk) on which the program is recorded is distributed. , Removable recording media (packages) consisting of optical disks (including compact disk-read only memory (CD-ROM), DVD (digital versatile disk)), magneto-optical disks (including MD (mini-disk)), or semiconductor memory Media) 511, and is also configured with a ROM 502 on which a program is recorded, a hard disk included in the storage unit 508, and the like provided to the user in a state of being incorporated in the apparatus main body in advance.

  In the present specification, the step of describing the program recorded on the recording medium is not limited to the processing performed in chronological order according to the order, but is not necessarily performed in chronological order, either in parallel or individually. The process to be executed is also included.

  In addition, as described above, in this specification, the system represents the entire apparatus including a plurality of processing apparatuses and processing units.

  In addition, the encoding or decoding target is the image signal in the above-described example, but is not particularly limited to the image signal, and may be any other signal.

  Furthermore, although the unit of the various image processing described above is a frame in the above-described example, it may basically be an access unit. The access unit here refers to not only the entire image such as a frame or image data constituting the image, but also a unit of an image such as a part of an image (for example, a field) or image data.

It is a block diagram which shows the structural example of the conventional image display system. It is a block diagram which shows the structural example of the image processing system to which this invention is applied. The It is a block diagram which shows the structural example of the encoding part 52 of the image processing system of FIG. It is a figure explaining the example of a process of the large block part 122 of FIG. It is a figure explaining the example of a process of the motion vector detection part 123 of FIG. It is a figure explaining the example of a process of the motion vector detection part 123 of FIG. It is a figure explaining the example of a process of the motion vector destination small block formation part of FIG. It is a figure explaining the process example of the small block formation part 127 of FIG. It is a block diagram which shows the detailed structural example of the local decoding part 130 of FIG. 4 is a flowchart illustrating an example of an encoding process of an encoding unit 52 in the example of FIG. 3. FIG. 4 is a block diagram illustrating a configuration example of a decoding unit 54 corresponding to the encoding unit 52 of the example of FIG. 3 in the image processing system of FIG. 2. It is a flowchart explaining the example of a decoding process of the decoding part 54 of the example of FIG. It is a block diagram which shows the structural example of the encoding part 52 of the image processing system of FIG. 14 is a flowchart illustrating an example of an encoding process of an encoding unit 52 in the example of FIG. It is a block diagram which shows the structural example of the decoding part 54 corresponding to the encoding part 52 of the example of FIG. 13 among the image processing systems of FIG. It is a flowchart explaining the example of a decoding process of the decoding part 54 of the example of FIG. FIG. 3 is a functional block diagram illustrating a functional configuration example of an encoding unit 52 in the image processing system of FIG. 2. It is a flowchart explaining the example of an encoding process of the encoding part 52 of the functional structure of FIG. It is a functional block diagram which shows the functional structural example of the decoding part 54 corresponding to the encoding part 52 of the functional structure of FIG. 17 among the image processing systems of FIG. It is a flowchart explaining the example of a decoding process of the decoding part 54 of the functional structure of FIG. It is a block diagram which shows the structural example different from FIG. 2 of the image processing system to which this invention is applied. It is a block diagram which shows an example of the hardware constitutions of at least one part of the encoding apparatus or decoding apparatus with which this invention is applied.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Reproduction | regeneration apparatus, 2 Display part, 11 Decoding part, 12 D / A conversion part, 31 Recording / reproduction apparatus, 41 Encoding apparatus, 42 Decoding apparatus, 51 A / D conversion part, 52 Encoding part, 53 Recording part, 54 Decoding unit, 55 D / A conversion unit, 56 display unit, 121 input unit, 122 large block unit, 123 motion vector detection unit, 124 motion vector least block unit, 125 orthogonal transform base generation unit, 126 residual calculation Unit, 127 small block unit, 128 orthogonal transform coding unit, 129 superimposing unit, 130 local decoding unit, 131 frame memory, 132 output unit, 151 data decomposing unit, 152 motion vector small block unit, 153 orthogonal transform base Generator, 154 inverse orthogonal transform decoder, 155 adder, 156 block decomposer, 17 DESCRIPTION OF SYMBOLS 1 Input part, 172 Data decomposition | disassembly part, 173 Motion vector reduced block formation part, 174 Orthogonal transformation base production | generation part, 175 Inverse orthogonal transformation decoding part, 176 Addition part, 177 Block decomposition part, 178 Frame memory, 179 Output part, 401 Setting unit 401 Analysis unit, 403 conversion unit, 404 superimposition unit, 411 data decomposition unit, 412 analysis unit, 413 inverse conversion unit, 414 decoded image generation unit, 451 analog distortion addition unit, 501 CPU, 502 ROM, 503 RAM, 508 Storage unit, 511 removable recording medium

Claims (18)

Setting means for dividing the first access unit of input data composed of at least a first access unit and a second access unit into one or more first blocks ;
Each of the one or more first blocks set by the setting unit is sequentially set as a processing target one by one, and the motion vector for the second access unit for the first block to be processed a motion vector estimation means for estimating a,
Analyzing a second block in the second access unit that is separated from the position of the first block to be processed by an amount corresponding to the motion vector for the first block to be processed Representing the first block to be processed by extracting as a region, dividing the extracted second block into a plurality of analysis data, and performing principal component analysis on the plurality of analysis data An analysis means for individually generating a basis for converting the format for each analysis region;
Conversion means for generating output data obtained by converting the expression format of the first block to be processed by using a predetermined one of the generated bases for each analysis region , Data converter. Claims, characterized said output data, the output data in association with said base that is utilized by the conversion means when it is generated superimposed, further comprising output means for outputting the data obtained as a result of data conversion apparatus according to 1.   The converting means generates the output data by converting the expression format of each of a plurality of small blocks constituting the first block to be processed.
  The data conversion apparatus according to claim 2.   A difference block generating means for generating a difference block by calculating a difference between the first block and the second block to be processed;
  The conversion means generates the output data by converting the expression format of each of a plurality of small blocks constituting the difference block to be processed.
  The data conversion apparatus according to claim 2. Further comprising analog distortion generating means for generating analog distortion on the data ,
Data to which analog noise is added by the analog distortion generation means is input to the setting means as the input data.
Data conversion apparatus according to claim 1, characterized in that. A data conversion method of a data conversion device for converting an expression format of at least a part of input data composed of at least a first access unit and a second access unit,
A setting step of dividing the first access unit into one or more first blocks ;
Each of the one or more first blocks set by the processing of the setting step is sequentially set as a processing target one by one, and the second access unit for the first block of the processing target A motion vector estimation step for estimating a motion vector;
Analyzing a second block in the second access unit that is separated from the position of the first block to be processed by an amount corresponding to the motion vector for the first block to be processed Representing the first block to be processed by extracting as a region, dividing the extracted second block into a plurality of analysis data, and performing principal component analysis on the plurality of analysis data An analysis step for individually generating a basis for converting the format for each analysis region;
A conversion step of generating output data obtained by converting a representation format of the first block to be processed using a predetermined one of the generated bases for each analysis region; and Data conversion method. A computer for controlling an apparatus for converting an expression format of at least a part of input data composed of at least a first access unit and a second access unit ;
A setting step of dividing the first access unit into one or more first blocks ;
Each of the one or more first blocks set by the processing of the setting step is sequentially set as a processing target one by one, and the second access unit for the first block of the processing target A motion vector estimation step for estimating a motion vector;
Analyzing a second block in the second access unit that is separated from the position of the first block to be processed by an amount corresponding to the motion vector for the first block to be processed Representing the first block to be processed by extracting as a region, dividing the extracted second block into a plurality of analysis data, and performing principal component analysis on the plurality of analysis data An analysis step for individually generating a basis for converting the format for each analysis region;
A conversion step of generating output data obtained by converting a representation format of the first block to be processed using a predetermined one of the generated bases for each analysis region ;
The computer-readable recording medium which recorded the program for performing the process containing this . A computer for controlling an apparatus for converting an expression format of at least a part of input data composed of at least a first access unit and a second access unit ;
A setting step of dividing the first access unit into one or more first blocks ;
Each of the one or more first blocks set by the processing of the setting step is sequentially set as a processing target one by one, and the second access unit for the first block of the processing target A motion vector estimation step for estimating a motion vector;
Analyzing a second block in the second access unit that is separated from the position of the first block to be processed by an amount corresponding to the motion vector for the first block to be processed Representing the first block to be processed by extracting as a region, dividing the extracted second block into a plurality of analysis data, and performing principal component analysis on the plurality of analysis data An analysis step for individually generating a basis for converting the format for each analysis region;
A conversion step of generating output data obtained by converting a representation format of the first block to be processed using a predetermined one of the generated bases for each analysis region ;
A program for executing processing including The data composed of at least the first access unit and the second access unit is the original data,
One or more first blocks are set from the first access unit,
Each set of one or more of the first block are sequentially set one by one as a processing target, for the first block of the processing object, the motion vector is estimated for the second access unit,
In the second access unit, wherein the processing the first second block being spaced by an amount corresponding to the motion vector from the position of the target block is set as the analysis region, the first third of the processing target The basis for converting the expression format of one block divides the second block into a plurality of analysis data, and performs principal component analysis on the plurality of analysis data, so that each analysis area individually Generated on
Given one of said base of the generated analyzed for each region is being utilized, conversion data representation format of the first first block is generated is converted at the processing target has been utilized at that time the A data inverse conversion device in which data superimposed in association with a base is input as at least part of input data,
Separating means for separating the converted data and the base from the input data;
By the conversion data separated from the input data, inversely converts the representation format by using the separated said base by said separating means, further comprising an inverse transform means for generating the first block Characteristic data reverse conversion device. Wherein instead of the base that is used when converting data is generated, the base generation information is information necessary for generating the base is superimposed data, at least a portion of said input data Is entered as
The separating means separates the said base product information with the converted data,
Using the separated said base generating information was, inverse data of claim 9, wherein the further possible to obtain Bei basal generation means for generating the base that is used when the conversion data is generated Conversion device. The converted data is obtained by dividing the first block into a plurality of small blocks and converting each representation format of the small blocks;
The inverse transforming means generates the first block by inversely transforming each representation format of the plurality of small blocks using the base obtained by separation. Item 11. The data reverse conversion device according to Item 10 . The conversion data includes a plurality of difference blocks that are differences between the second block of the second access unit and the first block that are separated by an amount corresponding to the motion vector of the first block. Divided into small blocks, and the representation format of each small block is converted,
The inverse transforming means generates the first block by inversely transforming each representation format of the plurality of small blocks using the base obtained by separation. Item 11. The data reverse conversion device according to Item 10 . The data inverse conversion device according to claim 9 , wherein analog distortion is generated in the original data. The data composed of at least the first access unit and the second access unit is the original data,
One or more first blocks are set from the first access unit,
Each set of one or more of the first block are sequentially set one by one as a processing target, for the first block of the processing object, the motion vector is estimated for the second access unit,
In the second access unit, wherein the processing the first second block being spaced by an amount corresponding to the motion vector from the position of the target block is set as the analysis region, the first third of the processing target The basis for converting the expression format of one block divides the second block into a plurality of analysis data, and performs principal component analysis on the plurality of analysis data, so that each analysis area individually Generated on
Given one of said base of the generated analyzed for each region is being utilized, conversion data representation format of the first first block is generated is converted at the processing target has been utilized at that time the A data inverse transformation method of a data inverse transformation device in which data superimposed in association with a base is input as at least part of input data,
A separation step of separating the conversion data and the base from the input data;
By the said converting data separated from the input data by the processing of the separation step, inverse converts the representation format by using the separated said base, and a reverse transformation step of generating said first block A data inverse transformation method characterized by the above. The data composed of at least the first access unit and the second access unit is the original data,
One or more first blocks are set from the first access unit,
Each set of one or more of the first block are sequentially set one by one as a processing target, for the first block of the processing object, the motion vector is estimated for the second access unit,
In the second access unit, wherein the processing the first second block being spaced by an amount corresponding to the motion vector from the position of the target block is set as the analysis region, the first third of the processing target The basis for converting the expression format of one block divides the second block into a plurality of analysis data, and performs principal component analysis on the plurality of analysis data, so that each analysis area individually Generated on
Given one of said base of the generated analyzed for each region is being utilized, conversion data representation format of the first first block is generated is converted at the processing target has been utilized at that time the A computer that controls a device in which data superimposed in association with a base is input as at least part of input data ,
A separation step of separating the conversion data and the base from the input data;
By the said converting data separated from the input data by the processing of the separation step, inverse converts the representation format by using the separated said base, and inverse conversion step of generating the first block
The computer-readable recording medium which recorded the program for performing the process containing this . The data composed of at least the first access unit and the second access unit is the original data,
One or more first blocks are set from the first access unit,
Each set of one or more of the first block are sequentially set one by one as a processing target, for the first block of the processing object, the motion vector is estimated for the second access unit,
In the second access unit, wherein the processing the first second block being spaced by an amount corresponding to the motion vector from the position of the target block is set as the analysis region, the first third of the processing target The basis for converting the expression format of one block divides the second block into a plurality of analysis data, and performs principal component analysis on the plurality of analysis data, so that each analysis area individually Generated on
Given one of said base of the generated analyzed for each region is being utilized, conversion data representation format of the first first block is generated is converted at the processing target has been utilized at that time the A computer that controls a device in which data superimposed in association with a base is input as at least part of input data ,
A separation step of separating the conversion data and the base from the input data;
By the said converting data separated from the input data by the processing of the separation step, inverse converts the representation format by using the separated said base, and inverse conversion step of generating the first block
A program for executing processing including In an information processing system including, as components, a conversion unit that converts an expression format of image data, and an inverse conversion unit that inversely converts an expression format of the image data converted by the conversion unit.
The converter is
Each of the one or more first blocks set by the setting unit is sequentially set as a processing target one by one, and the motion vector for the second access unit for the first block to be processed a motion vector estimation means for estimating a,
Analyzing a second block in the second access unit that is separated from the position of the first block to be processed by an amount corresponding to the motion vector for the first block to be processed Representing the first block to be processed by extracting as a region, dividing the extracted second block into a plurality of analysis data, and performing principal component analysis on the plurality of analysis data An analysis means for individually generating a basis for converting the format for each analysis region;
Conversion means for generating output data obtained by converting the expression format of the first block to be processed by using a predetermined one of the generated bases for each analysis region , Information processing system. In an information processing system including, as components, a conversion unit that converts an expression format of image data, and an inverse conversion unit that inversely converts an expression format of the image data converted by the conversion unit.
By the conversion unit or a device other than the conversion unit,
The data composed of at least the first access unit and the second access unit is the original data,
One or more first blocks are set from the first access unit,
Each set of one or more of the first block are sequentially set one by one as a processing target, for the first block of the processing object, the motion vector is estimated for the second access unit,
In the second access unit, wherein the processing the first second block being spaced by an amount corresponding to the motion vector from the position of the target block is set as the analysis region, the first third of the processing target The basis for converting the expression format of one block divides the second block into a plurality of analysis data, and performs principal component analysis on the plurality of analysis data, so that each analysis area individually Generated on
Given one of said base of the generated analyzed for each region is being utilized, conversion data representation format of the first first block is generated is converted at the processing target has been utilized at that time the The data superimposed in association with the base is input to the inverse transform unit as at least part of the input data,
The inverse transformer is
Separating means for separating the converted data and the base from the input data;
By the conversion data separated from the input data, inversely converts the representation format by using the separated said base by said separating means, to have an inverse transform means for generating the first block Characteristic information processing system.

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