JP4560988B2 - Photodetector - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a dark current canceling circuit for suppressing variations in removed components when removing dark current components such as a super-wavelength infrared photodiode and a quantum well infrared sensor (QWIP).
[0002]
[Prior art]
Infrared detectors utilizing the interaction of infrared photon energy with charged particles in the semiconductor band structure include a PC (Photo Conductive) type that measures the amount of infrared radiation by the resistance change of the bulk semiconductor by direct transition of charged particles. There is a PV (Photo Voltaic) type that measures the amount of infrared radiation by the voltage or current generated at the PN junction. Furthermore, there is QWIP that measures the amount of infrared radiation by resistance change due to intra-band transition of a quantum well in which a semiconductor is formed of a multilayer thin film.
[0003]
Due to recent advances in silicon (Si) technology, these infrared detectors are combined with a signal processing circuit (hereinafter referred to as a Si signal readout circuit) realized using a Si integrated circuit, and photoelectrically converted in each pixel. The signal is processed as a time-series signal. FIG. 4 is a view showing the appearance of the infrared detector. In the figure, 31 is an infrared detector, 32 is an infrared sensor array, 33 is a Si signal readout circuit board, and 35 and 36 are shifts for sequentially switching signal readout circuits arranged in a two-dimensional matrix to form time-series signals. Register, 34 is a bonding pad for connecting the power supply, pulse, output, etc. to the outside, 37 is for electrically connecting each infrared sensor and signal readout circuit one-to-one, and also for mechanical connection In bump. The infrared detector 31 is mounted in a vacuum vessel and is used after being cooled to a substantially liquid nitrogen temperature (˜77K).
[0004]
With QWIP, as the photosensitive wavelength increases, the height of the band barrier decreases, and the number of charged particles that are thermally excited is greater than the number of charged particles that are excited by the interaction with photons. The photocurrent is superimposed. As a result, the dark current occupies most of the dynamic range in the output of the detector, and the signal becomes small enough to be buried in the performance of signal processing in the subsequent electric circuit. Therefore, it is desired to provide a dark current canceling circuit in the Si signal processing circuit to expand the output dynamic range.
[0005]
(First conventional example)
Alexander Krymski has proposed a method for canceling a constant current from the detector output in a Si signal processing circuit. ("Offset-calibration current readout for LWIR photodiode FPA"; SPIE Vol.2745 pp.78-88)
FIG. 5 is a diagram showing a dark current canceling circuit using a current mirror circuit. When the constant current (Iref) is set and the switch S1 is turned on, the gate voltage of M3 is stored in the capacitor C so that the current Iref flows through the readout MOSFET M1. Next, when the switch S1 is turned off and light enters the photodiode PD, an Iph current is generated, and the current flowing through the photodiode becomes Iref + Iph. As a result of the read MOSFET M1 being controlled by M2 and M3 so as to supply a current corresponding to this current value to M1, an output current Iout = −Iph is obtained. That is, the dark current is canceled and only the change in the generated current is observed as an output by the photodiode PD.
(Second conventional example)
FIG. 6 is a diagram showing a basic circuit for signal detection of the QWIP optical sensor array.
[0006]
In the figure, 1 is a QWIP sensor, 2 is an input FET, 3 is a storage capacitor, 4 is a reset FET, 5 is a reset power source, 6 is a constant current source FET, 7 is a constant current source power source for the constant current source FET 6, 8 Is a bias power source of the optical sensor, and 9 is an output voltage appearing at both ends of the storage capacitor 3.
[0007]
First, the reset FET 4 is turned on to charge the storage capacitor 3. Next, the reset FET 4 is turned off, the input FET 2 and the constant current source FET 6 are turned on simultaneously, the charge stored in the storage capacitor 3 is discharged to the QWIP sensor 1, and the degree of decrease in the charge amount is measured. The resistance value of the QWIP sensor 1 is to be measured. A bias power source 8 is used to set operating points of the QWIP sensor 1 and the input FET 2. At the time of discharging, the constant current source FET 6 is turned on. Therefore, if a charge close to the discharge amount is charged, the output maintains a value close to the initial reset level, and constant dark current removal is performed. It will be broken.
[0008]
[Problems to be solved by the invention]
In the first conventional example, the operation of one pixel is described. When Iref is set in the case of a sensor array, the gate voltage of the p-channel transistor is set like the constant current source transistor 6 of the second conventional example. Is controlled to be a constant current source. That is, in both the first and second conventional examples, a constant current source controlled by the gate voltage is used to set a current value that cancels the dark current. Since the current value of the dark current is on the order of nA to μA, the transistor operates in a sub-threshold region. The drain current in the sub-threshold region is, for example, 77K cooled, and assuming that there is no trap in the channel region of the transistor, if the gate threshold voltage varies by about 15mV, the current value will differ by about an order of magnitude. . In an actual device, there is a variation in the threshold voltage of the gate within the chip within ± several mV. For example, if there is a variation in the threshold of ± 5 mV, the ratio of the minimum value of the Iref current to the maximum value is about 20%. The dark current cannot be removed uniformly.
[0009]
Therefore, a method of correcting this variation in two steps was devised.
[0010]
[Means for Solving the Problems]
(Claim 1)
The photodetector of the present invention is a detection circuit board in which a plurality of photosensors are arranged in a two-dimensional matrix and a signal detection circuit that detects signals corresponding to each of the photosensors is arranged in a two-dimensional matrix. The signal detection circuit includes a dark current canceling circuit that cancels the dark current of each photosensor using two constant current source transistors.
[0011]
That is, in order to set the current that flows for dark current cancellation, it is difficult to avoid variations in the current value due to variations in the threshold voltage of the first constant current source transistor.
Therefore, the first constant current source transistor controls the gate voltage with the voltage supplied from the outside of the detector to perform rough adjustment of the supply current, and can correct the amount of variation occurring at that time, and other constant current source circuit for fine adjustment To perform two-stage correction.
(Claim 2)
In the photodetector of the present invention, the signal detection circuit has a storage capacitor and a sample hold circuit, and the first constant current power transistor among the constant current source transistors is gate voltage from the outside of the photodetector. The dark current is coarsely adjusted, the storage capacitor integrates the coarsely adjusted dark current, the sample and hold circuit holds the voltage of the storage capacitor, and the other current source transistors are gated at the sample and hold voltage. The dark current is finely adjusted by controlling.
[0012]
That is, the current value set by the first constant current source transistor can be converted into a V-order signal by the storage capacitor, and the voltage variation is supplied as the gate voltage of the other constant current source transistors, so Thus, a finely adjusted dark current canceling current can be generated.
(Claim 3)
In the photodetector of the present invention, the signal detection circuit includes an input transistor that controls connection between the photosensor and the storage capacitor, and a reset transistor that charges and discharges the charge of the storage capacitor. The channel characteristics are opposite to those of the input transistor and the reset transistor.
[0013]
That is, while the signal detection circuit is designed to operate with reference to the substrate potential (for example, n-channel), the constant current source transistor must be operated with reference to the drain power supply voltage. Accordingly, a constant current cannot be generated unless channel characteristics (for example, p-channel) opposite to those of other transistors in the signal detection circuit are used. Further, when the sampled and held voltage is large, a small current value may be generated as a finely adjusted current, and consistency of operating characteristics can be obtained.
(Claim 4)
In the photodetector of the present invention, the drain of the first constant current source transistor is connected to a DC power source, and the drain of the other constant current source transistor is connected to a pulse power source.
[0014]
In order to generate a steady current, the first constant current source transistor supplies DC power to the drain and performs control in the subthreshold region. On the other hand, since the other constant current source transistors are supplied with a gate voltage of V order from the sample hold, the control operates in the square characteristic region of the transistors. The current value is in the order of mA, and the necessary charge is supplied in a short time. However, the purpose of dark current removal is to constantly supply an amount commensurate with the discharge current passing through the detector over the period during which the detector detects the signal. Therefore, the other constant current source transistors need to be repeatedly put in the signal detection period, such as waiting for a short-time current, and then flowing, so as not to increase the voltage change of the storage capacitor. . For this reason, the drains of the other constant current source transistors are used as pulse power supplies, and the necessary charges are sequentially supplied in pulses.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a diagram showing a circuit configuration for removing dark current.
[0016]
In the figure, the same reference numerals as those in FIG. 6 denote the same functions. Reference numeral 14 denotes a second reset FET for providing two kinds of reset levels, reference numeral 15 denotes a drain power supply of the second reset FET 14, Is a reset switch FET that is turned on only when one of the two reset FETs is used, 12 is a sample hold FET that divides the charge of the storage capacitor 3 with the stray capacitance, and 16 is a second constant current source FET, The sampled and held voltage is applied to the gate, 17 is a power supply for the constant current source, 13 is a sample and hold reset FET for resetting the sampled and held voltage, and 18 is a drain power supply for the sample and hold reset FET1 3. is there.
[0017]
The dark current removal method will be described using this circuit configuration. The determination of the dark current removal amount consists of two operation modes. The first mode sets a rough removal current, and the second mode makes the removal current uniform in total with the first removal current.
[0018]
In the first mode, first, the storage capacitor 3 is reset to the level (about 0.6) of the second reset power supply 15 of the second reset FET 14. Further, the gate voltage of the second constant current source FET 16 is raised to the sample hold reset power supply 18 by the sample hold reset FET 13 so that the second constant current source FET 16 does not operate. In this state, charges are stored in the storage capacitor 3 from the first constant current source FET 6. When the threshold voltage of the first constant current source FET is low, a large amount of charge is accumulated, and when the threshold voltage is high, only a small amount of charge is accumulated. That is, the output 9 outputs a large voltage when the threshold voltage is low and a small voltage when the threshold voltage is high.
[0019]
In the second mode, the storage capacitor end voltage at this time is supplied to the gate electrode of the second constant current source FET 16 by turning on the sample hold FET 12. At this time, since the stray capacitance composed of the diffusion layer of the sample hold FET 12, the diffusion layer of the sample hold reset FET 13, the gate and wiring of the second constant current source FET 16 and the charge of the storage capacitor 3 are distributed, the stray capacitance is as small as possible. Is good. Since the gate voltage of the second constant current source FET 16 is a large voltage that far exceeds the threshold voltage, this p-channel transistor exhibits an operation in the square characteristic region, and for a large voltage, the current value is reduced to a small voltage. Operates with a large current. However, since the current flowing through the second constant current source FET 16 is two to three orders of magnitude larger than the current flowing through the first constant current source FET 6, in order to match the amount of charge obtained from the first constant current source, It is necessary to control by the time when the current is passed by the two current sources.
[0020]
By performing the above adjustment, the level of dark current removal in each photosensor array can be made uniform.
[0021]
FIG. 2 is a time chart for explaining the circuit operation of the present invention (the circuit shown in FIG. 1).
1) The storage capacitor 3 is discharged. (Period T1)
The input FET 2, the first and second constant current sources FET 6, 16 and the sample hold FET 12 are turned off, the reset switch FET 11 and the second reset FET 4 are turned on, and the storage capacitor 3 is connected to the voltage of the second reset power supply 15 ( About 0.6V).
2) The dark current canceling current is stored in the storage capacitor 3 from the first constant current source FET 6 and the gate voltage is adjusted so that the storage capacitor end voltage is not saturated. (Period T2)
The reset switch FET11 is turned off, and the gate voltage is adjusted so that the gate voltage of the first constant current source transistor 6 is less than the threshold voltage of the transistor and is approximately equal to the current flowing by biasing the sensor array.
3) The sample hold FET 12 is turned on to supply a voltage to the gate of the second constant current source FET 16. (End of period T2)
When a certain accumulation time elapses, the first constant current source FET 6 is turned off, the sample hold FET 12 is turned on, and the storage capacitor end voltage is supplied to the gate of the second constant current source FET 16.
4) Pulse driving the second constant current source power source 17 of the second constant current source FET 16 to adjust the pulse duty so that the storage capacitor end voltage is within the output dynamic range. (Period T3)
The operation in the periods T2 and T3 will be described in a little more detail with reference to FIG. 3 showing how to determine the dark current removal amount.
[0022]
In the period T2, when the gate voltage of the first constant current source FET 6 is adjusted and charges are stored in the storage capacitor, when the threshold voltage of the first constant current source FET 6 is low, as shown in FIG. Charge is accumulated. On the other hand, when the threshold voltage is high, the increase is smaller than a, as in b. Then, at the end of the period 2, the sample hold switch FET is turned on, and the voltages a and b are biased to the gate of the second constant current source FET 16 respectively, and the period 3 starts. When the gate voltages a and b are applied, Ia and Ib are tried to flow as drain currents, respectively. However, since this amount of current is several orders of magnitude larger than the current flowing in the first constant current source FET 6, it immediately fills the storage capacitor 3. Therefore, when the second constant current source power supply 17 is applied in a pulse form, the pulse duty is increased as a stepped waveform such as a1 and b1 in FIG. 3, and the pulse duty is adjusted so that the storage capacity is not saturated. This is possible. In periods T1 and T2, the amounts of dark current to be finally removed are a + a1 and b + b1, and it can be seen that the variation can be made smaller than the amount of removal determined only by the first constant current source FET6.
5) Charge the storage capacity. (Period T4)
The reset switch FET11 and the second reset FET14 are turned on to charge the storage capacitor 3 to the voltage of the second reset power supply 15 (+ Vdd).
6) Open the input FET 2 and detect an infrared signal while supplying current from the first and second constant current sources FET 6 and 16. (Period T5)
The electric charge stored in the storage capacitor 3 tends to continue to flow as a current via the input FET 2 and the sensor. Here, when current is supplied from the first and second constant current sources FETs 6 and 16, there is almost no reduction in charge in the storage capacitor 3. That is, by canceling the dark current, the sensor observation time (accumulation time) can be extended, and the sensitivity of the infrared detector can be improved.
[0023]
In the above description, the dark current removal circuit using two constant current source transistors has been described, but there is a square characteristic of the second constant current source transistor, and when this square characteristic needs to be corrected, It is clear that a high degree of correction is possible by providing the third and fourth constant current sources.
[0024]
In the above explanation, the application to QWIP has been mainly carried out, but it goes without saying that this implicit current elimination circuit can also be applied to PV type and PC type detectors.
[0025]
【The invention's effect】
When the current in the subthreshold region below the threshold voltage is used for dark current cancellation, a coarse current value having a large variation is set in the first constant current source circuit, and the variation is fed back to the second constant current source circuit. In addition, uniform dark current removal can be realized by pulse driving the second constant current source circuit. As a result of uniform dark current removal, the storage time can be extended and the SN ratio of the detector can be improved.
[Brief description of the drawings]
FIG. 1 is a diagram showing a dark current canceling circuit of a QWIP photosensor array. FIG. 2 is a time chart showing the operation of each part. FIG. 3 is a diagram showing how to determine a dark current removal amount. FIG. 5 is a diagram showing a dark current canceling circuit using a current mirror circuit. FIG. 6 is a diagram showing a basic circuit for signal detection of a QWIP optical sensor array.
1 Sensor 2 Input FET
3 Storage capacitor 4 (first) reset FET
5 (first) reset power supply 6 (first) constant current source FET
7 (First) Constant Current Source 8 Sensor Bias Power 9 Signal Output 11 Reset Switch FET
12 Sample hold switch FET
13 Sample hold reset switch FET
14 Second reset FET
15 Second reset power supply 16 Second constant current source FET
17 Second constant current power source 18 Sample hold reset power source

Claims (3)

In a photodetector having an optical sensor array in which a plurality of optical sensors are arranged in a two-dimensional matrix, and a detection circuit board in which signal detection circuits for detecting signals corresponding to the individual optical sensors are arranged in a two-dimensional matrix.
A first constant current source transistor which is controlled by a DC gate voltage equal to or lower than a threshold voltage and outputs a DC constant current;
A second constant current source transistor that outputs a constant current pulse;
A storage capacity for storing the DC constant current for a predetermined period;
A sample-and-hold circuit that holds the voltage of the storage capacitor that has reached the threshold voltage of the second constant current source transistor after the predetermined period has elapsed and supplies the voltage to the gate of the second constant current source transistor; ,
A dark current canceling circuit that is provided in the signal detection circuit and cancels the dark current of each photosensor by the DC constant current and the constant current pulse;
A photodetector comprising: The signal detection circuit includes an input transistor that controls connection between the photosensor and the storage capacitor, and a reset transistor that charges and discharges the storage capacitor.
2. The photodetector according to claim 1, wherein the first and second constant current source transistors have channel characteristics opposite to those of the input transistor and the reset transistor. The photodetector according to claim 1, wherein a drain of the second constant current source transistor is connected to a pulse power source.

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