JP4499000B2 - Power supply device - Google Patents

Description

The present invention relates to a power supply device for supplying power to the video equipment several systems.

  In a conventional power supply device, if the voltage change during operation of the video camera exceeds a predetermined range, or if the video signal cannot be detected on the power supply side even within the predetermined range, it is determined that the video camera is faulty or misconnected. Thus, it has a protection function for stopping power supply from the power supply unit to the video camera unit (see, for example, Patent Document 1).

JP 7-2222039 A

  In such a conventional power supply device, the video camera and the voltage detection circuit in the power supply device are connected in a one-to-one relationship through a transmission cable. For this reason, when the power supply apparatus is compatible with a plurality of video camera connections, it is necessary to mount the same number of voltage detection circuits and peripheral circuits as the video camera in the power supply apparatus. For this reason, when the power supply apparatus is adapted to connect to a plurality of video cameras, the number of parts in the power supply apparatus increases, making it difficult to make the system inexpensive or small.

  The present invention has been made in order to solve the above-described problems. Even when an imaging device such as a plurality of video cameras is connected, a power supply device capable of appropriately performing power supply control is reduced. The goal is to achieve with a score.

The power feeding device of the present invention is
A plurality of connection terminals to which transmission lines for transmitting video signals captured by the imaging device and power for driving the imaging device are connected;
In the power feeding device for the imaging apparatus, comprising: a separating unit that separates and outputs the video signal for each signal input from the plurality of connection terminals;
Selection means for sequentially selecting and outputting the video signals separated by the separation means at predetermined time intervals;
Sampling means for sampling the video signal selected and output by the selection means at a predetermined sampling period;
Maximum value extraction means for outputting a maximum value from the sample values output within the predetermined time from the sampling means;
A minimum value extracting means for outputting a minimum value from the sample values output within the predetermined time from the sampling means;
Difference calculation means for outputting a difference value between the maximum value output from the maximum value extraction means and the minimum value output from the minimum value extraction means;
The case where the difference value by comparing the difference the difference value and a predetermined value output from the calculation means is larger than the predetermined value 1, and the comparison means otherwise outputting a detection signal which becomes 0,
Power supply means for controlling power supply to the imaging device based on the detection signal output from the comparison means ,
The predetermined value is, you characterized in that a value corresponding to the amplitude of the synchronization signal included in the video signal.

  According to the present invention, since the selection circuit that sequentially selects and outputs one of the video signals separated from the signal input to each of the connection terminals for each predetermined period is provided, a plurality of imaging devices are provided in the power feeding device. Even when they are connected, it is sufficient to have one video detection circuit in the power feeding device. That is, since it is possible to cope with connection with a plurality of imaging devices with the minimum necessary video detection circuit, the number of components inside the power feeding device can be reduced, and the power feeding device can be made small and inexpensive.

  Further, in the power supply device according to the present invention, the power supply voltage is supplied only to the connection terminal to which the video camera is connected among the plurality of connection terminals, thereby preventing a short fire accident due to incorrect connection of non-compliant equipment. can do.

Embodiment 1 FIG.
FIG. 1 shows an imaging system including a power supply apparatus according to Embodiment 1 of the present invention. The illustrated imaging system includes a power feeding device 10 and a plurality of, for example, nine imaging devices (video cameras) CAM1 to CAM9, a monitor 11, transmission lines L1 to L9 that connect the power feeding device 10 and the imaging devices CAM1 to CAM9, and Transmission lines L <b> 1 to L <b> 9 connecting the power feeding device 10 and the monitor 11 are included.
The power supply device 10 is configured as a unit separate from the imaging devices CAM1 to CAM9, and has an independent housing 10a. The power supply device 10 is supplied with power from an external power source, for example, from a commercial power source.
The power feeding device 10 has a function of supplying a power supply voltage to the imaging devices CAM1 to CAM9 via the transmission line 13, and also receives video signals SIG1 to SIG9 supplied from the imaging devices CAM1 to CAM9 via the transmission lines L1 to L9. Has the function of processing.

  FIG. 9 is a diagram for explaining the transmission of the power supply voltage and the video signal via the transmission lines L1 to L9. In order to simplify the description, FIG. 9 illustrates an example in which the imaging device CAM and the power feeding device 10 are connected one-to-one. The power supply voltage generated by the power supply circuit 25 in the power supply apparatus 10 is supplied to the image pickup apparatus CAM through a transmission line L that connects the image pickup apparatus CAM and the power supply apparatus 10. The power generation circuit 103 in the imaging device CAM generates power for driving each circuit in the imaging device CAM from the power supply voltage supplied via the transmission line L. Further, the video signal captured by the imaging circuit 101 in the imaging device CAM is superimposed on the transmission line L by the video signal superimposing circuit 102 and sent to the power feeding device 10. The video signal superimposed on the transmission line L is separated by the separation circuit 18 in the power feeding apparatus 10 and output to the processing circuit 105 at the subsequent stage. The video signal can be superimposed or separated by a circuit using a capacitor or the like, and its configuration is widely known.

  As shown in FIG. 2, the power supply apparatus 10 includes connection terminals C1 to C9, a power supply circuit 25, a separation circuit 18, a selection circuit 19, an A / D conversion circuit 20, a maximum value detection circuit 21, and a minimum value. It has a detection circuit 22, a difference calculation circuit 23, a comparison circuit 24, a timing controller 26, a signal processing circuit 27, a connection terminal C0, and a user interface 28.

The connection terminals C1 to C9 connect the imaging devices CAM1 to CAM9 through the transmission lines L1 to L9.
The power supply circuit 25 supplies power to devices connected to the connection terminals C1 to C9.
The power supply circuit 25 controls power supply based on a detection signal S10 output from the comparison circuit 24 described later, and is also called power supply means.

The separation circuit 18 separates the video signals SIG1 to SIG9 from the signal input to the separation circuit 18.
The selection circuit 19 sequentially selects (switches) video signals SIG1 to SIG9 (respectively input to the video signal input terminals C1 to C9) input from the separation circuit 18 and outputs them as the video signal S5. To do.

  The A / D conversion circuit 20 outputs a value S6 obtained by A / D converting the video signal S5 output from the selection circuit 19 into a digital value. That is, the A / D conversion circuit 20 samples (samples) the video signal S5 output from the selection circuit 19 at a predetermined sampling period (sampling period), that is, in synchronization with a sampling pulse S3 having a predetermined period. , A / D converted value (also referred to as “sample value” or “sample value”) S6 is output.

The maximum value detection circuit 21 outputs a maximum value S7 within a predetermined period of the values S6 sequentially output from the A / D conversion circuit 20.
The minimum value detection circuit 22 outputs a minimum value S8 within a predetermined period of the values S6 sequentially output from the A / D conversion circuit 20.
The difference calculation circuit 23 outputs a difference S9 between the maximum value S7 within the predetermined period detected by the maximum value detection circuit 21 and the minimum value S8 within the predetermined period detected by the minimum value detection circuit 22. This difference is also called an amplitude value of the video signal.
The maximum value detection circuit 21, the minimum value detection circuit 22, and the difference calculation circuit 23 constitute detection means for detecting the amplitude value of each video signal selected and output by the selection means (19).

  The comparison circuit 24 compares the value (amplitude value) S9 output from the difference calculation circuit 23 with a certain threshold value, and outputs the result S10. For example, the comparison circuit 24 outputs a detection signal (S10) indicating significance (for example, 1) when the amplitude value output from the difference calculation circuit 23 is larger than a threshold value.

The timing controller 26 outputs signals S3 and S4 described later.
The selection circuit 19, A / D conversion circuit 20, maximum value detection circuit 21, minimum value detection circuit 22, difference calculation circuit 23, comparison circuit 24 and timing controller 26 constitute a video detection device.

The signal processing circuit 27 processes the video signal output from the separation circuit 18 and outputs it to the monitor 11 through the transmission line 13.
The connection terminal C0 is for connecting the monitor 11.
The user interface 28 is used for user mode selection and video selection as will be described later.

  In the present embodiment, video signals SIG1 to SIG9 output from the imaging devices CAM1 to CAM9 to the power supply device 10 through the transmission lines L1 to L9 and output from the power supply device 10 to the monitor 11 through the transmission line 13, respectively. The video signal format will be described using the National Television System Committee (NTSC) television system, but the same effect can be obtained even when the Phase Alternation Line (PAL) system or the Sequential Couleur A Memoire (SECAM) system is used. .

  The selection circuit 19, A / D conversion circuit 20, maximum value detection circuit 21, minimum value detection circuit 22, difference calculation circuit 23, comparison circuit 24, and power supply circuit 25 receive signals S 3 and S 4 output from the timing controller 26. Operates synchronously

  3A and 3B show images displayed on the monitor 11. FIG. 3A shows a multi-monitor mode in which all the images 1 to 9 based on the video signals SIG1 to SIG9 output from the nine imaging devices CAM1 to CAM9 are displayed simultaneously, and FIG. 3B shows nine imaging devices CAM1. This is a state of a single monitor mode in which only one selected image is displayed among the images 1 to 9 based on the image signals SIG1 to SIG9 output from the CAM9.

  It should be noted that operations such as switching between the multi-monitor mode and the single monitor mode and selecting which one of the images 1 to 9 to display in the single monitor mode can be performed via the user interface 28 mounted on the power supply apparatus 10. It can be done.

  4A to 4M are timing charts showing the operation of the power supply apparatus 10. Among the signals shown in this figure, FIG. 4 (a) shows the connection terminal Ci (i = 1 to 9). Hereafter, i is attached to the symbol as a code indicating any one of 1 to 9. 4B represents the video signal SIGi separated in the separation circuit 18 from the signal input to the signal input to the connection terminal Ci + 1 (when i = 9, the signal input to the connection terminal C1). Represents the video signal SIGi + 1 separated by the separation circuit 18. FIGS. 4C to 4J show waveforms of signals or voltages S3 to S10 shown in FIG. 2, respectively. Signals S3 and S4 are output from the timing controller 26. Among them, the signal S3 is a sampling pulse, the signal S4 is a switching control signal for the plurality of video signals SIG1 to SIG9, and corresponds to a vertical synchronization signal. The switching control signal S4 has a cycle that is an integral multiple of the sampling pulse S3, and is output in synchronization with the sampling pulse S3. The selection circuit 19, the A / D conversion circuit 20, the maximum value detection circuit 21, the minimum value detection circuit 22, the difference calculation circuit 23, the comparison circuit 24, and the power supply circuit 25 operate in synchronization with these two signals S3 and S4. The signal S11 represents the result of determining whether the imaging device CAMi is connected to the connection terminal Ci, and is generated and used inside the power supply circuit 25. Symbol S12 represents a power supply voltage supplied from the power supply circuit 25 to the device connected to the connection terminal Ci, and symbol S13 represents a power supply voltage supplied from the power supply circuit 25 to the device connected to the connection terminal Ci + 1. Hereinafter, the power feeding operation to the device connected to the connection terminal Ci of the power feeding device 10 will be described with reference to FIG.

  First, at time T0, a switching control signal S4 is output from the timing controller 26. Further, as indicated by time T5, the switching control signal S4 is output at regular intervals thereafter.

  The power supply circuit 25 forcibly outputs the power supply voltage to the device connected to the connection terminal Ci in synchronization with the switching control signal S4 at time T1, as represented by reference numeral S12 in FIG. (That is, if the power supply voltage has already been output before time T1, the output of the power supply voltage is continued. If the power supply voltage has not been output before time T1, output of the power supply voltage is started. .) After that, at time T10, it is determined whether or not the imaging device CAMi is correctly connected to the connection terminal Ci by a method described later. Based on the result, the power supply circuit 25 at FIG. As shown by the waveform of S12, either the continuation or stop of the power supply voltage output is performed. Further, as represented by reference numeral S13 in FIG. 4 (m), the power supply voltage is forcibly output to the device connected to the connection terminal C (i + 1) in synchronization with the switching control signal S4 at time T6.

  The selection circuit 19 outputs any one of the video signal SIG1 to the video signal SIG9 as the video signal S5, as shown in FIG. 4E, in synchronization with the switching control signal S4 of FIG. . That is, at time T1, the video signal SIGi is output in synchronization with the switching control signal S4, and at time T6, the video signal SIGi + 1 is output in synchronization with the switching control signal S4.

  The A / D conversion circuit 20 samples the video signal S5 output from the selection circuit 19 at a predetermined sampling period, that is, in synchronization with a sampling pulse S3 having a predetermined period, and A / D-converted value S6 (FIG. 4). (F)) is output. In the present embodiment, the video signal SIGi is A / D converted from time T2 to time T6. In the following description, the output value S6 of the A / D conversion circuit 20 is 8 bits.

  As shown in FIG. 4G, the maximum value detection circuit 21 compares the output value S6 of the A / D conversion circuit 20 with the value 0 at time T3, and holds and outputs the larger value as the maximum value S7. To do. From time T4 to time T7, in synchronization with the sampling pulse S3, the output value S6 of the A / D conversion circuit 20 is compared with the value held in the maximum value detection circuit 21, and a large value is held as the maximum value S7. Then output. By operating in this manner, the maximum value MAXSIGi of the video signal SIGi is output as the signal S7 from the maximum value detection circuit 21 at time T7. Next, at time T8, the maximum value detection circuit 21 compares the output value S6 of the A / D conversion circuit 20 with the value 0, and holds and outputs the larger value as the maximum value S7. Thereafter, the maximum value MAXSIGi + 1 of the video signal SIGi + 1 is detected by the same operation as described above.

  As shown in FIG. 4 (h), the minimum value detection circuit 22 compares the output value S6 of the A / D conversion circuit 20 with the value 255 at time T3, and holds and outputs the smaller value as the minimum value S8. To do. From time T4 to time T7, in synchronization with the sampling pulse S3, the output value S6 of the A / D conversion circuit 20 is compared with the value held in the minimum value detection circuit 22, and the small value is held as the minimum value S8. Then output. By operating in this way, at the time T7, the minimum value MINSIGI of the video signal SIGi is output as the signal S8 from the minimum value detection circuit 22. Next, at time T8, the minimum value detection circuit 22 compares the output values S6 and 255 of the A / D conversion circuit 20, and holds and outputs the smaller value as the minimum value S8. Thereafter, the minimum value MINSIGi + 1 of the video signal SIGi + 1 is detected by the same operation as described above.

The difference calculation circuit 23, as shown in FIG. 4 (i), at the time T8, the maximum value MAXSIGi of the video signal SIGi output from the maximum value detection circuit 21 and the video signal output from the minimum value detection circuit 22. The difference DIFi of the minimum value MINSIGi of SIGi is calculated and output.
Note that the difference DIFi-1 with the subscript i-1 is obtained from the maximum value MAXSIGi-1 and the minimum value MINSIGi-1 obtained in the vertical synchronization pulse period immediately before the maximum value MAXSIGi and the minimum value MINSIGi. Represents the calculated difference. The same applies hereinafter.

  As shown in FIG. 4 (j), the comparison circuit 24 outputs the result RSCi as a signal S10 as a result of comparing the output value S9 of the difference calculation circuit 23 with a predetermined threshold at time T9. That is, a value 1 (significant value) is output when the output value S9 of the difference calculation circuit 23 is greater than a predetermined threshold value, and a value 0 is output when it is smaller.

  As illustrated in FIG. 4K, the power supply circuit 25 determines whether the imaging device CAMi is connected to the connection terminal Ci based on the output value S10 of the comparison circuit 24 at time T10. That is, when the output value S10 of the comparison circuit 24 is a value 1 at time T10, it is determined that the imaging device CAMi is connected, and the value JDGi representing the determination result is updated to, for example, a value 1. Conversely, when the output value S10 of the comparison circuit 24 is 0, it is determined that no device is connected to the connection terminal Ci, or that a device other than the imaging device CAMi is erroneously connected. The value JDGi representing the determination result is updated to 0, for example. Then, the power supply circuit 25 continues or stops the output of the power supply voltage according to the value of JDGi at time T11 as represented by reference numeral S12 in FIG. That is, at time T11, when the value of JDGi is 1, the output of the power supply voltage is continued, and when the value of JDGi is 0, the output of the power supply voltage is stopped. Further, the connection determination result JDGi here is stored and held in the power supply circuit 25 until it is next determined whether the imaging device CAMi is connected to the connection terminal Ci.

  The power supply apparatus 10 performs power supply to the imaging apparatuses CAM <b> 1 to CAM <b> 9 by sequentially repeating the above operation for all the connection terminals C <b> 1 to C <b> 9.

  The above is the power feeding operation to the device connected to the connection terminal Ci of the power feeding apparatus 10.

  Here, when the sampling pulse S3, the switching control signal S4, and the threshold value used in the comparison circuit 24 satisfy certain conditions shown below, it is possible to more reliably determine whether or not the imaging device CAMi is connected to the connection terminal Ci. It becomes possible to do. This will be described below.

  First, the conditions relating to the threshold used in the comparison circuit 24 will be described.

  FIG. 5 is a schematic diagram of an NTSC video signal. The details are publicly known according to the specification of the NTSC system.

  In the NTSC video signal, as shown in FIG. 5, video signals representing even-field video and odd-field video are alternately transmitted at a period Tf. From the start point Es of the vertical blanking period of the even field in FIG. 5 to the start point Os of the vertical blanking period of the next odd field of the even field and from the start point Os of the vertical blanking period of the odd field The period up to the start point Es of the vertical blanking period of the even field next to the odd field has a length of the period Tf. In addition, there is a period called a vertical blanking period at the beginning of the video signal representing the video of each field. In addition, there is a synchronization signal for synchronizing the horizontal direction and the vertical direction, and the voltage value of the synchronization signal is defined as −286 mV with respect to the reference voltage value. Further, in the following description, the horizontal period shown in FIG. 5 is represented by Th.

  In the NTSC video signal, the voltage of the signal representing the video has a value equal to or higher than the reference voltage.

  Therefore, when the imaging device CAMi is correctly connected to the connection terminal Ci and the A / D conversion circuit 20 performs A / D conversion on the synchronization signal voltage value and the voltage value other than the synchronization signal voltage value, the difference calculation circuit 23 The output value S9 is not less than a value corresponding to the difference between the synchronization signal voltage value and the reference voltage value.

  On the other hand, when the imaging device CAMi is not connected to the connection terminal Ci or when the monitor 11 is erroneously connected, the video signal SIGi has a substantially constant value because no video signal is input.

  In this case, since the output value S7 of the maximum value detection circuit 21 and the output value S8 of the minimum value detection circuit 22 are substantially the same value, the output value of the difference calculation circuit 23 is substantially zero. In other words, the value is sufficiently smaller than the value corresponding to the difference between the synchronization signal voltage value and the reference voltage value.

  Accordingly, the threshold value to be compared with the output value S9 of the difference calculation circuit 23 in the comparison circuit 24 is set to a value corresponding to or corresponding to the difference between the synchronization signal voltage value and the reference voltage value (a value slightly smaller than the difference). Thus, it can be determined whether or not the imaging device CAMi is correctly connected to the connection terminal Ci.

  Therefore, when the NTSC system is used for the video signal, it is suitable to set a threshold value corresponding to a value considering an error to 286 mV.

  In order to make the threshold value set as described above effective, it is desirable that the A / D conversion circuit 20 can reliably A / D convert the synchronization signal voltage value. When the sampling pulse S3 and the switching control signal S4 satisfy certain conditions, the A / D conversion circuit 20 can more reliably A / D convert the synchronization signal voltage value. The conditions will be described below.

  First, the condition of the switching control signal S4 will be described.

  As is apparent from FIG. 5, the time during which the video signal takes the synchronizing signal voltage value is maximized during the vertical synchronizing pulse period.

  Therefore, it is desirable that the A / D conversion circuit 20 can A / D convert the video signal output from the selection circuit 19 at least once in the vertical synchronization pulse period. If the period of the switching control signal S4 is equal to or greater than the vertical synchronization period, for example, the field period Tf shown in FIG. 5, the vertical synchronization pulse period is always included between time T2 and time T6 shown in FIG. It is. Therefore, the cycle of the switching control signal S4 is set to be equal to or longer than the field cycle Tf.

  Next, the conditions for the sampling pulse S3 will be described.

  FIG. 6 is a detailed view of the video signal in the vertical synchronization pulse section, and details thereof are known according to the NTSC specification. As shown in FIG. 6, there are six cut pulses P1 during the vertical synchronization pulse period. Hereinafter, the time during which the cutting pulse P1 rises is represented by Ta.

  By setting the cycle of the switching control signal S4 to be equal to or longer than the field cycle Tf, the vertical synchronization pulse section is always included in the section in which the video signal SIGi is A / D converted. In addition, since six cut pulses P1 exist during the vertical synchronization pulse period, when a time video signal having a field period Tf or more is cut out from an arbitrary time, there is a section where the cut pulse P1 continues three or more times. .

  FIGS. 7A to 7C are diagrams illustrating a section in which the cutting pulse P1 continues three times. If a signal voltage value other than the cut pulse P1 is A / D converted by the A / D conversion circuit 20 during this interval, the synchronization signal voltage value is A / D converted.

  Here, consider a case where the cycle Ts of the sampling pulse S3 is set to Ta <Ts <0.5Th−Ta.

  FIG. 7A illustrates the times when A / D conversion is performed before and after the video signal SIGi is A / D converted by the A / D conversion circuit 20 at time T01 immediately after the rising edge of the cut pulse P1. FIG. The A / D conversion before and after time T01 is performed once each in the section indicated by the oblique lines in FIG. 7A, and the synchronization signal voltage value is A / D converted.

  FIG. 7B illustrates the time when A / D conversion is performed before and after the video signal SIGi is A / D converted by the A / D conversion circuit 20 at the time T02 immediately before the fall of the cutting pulse P1. It is a figure to do. The A / D conversion before and after time T02 is performed once each in the section indicated by the oblique lines in FIG. 7B, and the synchronization signal voltage value is A / D converted.

  FIG. 7C illustrates times when A / D conversion is performed before and after the video signal SIGi is A / D converted by the A / D conversion circuit 20 at time T03 between time T01 and time T02. It is a figure to do. The A / D conversion before and after time T03 is performed once each in the section indicated by the oblique lines in FIG. 7C, and the synchronization signal voltage value is A / D converted.

  Even when A / D conversion is performed by the A / D conversion circuit 20 at a time other than those shown in FIGS. 7A, 7B, and 7C, the description based on FIGS. 7A, 7B, and 7C is used. As will be apparent, since the sync signal voltage value can be A / D converted, its description is omitted.

  As described above, the synchronization signal voltage value can be reliably sampled by setting the cycle Ts of the sampling pulse S3 to Ta <Ts <0.5Th−Ta. Therefore, it is possible to more reliably determine whether or not the imaging device CAMi is connected to the connection terminal Ci.

  In the case of an NTSC video signal, Th = 63.6 μsec and Ta = 4.7 μsec. Therefore, the period Ts of the sampling pulse S3 is set in a range of 4.7 μsec <Ts <27.1 μsec, so that the connection can be made more reliably. It can be determined whether or not the imaging device CAMi is connected to the terminal Ci.

  Next, consider a case where the cycle Ts of the sampling pulse S3 is set to 0.5Th + Ta <Ts <Th−Ta.

  As described above, when a video signal is cut out from an arbitrary time for a time equal to or longer than the field period Tf, there is a section where the cutting pulse P1 continues three times or more.

  FIGS. 8A to 8I are diagrams showing a section in which the cutting pulse P1 continues three times. If a signal voltage value other than the cut pulse P1 is A / D converted by the A / D conversion circuit 20 during this interval, the synchronization signal voltage value is A / D converted.

  FIG. 8A shows the case where the video signal SIGi is A / D-converted by the A / D conversion circuit 20 at time T21 immediately after the rising edge of the first cutting pulse among the three consecutive cutting pulses P1, and then the A / D conversion is performed. It is a figure explaining the time when A / D conversion is performed by the D conversion circuit.

  The next A / D conversion at time T21 is performed within the section indicated by the oblique lines in FIG. As is apparent from the figure, the synchronization signal voltage value is A / D converted at a time next to time T21.

  FIG. 8B shows that when the video signal SIGi is A / D converted by the A / D conversion circuit 20 at the time T22 immediately before the falling edge of the first cut pulse among the three consecutive cut pulses P1, A FIG. 6 is a diagram for explaining a time at which A / D conversion is performed by the / D conversion circuit 20;

  The next A / D conversion at time T22 is performed in the section indicated by the oblique lines in FIG. As is apparent from the figure, the synchronization signal voltage value is A / D converted at a time next to time T22.

  FIG. 8C shows that when the video signal SIGi is A / D converted by the A / D conversion circuit 20 at time T23 between time T21 and time T22, the A / D conversion circuit 20 then performs A / D conversion. It is a figure explaining the time performed.

  The next A / D conversion at time T23 is performed within the section indicated by the oblique lines in FIG. As is apparent from the figure, the synchronization signal voltage value is A / D converted at a time next to time T23.

  FIG. 8D shows a case where the video signal SIGi is A / D-converted by the A / D conversion circuit 20 at the time T24 immediately after the rising edge of the second cutting pulse among the three continuous cutting pulses P1, at the time T24. It is a figure explaining the time when A / D conversion was performed by the A / D conversion circuit 20 before.

  The A / D conversion before time T24 is performed within the section indicated by the oblique lines in FIG. As is apparent from the figure, the synchronization signal voltage value is A / D converted at a time before time T24.

  FIG. 8E shows the case where the video signal SIGi is A / D converted by the A / D conversion circuit 20 at the time T25 immediately before the falling edge of the second cut pulse among the three continuous cut pulses P1, and the time T25. It is a figure explaining the time when A / D conversion was performed by the A / D conversion circuit 20 before.

  The A / D conversion before time T25 is performed within the section indicated by the oblique lines in FIG. As is apparent from the figure, the synchronization signal voltage value is A / D converted at a time before time T25.

  FIG. 8F shows that when the video signal SIGi is A / D converted by the A / D conversion circuit 20 at time T26 between time T24 and time T25, the A / D conversion circuit 20 performs A / D conversion before time T26. It is a figure explaining the time when D conversion was performed.

  The A / D conversion before time T26 is performed in the section indicated by the oblique lines in FIG. As is apparent from the figure, the synchronization signal voltage value is A / D converted at a time before time T26.

  FIG. 8G shows the case where the video signal SIGi is A / D converted by the A / D conversion circuit 20 at the time T27 immediately after the rise of the third cut pulse among the three continuous cut pulses P1, at the time T27. It is a figure explaining the time when A / D conversion was performed by the A / D conversion circuit 20 before.

  The A / D conversion before time T27 is performed within the section indicated by the oblique lines in FIG. As is apparent from the figure, the synchronization signal voltage value is A / D converted at a time before time T27.

  FIG. 8H shows the case where the video signal SIGi is A / D converted by the A / D conversion circuit 20 at the time T28 immediately before the fall of the third cut pulse among the three continuous cut pulses P1, and the time T28 is reached. It is a figure explaining the time when A / D conversion was performed by the A / D conversion circuit 20 before.

  The A / D conversion before time T28 is performed in the section indicated by the oblique lines in FIG. As is apparent from the figure, the synchronization signal voltage value is A / D converted at a time before time T28.

  FIG. 8I shows that when the video signal SIGi is A / D converted by the A / D conversion circuit 20 at time T29 between time T27 and time T28, the A / D conversion circuit 20 performs A / D conversion before time T29. It is a figure explaining the time when D conversion was performed.

  The A / D conversion before time T29 is performed within the section indicated by the oblique lines in FIG. As is apparent from the figure, the synchronization signal voltage value is A / D converted at a time before time T29.

  As is apparent from the above description, even if the A / D conversion circuit 20 performs A / D conversion at a time when the synchronization signal voltage value cannot be A / D converted, the synchronization signal voltage value is set at any time before or after that. A / D conversion is always possible.

  That is, by setting the cycle Ts of the sampling pulse S3 to 0.5Th + Ta <Ts <Th−Ta, the synchronization signal voltage value can be reliably sampled. Therefore, it is possible to more reliably determine whether or not the imaging device CAMi is connected to the connection terminal Ci.

  In the case of an NTSC video signal, Th = 63.6 μsec and Ta = 4.7 μsec. Therefore, the period Ts of the sampling pulse S3 is set more securely in the range of 36.5 μsec <Ts <58.9 μsec. It can be determined whether or not the imaging device CAMi is connected to the terminal Ci.

  From the above, it is desirable to set the period Ts of the sampling pulse S3 in the range of 4.7 μsec <Ts <27.1 μsec or 36.5 μsec <Ts <58.9 μsec.

  The effects of the present invention are as follows.

  In the present invention, the video signal input from the connection terminal Ci is A / D converted in the power supply apparatus 10, and it is determined whether or not the difference between the maximum value and the minimum value is equal to or greater than a certain threshold value, to the device connected to the connection terminal Ci. Therefore, even if the monitor 11 or other equipment is mistakenly connected to the connection terminal Ci, unnecessary voltage is prevented from being applied to the monitor 11. be able to. Therefore, it is possible to prevent a short fire due to erroneous connection.

  In addition, since the selection circuit 19 is provided in the power supply apparatus 10 and the connection states of the devices to the connection terminals C1 to C9 are sequentially checked, only one circuit for detecting the connection state is provided. A case where a plurality of imaging devices are connected can also be handled. The fact that only one circuit for detecting the connection state is required leads to a reduction in the number of parts, so that the power supply device 10 can be made small and inexpensive. Further, as is clear from the above description, the power supply device 10 according to the present invention can determine the connection state appropriately regardless of whether the number of connected imaging devices is one or more. It can be said that it is a highly versatile power supply device.

  Further, by imposing certain conditions on the sampling pulse S3, the vertical synchronization signal S4, and the threshold used in the comparison circuit 24, it is possible to more reliably determine the connection of the imaging device CAMi to the connection terminal Ci. Can be prevented from malfunctioning. As a result, a more reliable system can be constructed.

  As described above, the power supply apparatus according to the present invention can perform optimal power supply to video equipment connected to a plurality of systems.

  The selection circuit 19, the A / D conversion circuit 20, the maximum value detection circuit 21, the minimum value detection circuit 22, the difference calculation circuit 23, the comparison circuit 24, and the timing controller 26 operate as described above. Therefore, it functions as a video signal detection device that detects whether video signals are output from a plurality of imaging devices. For example, the output signal S10 of the comparison circuit 24 is supplied to nine display devices corresponding to the connection terminals C1 to C9, and the display devices corresponding to the connection terminals C1 to C9 to which video signals are input are turned on. Thus, a video signal detecting apparatus can be realized. For the display device, light emitting means such as an LED is used.

  The present invention can be used, for example, in a surveillance imaging system using a plurality of cameras.

It is a figure showing the usage example of the electric power feeder of embodiment of this invention. It is a figure showing the internal structure of the electric power feeder of embodiment of this invention. (A) And (b) is a figure explaining the image | video projected on a monitor. (A)-(m) is a timing chart explaining operation | movement of the electric power feeder by embodiment of this invention. It is a figure explaining the video signal of NTSC system. It is a figure explaining the video signal of NTSC system. (A)-(c) is a figure explaining the signal value by which A / D conversion is carried out in embodiment of this invention. (A)-(i) is a figure explaining the signal value by which A / D conversion is carried out in embodiment of this invention. It is a figure explaining transmission of electric power and a video signal.

Explanation of symbols

  C0 connection terminal, C1 connection terminal, C2 connection terminal, C3 connection terminal, C4 connection terminal, C5 connection terminal, C6 connection terminal, C7 connection terminal, C8 connection terminal, C9 connection terminal, 19 selection circuit, 20 A / D conversion circuit 21 maximum value detection circuit, 22 minimum value detection circuit, 23 difference calculation circuit, 24 comparison circuit, 25 power supply circuit.

Claims (3)

A plurality of connection terminals to which transmission lines for transmitting video signals captured by the imaging device and power for driving the imaging device are connected;
In the power feeding device for the imaging apparatus, comprising: a separating unit that separates and outputs the video signal for each signal input from the plurality of connection terminals;
Selection means for sequentially selecting and outputting the video signals separated by the separation means at predetermined time intervals;
Sampling means for sampling the video signal selected and output by the selection means at a predetermined sampling period;
Maximum value extraction means for outputting a maximum value from the sample values output within the predetermined time from the sampling means;
A minimum value extracting means for outputting a minimum value from the sample values output within the predetermined time from the sampling means;
Difference calculation means for outputting a difference value between the maximum value output from the maximum value extraction means and the minimum value output from the minimum value extraction means;
A comparing means for comparing the difference value output from the difference calculating means with a predetermined value and outputting a detection signal that is 1 when the difference value is larger than the predetermined value, and 0 otherwise;
Power supply means for controlling power supply to the imaging device based on the detection signal output from the comparison means,
The power supply apparatus according to claim 1, wherein the predetermined value is a value corresponding to an amplitude of a synchronization signal included in the video signal.   The power feeding apparatus according to claim 1, wherein the predetermined time is a time longer than a vertical synchronization period of the video signal. The video signal is transferred with a specification according to the NTSC system,
3. The power supply device according to claim 1, wherein the predetermined sampling period is longer than 4.7 μsec and shorter than 27.1 μsec, or longer than 36.5 μsec and shorter than 58.9 μsec. Place.

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