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JP4470804B2 - Resolver / digital conversion circuit - Google Patents

Resolver / digital conversion circuit Download PDF

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JP4470804B2
JP4470804B2 JP2005129291A JP2005129291A JP4470804B2 JP 4470804 B2 JP4470804 B2 JP 4470804B2 JP 2005129291 A JP2005129291 A JP 2005129291A JP 2005129291 A JP2005129291 A JP 2005129291A JP 4470804 B2 JP4470804 B2 JP 4470804B2
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resolver
signal
output
sin
conversion circuit
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JP2006308354A (en
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雅章 西山
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Panasonic Corp
Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Description

本発明は、変圧比が異なる複数のレゾルバに対して好適なレゾルバ/デジタル変換回路に関する。   The present invention relates to a resolver / digital conversion circuit suitable for a plurality of resolvers having different transformation ratios.

位置検出器としてレゾルバを使用した場合、トラッキング方式によるレゾルバ/デジタル変換回路が一般的に用いられており、構成は図2のように、励磁回路212から一定周波数、一定振幅Aの正弦波励磁信号Asinωtをレゾルバ201及び復調器207に出力し、レゾルバ201からはレゾルバの変圧比及びレゾルバのロータ角度θに応じた、KAsinθ・sinωtおよびKAcosθ・sinωtが出力され、増幅器202、203によって増幅される。ここでKはレゾルバの変圧比である。コンバータ内部によって生成されたsinφを乗算器204によってKAsinθ・sinωtに、cosφを乗算器205によってKAcosθ・sinωtに乗じ、それらの減算器206によって減算を行うことで、KAsin(θ―φ)・sinωtが計算され、復調器207によって励磁成分であるsinωtが除去され、ローパスフィルタ208を通過することで高調波成分が除去されθ―φが生成される。   When a resolver is used as a position detector, a resolver / digital conversion circuit using a tracking method is generally used, and the configuration is a sine wave excitation signal having a constant frequency and a constant amplitude A from an excitation circuit 212 as shown in FIG. Asinωt is output to the resolver 201 and the demodulator 207, and KAsinθ · sinωt and KAcosθ · sinωt corresponding to the transformer ratio of the resolver and the rotor angle θ of the resolver are output from the resolver 201 and amplified by the amplifiers 202 and 203. Here, K is a transformation ratio of the resolver. The sin φ generated by the inside of the converter is multiplied by KA sin θ · sin ωt by the multiplier 204, and cos φ is multiplied by KA cos θ · sin ωt by the multiplier 205, and subtraction is performed by the subtracter 206, whereby KA sin (θ−φ) · sin ωt is obtained. Then, sin ωt, which is an excitation component, is removed by the demodulator 207, and the harmonic component is removed by passing through the low-pass filter 208 to generate θ−φ.

そして、そのθ―φは電圧制御型発振器209に入力され、電圧制御型発振器209は入力電圧に応じたパルスを発生させ、そのパルスはUP/DOWNカウンタ210に入力される。カウンタ210のカウンタ値を番地とするSIN、COSテーブル211を参照することで、sinφ、cosφを生成し、そのsinφ、cosφを前記乗算器204、205へフードバックされる、一種のPLLサーボループが構成され、θ−φが0に向って動作することで、θ−φ=0のとき、角度データφを求めることができる構成となっている(例えば、特許文献1参照)。   The θ-φ is input to the voltage controlled oscillator 209, and the voltage controlled oscillator 209 generates a pulse corresponding to the input voltage, and the pulse is input to the UP / DOWN counter 210. A kind of PLL servo loop in which sin φ and cos φ are generated by referring to the SIN and COS table 211 having the counter value of the counter 210 as an address, and the sin φ and cos φ are hooded back to the multipliers 204 and 205 is provided. Thus, the angle data φ can be obtained when θ−φ = 0 by operating θ−φ toward 0 (see, for example, Patent Document 1).

しかしながら、従来の方式では変圧比の異なる複数のレゾルバを同一のレゾルバ/デジタル変換回路で対応させる場合、レゾルバ励磁回路のゲインをレゾルバに合わせて調整してやる必要があるため、レゾルバの機種数が増えた場合、回路側の調整、もしくは回路基板の機種数が増えてしまい、機種増による管理工数増が問題となる。また、レゾルバの断線検出などのフェールセーフ機能についても、KA(sinθ・sinφ+cosθ・cosφ)・sinωtからKAを求め、KAがある閾値を超えた場合にエラーフラグを出力することが一般的な方法として用いられているが、レゾルバの変圧比がバラつき、KAの閾値に対する余裕度がバラつくと、レゾルバの機種によってエラーの感度が異なるという現象が発生する。
特開昭63−71618号公報
However, in the conventional method, when multiple resolvers with different transformation ratios are supported by the same resolver / digital conversion circuit, the number of resolver models has increased because it is necessary to adjust the gain of the resolver excitation circuit according to the resolver. In this case, adjustment on the circuit side or the number of circuit board models increases, and an increase in the number of management man-hours due to the increase in the model becomes a problem. As for a fail-safe function such as detection of resolver disconnection, a general method is to obtain KA from KA (sin θ · sin φ + cos θ · cos φ) · sin ωt and output an error flag when KA exceeds a certain threshold value. Although it is used, if the resolver's transformation ratio varies and the margin for the KA threshold varies, a phenomenon occurs in which the error sensitivity varies depending on the resolver model.
JP-A-63-71618

解決しようとする問題点は、変圧比が異なる複数のレゾルバに対して従来のレゾルバ/デジタル変換回路を適用すると、演算結果に誤差が生じ、エラー感度がばらつく点である。   The problem to be solved is that, when a conventional resolver / digital conversion circuit is applied to a plurality of resolvers having different transformation ratios, an error occurs in a calculation result, and error sensitivity varies.

すなわち、従来のトラッキング方式によるレゾルバ/デジタル変換回路は、変圧比によって誤差演算器による演算結果が異なり、演算結果に誤差が生じるため、課題があった。   That is, the resolver / digital conversion circuit according to the conventional tracking method has a problem because the calculation result by the error calculator differs depending on the transformation ratio, and an error occurs in the calculation result.

本発明は上記従来の課題を解決するものであり、変圧比が異なるレゾルバに対して、単一回路でシステム構成が可能なレゾルバ/デジタル変換回路を提供することを目的とする
SUMMARY OF THE INVENTION An object of the present invention is to provide a resolver / digital conversion circuit capable of configuring a system with a single circuit for resolvers having different transformation ratios.

上記の課題を解決するために本発明は、振幅Aの励磁信号Asinωtを、1相励磁2相出力タイプの変圧比Kのレゾルバに入力する励磁回路と、前記レゾルバの回転角度θに応じたsinθに振幅変調されたレゾルバ出力信号であるKAsinθ・sinωtに変換回路内部で生成されたcosφを乗ずる第一の乗算器、及び前記レゾルバの回転角度θに応じたもう一方の出力信号であるKAcosθ・sinωtに変換回路内部で生成されたsinφを乗ずる第二の乗算器と、第一と第二の乗算器の演算結果を除算する減算器と、前記第一、第二の乗算器、減算器にて演算された演算結果から励磁信号成分を除去する復調器と、前記復調器から出力された信号から高調波成分を除去するローパスフィルタと、前記ローパスフィルタを通過した信号を入力信号としてパルスを出力する電圧制御発振器と、前記電圧制御発振器の出力パルスをカウントするカウンタ及びカウンタ値を番地とするsin、cos参照ROMを備えたトラッキング方式のレゾルバ/デジタル変換回路において、レゾルバから出力される回転角度θに応じたsinθに振幅変調されたレゾルバ出力信号に変換回路内部で生成されたsinφを乗ずる第三の乗算器と、cosθに振幅変調されたレゾルバ出力信号に変換回路内部で生成されたcosφを乗ずる第四の乗算器と、第三、第四の乗算器の演算結果を加算する加算器と、第三、第四の乗算器、加算器にて演算された信号から励磁信号成分を除去する第二の復調器と、第二の復調器から出力された信号から励磁信号の振幅成分を除去する除算器とで構成されるレゾルバ変圧比検出手段を備え、レゾルバの変圧比を割り出し、レゾルバ励磁回路へフィードバックし、励磁信号のゲインを調整することを特徴としたレゾルバ/デジタル変換回路である。   In order to solve the above-described problems, the present invention provides an excitation circuit for inputting an excitation signal Asinωt having an amplitude A to a resolver having a transformation ratio K of a single-phase excitation and two-phase output type, and sinθ corresponding to the rotation angle θ of the resolver. A first multiplier that multiplies KAsinθ · sinωt, which is an amplitude-modulated resolver output signal, by cosφ generated within the conversion circuit, and KAcosθ · sinωt, which is another output signal corresponding to the rotation angle θ of the resolver. And a second multiplier that multiplies sinφ generated in the conversion circuit, a subtracter that divides the operation results of the first and second multipliers, and the first and second multipliers and subtractors. A demodulator that removes the excitation signal component from the computed result, a low-pass filter that removes the harmonic component from the signal output from the demodulator, and a signal that has passed through the low-pass filter. In a resolver / digital conversion circuit of a tracking system, comprising: a voltage-controlled oscillator that outputs a pulse as an input signal; a counter that counts output pulses of the voltage-controlled oscillator; and a sin and cos reference ROM that has a counter value as an address. A third multiplier for multiplying the resolver output signal amplitude-modulated to sin θ corresponding to the rotation angle θ output from the output signal, and a resolver output signal amplitude-modulated to cos θ into the resolver output signal inside the conversion circuit From the signal calculated by the fourth multiplier that multiplies cosφ generated in step 3, the adder that adds the operation results of the third and fourth multipliers, and the signals calculated by the third and fourth multipliers and the adder. A second demodulator that removes the excitation signal component and a divider that removes the amplitude component of the excitation signal from the signal output from the second demodulator. Comprising a Luba transformation ratio detecting means, indexing the transformation ratio of the resolver, and fed back to the resolver excitation circuit, a resolver / digital converter circuit and wherein the adjusting the gain of the excitation signal.

また、演算したレゾルバの変圧比をCPUを介して不揮発性記憶手段に記憶させ、サーボアンプ等のシステムの電源立ち上げ時に、前記不揮発性記憶手段に記憶させた変圧比をCPU内部のレジスタにて保持し、その値を前記励磁回路内のゲイン調整手段へ出力する。   The calculated transformation ratio of the resolver is stored in the nonvolatile storage means via the CPU, and when the system power supply such as the servo amplifier is turned on, the transformation ratio stored in the nonvolatile storage means is stored in a register inside the CPU. The value is held, and the value is output to the gain adjusting means in the excitation circuit.

本発明によれば、変圧比の異なる複数のレゾルバに対して単一の回路にてレゾルバ/デジタル変換回路を構成することができる。   According to the present invention, a resolver / digital conversion circuit can be configured with a single circuit for a plurality of resolvers having different transformation ratios.

振幅Aの励磁信号Asinωtを、1相励磁2相出力タイプの変圧比Kのレゾルバに入力する励磁回路と、前記レゾルバの回転角度θに応じたsinθに振幅変調されたレゾルバ出力信号であるKAsinθ・sinωtに変換回路内部で生成されたcosφを乗ずる第一の乗算器、及び前記レゾルバの回転角度θに応じたもう一方の出力信号であるKAcosθ・sinωtに変換回路内部で生成されたsinφを乗ずる第二の乗算器と、第一と第二の乗算器の演算結果を除算する減算器と、前記第一、第二の乗算器、減算器にて演算された演算結果から励磁信号成分を除去する復調器と、前記復調器から出力された信号から高調波成分を除去するローパスフィルタと、前記ローパスフィルタを通過した信号を入力信号としてパルスを出力する電圧制御発振器と、前記電圧制御発振器の出力パルスをカウントするカウンタ及びカウンタ値を番地とするsin、cos参照ROMを備えたトラッキング方式のレゾルバ/デジタル変換回路において、レゾルバから出力される回転角度θに応じたsinθに振幅変調されたレゾルバ出力信号に変換回路内部で生成されたsinφを乗ずる第三の乗算器と、cosθに振幅変調されたレゾルバ出力信号に変換回路内部で生成されたcosφを乗ずる第四の乗算器と、第三、第四の乗算器の演算結果を加算する加算器と、第三、第四の乗算器、加算器にて演算された信号から励磁信号成分を除去する第二の復調器と、第二の復調器から出力された信号から励磁信号の振幅成分を除去する除算器とで構成されるレゾルバ変圧比検出手段を備え、レゾルバの変圧比を割り出
し、レゾルバ励磁回路へフィードバックし、励磁信号のゲインを調整することを特徴としたレゾルバ/デジタル変換回路であり、第三、第四の乗算器によってsinθ・sinωtにsinφを、cosθ・sinωtにcosφを乗じ、各々を加算器によって加算することで、KA(sinθ・sinφ+cosθ・cosφ)・sinωt、すなわち、KA・sinωtを生成し、復調器によって振幅と変圧比を乗じたKAを、除算器によって変圧比Kを求める。また、変圧比KはCPUを介してレゾルバ励磁回路にフィードバックされ、励磁回路のゲインをある目標値に自動調整する。
An excitation circuit for inputting an excitation signal Asinωt having an amplitude A to a resolver having a transformation ratio K of a one-phase excitation and two-phase output type, and a resolver output signal KAsinθ · that is amplitude-modulated to sinθ corresponding to the rotation angle θ of the resolver. A first multiplier that multiplies sin ωt with cos φ generated inside the conversion circuit, and a second output signal KAcos θ · sin ωt corresponding to the rotation angle θ of the resolver is multiplied by sin φ generated inside the conversion circuit. Two multipliers, a subtracter that divides the calculation results of the first and second multipliers, and an excitation signal component from the calculation results calculated by the first and second multipliers and subtractors. A demodulator, a low-pass filter that removes harmonic components from the signal output from the demodulator, and a signal that outputs a pulse using the signal that has passed through the low-pass filter as an input signal. In a tracking type resolver / digital conversion circuit including a controlled oscillator, a counter for counting output pulses of the voltage controlled oscillator, and a sin and cos reference ROM having the counter value as an address, according to a rotation angle θ output from the resolver A third multiplier for multiplying the resolver output signal amplitude-modulated by sin θ by the sin φ generated in the conversion circuit, and a fourth multiplier for multiplying the resolver output signal amplitude-modulated by cos θ by the cos φ generated by the conversion circuit. A multiplier that adds the operation results of the third and fourth multipliers, and a second that removes excitation signal components from the signals calculated by the third and fourth multipliers and adders. A resolver transformer ratio detecting means comprising a demodulator and a divider for removing the amplitude component of the excitation signal from the signal output from the second demodulator; A resolver / digital conversion circuit characterized by determining a transformation ratio, feeding back to a resolver excitation circuit, and adjusting a gain of an excitation signal. The third and fourth multipliers convert sinφ into sinθ · sinωt, cosθ · By multiplying sinωt by cosφ and adding each by an adder, KA (sinθ · sinφ + cosθ · cosφ) · sinωt is generated, that is, KA · sinωt is generated, and KA obtained by multiplying the amplitude and the transformation ratio by the demodulator is divided. The transformer ratio K is determined by the device. The transformation ratio K is fed back to the resolver excitation circuit via the CPU, and the gain of the excitation circuit is automatically adjusted to a certain target value.

実施例1のレゾルバ/デジタル変換回路は乗算器、加算器、復調器、除算器を用いてレゾルバの変圧比を求め、その値を用いて励磁回路のゲインを自動調整するものである。   The resolver / digital conversion circuit according to the first embodiment obtains a transformation ratio of a resolver using a multiplier, an adder, a demodulator, and a divider, and automatically adjusts the gain of the excitation circuit using the value.

図1において、1相励磁2相出力のレゾルバ101に、励磁回路112より、一定周波数、一定振幅の励磁信号Asinωtと入力することでレゾルバ101より出力信号sinθ・sinωtとcosθ・sinωtを得て、それぞれの出力信号に変換回路内部で生成された角度φから生成されたcosφ、sinφを乗算器104、105、また乗算器114、115によって、KA(sinθ・cosφ−cosθ・sinφ)・sinωt及びKA(sinθ・sinφ+cosθ・cosφ)・sinωtが演算される。   In FIG. 1, by inputting an excitation signal Asinωt having a constant frequency and a constant amplitude from an excitation circuit 112 to a resolver 101 having a single-phase excitation and two-phase output, output signals sinθ · sinωt and cosθ · sinωt are obtained from the resolver 101. Cos φ and sin φ generated from the angle φ generated in the conversion circuit in each output signal are multiplied by the multipliers 104 and 105 and the multipliers 114 and 115, respectively. (Sin θ · sin φ + cos θ · cos φ) · sin ωt is calculated.

信号KA(sinθ・cosφ−cosθ・sinφ)・sinωtから励磁信号成分を取り除く復調器107、復調器107からの出力信号の高調波成分を除去するローパスフィルタ108、ローパスフィルタ108から出力される信号に比例したパルスを生成する電圧制御型発振器109、また、電圧制御型発振器109から出力されたパルスをカウントするUP/DOWNカウンタ110、UP/DOWNカウンタのカウントデータを番地とするsinφ、cosφを参照するSIN、COSテーブル111、信号KA(sinθ・sinφ+cosθ・cosφ)・sinωtから励磁信号成分を取り除く復調器117、復調器から出力されたKAから励磁信号の振幅値を除するための除算器118から構成される。   The signal output from the demodulator 107 that removes the excitation signal component from the signal KA (sin θ · cos φ−cos θ · sin φ) · sin ωt, the low-pass filter 108 that removes the harmonic component of the output signal from the demodulator 107, and the signal output from the low-pass filter 108 Refer to voltage controlled oscillator 109 that generates proportional pulses, UP / DOWN counter 110 that counts pulses output from voltage controlled oscillator 109, and sinφ and cosφ that are addressed by the count data of the UP / DOWN counter. SIN, COS table 111, demodulator 117 for removing excitation signal components from signals KA (sinθ · sinφ + cosθ · cosφ) · sinωt, and divider 118 for dividing the amplitude value of the excitation signal from KA output from the demodulator. Is done.

除算器118から出力されたレゾルバ101の変圧比情報は、CPU113へ出力され、CPU113にて演算処理後、励磁回路112の励磁アンプのゲイン調整用のコントロール信号として使用される。   The transformation ratio information of the resolver 101 output from the divider 118 is output to the CPU 113, and is used as a control signal for gain adjustment of the excitation amplifier of the excitation circuit 112 after the arithmetic processing by the CPU 113.

また、レゾルバ101の変圧比情報はCPU113を介して不揮発性記憶手段119へ保存され、本システムが搭載された、例えばサーボアンプ等の起動時にレゾルバ101の変圧比情報を保存し、次回の起動時からは本変圧比情報を用いて励磁回路112のゲインを決定することができる。   Further, the transformation ratio information of the resolver 101 is stored in the nonvolatile storage means 119 via the CPU 113, and the transformation ratio information of the resolver 101 is saved at the time of starting up the servo amplifier or the like on which the present system is mounted. From this, the gain of the excitation circuit 112 can be determined using the current transformation ratio information.

また、乗算器114、乗算器115、加算器115、復調器117および除算器118を用いて割り出された変圧比情報によって、レゾルバ101の出力信号振幅がレゾルバ101の種類によらず一定になるため、レゾルバ101の断線検出閾値が固定値であってもレゾルバ101の出力信号振幅と断線検出閾値との関係が常に一定であるため断線検出を精度良く行うことができる。   Further, the output signal amplitude of the resolver 101 becomes constant regardless of the type of the resolver 101 based on the transformation ratio information calculated using the multiplier 114, the multiplier 115, the adder 115, the demodulator 117, and the divider 118. Therefore, even if the disconnection detection threshold value of the resolver 101 is a fixed value, the relationship between the output signal amplitude of the resolver 101 and the disconnection detection threshold value is always constant, so that the disconnection detection can be performed with high accuracy.

本発明のレゾルバ/デジタル変換回路は、ロボットなど悪環境下で高信頼性を必要とするレゾルバ変圧比が異なるモータ制御装置の標準化に有用である。   The resolver / digital conversion circuit of the present invention is useful for standardization of motor control devices having different resolver transformation ratios that require high reliability under adverse environments such as robots.

本発明の実施例1におけるレゾルバ/デジタル変換回路の説明図Explanatory drawing of the resolver / digital conversion circuit in Example 1 of this invention 従来のレゾルバ/デジタル変換回路の説明図Illustration of a conventional resolver / digital conversion circuit

符号の説明Explanation of symbols

101、201 レゾルバ
102、202 第一の増幅器
103、203 第二の増幅器
104、204 第一の乗算器
105、205 第二の乗算器
106、206 減算器
107、207 第一の復調器
108、208 ローパスフィルタ
109、209 電圧制御型発振器
110、210 UP/DOWNカウンタ
111、211 SIN、COSテーブル
112、212 励磁回路
113、213 CPU
114 第三の乗算器
115 第四の乗算器
116 加算器
117 第二の復調器
118 除算器
119 不揮発性記憶手段
101, 201 Resolver 102, 202 First amplifier 103, 203 Second amplifier 104, 204 First multiplier 105, 205 Second multiplier 106, 206 Subtractor 107, 207 First demodulator 108, 208 Low pass filter 109, 209 Voltage controlled oscillator 110, 210 UP / DOWN counter 111, 211 SIN, COS table 112, 212 Excitation circuit 113, 213 CPU
114 Third multiplier 115 Fourth multiplier 116 Adder 117 Second demodulator 118 Divider 119 Non-volatile storage means

Claims (3)

振幅Aの励磁信号Asinωtを、1相励磁2相出力タイプの変圧比Kのレゾルバに入力する励磁回路と、前記レゾルバの回転角度θに応じたsinθに振幅変調されたレゾルバ出力信号であるKAsinθ・sinωtに変換回路内部で生成されたcosφを乗ずる第一の乗算器、及び前記レゾルバの回転角度θに応じたもう一方の出力信号であるKAcosθ・sinωtに変換回路内部で生成されたsinφを乗ずる第二の乗算器と、第一と第二の乗算器の演算結果を除算する減算器と、前記第一、第二の乗算器、減算器にて演算された演算結果から励磁信号成分を除去する復調器と、前記復調器から出力された信号から高調波成分を除去するローパスフィルタと、前記ローパスフィルタを通過した信号を入力信号としてパルスを出力する電圧制御発振器と、前記電圧制御発振器の出力パルスをカウントするカウンタ及びカウンタ値を番地とするsin、cos参照ROMを備えたトラッキング方式のレゾルバ/デジタル変換回路において、レゾルバから出力される回転角度θに応じたsinθに振幅変調されたレゾルバ出力信号に変換回路内部で生成されたsinφを乗ずる第三の乗算器と、cosθに振幅変調されたレゾルバ出力信号に変換回路内部で生成されたcosφを乗ずる第四の乗算器と、第三、第四の乗算器の演算結果を加算する加算器と、第三、第四の乗算器、加算器にて演算された信号から励磁信号成分を除去する第二の復調器と、第二の復調器から出力された信号から励磁信号の振幅成分を除去する除算器とで構成されるレゾルバ変圧比検出手段を備え、レゾルバの変圧比を割り出し、レゾルバ励磁回路へフィードバックし、励磁信号のゲインを調整することを特徴としたレゾルバ/デジタル変換回路。 An excitation circuit for inputting an excitation signal Asinωt having an amplitude A to a resolver having a transformation ratio K of a one-phase excitation and two-phase output type, and a resolver output signal KAsinθ · that is amplitude-modulated to sinθ corresponding to the rotation angle θ of the resolver. A first multiplier that multiplies sin ωt with cos φ generated inside the conversion circuit, and a second output signal KAcos θ · sin ωt corresponding to the rotation angle θ of the resolver is multiplied by sin φ generated inside the conversion circuit. Two multipliers, a subtracter that divides the calculation results of the first and second multipliers, and an excitation signal component from the calculation results calculated by the first and second multipliers and subtractors. A demodulator, a low-pass filter that removes harmonic components from the signal output from the demodulator, and a signal that outputs a pulse using the signal that has passed through the low-pass filter as an input signal. In a tracking type resolver / digital conversion circuit including a controlled oscillator, a counter for counting output pulses of the voltage controlled oscillator, and a sin and cos reference ROM having the counter value as an address, according to a rotation angle θ output from the resolver A third multiplier for multiplying the resolver output signal amplitude-modulated by sin θ by the sin φ generated in the conversion circuit, and a fourth multiplier for multiplying the resolver output signal amplitude-modulated by cos θ by the cos φ generated by the conversion circuit. A multiplier that adds the operation results of the third and fourth multipliers, and a second that removes excitation signal components from the signals calculated by the third and fourth multipliers and adders. A resolver transformer ratio detecting means comprising a demodulator and a divider for removing the amplitude component of the excitation signal from the signal output from the second demodulator; Indexing the transformation ratio, and fed back to the resolver excitation circuit, a resolver / digital converter circuit and wherein the adjusting the gain of the excitation signal. 演算したレゾルバの変圧比をCPUを介して不揮発性記憶手段に記憶させ、サーボアンプ等のシステムの電源立ち上げ時に、前記不揮発性記憶手段に記憶させた変圧比をCPU内部のレジスタにて保持し、その値を前記励磁回路内のゲイン調整手段へ出力する請求項1に記載のレゾルバ/デジタル変換回路。 The calculated transformation ratio of the resolver is stored in the nonvolatile storage means via the CPU, and when the system power supply such as the servo amplifier is turned on, the transformation ratio stored in the nonvolatile storage means is held in a register inside the CPU. 2. The resolver / digital conversion circuit according to claim 1, wherein the value is output to a gain adjusting means in the excitation circuit. レゾルバの変圧比情報に応じて前記レゾルバの断線検出閾値を設定する請求項1に記載のレゾルバ/デジタル変換回路。 The resolver / digital conversion circuit according to claim 1, wherein a disconnection detection threshold value of the resolver is set in accordance with the transform ratio information of the resolver.
JP2005129291A 2005-04-27 2005-04-27 Resolver / digital conversion circuit Expired - Fee Related JP4470804B2 (en)

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