JP4458098B2 - Optical time gate device and OCDM signal receiving device - Google Patents

Description

  The present invention relates to an optical time gate device that switches transmission and blocking of input light in synchronization with an input clock signal, and an OCDM signal receiving device using the optical time gate device.

  FIG. 15 is a block diagram schematically showing an optical code division multiplexing (OCDM) communication system. As shown in FIG. 15, in OCDM communication, an optical signal modulated in accordance with information desired to be transmitted is transmitted from an optical information signal transmitter 201, and second-order by an encoder 202 in accordance with a code assigned to each channel. Modulation (referred to as “encoding”) is performed, and the encoded signals obtained from the respective channels are combined by the multiplexer 203 and transmitted. A signal received via the transmission path 204 is branched for each channel by the branching unit 303 and is encoded again by the decoder 302 (referred to as “decoding”) in order to extract a signal including desired information. The optical information signal receiver 301 extracts information from the optical code and outputs received information bits.

  As encoding and decoding methods, a time spreading method (see, for example, non-patent document 1), a spectrum phase encoding method (for example, refer to non-patent document 2), and a time spreading / wavelength hop method (for example, patent document). 1)) has been reported.

X. Wang, et al. , “Demonstration of the improvement of apodized 127-chip SSFBG in coherent time-spreading OCDMA network,” OFC 2004, MF74. Wei Kong, et al. "Demonstration of 160- and 320-Gb / s SPECTS O-CDMA Network Testbeds," IEEE Photonics Technology Letters, Vol. 18, no. 5, pp. 1567-1569, Aug. 1,2006. JP 2000-209186 A

FIGS. 16A to 16F are operation explanatory diagrams of the OCDM system adopting the time spreading method. The optical signal before encoding shown in FIG. 16B corresponding to the transmission information bit (electrical signal) shown in FIG. 16A is in RZ (Return to Zero) format and has a bit rate of 1 / T. Modulated according to the transmitted information bits at a rate of _b . Refers to optical signal of the RZ format as "optical information signal", the respective light pulses 401 constituting an optical information signal is called "information bit pulse", the reciprocal T _b the bit rate referred to as "bit period". As shown in FIG. 16 (c), in encoding, (referred to as "chip pulse".) The information bit pulse 401 a plurality of light pulses P _1, ..., is divided into P _5, a given code pattern Therefore, the time positional relationship between the chip pulses P ₁ ,..., P ₅ is determined. This is called “time diffusion”. Chip pulses _P 1, ..., a diffusion time which is the maximum value of the time difference between _{P 5} and _{T s,} the adjacent chip pulses _P 1, ..., a time difference between _{P 5} and _{T c,} a chip pulse _P 1, ..., _{P When} the number of ₅ is N, the following equation (1) is established.
N _{= T} s / T _c (1)
Further, when the number of chip pulses divided from one information bit pulse 401 and N _c, in the illustrated example, the _N c ₌ N ₌ 5. In FIG. 16C, only the period of one information bit pulse 401 is shown.

As shown in FIG. 16D, at the time of decoding, each chip pulse P ₁ ,..., P ₅ is time-spread with a spreading time T _s according to a given code pattern. However, in order to simplify the drawing, the phase relationship between the chip pulses is not shown. Since T _c <T _s , an optical pulse (FIG. 16 (d)) obtained by time spreading from each of the N _c chip pulses P ₁ ,..., P ₅ shown in FIG. Overlap each other in time. At this time, the result of addition according to the intensity and phase relationship of the overlapping optical pulses is obtained as an optical pulse at that time. As a result of obtaining such addition at all times, the optical waveform after decoding is determined. As shown in FIG. 16E, when the same code is used for encoding and decoding, an optical waveform having one peak 402 and a small sidelobe with respect to this peak 402, that is, self A correlation waveform is obtained. In addition, as shown in FIG. 16F, when different codes are used for encoding and decoding, an optical waveform having no specific peak, that is, a cross-correlation waveform is obtained. Similarly, when the spectrum phase encoding method or the time spread / wavelength hop method is adopted, if the same code is used for encoding and decoding, an autocorrelation waveform is obtained and encoding is performed. When different codes are used for decoding, a cross-correlation waveform is obtained.

In OCDM communication, a waveform obtained after decoding on the receiving side of the desired channel is encoded on the desired channel (transmitting side) and decoded on the same desired channel (receiving side), and other channels It is the sum of cross-correlation waveforms obtained by encoding on the (transmission side) and decoding on the desired channel (reception side). Since the cross-correlation waveform becomes interference noise, it is desirable to remove it by some means after decoding. As a means for removing the interference, there is a time gate for removing the cross-correlation waveform by transmitting the input light only during the time when the autocorrelation waveform peak passes and blocking the input light at other times. The duration during which the input light is transmitted is called “time gate width” and is represented by T _g . Since the autocorrelation waveform is obtained from the transmission information bit pulse of the desired channel, it passes through the time gate at the bit rate frequency of the desired channel, so that the time gate repeats transmission and blocking at the bit rate frequency. Autocorrelation waveform in the time range of the bit period T _b, is configured a time difference T _c from the chip pulse every time width in units, a peak only in one period of the plurality of chip pulse. To remove the cross-correlation waveform as much as possible and transmit only the autocorrelation waveform peak through the time gate,
T _g = T _c formula (2)
Is desirable.

16A to 16F, if T _b <2T _s , a chip pulse (FIG. 16C) generated by time-spreading an information bit pulse is decoded. As a result, the time-spread chip pulse (FIG. 16D) overlaps between adjacent information bit pulses, which becomes a cause of deterioration in reception quality, which is not desirable. Therefore, as shown in FIGS. 16A to 16F,
T _b > 2T _s formula (3)
Is desirable. Formula (3) is expressed by the following formula (4)
T _s <T _b / 2 Formula (4)
Is equivalent to Further, the formula (1) is expressed by the following formula (5)
T _s = N · T _c Formula (5)
Is equivalent to The following equation (6) is obtained from the equations (4) and (5).
N · T _c <T _b / 2 Formula (6)
The following equation (7) is obtained from the equation (6).
_{T c = T s / N <} (T b / N) / 2 Equation (7)
The following equation (8) is obtained from the equations (2) and (7).
T _g <(T _b / N) / 2 Formula (8)
Therefore, in order to remove the cross-correlation waveform as much as possible and transmit only the autocorrelation waveform peak through the time gate, it is desirable to satisfy Equation (8). Since N is 2 or more integer, there 1/4 must be less time gate width The T _g less the bit period T _b. In order to increase the number of multiplexing, it is preferable to increase N, and the time gate width _Tg is further decreased.

As a method (time gate device) for realizing this time gate, Non-Patent Document 2 includes a method using a mode-locked laser and a nonlinear loop mirror (NOLM). However, Non-Patent Document 2 discloses that the encoding method is performed by the spectral phase encoding method. This method uses a cross-phase modulation effect, which is one of nonlinear effects generated in an optical fiber. When the optical pulse train (control pulse) generated from the mode-locked laser and the decoded signal are input to the NOLM, a non-linear phase shift occurs only at the portion where the decoded signal overlaps the optical pulse train and can pass through the NOLM. At this time, if the control pulse and the autocorrelation waveform peak overlap, only the autocorrelation waveform peak can pass through the NOLM. This can be said to be a time gate operation because the overlapping portion when the control pulse is on passes through the NOLM and the overlapping portion when the control pulse is off cannot pass through the NOLM. In this document, the information transfer rate per channel is 10 Gb / s (ie, the bit period T _b = 100 ps), the control pulse width, that is, the time gate width T _g is 3 ps, and the time gate width T is 3% of the bit period T _{b. g} is obtained. That is, when this time gate device is used for the above time spreading coding method, from the equation (8),
3 ps <(100 ps / N) / 2
From this equation,
N <100 / 6≈16.6
It becomes. This means that when N is 16 or less, only the autocorrelation peak can be extracted from the encoded and decoded signals.

  However, when applied to OCDM communication with a small information transfer rate per channel, the repetition frequency of transmission and blocking of input light must be reduced. In a time gate device using a method using a mode-locked laser and NOLM, the resonance length of the mode-locked laser must be increased in order to reduce the repetition frequency of the control pulse, resulting in an increase in component size and consequently device size. There's a problem. Specifically, when the information transfer rate per channel is 1 Gb / s or less, the resonator length is 10 times or more that of the mode-locked laser.

  Accordingly, the present invention has been made to solve the above-described problems of the prior art, and an object of the present invention is to provide a compact optical time gate device capable of switching between transmission and blocking of input light in synchronization with an input clock signal. Another object of the present invention is to provide an OCDM signal receiver using this optical time gate device.

An optical time gate device of the present invention branches an input clock signal having a rectangular waveform and outputs a first clock signal and a second clock signal, and a phase delay for the second clock signal. A phase shift means having a variable phase delay amount and a voltage value proportional to a difference between the first clock signal and the phase delayed second clock signal, and the voltage value is a positive voltage Differential amplifying means for outputting a differential signal consisting of a high level which is a value, a zero level where the voltage value is 0, and a low level where the voltage value is a negative voltage value, and the voltage value of the differential signal the light transmittance is changed in the input light in accordance with, have a light intensity modulating means and the larger the larger the voltage value wherein the light transmittance of the difference signal, when the voltage value of the difference signal is positive Before the voltage change of the differential signal at The rate of change of light transmittance, and being greater than the rate of change of the light transmittance with respect to voltage change of the difference signal when the voltage value of the difference signal is negative.

OCDM signal receiving apparatus of the present invention is a OCDM signal receiving apparatus for receiving an optical signal encoded by the OCDM scheme, and decoding means for decoding the received the optical signal, according to claim 1 to 3 The optical time gate device according to any one of claims 1 to 6, wherein the optical signal decoded by the decoding means is input to the optical time gate device.

  According to the optical time gating device of the present invention, by adopting means for transmitting the input light for a time corresponding to the phase delay amount and blocking the input light for the other time, the configuration of the device is simplified and reduced in size. Can be realized.

  Further, according to the OCDM signal receiving apparatus of the present invention, the input light is transmitted for a time corresponding to the phase delay amount at a repetition frequency synchronized with the information transfer rate of the input optical signal, and the input light is blocked for other times. As a result, the autocorrelation waveform can be transmitted and other than the autocorrelation waveform can be blocked.

  Embodiments of an optical time gate device and an OCDM signal receiving device using the same according to the present invention will be described below with reference to the drawings.

First Embodiment FIG. 1 is a block diagram schematically showing a configuration of an optical time gate device 150 according to a first embodiment of the present invention. As shown in FIG. 1, the optical time gate device 150 according to the first embodiment includes a branching device 101, a phase shifter 102, a differential amplifier 103, and a light intensity modulator 104. .

Splitter 101 receives an input clock signal S ₀ is an electrical signal of a rectangular waveform, the input clock signal S ₀ and then 2 branches, a first clock signals S ₁ and an electrical signal of a rectangular waveform outputting a second clock signal _{S 2.} The first clock signal S ₁ and the second clock signal S ₂ has the same waveform as the input clock signal S _0, also the first clock signals S ₁ and the second of the clock signal S _2, the same phase have.

Phase shifter 102, second receive clock signal S _2, a second phase delay to the clock signal S ₂ (which is equivalent to the time delay.) Giving a second clock signal S ₃ which is phase-delayed Is output. The phase delay amount of the phase shifter 102 is variable.

The differential amplifier 103 receives the first clock signal S ₁ and the second clock signal S ₃ phase-delayed, and receives the first clock signal S ₁ and the second clock signal S ₃ phase-delayed. It generates a differential signal S ₄ and outputs. Difference signal S ₄ to the differential amplifier 103 is generated, for example, from the first clock signal S _1, a signal based on a voltage value obtained by subtracting the second clock signal S ₃ that is phase-delayed. The signal based on the voltage value, for example, from the first clock signal S _1, a phase-delayed second clock signal S ₃ the voltage values constant multiple signal obtained by subtracting (signal proportional). Incidentally, the difference signal S ₄ to the differential amplifier 103 is generated, for example, may be a signal based on the second voltage value from the clock signal S ₃ by subtracting the first clock signal S ₁ phase delay.

The light intensity modulator 104 changes the light transmittance, modulates the intensity of the input light L ₀ , and outputs it as output light L ₁ . The light transmittance of the optical intensity modulator 104 is changed in accordance with the voltage value of the difference signal S ₄ which is an input control signal.

FIG. 2 is a block diagram schematically showing the configuration of the OCDM signal receiving apparatus 160 using the optical time gating apparatus 150 of the first embodiment. The OCDM signal receiving apparatus 160 shown in FIG. 2 corresponds to the configuration on the receiving side (for example, channel 1 on the receiving side) shown in FIG. In the OCDM signal receiving apparatus 160 shown in FIG. 2, the same or corresponding components as those on the receiving side shown in FIG. The OCDM signal receiving apparatus 160 shown in FIG. 2 includes a decoder 302 that decodes a received optical signal, an optical delay unit 151 that delays output light from the decoder 302, and output light from the decoder 302. , A clock extractor 152 that outputs a clock signal (electrical signal) S ₀ , an optical time gate device 150 that modulates the intensity of the input light L ₀ and outputs it as output light L ₁ , and an output light L ₁ (optical information) And an optical information signal receiver 301 for generating an electrical signal. The optical delay device 151 synchronizes the timing at which the clock signal S ₀ output from the clock extractor 152 is input to the optical time gate device 150 and the timing at which the input light L ₀ is input to the optical time gate device 150. Therefore, the optical signal is delayed.

According to the OCDM signal receiving device 160 shown in FIG. 2, the optical intensity modulator 104 (shown in FIG. 1) of the optical time gate device 150 includes the desired signal L _des and the interference signal L _un as the input light L _0. when decoded optical signal waveform is input, it can be output by removing the interference signal L _un except during the lifetime of the desired signal (peak waveform) L _des as output beam L _1.

Next, the generation operation of the time gate signal by the optical time gate device 150 will be described in detail. 3A to 3C are time charts showing the operation of the differential amplifier 104 shown in FIG. FIG. 3A shows the input clock signal S ₀ , which has the same waveform as the signal S ₁ that passes through the branching device 101 and is input to the differential amplifier 103. Here, the repetition period of the clock signal (i.e., bit period) the a T _b. Further, as shown in the figure, the clock signal S ₀ repeats a high (high) level and a low (low) level every half of the repetition period T _b , that is, every 0.5 T _{b in} time. Figure 3 (b) shows the other of the input clock signal _{S 3} of the differential amplifier 103, in comparison 3 and (a), there is a phase delay of the time gate width _{T g} (time delay). This phase delay T _g is given by the phase shifter 102. FIG. 3 (c) shows an output signal _{S 4} of the differential amplifier 103, the waveform of the output signal _{S 4,} shown in FIG. 3 (b) from the clock signals _{S 1} having a waveform shown in FIG. 3 (a) obtained from the difference obtained by subtracting the waveform of the clock signal S _3. The differential signal S ₄ shown in FIG. 3C is a light transmittance control signal (electric signal) of the light intensity modulator 104.

4A to 4D relate to the operation of the light intensity modulator 104 shown in FIG. 1, and FIGS. 4A and 4B are explanatory diagrams showing the operation of the light intensity modulator 104. FIG. FIG. 4C is a time chart showing the input electric signal S ₄ (the same waveform as in FIG. 3C) of the light intensity modulator 104, and FIG. 4D is a light transmission of the light intensity modulator 104. It is a time chart which shows a rate. FIG. 4B shows the relationship (characteristic curve) between the input electrical signal S ₄ of the light intensity modulator 104 and the light transmittance (output light signal L ₁ when the input light signal L ₀ is continuous light). Yes. Here, the input voltage is the voltage of the input electric signal S ₄ of the optical intensity modulator 104, the light transmittance of the intensity ratio of the output light and the input light of the optical intensity modulator 104. When the input voltage-light transmittance characteristic (curve 170) of the light intensity modulator 104 is non-linear as shown in FIG. 4B, the voltage in the low voltage range (S _4L ) of the input electrical signal S ₄ Is less likely to be reflected in the time change of the light transmittance in the high voltage range (S _4H ) of the input electric signal S ₄ . Here, the low voltage range _{(S 4L)} of the input electrical signal _{S 4,} the range signal _{S 4} is negative, the high voltage range of the input electrical signal _{S 4 (S 4H),} signal _{S 4} is positive Range.

Figure 4 As shown in (b), the input electric signal when the voltage value of S ₄ is positive (voltage range S _4H) change in light transmittance with respect to the voltage change of the difference signal in the ratio of the input electrical signal S ₄ Is larger than the rate of change of the light transmittance with respect to the voltage change of the differential signal in the case where the voltage value is negative (voltage range S _4L ), the input electric signal S ₄ has a certain voltage (in FIG. Although the pulse waveforms have the same amplitude in the positive and negative directions centered on the zero level), the light transmittance is positive and negative centered on the reference level 171 as shown in FIG. The pulse waveform does not have the same amplitude in each direction. Therefore, for the input electrical signal shown in FIG. 4C (the waveform of FIG. 3C), the transmission characteristic of the light intensity modulator 104 is as shown in FIG. 4D, and the repetition period T _b , time gate of the time gate width T _g can be realized.

Here, we describe how to set the time gate width T _g. As can be seen from the time charts of FIGS. 3A to 3C and FIGS. 4C and 4D, the time gate width T _g is determined by the phase delay amount in the phase shifter 102. This phase delay equalizes the lengths of the two lines connecting the branching device 102 and the differential amplifier 103, and adds ((T _g / T _b ) × 2π) radians to the clock signal of the line input to the differential amplifier 103b. This phase delay can be realized by the phase shifter 102.

Here, the set values of the repetition period T _b and the time gate width T _g suitable for implementing the present invention will be described. As an example, the input clock signal S ₀ of the differential amplifier 103 is a rectangular wave having a rise time (fall time) T _r as shown by the following equation. However, in order for the clock signal to be rectangular, T _r ≦ T _b / 2 Equation (9)
is required. Further, V ₁ (t) is the voltage of the first clock signal S ₁ input to the differential amplifier 103, and V ₂ (t) is the delayed second clock signal S input to the differential amplifier 103. ₃ of the voltage, the time t, the _{V 0} and voltage amplitude, phase delay (time delay) when the [Delta] _{t, V} 1 (t) and _V 2 (t) the following equation (10) to It is represented by (12).

The voltage V _out (t) of the output signal of the differential amplifier 103 is obtained by subtracting the voltage V ₂ (t) of the second clock signal S ₂ from the voltage V ₁ (t) of the first clock signal S _1. Correspondingly, if the gain of the differential amplifier 103 is G (a real number of 0 or more), the following equation (13) is obtained.
V _out (t) = G · (V ₁ (t) −V ₂ (t)) Equation (13)
Voltage _V 1 of the thus defined first clock signals _{S 1} with a rectangular wave (t), the output signal of the second clock signal _{S 2} of the voltage _V 2 (t), and a differential amplifier 103 Time charts illustrating the voltage V _out (t) are shown in FIGS. 5A and 5B to 12A and 12B. These figures show the following contents.
FIG. 5A shows a time chart in the case of 0 <ΔT < _Tr .
FIG. 5B shows a time chart in the case of ΔT = _Tr .
FIG. 6A shows a time chart in the case of T _r <ΔT <(T _b / 2) −T _r .
FIG. 6B shows a time chart in the case of ΔT = (T _b / 2) −T _r .
FIG. 7A shows a time chart in the case of (T _b / 2) −T _r <ΔT <(T _b / 2) − (T _r / 2).
FIG. 7B shows a time chart in the case of ΔT = (T _b / 2) − (T _r / 2).
FIG. 8A shows a time chart in the case of (T _b / 2) − (T _r / 2) <ΔT <T _b / 2.
FIG. 8B shows a time chart in the case of ΔT = T _b / 2.
FIG. 9A shows a time chart in the case of T _b / 2 <ΔT <(T _b / 2) + (T _r / 2).
FIG. 9B shows a time chart in the case of ΔT = (T _b / 2) + (T _r / 2).
FIG. 10A shows a time chart in the case of (T _b / 2) + (T _r / 2) <ΔT <(T _b / 2) + T _r .
FIG. 10B shows a time chart when ΔT = (T _b / 2) + T _r .
FIG. 11A shows a time chart in the case of (T _b / 2) + T _r <ΔT <T _b −T _r .
FIG. 11B shows a time chart in the case of ΔT = T _b −T _r .
FIG. 12A shows a time chart in the case of T _b −T _r <ΔT <T _b .
Figure 12 (b) shows a time chart when the [Delta] T = _{T b.}

As can be seen from FIGS. 4C and 4D, since the negative voltage portion of the voltage V _out (t) of the output signal of the differential amplifier 103 does not contribute to the operation of the time gate, the time gate width T _g is Consider the time when the voltage V _out (t) of the output signal of the differential amplifier 103 obtained in FIGS. 5A and 5B to FIGS. 12A and 12B takes 0 or a positive voltage. Therefore, the time gate width T _g is defined as a time interval (t ₂ −t ₁ ) in which the value of the voltage V _out (t) of the output signal of the differential amplifier 103 takes one half of the maximum value V _max . That is, the maximum value V _max of the voltage V _out (t) of the output signal of the differential amplifier 103 within the time of one cycle T _b is
V _max / 2 = V _out (t ₁ ) = V _out (t ₂ )
Then, as can be seen from FIGS. 5A and 5B to FIGS. 12A and 12B, the time for the voltage V _out (t) of the output signal of the differential amplifier 103 to be V _max / 2 is There are two. Here, the time gate width The _{T g} can be expressed by the following equation (14).
_{T g = | t 2 -t 1} | formula (14)
At this time, the time gate width _Tg is obtained by the following equations (15) and (16).

となる。また、図１３のグラフはΔＴ＝Ｔ_ｂ／２を中心として線対称であるので、移相器１０２における時間遅延はＴ_ｂ／２、すなわち、位相遅延に変換するとπラジアンあれば十分である。以上のように、移相器１０２で０からπラジアンまでの範囲のいずれかの位相遅延を施すことにより、式（１７）に示される範囲のいずれかの時間ゲート幅Ｔ_ｇを設定できる。 The graph showing the relationship between the time gate width T _g and the delay time [Delta] T, shown in Figure 13. However, from the equation (16), the time gate width _{T g} because periodic function having a period of repetition period _{T b,} Fig. 13 shows only the range of 0 ≦ ΔT ≦ _{T b.} Than 13, the setting range of the time gate width The _{T g,} the following equation (17)

It becomes. Further, since the graph of FIG. 13 is axisymmetric with respect to ΔT = T _b / 2, the time delay in the phase shifter 102 is T _b / 2, that is, π radians is sufficient when converted to a phase delay. As described above, by applying one of the phase delay in the range from 0 to π radians phase shifter 102 can be set to one of the time gate width T _g of the range shown in the formula (17).

As an example, using a numerical value obtained from commercially available parts catalog, numerical examples of the setting range of the time gate width T _g. As the phase shifter 102, a product number 6805 manufactured by Sage (Sage Laboratories Inc.) can be used. From the product specifications, this product
“・ Phase Shift, min 40 ° / GHz
(That is, the guaranteed range of phase variable width is 40 ° / GHz.)
・ Insertion Phase, nom at Min Phase Setting 150 ° / GHz
(In other words, the phase when the minimum phase is set is 150 ° / GHz.) ”
It has the characteristics.

  In addition, the product number 1312VA manufactured by Inphi Corporation can be used, and the rise time of this differential amplifier is 30 ps (maximum).

Since a 1000 ps time delay corresponds to a 360 ° phase delay, converting the delay to a time delay,
The “Phase Shift, min” value is 111 ps,
The “Insertion Phase, nom at Min Phase Setting” value is 417 ps.
Therefore, from 417 ps + 111 ps = 528 ps, the settable range of the time gate width by the phase shifter of product number 6805 manufactured by Sage is up to 528 ps.

Here, the time delay amount by the signal line of the first clock signal S ₁ from the branching device 101 to the differential amplifier 103 is set to the second delay from the branching device 101 to the differential amplifier 103 via the phase shifter 102. When the clock signal S ₂ (or S ₃ ) is configured to be equal to the minimum value of the time delay amount by the device and signal line, the variable range of the time delay by the phase shifter 102 is 111 ps. On the other hand, the rise time of the differential amplifier 103 is 30 ps. Therefore, the setting range of the time gate width is a range from 30 ps to 111 ps.

As described above, since the optical time gate device 150 in accordance if the time gate width The T _g of the first embodiment can be set only by adjusting the phase shifter 102, the simplification and miniaturization of the configuration of the device realizable.

Also, as the system has multiplexing are often required by the chip pulse width becomes large number of chips is reduced, since a smaller time gate width T _g is required, the phase delay amount of the phase shifter is reduced, Parts / equipment size is reduced.

Further, according to the OCDM signal receiving apparatus 160 according to the first embodiment, the information transfer rate per channel is small, i.e., in the bit period _{T b} is larger OCDM communication, the time gate width _{T g} is the repetition period _{T b} Compared with this, it is possible to provide an interference canceling means using a gate that is sufficiently smaller in time.

Second Embodiment FIG. 14 is a block diagram schematically showing a configuration of an optical time gate device 150a according to a second embodiment of the present invention. In FIG. 14, the same reference numerals are given to the same or corresponding components as those shown in FIG. As shown in FIG. 14, the optical time gate device 150a according to the second embodiment includes a first signal line 102a from the branching unit 101 to the first clock signal _{S 1} is transmitted to the differential amplifier 103 , The second signal line 102b from the branching device 101 to the differential amplifier 103 through which the second clock signal S ₂ (or S ₃ ) is transmitted, and the wiring length of the second signal line 102b is the first The signal line 102a is longer than the wiring length. As described above, the optical time gate device 150 a according to the second embodiment increases the wiring length of one signal line input to the differential amplifier 103, and the two clock signals input to the differential amplifier 103. The phase delay is given to one of the optical time gate devices 150 according to the first embodiment in which the phase delay is given by the phase shifter 102.

As an example, using a numerical value obtained from commercially available parts catalog, numerical examples of the setting range of the time gate width T _g. Using a coaxial cable (product number SUCOFLEX101 manufactured by Suhner, Inc .: propagation delay 4.3 ns / m) gives a time delay of 111 ps between the two clock signals when the difference in wiring length between the two systems is 2.58 cm. be able to. Thus, it can be set by providing a phase delay to one of the clock signal using a commercially available coaxial cable, the time gate width T _g to a desired value.

As described above, according to the optical time gate device 150a according to the second embodiment, it is possible to set the time gate width T _g in the signal lines 102a and 102b of the wiring length, simplification and compact arrangement of the device Can be realized.

Also, as the system has multiplexing are often required by the chip pulse width becomes large number of chips is reduced, since a smaller time gate width T _g is required, the phase delay amount of the phase shifter is reduced, Parts / equipment size is reduced.

  In addition to the above, the optical time gate device 150a according to the second embodiment is the same as the optical time gate device 150 according to the first embodiment.

1 is a block diagram schematically showing a configuration of an optical time gate device according to a first embodiment of the present invention. It is a block diagram which shows roughly the structure of the OCDM signal receiver using the optical time gate apparatus which concerns on 1st Embodiment. (A) thru | or (c) are time charts which show operation | movement of the differential amplifier shown by FIG. (A) thru | or (d) is related with operation | movement of the light intensity modulator shown by FIG. 1, (a) and (b) are explanatory drawings which show operation | movement of a light intensity modulator, (c) is light. It is a time chart which shows the input electrical signal of an intensity modulator, (d) is a time chart which shows the light transmittance of a light intensity modulator. (A) And (b) is a time chart which shows operation | movement of the differential amplifier shown by FIG. (A) And (b) is a time chart which shows operation | movement of the differential amplifier shown by FIG. (A) And (b) is a time chart which shows operation | movement of the differential amplifier shown by FIG. (A) And (b) is a time chart which shows operation | movement of the differential amplifier shown by FIG. (A) And (b) is a time chart which shows operation | movement of the differential amplifier shown by FIG. (A) And (b) is a time chart which shows operation | movement of the differential amplifier shown by FIG. (A) And (b) is a time chart which shows operation | movement of the differential amplifier shown by FIG. (A) And (b) is a time chart which shows operation | movement of the differential amplifier shown by FIG. It is a figure which shows the relationship between a time gate width, a time delay, and a rise (fall) time. It is a block diagram which shows roughly the structure of the optical time gate apparatus which concerns on the 2nd Embodiment of this invention. It is a block diagram which shows the conventional OCDM communication system. (A) thru | or (f) is explanatory drawing of the conventional optical code division multiplexing system.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 Branch device, 102 Phase shifter, 102a 1st signal line, 102b 2nd signal line, 103 Differential amplifier, 104 Optical intensity modulator, 150,150a Optical time gate apparatus, 151 Delay device, 152 Clock extractor 160 OCDM signal receiver, S ₀ input clock signal, S _1- branched clock signal (first clock signal), S _2- branched clock signal (second clock signal), S ₃ phase delayed second Clock signal, S ₄ differential signal, L ₀ input light, L ₁ output signal, L _des desired signal, L _un interference signal, T _b bit period (reciprocal of bit rate), T _c Time difference between adjacent chip pulses, T _g time gate width, _Tr rise (fall) time, T _s spreading time, ΔT phase delay, V ₁ (t) voltage of first clock signal, V ₂ (t ) Voltage of second clock signal, V _out (t) Output voltage of light intensity modulator.

Claims (4)

Branching means for branching an input clock signal having a rectangular waveform and outputting a first clock signal and a second clock signal;
Phase shifting means for giving a phase delay to the second clock signal and having a variable phase delay amount;
The voltage value is proportional to the difference between the first clock signal and the phase-delayed second clock signal, and the voltage value is a high level that is a positive voltage value, and the voltage value is 0. Differential amplifying means for outputting a differential signal consisting of three levels of low level, the voltage value being a negative voltage value;
The light transmittance of the input light changes according to the voltage value of the difference signal, and the light intensity modulation means having a larger light transmittance as the voltage value of the difference signal is larger.
The rate of change of the light transmittance with respect to the voltage change of the difference signal when the voltage value of the difference signal is positive is the same as the voltage change of the difference signal when the voltage value of the difference signal is negative. An optical time gating device characterized by being larger than the rate of change of light transmittance.   2. The optical time gate device according to claim 1, wherein the phase shift means is a phase shifter capable of changing the amount of the phase delay. The phase shifting means is
A first signal line from the branching unit to which the first clock signal is transmitted to the differential amplification unit;
3. The second signal line from the branching unit to which the second clock signal is transmitted, which is longer than the first signal line, to the differential amplification unit. The optical time gate device as described. An OCDM signal receiving apparatus that receives an optical signal encoded by an OCDM system,
Decoding means for decoding the received optical signal;
An optical time gate device according to any one of claims 1 to 3 ,
An OCDM signal receiving apparatus, wherein the optical signal decoded by the decoding means is input to the optical time gating apparatus.

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