JP4360263B2 - Transistor driving circuit and transistor driving method - Google Patents

Description

  The present invention relates to a transistor driving circuit and a transistor driving method, and more particularly to a transistor driving circuit for switching a MOS transistor by controlling a gate voltage of a MOS transistor in which a source and a drain are connected in series between an input and an output. The present invention relates to a transistor driving method.

  The battery pack normally includes a protection IC for protecting the storage battery from overcharge and overdischarge.

  FIG. 7 shows a block diagram of the battery pack.

  The battery pack 100 includes a storage battery 111, a protection IC (integrated circuit) 112, and transistors M111 and M112. The storage battery 111 is composed of, for example, a lithium ion battery. A transistor M111 and a transistor M112 are connected between the positive polarity (+) side of the storage battery 111 and the output terminal Tout10 so that the drain and the source are in series. The transistors M111 and M112 are normally composed of p-channel MOS (metal-oxide-semiconductor) field effect transistors to control positive (+) current, and are switched by a control signal from the protection IC 112.

  The protection IC 112 monitors the voltage on the positive polarity (+) side of the storage battery 111. When the monitoring voltage VBAT is higher than the first voltage (V1) that is the threshold voltage in the overcharge state, the protection IC 112 is connected to the output terminal Tout10 side. The arranged transistor M112 is turned off, and when the monitoring voltage VBAT is smaller than the second voltage (V2 <V1) which becomes the threshold voltage in the overdischarge state, the transistor M111 arranged on the storage battery 111 side is turned off. By turning off the transistor M111 or the transistor M112, the connection between the storage battery 111 and the output terminal Tout10 is disconnected, the charging or discharging of the storage battery 111 is stopped, and the storage battery 111 can be protected from overcharge or overdischarge.

  However, p-channel MOS field effect transistors are more expensive and less in number than n-channel MOS field effect transistors with equivalent performance. Therefore, the conventional battery pack 100 or the like can also be configured at low cost by using an n-channel MOS field effect transistor.

  However, the n-channel MOS field effect transistor is usually used not for the purpose of cutting the positive polarity (+) side but for the purpose of cutting the negative polarity (−) side. On the other hand, in the battery pack 100 or the like, power is usually transferred on the positive polarity (+) side, and there is a demand to provide a transistor as a protective element on the positive polarity (+) side.

  Therefore, in order to control the positive (+) side current using the n-channel MOS field effect transistor, for example, using a step-up DC-DC converter or a charge pump, the driving voltage of the n-channel MOS field effect transistor is used. Can be considered (see Patent Document 1).

Japanese Patent Laid-Open No. 5-14155

  However, the step-up DC-DC converter, the charge pump, and the like have problems such as an increase in cost because many external parts such as a coil and a capacitor are required.

  The present invention has been made in view of the above points, and an object of the present invention is to provide a transistor driving circuit and a transistor driving method capable of reliably driving a transistor with a simple configuration.

In the present invention, the MOS transistor (M1, M2) in which the source and drain are connected in series between the input and the output, and the gates of the MOS transistors (M1, M2) are connected to the terminals (tout1, tout2). Semiconductors including control circuits (21, 22, SW1, SW2) for switching the MOS transistors (M1, M2) by controlling the gate voltages of the MOS transistors (M1, M2) via the terminals (tcnt1, tcnt2) in the transistor drive circuit provided with an integrated circuit (12), MOS transistors (M1, M2) is composed of n-channel MOS transistor, Ru is connected to the control circuit (21, 22, SW1, SW2) capacitor (C) It has a control circuit (21, 22, SW1, SW2) is, MOS transistor connected to the terminal (tcnt1, tcnt2) ( 1, the gate of M2) - source and gate - a parasitic capacitance between the drain (C11, C12, C21, C22 ) and the capacitor (C), constitute a charge pump circuit configured to utilize the parasitic capacitance The gate voltage of the MOS transistors (M1, M2) is boosted.

  In addition, the said reference code is a reference to the last, This does not limit a claim.

According to the present invention, a charge configured using a capacitor externally or built in a semiconductor integrated circuit and a parasitic capacitance between the gate and source and between the gate and drain of an n-channel MOS transistor connected to the semiconductor device. By using the pump circuit to boost the gate voltage of the externally attached MOS transistor, only one capacitor is needed to form the charge pump circuit, so the n-channel MOS transistor can be connected to the positive-side power supply with a simple structure. Can be driven on line.

  In this embodiment, a case where the booster circuit of the present invention is applied to a protection circuit for a battery pack will be described.

  FIG. 1 shows a block diagram of an embodiment of the present invention.

  The battery pack 1 according to the present embodiment includes a storage battery 11, a protection IC 12, n-channel MOS field effect transistors M1 and M2, and a capacitor C.

  The storage battery 11 is configured, for example, by connecting a plurality of lithium ion batteries in series. One end on the positive polarity (+) side of the storage battery 11 is connected to the output terminal Tout0 via the transistor M1 and the transistor M2. The transistors M1 and M2 are composed of n-channel MOS field effect transistors, and are connected so that the drain and the source are in series. The transistor M1 is connected to the storage battery 11 side, and has parasitic capacitances C11 and C12 between the gate-source and the gate-drain. The transistor M2 is connected to the output terminal Tout0 side, and has parasitic capacitances C21 and C22 between the gate-source and the gate-drain. The gates of the transistors M 1 and M 2 are connected to the protection IC 12, and switching is controlled by the voltage from the protection IC 12.

  One end of the negative polarity (−) of the storage battery 11 is grounded and connected to the ground terminal Tgnd. A load or a charger is connected between the output terminal Tout0 and the ground terminal Tgnd. Power is supplied from the storage battery 11 to a load connected between the output terminal Tout0 and the ground terminal Tgnd. Further, the storage battery 11 is charged from a charger connected between the output terminal Tout0 and the ground terminal Tgnd.

  The protection IC 12 has terminals Tbat, TVBAT, Tout1, Tout2, Tc1, Tc2, and Tgnd. The voltage VBAT at one end on the positive polarity (+) side of the storage battery 11 is applied to the terminals Tbat and TVBAT of the protection IC 12. The terminal Tout1 of the protection IC 12 is connected to the gate of the transistor M1, and the terminal Tout2 is connected to the gate of the transistor M2. An external capacitor C is connected between the terminal Tc1 and the terminal Tc2.

  FIG. 2 is a block diagram of the protection IC 12.

  The protection IC 12 includes a control circuit 21, a drive circuit 22, and switches SW1 and SW2. The battery voltage VBAT applied to the battery terminal Tbat of the protection IC 12 is applied to the control circuit 21.

The control circuit 21 monitors the battery voltage VBAT from the battery terminal Tbat. When the battery voltage VBAT reaches the overdischarge voltage V11, the transistor M11 is turned on, the transistor M12 is turned off, and the control terminal Tcnt1 (= Tout1) is set to the high level. To do. The control circuit 21 monitors the battery voltage VBAT from the battery terminal Tbat. When the battery voltage VBAT reaches the overcharge voltage V12, the transistor M21 is turned on, the transistor M22 is turned off, and the control terminal Tcnt2 (= Tout2) is turned high. Level.

  The battery voltage VBAT applied to the terminal TVBAT of the protection IC 12 is applied to the control circuit 21 and the switches SW1 and SW2 and used as a drive voltage. The switch SW1 switches the connection destination of the terminal Tc1 to which one end of the capacitor C is connected to either the drive terminal TVBAT or the sources of the transistors M11 and M12 in response to a switching control signal from the control circuit 21. The switch SW2 switches the connection destination of the terminal Tc2 to which one end of the capacitor C is connected to either the ground terminal Tgnd or the drive terminal TVBAT in response to a switching control signal from the control circuit 21.

  The protection IC 12 switches the switches SW1 and SW2 by the control circuit 21 when the MOS transistors M1 and M2 are turned on, whereby parasitic capacitances C11, C12, C21, and C22 between the gates and sources of the MOS transistors M1 and M2 and the capacitor C So that the charge pump circuit is configured, the gate voltages of the MOS transistors M1 and M2 are boosted, and the MOS transistors M1 and M2 are surely turned on.

  Here, the charge pump circuit operation using the capacitor C and the parasitic capacitances C11, C12, C21, and C22 of the MOS transistors M1 and M2 will be described.

  3 is an equivalent circuit diagram at the time of discharging the main part of the protection IC 12, FIG. 4 is an equivalent circuit diagram at the time of charging the main part of the protection IC 12, and FIG.

  When the switches SW1 and SW2 are switched as indicated by the solid line in FIG. 2 while the capacitor C is charged at time t0, the capacitor C is connected as shown in FIG. 3, and the drive period Td is reached. In the drive period Td, a voltage (2 × VBAT) obtained by adding the charging voltage Vchg (= VBAT) of the capacitor C to the battery voltage VBAT is applied as the drive voltage Vd of the drive circuit 22. That is, drive circuit 22 is driven by drive voltage Vd = (2 × VBAT) obtained by boosting battery voltage VBAT twice. As a result, the n-channel MOS field effect transistors M1 and M2 can be reliably driven. In the drive period Td, the charging voltage Vchg of the capacitor C gradually decreases due to leakage current as shown in FIG.

  At time t1 when a preset drive period Td has elapsed, the switches SW1 and SW2 are switched as indicated by broken lines in FIG. When the switches SW1 and SW2 are switched as indicated by broken lines in FIG. 2, the capacitor C is connected as shown in FIG. Thereby, the capacitor C is charged by the battery voltage VBAT. Capacitor C is fully charged at time t2 when a preset charging period Tchg has elapsed.

  At this time, the parasitic capacitances C11, C12, C21, and C22 of the MOS transistors M1 and M2 are mainly discharged, and the gate voltages of the MOS transistors M1 and M2 are maintained at the on voltage. The voltage applied to the drive circuit 22 decreases rapidly because the parasitic capacitances C11, C12, C21, and C22 of the MOS transistors M1 and M2 are as small as several hundred pF, but the capacitor C is fully charged in a short charging period Tchg. Therefore, the voltage applied to the drive circuit 22 is significantly reduced, and the drive period Td is restored before the voltage becomes lower than the battery voltage VBAT.

At this time, the drive period Td and the charge period Tchg are set so that the drive voltage Vd does not drop significantly. If the capacitance of the capacitor C is C0, the leakage current is Ileak, and the drop voltage is ΔV,
The drive period Td is
Td = (C0 × ΔV) / Ileak (1)
Based on. The drop voltage is V2 as the charge voltage after drop, and VBAT as the charge voltage at full charge.
ΔV = VBAT−V2
Is required.

In addition, the charging period Tchg is defined as follows.
Tchg = (C1 × (V2−V1)) / Ileak (2)
Based on.

  For example, the drive period Td and the charging period Tchg may be set so that the voltage V1 at the time of the lowest drop of the charging voltage is sufficiently larger than the battery voltage VBAT.

  The control circuit 21 controls switching of the switches SW1 and SW2 by, for example, an oscillation circuit that performs oscillation output at a frequency corresponding to the period of the drive period Td and the charging period Tchg and a one-shot multivibrator that outputs a pulse of the charging period Tchg A switching control signal for performing is generated.

  According to the present embodiment, by forming a charge pump circuit with the parasitic capacitances C11, C12, C21, C22 of the MOS transistors M1, M2 and the capacitor C, only one capacitor C is externally attached to the protection IC 12. The battery voltage VBAT can be boosted to double the drive voltage Vd (= 2 × VBAT). Therefore, the n-channel MOS transistors M1 and M2 can be switched and controlled on the positive polarity side power supply line with a simple configuration.

  In this embodiment, the capacitor C is externally connected between the terminal Tc1 and the terminal Tc2 of the protection IC 12. However, the capacitor C may be built in the protection IC 12.

  In this embodiment, the capacitor C is shared by two drive circuits, that is, a drive circuit for driving the transistor M1 including the transistors M11 and M12 and a drive circuit for driving the transistor M2 including the transistors M21 and M22. However, each drive circuit may be provided separately.

  FIG. 6 shows a block diagram of a modified example of the protection IC 12. In the figure, the same components as in FIG.

  The protection IC 32 of this modification is configured such that capacitors C31 and C32 are provided instead of the capacitor C0, and SW11, SW12, SW21 and SW22 are provided instead of the switches SW1 and SW2. The capacitor C11 and the switches SW11 and SW12 constitute a circuit for boosting the drive voltage applied to the transistors M11 and M12. The capacitor C12 and the switches SW21 and SW22 form a circuit for boosting the drive voltage applied to the transistors M21 and M22. The operation of each circuit is the same as that of the circuit composed of the capacitor C0 and the switches SW1 and SW2, and the description thereof is omitted.

  According to the present embodiment, the drive voltages applied to the transistors M11 and M12 and the transistors M21 and M22 can be boosted and supplied separately, so that the transistors M1 and M2 can be reliably turned on. At this time, the charging period Tchg may be different between the circuit composed of the capacitor C31 and the switches SW11 and SW12 and the circuit composed of the transistors C21 and M22 for the capacitor C32 and the switches SW21 and SW22.

It is a block block diagram of one Example of this invention. 2 is a block configuration diagram of a protection IC 12. FIG. It is an equivalent circuit diagram at the time of discharge of the principal part of protection IC12. It is an equivalent circuit diagram at the time of charge of the principal part of protection IC12. 6 is an operation waveform diagram of a capacitor C. FIG. It is a block block diagram of the modification of protection IC12. It is a block block diagram of an example of the past.

Explanation of symbols

1 Battery pack 11 Storage battery, 12 Protection IC
M1, M2 n-channel MOS field effect transistors, parasitic capacitances C11, C12, C21, C22
Capacitors C, C31, C32
21 control circuit, 22 drive circuit SW1, SW2 switch, M11, M12, M21, M22 transistor

Claims (2)

A MOS transistor in which a source-drain is connected in series between an input and an output, and a gate of the MOS transistor is connected to a terminal, and the gate voltage of the MOS transistor is controlled via the terminal , In a transistor drive circuit provided with a semiconductor integrated circuit including a control circuit for switching the MOS transistor,
The MOS transistor is composed of an n-channel MOS transistor,
It has a capacitor that will be connected to the control circuit,
The control circuit constitutes a charge pump circuit configured to use the parasitic capacitance by the parasitic capacitance between the gate and source of the MOS transistor connected to the terminal and between the gate and drain and the capacitor. A transistor drive circuit which boosts the gate voltage of the MOS transistor. The gate voltage of the MOS transistor in which the source and drain are connected in series between the input and the output is connected to the terminal, and the gate of the MOS transistor is connected to the terminal, and the gate voltage of the MOS transistor is controlled via the terminal. Then, in a transistor driving method for switching the MOS transistor controlled by a semiconductor integrated circuit including a control circuit for switching the MOS transistor,
The MOS transistor is composed of an n-channel MOS transistor,
A capacitor is connected to the control circuit,
The control circuit constitutes a charge pump circuit configured to use the parasitic capacitance by the parasitic capacitance between the gate and source of the MOS transistor connected to the terminal and between the gate and drain and the capacitor. A transistor driving method characterized by boosting the gate voltage of the MOS transistor.

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