JP4336181B2 - Multilayer electronic components - Google Patents

Description

  The present invention relates to a multilayer electronic component used for various communication devices and electronic devices.

  Conventionally, a multilayer electronic component having a capacitor has been used to construct an electronic circuit for a communication device or an electronic device.

  When an electronic circuit constituting a high-pass filter, for example, is incorporated in such a conventional multilayer electronic component, the equivalent circuit has two capacitors C2a and C2b connected in series between input and output terminals as shown in FIG. The second capacitor C2 is formed, the first capacitor C1 is connected in parallel to the second capacitor C2, and the inductor L is connected in series between the capacitors C2a and C2b and the ground. It is configured. Such a high-pass filter cuts components below a certain frequency of the signal inputted from the input terminal, and passes only signal components above the certain frequency to the output terminal side.

  FIG. 4 shows an exploded perspective view of a conventional multilayer electronic component incorporating the electronic circuit shown in FIG. In this multilayer electronic component, the upper electrode layer 21a, the intermediate electrode layer 22, and the lower electrode layer 23a are sequentially stacked in the stacking direction with a dielectric layer sandwiched therebetween and all the electrode layers facing each other. A capacitor C2a between the upper electrode layer 21a and the intermediate electrode layer 22 and a capacitor C2b between the lower electrode layer 23a and the intermediate electrode layer 22 are connected in series to form a second capacitor part C2.

On the other hand, the first capacitor unit C1 connected in parallel to the second capacitor unit C2 forms an upper lead electrode 21b extending in a direction perpendicular to the stacking direction from the upper electrode layer 21a and a lower electrode layer. A lower extraction electrode 23b extending in a direction perpendicular to the stacking direction is formed on 23a, and the upper extraction electrode 21b and the lower extraction electrode 23b are disposed to face each other with the dielectric layers 20b and 20c interposed therebetween. (For example, refer to Patent Document 1).
Japanese Patent Laid-Open No. 2002-232205 (FIGS. 1 and 8 (a))

  However, in the conventional multilayer electronic component described above, the upper lead extending from the upper electrode layer 21a in the direction perpendicular to the stacking direction is connected to the first capacitor C1 connected in parallel to the second capacitor C2. Since the electrode 21b and the lower lead electrode 23b extending in the direction perpendicular to the stacking direction from the lower electrode layer 23a are disposed to face each other, the upper electrode layer 21a is manufactured in the manufacture of the multilayer electronic component. Alternatively, when a stacking shift occurs in the lower electrode layer 23a, not only the desired capacitance value cannot be obtained in the second capacitor portion C2, but also the upper lead electrode 21b and the lower lead electrode forming the first capacitor portion C1. Since the positional relationship with 23b also differs from the design value, the capacitance value of the first capacitor C1 also changes simultaneously. As a result, when an electric circuit such as a high-pass filter is configured using such a capacitor, there is a problem that it is impossible to obtain desired electrical characteristics.

  The present invention has been devised in view of the above-described drawbacks, and an object of the present invention is to provide a multilayer electronic component having a predetermined capacitance value accurately formed therein and having desired electrical characteristics.

  The multilayer electronic component of the present invention comprises an upper electrode layer, an intermediate electrode layer, and a lower electrode layer sandwiched between or inside a multilayer body formed by laminating a plurality of dielectric layers, and the dielectric layer sandwiched therebetween, and The electrode layers are sequentially arranged in the stacking direction so that all the electrode layers face each other, and a window portion is provided in the intermediate electrode layer, and a first region is formed in the window forming region between the upper electrode layer and the lower electrode layer. The second capacitor part in which the capacitor between the upper electrode layer and the intermediate electrode layer and the capacitor between the lower electrode layer and the intermediate electrode layer are connected in series to the non-formation region of the window part, and both capacitor parts are connected in parallel. A capacitor formed as described above.

  The multilayer electronic component of the present invention is characterized in that the entire periphery of the window is positioned inside the outer periphery of the upper electrode layer and the lower electrode layer.

  Furthermore, the multilayer electronic component of the present invention is characterized in that the outer periphery of the intermediate electrode layer is positioned outside the outer periphery of the upper electrode layer and the lower electrode layer throughout.

  According to the multilayer electronic component of the present invention, the dielectric layer is sandwiched between the upper electrode layer, the intermediate electrode layer, and the lower electrode layer, and the electrodes are sequentially arranged in the stacking direction so that all the electrode layers face each other. By providing a window portion in the intermediate electrode layer, a first capacitor portion is formed in the window formation region between the upper electrode layer and the lower electrode layer. As a result, when a laminated electronic component is manufactured, even if a stacking shift occurs in any one of the upper electrode layer, the intermediate electrode layer, and the lower electrode layer, the upper electrode layer and the lower electrode layer through the window portion Can be kept constant, and the capacitance value of the first capacitor portion can be set to the designed capacitance value. As a result, if an electric circuit such as a high-pass filter is configured using such a capacitor, desired electrical characteristics can be obtained.

  Further, according to the multilayer electronic component of the present invention, the upper electrode layer and the lower part through the window part are arranged by positioning the peripheral edge of the window part inside the outer periphery of the upper electrode layer and the lower electrode layer. The area facing the electrode layer can be more reliably kept constant.

  Furthermore, according to the multilayer electronic component of the present invention, since the outer periphery of the intermediate electrode layer is located outside the outer periphery of the upper electrode layer and the lower electrode layer, the multilayer electronic component is manufactured. Even if a stacking error occurs in any one of the upper electrode layer, the intermediate electrode layer, and the lower electrode layer, the opposing area between the upper electrode layer and the intermediate electrode layer, or the opposing area between the lower electrode layer and the intermediate electrode layer Can be kept constant, and the capacitance value of the second capacitor portion can be set to the designed capacitance value as well as the capacitance value of the first capacitor portion.

  Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. In the present embodiment, a multilayer electronic component in which a high-pass filter having an equivalent circuit diagram similar to that of the high-pass filter shown in FIG. 3 is formed will be described as an example.

  FIG. 1 is an exploded perspective view of a multilayer electronic component according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view of the multilayer electronic component in FIG. The multilayer electronic component shown in FIG. 1 has a structure in which an upper electrode layer 2, an intermediate electrode layer 3, a lower electrode layer 4, a stripline conductor 5, and a ground electrode layer 6 are disposed in a multilayer body 1. .

The laminate 1 is formed, for example, by laminating six dielectric layers 1a to 1f in the thickness direction, and each dielectric layer 1a to 1f is made of a dielectric ceramic material, a sintering aid, and a low melting point glass. It is comprised by material etc. and the thickness is set to about 50-300 micrometers per layer. As the dielectric ceramic material, for example, ceramic materials such as BaO—TiO ₂ , Ca—TiO ₂ , and MgO—TiO ₂ are used. As the sintering aid, for example, BiVO ₄ , CuO, Li ₂ O, B ₂ O ₃ or the like is used.

  In such a laminate 1, first, a plurality of ceramic green sheets are prepared by tape-forming a slurry made of the above-mentioned dielectric ceramic material, sintering aid, low-melting glass material, etc. by a conventionally known doctor blade method or the like. Then, these ceramic green sheets are laminated and integrated by press molding, and then fired.

  Note that a conductive paste for forming various electrode layers 2 to 4, a stripline conductor 5, a ground electrode layer 6 and the like, which will be described later, is applied to the surface of the ceramic green sheet in advance before the lamination.

  Inside the laminated body 1, an upper electrode layer 2, an intermediate electrode layer 3, a lower electrode layer 4, a strip line conductor 5 and a ground electrode layer 6 are laminated in a predetermined order. Specifically, the upper electrode layer 2 is disposed on the upper surface of the dielectric layer 1b, and the intermediate electrode layer 3 having a substantially rectangular window portion 7 is opposed to the upper electrode layer 2 on the upper surface of the dielectric layer 1c. The lower electrode layer 4 is disposed on the upper surface of the dielectric layer 1d so as to face the intermediate electrode layer 3, and is electrically connected to the intermediate electrode layer 3 on the upper surface of the dielectric layer 1e. A strip line conductor 5 is disposed, and a ground electrode layer 6 electrically connected to the strip line conductor 5 is disposed on the upper surface of the dielectric layer 1f. Signal electrode pads and ground electrode pads (not shown) are disposed on the top surface of the dielectric layer 1a.

  By arranging the upper electrode layer 2, the intermediate electrode layer 3 and the lower electrode layer 4 as described above, all the electrode layers face each other, and the window portion 7 is formed between the upper electrode layer 2 and the lower electrode layer 4. The first capacitor portion C1 is formed in the region, and the capacitor C2a between the upper electrode layer 2 and the intermediate electrode layer 3 and the lower electrode layer are formed in the region where the window portion 7 is not formed between the upper electrode layer 2 and the lower electrode layer 4. 4-capacitance C3b between the intermediate electrode layers 3 is formed in series with the second capacitance portion C2, and the first capacitance portion C1 and the second capacitance portion C2 are connected in parallel.

  By forming the window portion 7 in the intermediate electrode layer 3 in this manner, the first capacitor portion C1 and the second capacitor portion C2 that are connected in parallel in the region where the upper electrode layer 2 and the lower electrode layer 4 are opposed to each other. In the manufacture of a multilayer electronic component, even if a stacking shift occurs in any one of the upper electrode layer 2, the intermediate electrode layer 3, and the lower electrode layer 4, the window portion 7 is passed through. Thus, the facing area between the upper electrode layer 2 and the lower electrode layer 3 can be kept constant, and the capacitance value of the first capacitor portion C1 can be set to the designed capacitance value. As a result, if an electric circuit such as a high-pass filter is configured using such a capacitor, desired electrical characteristics can be obtained.

  Further, if the peripheral edge of the window portion 7 is located on the inner side of the outer periphery of the upper electrode layer 2 and the lower electrode layer 4, the upper electrode layer 2 and the lower electrode layer 3 are opposed to each other through the window portion 7. The area can be more reliably kept constant.

  Furthermore, if the outer periphery of the intermediate electrode layer 3 is positioned outside the outer periphery of the upper electrode layer 2 and the lower electrode layer 4, any of the upper electrode layer 2, the intermediate electrode layer 3, and the lower electrode layer 4 can be used. Even if the electrode layer is misaligned, the opposing area between the upper electrode layer 2 and the intermediate electrode layer 3 or the opposing area between the lower electrode layer 4 and the intermediate electrode layer 3 is kept constant. The capacitance value of the second capacitor unit C2 can be stabilized together with the capacitance value of the first capacitor unit C1. Therefore, it is preferable that the outer periphery of the intermediate electrode layer 3 is located outside the outer periphery of the upper electrode layer 2 and the lower electrode layer 4 over the whole.

  The intermediate electrode layer 3 is electrically connected to the dielectric layer stripline conductor 5 through the via-hole conductor 8. The stripline conductor 5 has a predetermined length and width in a spiral shape or a meandering shape, and forms an inductor component L of a high-pass filter.

  The strip line conductor 5 is electrically connected to the ground electrode layer 6 formed on the upper surface of the dielectric layer 1 f through the via-hole conductor 8. The ground electrode layer 6 is formed over substantially the entire top surface of the dielectric layer 1f.

  The electrode layers 2 to 4, the strip line conductor 5, and the ground electrode layer 6 described above are made of, for example, Ag powder such as Ag, Ag—Pd, and Ag—Pt, organic such as borosilicate low-melting glass frit, ethyl cellulose, and the like. It is formed by applying a conductive paste containing a binder, an organic solvent or the like onto a ceramic green sheet by screen printing or the like known in the art, and firing it at the same time as the ceramic green sheet.

  Thus, the electronic circuit shown in FIG. 3, that is, the second capacitor portion C2 formed by connecting two capacitors C2a and C2b in series between the input and output terminals is formed inside the above-described multilayer electronic component. A high-pass filter is formed in which the first capacitor C1 is connected in parallel to the second capacitor C2, and the inductor L is connected in series between the capacitors C2a and C2b and the ground. Such a high-pass filter cuts components below a certain frequency of the signal inputted from the input terminal, and passes only signal components above the certain frequency to the output terminal.

  The present invention is not limited to the above-described embodiment, and various changes and improvements can be made without departing from the scope of the present invention.

  For example, in the above-described embodiment, one window portion 7 is formed in the intermediate electrode layer 3. However, as shown in FIG. 5A, two or more window portions 7 are formed in the intermediate electrode layer 3. It doesn't matter. In this case, as shown in the equivalent circuit diagram of FIG. 5B, a capacitor is obtained by connecting two capacitance units CP1 and CP2 in parallel to a series capacitance unit CS in which two capacitance units are connected in series.

  In the embodiment described above, a capacitor is formed by disposing one intermediate electrode layer 3 between the upper electrode layer 2 and the lower electrode layer 4, but as shown in FIG. Two or more intermediate electrode layers 3 may be disposed between the upper electrode layer 2 and the lower electrode layer 4 to form a capacitor. In this case, as shown in the equivalent circuit diagram of FIG. 6B, a capacitor is obtained by connecting two capacitance units CP1 and CP2 in parallel to a series capacitance unit CS formed by connecting three capacitance units in series.

  Furthermore, in the embodiment described above, the window portion 7 has a substantially rectangular shape, but may be formed in another shape such as a circular shape.

1 is an exploded perspective view of a multilayer electronic component according to an embodiment of the present invention. It is sectional drawing when the multilayer electronic component of FIG. 1 is cut | disconnected in the AA line direction. FIG. 2 is an equivalent circuit diagram of an electric circuit incorporated in the multilayer electronic component shown in FIG. 1. It is a disassembled perspective view of the conventional multilayer electronic component. (A) is an exploded perspective view of the electrode layer which forms the capacitor | condenser of the multilayer electronic component which concerns on other embodiment of this invention, (b) is an equivalent circuit schematic of the capacitor | condenser shown to Fig.5 (a). (A) is an exploded perspective view of the electrode layer which forms the capacitor | condenser of the multilayer electronic component which concerns on other embodiment of this invention, (b) is an equivalent circuit schematic of the capacitor | condenser shown to Fig.6 (a).

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... multilayer body 2 ... upper electrode layer 3 ... intermediate electrode layer 4 ... lower electrode layer 5 ... strip line conductor 6 ... ground electrode layer 7 ... ··· Window portion 8 ··· Via hole conductor C1 · · · First capacitor portion C2 · · · Second capacitor portion

Claims (3)

An upper electrode layer, an intermediate electrode layer, and a lower electrode layer are sandwiched between or inside a laminate formed by laminating a plurality of dielectric layers, and all the electrode layers face each other. In this manner, the intermediate electrode layer is sequentially provided with a window portion, and a first capacitor portion is provided in the window formation region between the upper electrode layer and the lower electrode layer. A capacitor formed by forming a second capacitor part in which a capacitor between the upper electrode layer and the intermediate electrode layer and a capacitor between the lower electrode layer and the intermediate electrode layer are connected in series in the non-formation region so that both capacitor parts are connected in parallel. Multi-layer electronic component having 2. The multilayer electronic component according to claim 1, wherein a peripheral edge of the window portion is located inside the outer periphery of the upper electrode layer and the lower electrode layer throughout the window portion. 3. The multilayer electronic component according to claim 1, wherein an outer periphery of the intermediate electrode layer is positioned outside the outer periphery of the upper electrode layer and the lower electrode layer over the entire intermediate electrode layer.

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