JP4318934B2 - Temperature sensor - Google Patents
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Description
【０００１】
【発明の属する技術分野】
温度センサは、水晶振動子の温度補正用等、電子機器、精密機器に広く使われている。本発明は、これら温度センサの中で高精度な温度検出が容易なＰＮ接合方式の温度センサであり、ＰＮ接合とＭＯＳトランジスタとを集積した温度センサに関する。
【０００２】
【従来の技術】
ＰＮ接合方式の温度センサは、ＰＮ接合に一定値の順方向電流を流し、その際にＰＮ接合に発生する電位差を取り出し出力する構成であり、ＰＮ接合に一定値の順方向電流を流したときに発生する電位差が温度に依存する特性を利用している。
従来の温度センサは、図6のようなＰＮ接合であり、半導体基板に形成した第1の拡散領域３と第1の拡散領域の中に形成した第２の拡散領域４とからなる（例えば、特許文献１参照）。
【０００３】
【特許文献１】
特開平9-229778 第1図、第2図、第3図
【０００４】
【発明が解決しようとする課題】
従来の温度センサのＰＮ接合を用いた温度センサ用ダイオード1のＰＮ接合は、図６のように半導体基板１００に形成した第1の拡散領域３と第1の拡散領域３の中に形成した第２の拡散領域4とからなる。例えば、Ｐ型の半導体基板１００に形成した場合、第1の拡散領域３はＮ型ウエルからなり、第２の拡散領域４はＰ+拡散領域１０３からなる。Ｐ+拡散領域１０３は周囲をフィールド酸化膜１１６に囲まれており、半導体基板１００表面近くでは、Ｐ+拡散領域１０３とＮ型フィールドドープ領域１０６、１０７あるいは特許文献1第２図の場合は第1の拡散領域３との間にＰＮ接合を形成する。このとき、P+拡散領域１０３の不純物濃度は高いため、ＰＮ接合位置は、相対的にＮ型フィールドドープ領域１０６、１０７側、あるいは第1の拡散領域３側に形成され、空乏層の広がりも相対的にＮ型フィールドドープ領域１０６、１０７側、あるいは第1の拡散領域３側に大きくなる。
【０００５】
なお、１０４、１０５はＮ+拡散領域、１１５はゲート酸化膜、１０6-１０９はＮ型フィールドドープ、１１３、１１４はＰ型フィールドドープ、１１７はボロン・リンガラスであり、５はコレクタ電極、６、７はベース電極、８はエミッタ電極である。
【０００６】
フィールド酸化膜１１６の端部は一般的に欠陥が多いため、再結合による電流が大きい。このため、従来例の構造では、ＰＮ接合位置、空乏層がよりフィールド酸化膜側へ広がるため、再結合による電流が大きくなりがちである。
【０００７】
図５に一般的なPN接合の順方向電流と電位差の関係を示す。温度センサとしてPN接合の特性を利用できるのは、図３中のＩの領域である。これは順方向電流（エミッタ電流）がIe1からIe2の間に相当する。順方向電流が小さくなると図３中のIIIの特性となるが、これは前述の再結合による電流によるものである。図３からわかるように、再結合による電流が大きいと、温度センサとしてPN接合の特性を利用できる範囲が小さくなる。
【０００８】
本発明は、上記問題を解決して、再結合による電流を小さくして温度センサとしてPN接合の特性を利用できる範囲を大きくすることを目的とする。
【０００９】
【課題を解決するための手段】
本発明は、少なくとも１つ以上のＰＮ接合と、前記ＰＮ接合の順方向に一定の電流を流す定電流回路と、前記ＰＮ接合に発生する順方向の電位差を出力する出力回路からなり、前記ＰＮ接合は、Ｐ型半導体基板に形成したＮ型の第1の拡散領域と、前記第1の拡散領域の中にあるＰ型の第２の拡散領域から構成されており、前記定電流回路及び出力回路はＰＭＯＳトランジスタ、ＮＭＯＳトランジスタからなり、前記ＰＭＯＳトランジスタのドレインが第３の拡散領域と前記第３の拡散領域よりも不純物濃度が低い第４の拡散領域からなる温度センサにおいて、前記ＰＮ接合を形成する第２の拡散領域が、不純物濃度の高い第５の拡散領域と前記第５の拡散領域の周囲に配置された前記第５の拡散領域と同じ極性で不純物濃度の低い第６の拡散領域から構成され、前記第５の拡散領域と前記第３の拡散領域とが同時に形成され、前記第６の拡散領域と前記第４の拡散領域とが同時に形成されることを特徴とする温度センサである。
【００１０】
前述の温度センサにおいて、導電性を逆に形成したものである。
【００１１】
例えば、本発明の1例である図１によれば、ＰＮ接合を形成する第２の拡散領域４は、不純物濃度の高い第５のＰ+拡散領域１０３と前記第５のＰ+拡散領域１０３の周囲に配置された不純物濃度の低い第６の拡散領域であるＰ型低濃度拡散領域１１０、１１１から構成されるため、ＰＮ接合位置は、従来に比べて相対的に第２の拡散領域４側に形成され、空乏層も従来に比べて相対的にＮ型フィールドドープ領域１０６、１０７側、あるいは第１の拡散領域３側への広がりが小さくなる。
【００１２】
また、第６の拡散領域の形成は、Ｐ型の場合はＰＭＯＳトランジスタ、Ｎ型の場合はＮＭＯＳトランジスタのドレインの低濃度拡散領域（いわゆるＬＤＤ領域）と同時に形成することで、工程増となることなく、本発明のＰＮ接合構造を形成できる。
【００１３】
【実施例】
本発明の実施例を以下に説明する。本実施例は、Ｐ型半導体基板の場合の実施例である。図１は温度センサとなるＰＮ接合の断面図であり、図２は集積されるＰＭＯＳトランジスタ、ＮＭＯＳトランジスタの断面図である。
【００１４】
ＰＮ接合は、ＰＭＯＳトランジスタのＮ型ウエルと同時に形成したベース領域(カソード)３と、ＰＭＯＳトランジスタのドレインと同時に形成したエミッタ領域(アノード)４とからなる。エミッタ４は不純物濃度の高いＰ+拡散領域１０３と不純物濃度の低いＰ型低濃度拡散領域１１０、１１１からなる。Ｐ+拡散領域１０３は、ＰＭＯＳトランジスタのＰ+ソース/ドレイン(図２の１３１、１３２)と同時に形成され、Ｐ型低濃度拡散領域１１０、１１１は、ＰＭＯＳトランジスタのＰ-ＬＤＤ領域(図２の１３３、１４４)の不純物イオン注入と同時に形成する。
【００１５】
Ｐ+拡散領域１０３にはＰ型不純物として二フッ化硼素イオンを注入するが、図３に示すように、Ｐ+拡散領域１０３形成のイオンを注入するときには、Ｐ型低濃度拡散領域１１０、１１１にはイオンが注入されないように、Ｐ型低濃度拡散領域１１０、１１１の上にフォトレジスト１５０、１５１を形成した後にイオン注入を行う。
【００１６】
本実施例のＭＯＳトランジスタは、ポリシリコンからなるゲート電極２３、２４の側壁にスペーサをもたない構造のＬＤＤ型トランジスタである。ＰＭＯＳの場合、図４に示すとおりにフォトレジスト１５２、１５３、１５４を形成してＰ型ＬＤＤ部（低濃度拡散領域）１３３、１３４にはイオンが注入されないようにしてＰ+拡散領域１３１、１３２形成のためのＰ型不純物注入を行う。もちろん、フォトレジスト１５０、１５１、１５２、1５３、1５４、1５５は同時に形成する。このようにゲート電極２３、２４の側壁にスペーサを用いずにＬＤＤ部（低濃度拡散領域）の形成を行うため、本実施例ではスペーサ形成工程の削減による製造工程減もできている。
【００１７】
エミッタ４の周囲はフィールド酸化膜１１６で囲まれており、フィールド酸化膜１１６を介して、ベース３のコンタクト部となるＮ+拡散領域１０４、１０５がフィールド酸化膜１１６を囲むように形成されている。Ｎ+拡散領域１０４、１０５は、ＮＭＯＳトランジスタのＮ+ソース/ドレイン(図２の１３５、１３６)と同時に形成される。
【００１８】
本発明の温度センサのＰＮ接合の順方向電流特性を図５に示す。本発明によれば、ＰＮ接合順方向電流(エミッタ電流)が小さい領域(IV)においてもＩ同様の直線性を示す。これにより、従来は、エミッタ電流範囲 Ｉe1からＩe2までの使用可能範囲が、Ｉe1からＩe3まで拡大できた。
【００１９】
本実施例では、P型半導体基板の実施例であったが、N型半導体基板の場合も同様の効果がある。
【００２０】
【発明の効果】
本発明により、再結合電流が小さく、温度センサとして使用可能な順方向電流範囲が広い温度センサが提供できる。
【図面の簡単な説明】
【図１】 本発明の温度センサ部の断面図である。
【図２】 本発明の温度センサ用ＭＯＳトランジスタ部の断面図である。
【図３】 本発明の温度センサのＰ+拡散領域形成時のセンサ部の断面図である。
【図４】 本発明の温度センサのＰ+拡散領域形成時のＭＯＳトランジスタ部の断面図である。
【図５】 本発明の温度センサのＰＮ接合の順方向電流特性図である。
【図６】 従来の温度センサのセンサ部の断面図である。[0001]
BACKGROUND OF THE INVENTION
Temperature sensors are widely used in electronic equipment and precision equipment, such as for temperature correction of crystal units. The present invention relates to a temperature sensor of a PN junction type that can easily detect a temperature with high accuracy among these temperature sensors, and relates to a temperature sensor in which a PN junction and a MOS transistor are integrated.
[0002]
[Prior art]
The temperature sensor of the PN junction type is configured to flow a constant value forward current through the PN junction, extract and output a potential difference generated at the PN junction at that time, and when a constant value forward current flows through the PN junction. This utilizes the characteristic that the potential difference generated at the temperature depends on the temperature.
A conventional temperature sensor is a PN junction as shown in FIG. 6 and includes a first diffusion region 3 formed in a semiconductor substrate and a second diffusion region 4 formed in the first diffusion region (for example, Patent Document 1).
[0003]
[Patent Document 1]
Japanese Patent Laid-Open No. 9-229778 FIG. 1, FIG. 2, FIG.
[Problems to be solved by the invention]
The PN junction of the temperature sensor diode 1 using the PN junction of the conventional temperature sensor is formed in the first diffusion region 3 and the first diffusion region 3 formed in the semiconductor substrate 100 as shown in FIG. 2 diffusion regions 4. For example, when formed on a P-type semiconductor substrate 100, the first diffusion region 3 is an N-type well, and the second diffusion region 4 is a P + diffusion region 103. The P + diffusion region 103 is surrounded by a field oxide film 116. Near the surface of the semiconductor substrate 100, the P + diffusion region 103 and the N-type field doped regions 106 and 107 or the case of FIG. A PN junction is formed with one diffusion region 3. At this time, since the impurity concentration of the P + diffusion region 103 is high, the PN junction position is relatively formed on the N-type field doped regions 106 and 107 side or the first diffusion region 3 side, and the depletion layer spreads relatively. In particular, it increases toward the N-type field doped regions 106 and 107 or the first diffusion region 3 side.
[0005]
Reference numerals 104 and 105 denote N + diffusion regions, 115 denotes a gate oxide film, 106 to 109 denote N-type field doping, 113 and 114 denote P-type field doping, 117 denotes boron-phosphorus glass, 5 denotes a collector electrode, 6 , 7 is a base electrode, and 8 is an emitter electrode.
[0006]
Since the end portion of the field oxide film 116 generally has many defects, a current due to recombination is large. For this reason, in the structure of the conventional example, since the PN junction position and the depletion layer further spread to the field oxide film side, the current due to recombination tends to increase.
[0007]
FIG. 5 shows a relationship between a forward current and a potential difference of a general PN junction. It is the area | region of I in FIG. 3 that can utilize the characteristic of PN junction as a temperature sensor. This corresponds to a forward current (emitter current) between Ie 1 and Ie 2 . When the forward current is reduced, the characteristic of III in FIG. 3 is obtained, which is due to the above-described current due to recombination. As can be seen from FIG. 3, when the current due to recombination is large, the range in which the characteristics of the PN junction can be used as a temperature sensor becomes small.
[0008]
An object of the present invention is to solve the above-described problems and increase the range in which the characteristics of a PN junction can be used as a temperature sensor by reducing the current due to recombination.
[0009]
[Means for Solving the Problems]
The present invention comprises at least one or more PN junctions, a constant current circuit for passing a constant current in the forward direction of the PN junction, and an output circuit for outputting a forward potential difference generated in the PN junction, The junction is composed of an N-type first diffusion region formed in a P-type semiconductor substrate and a P-type second diffusion region in the first diffusion region. The circuit includes a PMOS transistor and an NMOS transistor, and the drain of the PMOS transistor includes a third diffusion region and a fourth diffusion region whose impurity concentration is lower than that of the third diffusion region, and forms the PN junction. A sixth diffusion region having the same polarity as the fifth diffusion region disposed around the fifth diffusion region and the fifth diffusion region disposed at the periphery of the fifth diffusion region and a low impurity concentration. Temperature sensor, wherein the fifth diffusion region and the third diffusion region are formed simultaneously, and the sixth diffusion region and the fourth diffusion region are formed simultaneously It is.
[0010]
In the above temperature sensor, the conductivity is reversed.
[0011]
For example, according to FIG. 1 which is an example of the present invention, the second diffusion region 4 forming the PN junction includes a fifth P + diffusion region 103 having a high impurity concentration and the fifth P + diffusion region 103. The P-type low concentration diffusion regions 110 and 111, which are sixth impurity regions having a low impurity concentration, are arranged around the second diffusion region 4 relative to the conventional structure. The depletion layer is formed on the N-type field doped regions 106 and 107 side or the first diffusion region 3 side relatively less than the conventional depletion layer.
[0012]
In addition, the sixth diffusion region is formed simultaneously with the low concentration diffusion region (so-called LDD region) of the drain of the PMOS transistor in the case of the P type and NMOS transistor in the case of the N type, thereby increasing the number of processes. The PN junction structure of the present invention can be formed.
[0013]
【Example】
Examples of the present invention will be described below. This embodiment is an embodiment in the case of a P-type semiconductor substrate. FIG. 1 is a cross-sectional view of a PN junction serving as a temperature sensor, and FIG. 2 is a cross-sectional view of an integrated PMOS transistor and NMOS transistor.
[0014]
The PN junction includes a base region (cathode) 3 formed simultaneously with the N-type well of the PMOS transistor and an emitter region (anode) 4 formed simultaneously with the drain of the PMOS transistor. The emitter 4 includes a P + diffusion region 103 having a high impurity concentration and P-type low concentration diffusion regions 110 and 111 having a low impurity concentration. The P + diffusion region 103 is formed simultaneously with the P + source / drain (131, 132 in FIG. 2) of the PMOS transistor, and the P-type low concentration diffusion regions 110, 111 are formed in the P-LDD region (FIG. 2). 133, 144).
[0015]
Boron difluoride ions are implanted into the P + diffusion region 103 as a P-type impurity. As shown in FIG. 3, when ions for forming the P + diffusion region 103 are implanted, the P-type low concentration diffusion regions 110, 111 are implanted. In order to prevent ions from being implanted, ion implantation is performed after photoresists 150 and 151 are formed on the P-type low concentration diffusion regions 110 and 111.
[0016]
The MOS transistor of this embodiment is an LDD type transistor having a structure in which no spacer is provided on the side walls of the
[0017]
The periphery of the emitter 4 is surrounded by a field oxide film 116, and N + diffusion regions 104 and 105 serving as contact portions of the base 3 are formed so as to surround the field oxide film 1 16 via the field oxide film 116. ing. The N + diffusion regions 104 and 105 are formed simultaneously with the N + source / drain (135 and 136 in FIG. 2) of the NMOS transistor.
[0018]
FIG. 5 shows the forward current characteristics of the PN junction of the temperature sensor of the present invention. According to the present invention, the same linearity as in I is exhibited even in the region (IV) where the PN junction forward current (emitter current) is small. Thus, conventionally, the usable range from the emitter current range Ie 1 to Ie 2 can be expanded from Ie 1 to Ie 3 .
[0019]
In this embodiment, the embodiment is a P-type semiconductor substrate, but the same effect can be obtained in the case of an N-type semiconductor substrate.
[0020]
【The invention's effect】
The present invention can provide a temperature sensor with a small recombination current and a wide forward current range that can be used as a temperature sensor.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a temperature sensor unit of the present invention.
FIG. 2 is a cross-sectional view of a temperature sensor MOS transistor portion of the present invention.
3 is a cross-sectional view of the sensor unit during the P + diffusion region forming temperature sensor of the present invention.
FIG. 4 is a cross-sectional view of a MOS transistor portion when forming a P + diffusion region of the temperature sensor of the present invention.
FIG. 5 is a forward current characteristic diagram of a PN junction of the temperature sensor of the present invention.
6 is a cross-sectional view of a sensor portion of the temperature sensor traditional.
Claims (4)
前記ＰＮ接合の順方向に一定の電流を流す定電流回路と、
前記ＰＮ接合に発生する順方向の電位差を出力する出力回路とからなり、
前記定電流回路及び出力回路はＰＭＯＳトランジスタ、ＮＭＯＳトランジスタであり、
前記ＰＭＯＳトランジスタのドレインが第３の拡散領域と前記第３の拡散領域よりも不純物濃度が低い第４の拡散領域からなる温度センサの製造方法において、
前記ＰＮ接合を形成する第２の拡散領域が、不純物濃度の高い第５の拡散領域と前記第５の拡散領域の周囲に配置された前記第５の拡散領域と同じ極性で不純物濃度の低い第６の拡散領域から構成され、
前記第５の拡散領域と前記第３の拡散領域とが同時に形成され、
前記第６の拡散領域と前記第４の拡散領域とが同時に形成されることを特徴とする温度センサの製造方法。First diffusion region of the N type formed in the P-type semiconductor substrate, a PN junction formed of P-type second diffusion region that is in the first diffusion region,
A constant current circuit for flowing a constant current in the forward direction of the PN junction;
An output circuit that outputs a forward potential difference generated in the PN junction,
The constant current circuit and the output circuit are a PMOS transistor and an NMOS transistor,
In the method of manufacturing a temperature sensor , the drain of the PMOS transistor includes a third diffusion region and a fourth diffusion region having an impurity concentration lower than that of the third diffusion region.
The second diffusion region forming the PN junction has the same polarity as the fifth diffusion region having a high impurity concentration and the fifth diffusion region disposed around the fifth diffusion region and having a low impurity concentration. 6 diffusion regions,
The fifth diffusion region and the third diffusion region are formed simultaneously;
The method for manufacturing a temperature sensor, wherein the sixth diffusion region and the fourth diffusion region are formed simultaneously.
前記ＰＮ接合の順方向に一定の電流を流す定電流回路と、
前記ＰＮ接合に発生する順方向の電位差を出力する出力回路からなり、
前記定電流回路及び出力回路はＰＭＯＳトランジスタ、ＮＭＯＳトランジスタからなり、
前記ＮＭＯＳトランジスタのドレインが第３の拡散領域と前記第３の拡散領域よりも不純物濃度が低い第４の拡散領域からなる温度センサの製造方法において、
前記ＰＮ接合を形成する第２の拡散領域が、不純物濃度の高い第５の拡散領域と前記第５の拡散領域の周囲に配置された前記第５の拡散領域と同じ極性で不純物濃度の低い第６の拡散領域から構成され、
前記第５の拡散領域と前記第３の拡散領域とが同時に形成され、
前記第６の拡散領域と前記第４の拡散領域とが同時に形成されることを特徴とする温度センサの製造方法。A P-type first diffusion region formed in an N-type semiconductor substrate, and a PN junction comprising an N-type second diffusion region in the first diffusion region;
A constant current circuit for flowing a constant current in the forward direction of the PN junction;
An output circuit for outputting a forward potential difference generated in the PN junction;
The constant current circuit and the output circuit are composed of a PMOS transistor and an NMOS transistor,
In the method of manufacturing a temperature sensor , the drain of the NMOS transistor includes a third diffusion region and a fourth diffusion region having an impurity concentration lower than that of the third diffusion region.
The second diffusion region forming the PN junction has the same polarity as the fifth diffusion region having a high impurity concentration and the fifth diffusion region disposed around the fifth diffusion region and having a low impurity concentration. 6 diffusion regions,
The fifth diffusion region and the third diffusion region are formed simultaneously;
The method for manufacturing a temperature sensor, wherein the sixth diffusion region and the fourth diffusion region are formed simultaneously.
前記ＰＮ接合は、
Ｐ型半導体基板の表面近傍に配置されたＮ型の第１の拡散領域と、
前記第１の拡散領域の中に配置された、高不純物濃度のＰ型の第２の拡散領域、前記第２の拡散領域を囲んで配置された低不純物濃度のＰ型の第３の拡散領域、および前記第３の拡散領域を囲んで配置されたフィールド酸化膜と、からなり、
前記ＭＯＳトランジスタは、
ゲート電極と、
高不純物濃度のＰ型のソースおよびドレイン領域と、
前記ソースおよびドレイン領域にそれぞれ配置された低不純物濃度のＰ型のＬＤＤ部と、を有し、
前記ゲート電極の側壁にはスペーサを有していないＰ型ＭＯＳトランジスタである、温度センサ A temperature sensor integrating a PN junction and a MOS transistor,
The PN junction is
An N-type first diffusion region disposed near the surface of the P-type semiconductor substrate;
A high impurity concentration P-type second diffusion region disposed in the first diffusion region, and a low impurity concentration P-type third diffusion region disposed surrounding the second diffusion region. And a field oxide film disposed around the third diffusion region,
The MOS transistor is
A gate electrode;
High impurity concentration P-type source and drain regions;
A low impurity concentration P-type LDD portion disposed in each of the source and drain regions,
A temperature sensor , which is a P-type MOS transistor having no spacer on the side wall of the gate electrode
前記ＰＮ接合は、
Ｎ型半導体基板の表面近傍に配置されたＰ型の第１の拡散領域と、
前記第１の拡散領域の中に配置された、高不純物濃度のＮ型の第２の拡散領域、前記第２の拡散領域を囲んで配置された低不純物濃度のＮ型の第３の拡散領域、および前記第３の拡散領域を囲んで配置されたフィールド酸化膜と、からなり、
前記ＭＯＳトランジスタは、
ゲート電極と、
高不純物濃度のＰ型のソースおよびドレイン領域と、
前記ソースおよびドレイン領域にそれぞれ配置された低不純物濃度のＮ型のＬＤＤ部と、を有し、
前記ゲート電極の側壁にはスペーサを有していないＰ型ＭＯＳトランジスタである、温度センサ A temperature sensor integrating a PN junction and a MOS transistor,
The PN junction is
A P-type first diffusion region disposed near the surface of the N-type semiconductor substrate;
A high impurity concentration N-type second diffusion region disposed in the first diffusion region, and a low impurity concentration N-type third diffusion region disposed surrounding the second diffusion region. And a field oxide film disposed around the third diffusion region,
The MOS transistor is
A gate electrode;
High impurity concentration P-type source and drain regions;
A low impurity concentration N-type LDD portion disposed in each of the source and drain regions,
A temperature sensor , which is a P-type MOS transistor having no spacer on the side wall of the gate electrode
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| US10557592B2 (en) | 2014-08-06 | 2020-02-11 | Kc Lng Tech Co., Ltd. | Corner structure of LNG storage tank |
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