JP4307853B2 - Method for manufacturing semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device including a crystallization process using an element for promoting crystallization.
[0002]
[Prior art]
In recent years, development of display devices or integrated circuit devices using thin film transistors (hereinafter abbreviated as TFTs) has attracted attention.
[0003]
As a semiconductor layer constituting the TFT, a crystalline semiconductor film formed by crystallizing an amorphous semiconductor film by heat treatment by furnace or laser light irradiation is used (for example, see Patent Document 1).
[0004]
[Patent Document 1]
Japanese Patent Laid-Open No. 10-189449 (FIGS. 5-11 and 2)
By using a crystalline semiconductor film, a TFT having a field effect mobility much higher than that of a TFT formed using an amorphous semiconductor film can be manufactured. However, the crystalline semiconductor film is mainly a polycrystalline film, and the crystal axes of each crystal grain are not uniform, and thus there are a plurality of plane orientations on the film surface. A difference in the plane orientation of the crystalline semiconductor film causes a difference in the electrical characteristics of the TFT, and as a result, causes a variation in characteristics of the TFT formed in the same substrate.
[0005]
Variations in TFT characteristics cause malfunctions of circuits using TFTs.
[0006]
[Problems to be solved by the invention]
In view of the above problems, an object of the present invention is to provide a method for manufacturing a semiconductor device using a crystalline semiconductor film having a film surface with a high orientation ratio with respect to a specific plane orientation.
[0007]
[Means for Solving the Problems]
The method for manufacturing a semiconductor device of the present invention is characterized in that an element for promoting crystallization is added and heat-treated on the uppermost film in a state where a plurality of amorphous semiconductor films are stacked.
[0008]
A method for manufacturing a semiconductor device according to the present invention includes a step of forming a first amorphous semiconductor film, a step of forming a separation film on the first amorphous semiconductor film, and a step of forming a separation film on the separation film. A step of forming a second amorphous semiconductor film; and an element for promoting crystallization is added to the second amorphous semiconductor film, and then heat treatment is performed, so that the first crystalline semiconductor film is formed. And a step of forming a second crystalline semiconductor film, and a step of removing the separation film and the second crystalline semiconductor film.
[0009]
The separation film is a film provided to separate the first amorphous semiconductor film layer and the second amorphous semiconductor film layer. Note that the separation membrane is preferably a thin membrane so that an element for promoting crystallization can diffuse.
[0010]
As the first amorphous semiconductor film and the second amorphous semiconductor film, an amorphous silicon film, an amorphous silicon germanium film in silicon, or the like can be used. In addition, as a method for forming the first amorphous semiconductor film and the second amorphous semiconductor film, any one of a plasma CVD method, an LPCVD method, a sputtering method, and a vapor deposition method may be used.
[0011]
Note that the first amorphous semiconductor film and the second amorphous semiconductor film may be formed of the same material, or the first amorphous semiconductor film and the second amorphous semiconductor film May be formed of different materials. That is, both the first crystalline semiconductor film and the second amorphous semiconductor film may be formed using an amorphous silicon film (or an amorphous silicon germanium film). Alternatively, an amorphous silicon film may be used as the first amorphous semiconductor film and an amorphous silicon germanium film may be used as the second amorphous semiconductor film. Alternatively, an amorphous silicon germanium film may be used as the first amorphous semiconductor film, and an amorphous silicon film may be used as the second amorphous semiconductor film.
[0012]
When the first amorphous semiconductor film is a film containing hydrogen or the like, crystal nuclei are not generated in the first amorphous semiconductor film after the formation of the first amorphous semiconductor film. It is preferable to perform a heat treatment under temperature conditions to release hydrogen contained in the film.
[0013]
Note that in the case where the first amorphous semiconductor film is an amorphous silicon film, it is preferable to perform heat treatment at 400 to 500 ° C. to release hydrogen in the film.
[0014]
In addition, the separation film is formed of a material that can be selectively etched with respect to each of the first crystalline semiconductor film and the second crystalline semiconductor film.
[0015]
Thus, when the first crystalline semiconductor film and the second crystalline semiconductor film are formed of the same material or are formed of films that cannot be selectively etched, the second crystal It is possible to prevent the first crystalline semiconductor film from being removed at the same time in the removal process of the crystalline semiconductor film.
[0016]
Note that in this specification, the TFT characteristic variation includes both adjacent variation that represents the characteristic difference between adjacent TFTs and in-plane variation that represents the TFT characteristic difference in the substrate.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
One embodiment of the present invention is described with reference to a cross-sectional view of FIG.
[0018]
An amorphous semiconductor film 11 (first amorphous semiconductor film) is formed on the substrate 10. Note that an amorphous silicon germanium film or the like may be used as the amorphous semiconductor film 11. Further, any film formation method such as a plasma CVD method, an LPCVD method, or a sputtering method may be used.
[0019]
Note that in the case where the amorphous semiconductor film 11 is a film containing hydrogen or the like, the amorphous semiconductor film 11 is heat-treated at a temperature and a time condition in which no crystal nucleus is generated, and hydrogen or the like is released from the film. To do. This step is not particularly necessary when an amorphous semiconductor film having a low hydrogen content is used.
[0020]
Next, the separation film 12 is formed on the amorphous semiconductor film 11. In this embodiment, a silicon oxide film is formed on the surface of the amorphous semiconductor film 11 using ozone water to form the separation film 12. As a method for forming the separation membrane 12, other methods such as forming by irradiating UV light in an oxygen atmosphere other than using ozone water may be used. The separation membrane 12 is preferably thin so that an element for promoting crystallization can diffuse.
[0021]
Next, an amorphous semiconductor film 13 (second amorphous semiconductor film) is formed on the separation film 12. As the amorphous semiconductor film 13, amorphous silicon germanium containing several percent germanium (Ge) may be used. Further, any film formation method such as a plasma CVD method, an LPCVD method, or a sputtering method may be used.
[0022]
Next, after adding nickel (Ni) as an element for promoting crystallization to the film surface of the amorphous semiconductor film 13, heat treatment is performed to form the crystalline semiconductor films 14 and 15. Note that in the case where the amorphous semiconductor film 13 is a film containing hydrogen or the like, the amorphous semiconductor film 13 is heat-treated at a temperature and a time condition in which crystal nuclei are not generated, and hydrogen or the like is released from the film. After that, heat treatment for crystallization is performed to form the crystalline semiconductor films 14 and 15.
[0023]
Note that Ni added to the film surface of the amorphous semiconductor film 13 diffuses in the amorphous semiconductor film 13 and the separation film 12 and reaches the amorphous semiconductor film 11. For this reason, it is preferable that the thickness of the separation membrane 12 is small so that Ni can diffuse in the separation membrane 12. The amorphous semiconductor film 13 is formed to extend the diffusion distance of nickel. This is because, when an element for promoting crystallization is used, the crystal growth direction is stabilized after crystal nuclei are generated and then the crystal growth direction is stabilized.
[0024]
Next, the crystalline semiconductor film 15 and the separation film 12 are removed. In this embodiment, after removing the crystalline semiconductor film 15 by etching using a TMAH (Tetra Methyl Ammonium Hydroxide) solution, the separation film 12 is further removed by etching using a hydrofluoric acid (HF) solution. . In this step, the separation film 12 functions as a film that prevents the crystalline semiconductor film 14 from being etched by the TMAH solution. Therefore, it is preferable to select a film that can be selectively etched with the crystalline semiconductor films 14 and 15 as the separation film 12. In addition to TMAH, other solutions such as choline may be used.
[0025]
In this way, it is possible to selectively remove the separation film 12 and the crystalline semiconductor film 15 that are no longer required after crystallization. Therefore, the amorphous semiconductor film 11 may be formed with a film thickness necessary for the semiconductor layer of the TFT.
[0026]
As described above, a crystalline semiconductor film having a film surface with a high orientation ratio with respect to a specific plane orientation can be manufactured.
[0027]
Nickel is removed from the crystalline semiconductor film 14 produced as described above. Further, a TFT is formed to manufacture a semiconductor device. The TFT structure may be any structure such as a single drain structure or an LDD structure, and is not limited. In addition to the single gate structure, a multi-gate structure having a plurality of gate electrodes in one element may be used.
[0028]
A semiconductor device to which the present invention is applied is formed using a crystalline semiconductor film having a film surface with a high orientation ratio with respect to a specific plane orientation. For this reason, the variation in TFT characteristics due to the difference in the plane orientation is reduced, and in particular, the variation between adjacent areas representing the characteristic difference between adjacent TFTs and the in-plane variation representing the characteristic difference between TFTs in the substrate are reduced.
[0029]
【Example】
Example 1
In this embodiment, a method for manufacturing a semiconductor device of the present invention will be described with reference to cross-sectional views of FIGS.
[0030]
Note that in this embodiment, a method for forming an integrated circuit device including an N-channel TFT and a P-channel TFT will be described. A semiconductor device to which the present invention is applied is formed using a crystalline semiconductor film having a film surface with a high orientation ratio with respect to a specific plane orientation. For this reason, the variation in TFT characteristics due to the difference in the plane orientation is reduced, and in particular, the in-plane variation representing the difference between adjacent TFTs and the difference in TFT characteristics within the substrate are reduced. Accordingly, errors in the integrated circuit due to TFT variations (both adjacent variations and in-plane variations) can be reduced, and the design rules for the integrated circuits can be expanded.
[0031]
Over the substrate 1500, a base insulating film 1501a and a base insulating film 1501b are stacked and formed. The base insulating film 1501 (1501a and 1501b) is formed to prevent impurity diffusion from the substrate 1500 to the semiconductor layer. In this embodiment, low alkali glass is used, and a silicon nitride film with a thickness of 50 nm is formed as the base insulating film 1501a and a silicon oxide film with a thickness of 100 nm is formed as the base insulating film 1501b by plasma CVD. In this embodiment, the base insulating film is formed as a two-layered film. However, one layer or three or more layers may be stacked as long as the effect of preventing impurity diffusion can be obtained.
[0032]
Next, semiconductor layers 1502 a to 1502 d are formed over the base insulating film 1501. A method for forming the semiconductor films 1502a to 1502d is as follows.
[0033]
An amorphous silicon film 5001 having a thickness of 54 nm is formed on the base insulating film 1501 by a plasma CVD method. In addition to plasma CVD, the film may be formed by other methods such as sputtering. The film thickness may be changed to a film thickness necessary for the semiconductor layer of the TFT, and may be changed as appropriate.
[0034]
Next, heat treatment for releasing hydrogen contained in the amorphous semiconductor film 5001 is performed. In this example, heat treatment was performed at 500 ° C. for 1 hour by furnace. Note that the heat treatment temperature and time are not limited to the above values as long as temperature conditions are such that no crystal nuclei are generated in the amorphous semiconductor film and hydrogen in the film is released from the film. It doesn't matter. This step is performed because the amorphous silicon film formed by the plasma CVD method contains a large amount of hydrogen, particularly when an amorphous semiconductor film having a low hydrogen content is used. Not necessary.
[0035]
Next, a separation film 5002 is formed over the amorphous semiconductor film 5001. In this embodiment, a silicon oxide film having a thickness of 1 nm is formed on the surface of the amorphous semiconductor film 11 using ozone water to form the separation film 5002.
[0036]
Next, an amorphous semiconductor film 5003 is formed over the separation film 5002. In this embodiment, an amorphous silicon film 5003 is formed by plasma CVD with a thickness of 10 nm. In this embodiment, peeling is prevented by reducing the thickness of the amorphous semiconductor film 5003. As the amorphous semiconductor film 5003, amorphous silicon germanium or the like may be used.
[0037]
In this manner, by forming the separation film 5002 and the amorphous semiconductor film 5003, an element diffusion distance for promoting crystallization performed in a later step can be extended.
[0038]
Next, nickel (Ni) is added over the amorphous semiconductor film 5003 as an element for promoting crystallization. In this embodiment, after forming a thin oxide film on the surface of the amorphous semiconductor film 5003 using ozone water, an aqueous solution of nickel acetate adjusted to a concentration of 2 ppm is added onto the amorphous semiconductor film 5003. Nickel was added by the method method. Note that the addition method and addition amount of elements for promoting crystallization are not limited to the above values, and may be appropriately changed.
[0039]
Note that in the addition process of an element for promoting crystallization in this embodiment, an element for promoting crystallization is added to the entire surface of the amorphous semiconductor film 5003, and a local region using a mask or the like is used. Element addition for promoting general crystallization is not performed. However, when it is desired to provide a region to which an element for promoting crystallization is added and a region to which no element is added, a mask or the like may be used, and a practitioner may appropriately select which method is used.
[0040]
Next, heat treatment is performed to form crystalline semiconductor films 5004 and 5005. In this embodiment, a method is used in which heat treatment is performed at 500 ° C. for 1 hour, followed by heat treatment at 550 ° C. for 12 hours by furnace. Note that the optimum values for the heat treatment temperature and time vary depending on the film quality and film thickness of the amorphous semiconductor film, and therefore, the heat treatment temperature and time are not limited to the above values and may be changed as appropriate. Note that heat treatment at 500 ° C. for 1 hour is performed in order to release hydrogen contained in the amorphous semiconductor film 5003. Accordingly, when the amorphous semiconductor film 5003 does not contain hydrogen, it may be omitted.
[0041]
Note that Ni added to the film surface of the amorphous semiconductor film 5003 diffuses in the amorphous semiconductor film 5003 and the separation film 5002 and reaches the amorphous semiconductor film 5001. Therefore, it is preferable that the separation membrane 5002 is thin so that Ni can diffuse in the separation membrane 5002.
[0042]
Next, the crystalline semiconductor film 5005 and the separation film 5002 are removed. In this embodiment, after removing the crystalline semiconductor film 5005 by etching using a TMAH (Tetra Methyl Ammonium Hydroxide) solution at a solution temperature of 50 ° C., the separation film 5002 is further etched using a hydrofluoric acid (HF) solution. And remove. In this step, the separation film 5002 functions as a film that prevents the crystalline semiconductor film 5004 from being etched by the TMAH solution. Therefore, it is preferable to select a film that can be etched selectively with respect to the crystalline semiconductor films 5004 and 5005 as the separation film 5002. Note that in addition to TMAH, choline or the like may be used as long as the crystalline semiconductor film 5005 can be selectively etched.
[0043]
In this manner, the separation film 5002 and the amorphous semiconductor film 5003 are used to extend the diffusion distance of elements for promoting crystallization, and select the separation film 5002 and the crystalline semiconductor film 5005 that are no longer necessary after crystallization. Can be removed. Therefore, the amorphous semiconductor film 5001 may be formed with a film thickness necessary for the semiconductor layer of the TFT.
[0044]
As described above, a crystalline semiconductor film having a film surface with a high orientation ratio in the <111> direction can be formed. Note that which of <111>, <001>, and <101> has a high orientation ratio in the plane orientation depends on the type of element for promoting the crystallization of the amorphous semiconductor film 5003 and the added crystallization, It depends on the amount added.
[0045]
In FIG. 2, the crystalline semiconductor film formed by using the method of this embodiment is analyzed by an electron backscatter diffraction pattern (EBSP) method, and the plane orientation on the film surface of the crystalline semiconductor film ( The result of analyzing the crystal axis orientation in the direction perpendicular to the film surface is shown. In the EBSP method, measurement is performed with an electron beam incident on the sample surface (that is, the film surface of the crystalline semiconductor film) at an incident angle of 60 °. The measurement range is 40 μm × 30 μm, and measurement is performed in 0.2 μm steps.
2A is a plane orientation distribution chart, and FIG. 2B is a plane orientation appearance frequency distribution chart. FIG. 2A shows how the regions having the surface orientations <001>, <101>, and <111> are distributed within the measurement range. FIG. 2B shows the appearance frequency of various surface orientations including surface orientations other than <001>, <101>, and <111>. Therefore, it can be seen from FIGS. 2A and 2B that the film surface of the crystalline semiconductor film formed by using the method of this embodiment has many plane orientations in the <111> direction. In the film surface of this sample, the ratios of the planes whose normals are the <001>, <101>, and <111> directions are 0.4%, 5.8%, and 54.6% (± 10 ° angle), respectively. (Within the range of fluctuation).
[0046]
Next, treatment with excimer laser light is performed to improve the crystallinity of the crystalline semiconductor film 5004, whereby a crystalline semiconductor film 5006 is obtained. Note that the excimer laser light is irradiated so that the lower portion of the crystalline semiconductor film 5004 is not melted by the excimer laser light but remains as a seed crystal. Accordingly, the crystalline semiconductor film 5006 having good film quality with few intragranular defects can be formed while maintaining the orientation of the crystalline semiconductor film 5004. Note that the above-described treatment with excimer laser light is not necessarily required. Therefore, the practitioner of the present invention may appropriately determine whether or not to perform this step.
[0047]
In addition to using excimer laser light as described above, YAG, YVO _Four A pulse oscillation type laser or a continuous oscillation type laser using a laser medium as a laser medium can be used.
[0048]
Next, a thin oxide film with a thickness of 1 nm is formed on the surface of the crystalline semiconductor film 5006 using ozone water, and an amorphous silicon film containing argon (Ar) is further formed thereon with a 100 nm film by sputtering. Form with thickness. Then, heat treatment is performed by furnace at 550 ° C. for 4 hours, and an element for promoting crystallization contained in the crystalline semiconductor film 5006 is moved into the amorphous silicon film (gettering treatment). ). After the gettering treatment, the unnecessary amorphous silicon film (after the gettering, a crystalline silicon film may be formed by the effect of an element for promoting crystallization) is removed using a TMAH solution, and Remove with hydrofluoric acid solution.
[0049]
The Ni removal method is not limited to the above method, and other methods may be used. For example, a method of forming an amorphous silicon film over the crystalline silicon film 5005 and then performing heat treatment before the removal of the crystalline silicon film 5005 may be used.
[0050]
Next, the crystalline semiconductor film 5006 is processed into a desired shape by patterning and etching by photolithography to form semiconductor layers 1502a and 1502b.
[0051]
Note that impurity doping (channel doping) may be performed before or after the semiconductor layers 1502a and 1502b are formed to control the threshold value of the TFT. As an impurity to be added, boron, phosphorus, or the like may be used.
[0052]
Next, a gate insulating film 1503 is formed to cover the semiconductor layers 1502a and 1502b. In this embodiment, silicon oxide is formed with a thickness of 50 nm to form the gate insulating film 1503. Note that the insulating material is not limited to silicon oxide, and other insulating materials such as silicon nitride may be used. The film thickness is not limited to the above value and may be changed as appropriate.
[0053]
Next, gate electrodes 1504 a and 1504 b are formed over the gate insulating film 1503. In this embodiment, titanium nitride is formed as the conductive film 1504a and tungsten is stacked as the conductive film 1504b to a thickness of 30 nm and 370 nm, respectively, and then processed by patterning and etching to form gate electrodes 1505a and 1505b. To do. The gate electrode material may be a conductive film other than those described above. Further, the film thickness is not limited to the above value and may be changed as appropriate.
[0054]
Next, a region to be a p-channel TFT (semiconductor layer 1502b and its upper portion) is masked with a resist, n-type impurities are added to the semiconductor layer 1502a using the gate electrode 1505a as a mask, and a source (or drain) 1506 is formed. Form. In this embodiment, phosphorus is added as an n-type impurity. As long as it is an n-type impurity, a material other than phosphorus may be used.
[0055]
Next, a region to be an n-channel TFT (semiconductor layer 1502a and its upper portion) is masked with a resist, and a p-type impurity is added to the semiconductor layer 1502b using the gate electrode 1505b as a mask, and a source (or drain) 1507 is formed. Form. In this embodiment, boron is added as a p-type impurity. Note that other than boron, p-type impurities may be used.
[0056]
Next, an interlayer insulating film 1508 is formed, and heat treatment is performed to activate the added impurities.
[0057]
Next, contact holes that penetrate the interlayer insulating film 1508 and reach the sources (or drains) 1505 and 1506 are opened.
[0058]
Next, after forming a wiring 1509 made of aluminum containing several percent of silicon, hydrogenation is performed.
[0059]
As described above, a semiconductor device to which the present invention is applied is manufactured. In this embodiment, an n-channel TFT and a p-channel TFT having a single drain structure are manufactured. However, the present invention is not limited to this, and an LDD (Lightly Doped Drain) structure, a GOLD (Gate Overlapped LDD) structure, or the like. A TFT having another structure may be manufactured. The TFT structure is not particularly limited. Also, the interlayer insulating film may be a multilayer film of two or more layers, and the process position for performing the heat treatment process may be appropriately changed. Further, the formation of the interlayer insulating film and the wiring may be repeated to form a semiconductor device having a multilayer wiring structure.
(Example 2)
In this embodiment, a light-emitting display device to which the present invention is applied will be described with reference to FIGS.
[0060]
In the semiconductor device to which the present invention is applied, the variation in TFT characteristics due to the difference in the plane orientation is reduced, and in particular, the variation between adjacent areas representing the characteristic difference between adjacent TFTs and the in-plane variation representing the characteristic difference between TFTs in the substrate. Has been reduced. Therefore, in the light emitting display device including such a semiconductor device, the variation in characteristics of the light emitting element driving TFTs arranged for each pixel is reduced, and the display unevenness due to the characteristic variation of the light emitting element driving TFTs is reduced. Is reduced. In the drive circuit, errors in the drive circuit due to TFT variations (both adjacent variations and in-plane variations) are reduced.
[0061]
6A is a top view illustrating the light-emitting display device, and FIG. 6B is a cross-sectional view taken along line AA ′ in FIG. 6A.
[0062]
In FIG. 6B, a crystalline semiconductor film 5004 is formed on a substrate 201 according to the method described in Embodiment 1, and then a plurality of light emitting element driving TFTs 202 are formed. In addition to the light emitting element driving TFTs, driving circuit TFTs 203a and 203b are also formed.
[0063]
The structure of the TFT is not limited to the single gate structure, but may be a multi-gate structure having a plurality of gate electrodes in one element. In addition to the single drain structure, an LDD structure, a GOLD structure, or the like may be used. The light emitting element driving TFT 202 and the driving circuit TFT may have different TFT structures. In this embodiment, a p-channel type GOLD structure TFT is manufactured as the light-emitting element driving TFT 202, an n-channel type GOLD structure TFT as the driving circuit TFT 203a, and a p-channel type GOLD structure TFT as the driving circuit TFT 203b. Is made.
[0064]
Further, a light emitting element 204 electrically connected to each light emitting element driving TFT 202 is formed, and a protective film covering the light emitting element 204 is also formed. Note that the light-emitting element 204 may have a known structure.
[0065]
In this embodiment, the light-emitting display device includes a source signal line driver circuit 230, a pixel portion 231, and a gate signal line driver circuit 232. Reference numeral 210 denotes a sealing substrate, and 220 denotes a sealing agent. An inside surrounded by the sealing substrate 210 and the sealing agent 220 is a space 208.
[0066]
Reference numeral 206 denotes wiring for transmitting signals input to the source signal line driving circuit 230 and the gate signal line driving circuit 232, and receives video signals and clock signals from an FPC (flexible printed circuit) 211 serving as an external input terminal. Although only the FPC is shown here, a printed wiring board (PWB) may be attached to the FPC.
(Example 3)
In this embodiment, a liquid crystal display device to which the present invention is applied will be described with reference to FIGS.
[0067]
In the semiconductor device to which the present invention is applied, the variation in TFT characteristics due to the difference in the plane orientation is reduced, and in particular, the variation between adjacent areas representing the characteristic difference between adjacent TFTs and the in-plane variation representing the characteristic difference between TFTs in the substrate. Reduced. Accordingly, in the liquid crystal display device including such a semiconductor device, the variation in characteristics of the pixel electrode driving TFTs arranged especially for each pixel is reduced, and display defects caused by the characteristic variation of the pixel electrode driving TFTs are reduced. Reduced. In the drive circuit, errors in the drive circuit due to TFT variations (both adjacent variations and in-plane variations) are reduced.
[0068]
7A is a top view illustrating the liquid crystal display device, and FIG. 7B is a cross-sectional view taken along line AA ′ of FIG. 7A.
[0069]
In FIG. 7B, a TFT substrate 301 is formed with a plurality of pixel electrode driving TFTs 302 after a crystalline semiconductor film 5004 is formed according to the method shown in the first embodiment. In addition to the pixel electrode driving TFTs, driving circuit TFTs 303a and 303b are also formed.
[0070]
The structure of the TFT is not limited to the single gate structure, but may be a multi-gate structure having a plurality of gate electrodes in one element. In addition to the single drain structure, an LDD structure, a GOLD structure, or the like may be used. The light emitting element driving TFT 202 and the driving circuit TFT may have different TFT structures. In this embodiment, an n-channel type and LDD structure TFT is manufactured as a pixel electrode driving TFT 302 with a structure having two electrodes in one element, and an n-channel type and GOLD structure TFT as a driving circuit TFT 303a is provided. A p-channel type GOLD structure TFT is manufactured as the TFT 303b for use.
[0071]
Further, a pixel electrode 304 that is electrically connected to each pixel electrode driving TFT 302 is formed. Further, a pixel electrode 311 is formed on the counter substrate 310. In addition, alignment films 320 and 321 are formed on the TFT substrate 301 and the counter substrate 310, and a liquid crystal 322 is injected between the two alignment films 320 and 321. The cell set of the liquid crystal display device may be performed using a known method.
[0072]
FIG. 9A is a top view of a liquid crystal device manufactured by applying the present invention. A scanning signal driving circuit 331 a and an image signal driving circuit 331 b are provided around the pixel portion 330. The drive circuit is connected to the external input / output terminal group 333 by a connection wiring group 332. In the pixel portion 331, a gate wiring group extending from the scanning signal driving circuit 331a and a data wiring group extending from the image signal driving circuit 331b intersect in a matrix to form a pixel. The sealant 334 is formed outside the pixel portion 330, the scanning signal driving circuit 331a, and the image signal driving circuit 331b on the TFT array substrate 334 and inside the external input terminal 333. In the liquid crystal device, a flexible printed circuit board (FPC: Flexible Printed Circuit) 335 is connected to an external input / output terminal 333 and is connected to each drive circuit by a connection wiring group 332. The external input / output terminal 333 is formed of the same conductive film as the data wiring group. The flexible printed wiring board 335 has copper wiring formed on an organic resin film such as polyimide, and is connected to the external input / output terminal 333 with an anisotropic conductive adhesive.
(Example 4)
In this embodiment, electronic devices manufactured by applying the present invention will be described with reference to FIGS. An electronic apparatus to which the semiconductor device of the present invention is applied has a good display image.
[0073]
FIG. 8A illustrates a display device, which includes a housing 5501, a support base 5502, and a display portion 5503. The present invention can be applied to a display device having the display portion 5503.
[0074]
FIG. 8B illustrates a video camera, which includes a main body 5511, a display portion 5512, an audio input 5513, operation switches 5514, a battery 5515, an image receiving portion 5516, and the like.
[0075]
FIG. 8C illustrates a laptop personal computer manufactured by applying the present invention, which includes a main body 5501, a housing 5502, a display portion 5503, a keyboard 5504, and the like.
[0076]
FIG. 8D illustrates a personal digital assistant (PDA) manufactured by applying the present invention. A main body 5531 is provided with a display portion 5532, an external interface 5535, operation buttons 5534, and the like. There is a stylus 5532 as an accessory for operation.
[0077]
FIG. 8E illustrates a digital camera which includes a main body 5551, a display portion (A) 5552, an eyepiece portion 5553, an operation switch 5554, a display portion (B) 5555, a battery 5556, and the like.
[0078]
FIG. 8F illustrates a cellular phone manufactured by applying the present invention. A main body 5561 is provided with a display portion 5564, an audio output portion 5562 operation switch 5565, an antenna 5566, and the like.
[0079]
【The invention's effect】
By the method for manufacturing a semiconductor device of the present invention, variation in TFT characteristics due to a difference in plane orientation can be reduced. Therefore, in the integrated circuit device to which the present invention is applied, errors in the integrated circuit due to TFT variations can be reduced. In the display device to which the present invention is applied, an image with less display unevenness and display defects can be displayed.
[Brief description of the drawings]
FIGS. 1A to 1C are process cross-sectional views illustrating a method for manufacturing a semiconductor device of the present invention. FIGS.
FIG. 2 is an analysis diagram of a crystalline silicon film according to the present invention by an EBSP method.
3A to 3D are process cross-sectional views illustrating a method for manufacturing a semiconductor device of the present invention.
4A to 4E are process cross-sectional views illustrating a method for manufacturing a semiconductor device of the present invention.
FIGS. 5A to 5D are cross-sectional views illustrating a method for manufacturing a semiconductor device of the present invention. FIGS.
FIG. 6 is a diagram of a display device to which the present invention is applied.
FIG. 7 is a diagram of a display device to which the present invention is applied.
FIG. 8 is a diagram of an electronic device to which the present invention is applied.

Claims (4)

A first amorphous semiconductor film is formed,
Forming a separation film on the first amorphous semiconductor film;
A second amorphous semiconductor film is formed over the separation membrane,
Adding an element for promoting crystallization on the second amorphous semiconductor film ;
By thermal treatment, by bringing the first amorphous semiconductor film by diffusing the element in the film of the second amorphous film and the separation layer, the first amorphous semiconductor film was formed and the first crystalline semiconductor film crystallized, and a second crystalline semiconductor film crystallized the second amorphous semiconductor film,
Selectively removing the second crystalline semiconductor film,
Selectively removing the separation layer,
A manufacturing method of a semiconductor device, wherein a thin film transistor is formed using the first crystalline semiconductor film . Forming a first amorphous semiconductor film using a plasma CVD method;
Wherein the first amorphous semiconductor film, a heat treatment at the first temperature lower than the temperature at which crystal nuclei are generated in the amorphous semiconductor film,
Forming a separation film on the first amorphous semiconductor film;
Forming a second amorphous semiconductor film on the separation film;
Adding an element for promoting crystallization on the second amorphous semiconductor film;
The first amorphous semiconductor film is subjected to a heat treatment to diffuse the element into the second amorphous film and the separation film to reach the first amorphous semiconductor film. Forming a first crystalline semiconductor film obtained by crystallizing the second amorphous semiconductor film, and a second crystalline semiconductor film obtained by crystallizing the second amorphous semiconductor film,
Selectively removing the second crystalline semiconductor film;
Selectively removing the separation membrane;
A manufacturing method of a semiconductor device, wherein a thin film transistor is formed using the first crystalline semiconductor film. In claim 1 or claim 2,
The method for manufacturing a semiconductor device, wherein the first amorphous semiconductor film and the second amorphous semiconductor film are amorphous silicon films. In any one of Claims 1 thru | or 3,
A method for manufacturing a semiconductor device, wherein the separation film is formed by oxidizing the surface of the first amorphous semiconductor film using ozone water.

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