JP4275722B2 - Wiring design method - Google Patents

Description

  The present invention relates to a wiring design support system and a wiring design support method, and in particular, presents a rough wiring method from a floor plan stage to a wiring board that requires various wiring constraints, and is a short period of time. The present invention relates to a wiring design support system and a wiring design support method suitable for completing a wiring design that satisfies the wiring constraints.

  Conventionally, attempts have been made to automate the wiring of wiring boards of electronic circuits by computer systems.

Here, the problem of the wiring design support according to the prior art will be described with reference to FIG.
FIG. 12 is a schematic diagram illustrating an example when a signal group having adjacent wiring constraints is arranged.

  In general, wiring on a wiring board of an electronic circuit causes signal characteristics and interference between wirings. Therefore, when wiring is actually performed, wiring design is performed based on various wiring constraints.

  For example, in the case where there are adjacent space restrictions depending on the adjacent signal interface types, the wiring density may be reduced depending on the arrangement order of the wiring paths.

  Now, as shown in FIG. 12, it is assumed that different adjacent intervals are provided for each adjacent signal group as described in the adjacent parallel wiring interval constraint 1203. This means, for example, that a wiring belonging to a signal group whose signal group is group A and a wiring belonging to a signal group belonging to group B must be separated from each other by 4 units or more. Here, the signal group is a group of wirings having common characteristics as one group.

  At this time, if a wiring whose signal group is group A and a wiring whose signal group is group B are wired as in the wiring state 1201, the density of the wiring is hindered due to mutual wiring restrictions.

  Therefore, as shown in the wiring state 1202, the same signal group, such as the signal 1206 of the same signal group groupA, is intentionally adjacent to the signal 1204 whose signal group is groupA, thereby increasing the density of the wiring. Can be realized.

  Furthermore, it is necessary to match characteristics between multiple signals due to the speeding up of semiconductor integrated circuits, and it is necessary to match signal characteristics by aligning wiring lengths and wiring paths as much as possible. .

  As a method for dealing with these problems, for example, Patent Document 1 discloses a method of performing detailed wiring from schematic wiring by using the concept of virtual wiring and dividing the concept. In the virtual wiring, “a plurality of characteristically unified nets are handled as a single virtual net bundled together”.

JP 2002-124571 A

  According to the above-described conventional technology, it is described that “virtual lengths, wiring capacities, wiring paths, wiring shapes, and other characteristics of a plurality of nets whose characteristics should be aligned can be effectively aligned” by the virtual net.

  However, depending on how the parts of the wiring board are arranged, problems such as an increase in the wiring length and an increase in the area for wiring arise.

Hereinafter, the problem of wiring when a component of the wiring board becomes an obstacle to wiring will be described with reference to FIG.
FIG. 13 is a schematic diagram for explaining the form of a wiring pattern when a component of the wiring board becomes an obstacle to wiring.

  Now, consider performing a route search for the wiring of the connection relationship 1303 that needs to be aligned with the same characteristics between the two components 1301 and 1302 shown in FIG.

  At this time, according to the connection relation 1303, in the prior art, it is allocated as one virtual net 1305 shown in FIG.

  However, since the component 1304 exists between the components 1301 and 1302, it becomes an obstacle, and when the route search processing is performed for the virtual net 1305, the virtual net 1305 bypasses the component 1304 in FIG. 13C. The wiring route 1306 shown will be created.

  As a result, the wiring length increases and the area for wiring increases, thereby causing problems such as the area of the wiring board also having to be increased.

  Therefore, it is desirable that the wiring design support system can create a wiring path 1307 that passes between parts as shown in FIG. 13 (d), and that the wiring paths are bundled together before and after that.

  In addition, as another problem, there are cases where wiring restrictions are becoming diverse due to the increase in speed and density of semiconductor circuits. In order to carry out wiring without touching these wiring restrictions, “floor plan”, which is a process of rough wiring planning and component placement, which is performed before the structure of the wiring board and detailed wiring, is particularly important. Therefore, it is necessary to examine wiring restrictions and wiring properties from an early stage of wiring.

  However, in the conventional method, it is necessary to prepare information equivalent to the detailed wiring design, and it takes time and man-hours to prepare for examining the wiring property, and for the work of examining the floor plan, Since the wiring information of each signal is handled, it takes a lot of time to review and correct. Therefore, it is necessary to provide a system that operates with simple information that is practical even at the floor plan stage, greatly reduces the preparation period, and handles the signal group to reduce the number of examination and correction processes.

  The present invention has been made to solve the above-mentioned problems, and its purpose is to present a rough wiring method from the floor plan stage to a wiring board requiring various wiring constraints, and to perform wiring. It is an object of the present invention to provide a wiring design support system and a wiring design method capable of completing a wiring design that satisfies the wiring constraints in a short period of time while evaluating the degree of congestion.

  In the present invention, a group of wirings such as buses are handled as one signal group, and a route search process is performed while securing a wiring area that allows signals within the signal group to be wired. If a wiring route to which all signal wirings in the signal group are assigned cannot be found due to an obstacle or the like, the signal group is divided and the route search process is performed again.

  At this time, wiring paths having the same shape are assigned to adjacent regions of the same layer or different layers so that the divided signal groups have the same wiring shape.

  By giving a wiring path instruction with rough information to any one signal in the signal group, it is assumed that the same wiring path instruction is given not only to the signal but also to all signals in the same signal group. The route search is performed with priority given to the designated area.

  In the present invention, a rough wiring route is allocated with simple virtual information, and the degree of congestion is evaluated. Furthermore, as the design progresses, the accuracy of information is gradually increased, and information that is closer to actual information is sequentially replaced. At this time, the wiring path is corrected only for the section that is not connected due to the information mismatch.

  By such means, according to the wiring design system of the present invention, it is possible to obtain a suitable wiring path even for signals that are required to have the same characteristics, and further increase the density of the wiring board. You can also get useful results. In addition, it is possible to perform floor plan design from the early stage of wiring board design to wiring restrictions and wiring properties of the wiring board.

  According to the present invention, for a wiring board that requires a wide variety of wiring constraints, a rough wiring method is presented from the floor plan stage, and the wiring constraints are evaluated in a short period of time while evaluating the degree of congestion of the wiring. A wiring design support system and a wiring design method capable of completing a satisfactory wiring design can be provided.

  Embodiments according to the present invention will be described below with reference to FIGS.

[Configuration and operation of wiring design support system]
First, the configuration of the wiring design support system according to the present invention will be described with reference to FIGS. 1 to 3.
FIG. 1 is a configuration diagram of a wiring design support system according to the present invention.
FIG. 2 is a schematic diagram illustrating an example of information stored in the route instruction file 104.
FIG. 3 is a flowchart showing details of the route search processing.

  As shown in FIG. 1, the net information file 102, the signal group information file 103, the route instruction information file 104, the placement instruction information file 105, and the wiring constraint information file 106 are input to the input processing unit 107 of the wiring design support system 101. The input file is input.

  These input files are transferred to the wiring processing unit 108, where parts on the wiring board are changed and wiring paths are designed.

  As the output information, a wiring route information file 116, a congestion degree evaluation file 117, and an arrangement information file 118 are output as output files via the output processing unit 115.

  Here, the net information file 102 is a file of logical connection information of components on the wiring board. The signal group information file 103 is a file having signal group instruction information for wiring. A signal group is a concept for handling wiring as a group such as a bus. The route instruction information file 104 is a file representing rough instruction information of the wiring route. The wiring constraint information file 106 is a file related to wiring constraints such as a wiring length and an adjacent signal interval when wiring.

  The wiring path information file 116 is a file for storing wiring path information determined by the wiring processing unit 108. The congestion degree evaluation file 117 is a file that stores the result of evaluating the degree of congestion of a wiring route based on the determined wiring route information. The arrangement information file 118 is a file having information on component arrangement.

  In the route instruction file 104, the route instruction information may have a structure as shown in FIG. The route instruction information is for instructing a part of the wiring signal group that wants to pass the route, and is composed of linear information such as a signal group name or a signal name such as the table 201, a start point, an end point, and a layer name. ing. Further, as shown in the table 202, it can be generated from information such as a signal group name or signal name, two coordinate points of a designated wiring region, and a layer number.

  Here, the signal group name or the signal name is a name for handling the signal group and the signal, respectively, for wiring design in the wiring design support system of the present invention. Also, any coordinates can be used so that the system can be easily wired. In addition, in order to perform wiring over multiple layers, it has layer names and layer numbers.

  Next, details of the processing of the wiring processing unit 108 of the wiring design support system of the present invention will be described.

  The wiring process 108 selects one unsearched signal group based on the information obtained from the input processing unit 107 (S01), and then performs a route search for the selected signal group (S02).

  Then, after the end of the route search, it is determined whether or not there is another route unsearched signal group (S03), and if there is an unsearched signal group, the process is performed again (S03).

  If there is no route unsearched signal group, the evaluation of the wiring congestion after the end of the search and the comparison with the wiring restriction are performed by the wiring evaluation (S04).

  After the wiring evaluation, it is determined whether the congestion level is high or there is a constraint violation (S05). If the result of the determination is that the congestion level is high or there is a constraint violation, the component placement or wiring path is changed (S06). The process is performed again (S06).

  As a result of the determination, if the degree of congestion is not high and there is no constraint violation, it is determined whether or not the signal can be subdivided (S07). As a result of the determination, the signal group can still be subdivided and subdivided. If the threshold value is larger than the subdivision limit value, the subdivision threshold value is lowered (S08). Then, the route of the search result is set as a recommended route, and the process is performed again (S09). Here, the segmentation limit value is a parameter given from the outside in order to control how far segmentation is performed.

  If the signal group cannot be subdivided or if the subdivision threshold is smaller than the subdivision limit value, necessary information is transferred and the processing is transferred to the output processing unit 115.

  Next, details of the route search process S02 will be described with reference to FIG.

  First, a recommended route is arranged on the wiring board (S301). The recommended route is a route that encourages the wiring route to pass, and is specified by the route instruction information 104. With this recommended route, it is possible to proceed with the wiring design so as to obtain a desirable wiring in consideration of the component placement status of the wiring board. This recommended route instruction will be described in detail later.

  Next, the signals belonging to the signal group are divided (grouped) into units capable of route search (S302). The signal group is for handling the wiring as a whole, and is a unit of wiring in the wiring design support system of the present invention. In this signal group division, signals in the signal group that are more adjacent to each other are placed in the same group as much as possible. This method of signal group division constitutes one of the features of the present invention, and will be described later with a specific example. It is possible to instruct differential signals and the like to always be in the same group. The differential signal is an effective signal for suppressing noise from the outside in high-speed signal propagation on the wiring by always keeping the levels of the two signals in a reciprocal state. This is because it needs to be arranged.

  Thereafter, it is determined whether or not the number of signals in the signal group is larger than the subdivision threshold (S303). As a result of the determination, if the number of signals in the signal group is larger than the subdivision threshold value, group division is performed so as to be less than the subdivision threshold value (S304).

  Thereafter, one group is selected (S305).

  Next, the route search of the selected group is performed (S306). In route search, the recommended route is preferentially adopted. As a result of the route search, if a wiring route is found and if there is no capacity over in the wiring route (S307), a route is found so that other groups in the signal group find a close route. The searched route is arranged as a new recommended route (S310). The specific method of S310 will be described next.

  If there is no wiring path or if the capacity is over even if there is a wiring path (S307), it is determined whether or not the group can be divided (S308).

  If group division is possible, group division is executed (S309), and processing is performed again from S305. When group division is possible, for example, before the division, the number of signals was large and could not be arranged.However, when division occurs, it becomes possible to pass between parts, or division reduces the degree of congestion. This is the case.

  If the group cannot be divided, the found search route is also arranged as a new recommended route in this case (S310).

  After the placement, it is determined whether or not there is an unsearched group (S311). If there is an unsearched group, the process is repeated from S305, and if there is no unsearched group, the process ends.

[Recommended route and method of route search by signal division and determination of wiring route]
Next, with reference to FIGS. 4 to 6, the recommended route and the route search method using signal division and the determination method of the wire route in the wiring design support method of the present invention will be described.
FIG. 4 is a diagram illustrating route search using the recommended route of the present invention.
FIG. 5 is a diagram illustrating a route search for making adjacent signal groups divided into groups according to the present invention.
FIG. 6 is a diagram illustrating a procedure for determining a wiring path from a signal group.

  First, a method for performing a route search by specifying a recommended route described in S310 of the flowchart of FIG. 3 will be described.

  As an example, parts 502 and 503 are provided on the wiring board 501, and a signal group 504 is provided between the parts 502 and 503.

  Here, a recommended route 505 is given to the signal group 504 by the route instruction information file 506 in order to perform desired wiring or to explicitly specify a change in the route of the wiring.

  At this time, the recommended route 505 is generated from the route instruction information as shown in FIG. 2, and indicates a region that the wiring route of the signal group 504 desires to pass as much as possible. The recommended route is registered with an expanded width like the recommended route 507 so that all nets in the signal group can pass. When a route search is performed, a wiring route 508 that passes through the recommended route 507 as much as possible is generated.

  Next, a procedure for wiring signal groups close to each other when signal group division (grouping) described in S309 of the flowchart of FIG. 3 is performed will be described with reference to FIG.

  As an example, it is assumed that there are parts 601 and 602 and a signal group 603 is provided between the parts 601 and 602. It is assumed that there are a plurality of parts 604 between the parts 601 and 602.

  At this time, if the signal group 603 performs a route search in a group, the signal group 603 cannot pass between the parts 604, and a detour that goes around the parts 604 occurs. That is not a good idea in wiring design. Therefore, the signal group 603 is grouped into units that can pass between the parts 604, and a route search is performed.

  In this way, a path is generated so as to pass between the parts 604, and a group wiring path 605 is obtained. Next, the wiring route 605 is set as a recommended route (S310 in FIG. 3), and the width is enlarged and registered as in the recommended route 606. The wiring route 607 is generated so as to pass through the width of the recommended route.

  Since the route is registered with the width expanded, the next route is routed close to the first wiring route 605, and a route passing between the immediate vicinity of the component 604 is obtained.

  The above processing is repeated to generate the wiring path 608.

  Next, a procedure for determining the wiring route from the route of the signal group will be described with reference to FIG.

  As an example, it is assumed that components 703, 704, and 705 are mounted on the wiring board 710, connection information 706 is defined between the components 703 and 704, and the same signal group is indicated.

  The wiring design support system 400 receives the net information 701 and the route instruction information 702 of the wiring board 710.

  In the wiring design support system 400, the route search of the signal group unit or the group is performed, and the wiring routes 711 and 712 are generated. Thereafter, more detailed wiring paths 713, 714, 715, 716 are generated based on the signal group unit or group search path, and the signal paths are subdivided from the signal group unit to the signal unit. To confirm.

  Finally, after determining the signal wiring route, a congestion degree evaluation file 717 and a wiring route information file 718 are output.

Embodiment 1
Next, a first embodiment according to the present invention will be described with reference to FIG.
FIG. 7 is a schematic diagram for explaining the processing flow of the wiring design support system according to the first embodiment of the present invention.

  In this embodiment, the degree of congestion is evaluated, the arrangement of components is changed, and a recommended route is instructed to perform optimal wiring design.

  In the wiring board net information 401 of the first embodiment, components 403, 404, 406, 407, 409, and 410 are mounted on the wiring board 402 as shown in the upper right of FIG. 7.

  And there is connection information 405 between the parts 403 and 404, and this is the same signal group instruction. Similarly, it is assumed that there is connection information 408 between the components 406 and 407, indicating the same signal group, and connection information 411 between the components 409 and 410, indicating the same signal group.

  The wiring design support system 400 receives these pieces of information and performs a route search while securing a wiring area to which all the wiring routes of the signals in the signal group are allocated, and the wiring routes 412, 413, 414, 415. Is generated. Then, the generated wiring result is evaluated, and a congestion degree evaluation 416 is obtained. The congestion degree evaluation is obtained by dividing the entire wiring area with respect to the wiring path into small areas divided by equally-spaced dividing lines, and by the proportion of the amount of wiring path in each small area. Here, it is possible to output a congestion degree evaluation file 417 that evaluates the degree of congestion of the wiring and a wiring path information file 418 that stores the determined wiring path.

  Here, the congestion degree evaluation 416 indicates that the wiring routes 413, 414, and 415 are very close to each other, and the congestion degree evaluation result of the determined wiring route is partially high.

  In order to solve this, it is only necessary to change the component arrangement and correct the wiring path. Accordingly, the component arrangement is reviewed and the components 409 and 410 are moved in the directions of arrows 420 and 421.

  In addition, a recommended route 424 is added to the signal group 405 in order to correct the wiring route.

  These two measures are expected to reduce the degree of congestion at the center of the wiring board. In this way, the route search is performed again using the wiring route information 419 to which the component placement change and the recommended route are added.

  As a result, new wiring paths 425, 426, and 427 are generated. Next, the wiring result generated in this way is evaluated to obtain a congestion degree evaluation 428. Here, a new congestion degree evaluation file 429 and a new wiring route information file 430 can be generated. In this way, the process is repeated until there is no place where the degree of congestion is too large.

[Embodiment 2]
Next, a second embodiment according to the present invention will be described with reference to FIG.
FIG. 8 is a schematic diagram for explaining the processing flow of the wiring design support system according to the second embodiment of the present invention.

  In the present embodiment, wiring design is performed in consideration of restrictions on the wiring length and restrictions caused by adjacent wiring.

  As an example, components 802 and 803 are mounted on a wiring board 808, and signals 805, 806, 807, and 808 exist between the components 802 and 803, and signals 805 and 806 and signals 807 and 808 are in the same group. It is assumed that the signal group is represented.

  In addition, wiring constraints are defined, adjacent wiring constraint information 810 describing the wiring interval of adjacent signal groups, and wiring length constraint information 811 having wiring length tolerance and wiring length constraint information in the signal groups are It is stored in the constraint information file 812. These pieces of information are described by signal group names, and have a signal group information file 809 as a correspondence table between signal group names and signals.

  Here, it is assumed that the signals 805 and 806 belong to grpA, and the signals 807 and 808 belong to grpB. Also, for example, when the grpA and grpB signal wirings are adjacent to each other, it must be spoken of 1.27 mm or more, and the tolerance (allowable difference) between the grpA wiring signals is ± 3 mm, grpA It can be understood that the limitation on the wiring length is 50 mm or less.

  The wiring design support system receives a net information file 801 that defines information on these wiring boards 808, a signal group information file 809, and a wiring constraint information file 812.

  Then, the wiring design support system 400 generates the wiring routes 813 and 814 that respect the adjacent wiring interval between the signal groups in consideration of the adjacent wiring restriction 810. Thereafter, the signal group unit is subdivided into signal units based on the signal group unit search path, and the signal wiring paths 815 and 816 belonging to the signal group 813 and the signal wiring paths 817 and 818 belonging to the signal group 814 are divided. It generates so as to satisfy the adjacent wiring restriction information 810 and the wiring length restriction information 811.

  Thereafter, the congestion degree evaluation file 819 and the wiring route information file 820 are output.

[Embodiment 3]
Next, a third embodiment according to the present invention will be described with reference to FIG.
FIG. 9 is a schematic diagram for explaining a processing flow of the wiring design support system according to the third embodiment of the present invention.

  In this embodiment, it is assumed that logic and components that take time until detailed information is determined are supplemented with provisional information, and “temporary wiring” is first performed and this is brought close to “real wiring”. It is.

  In other words, information on wiring boards, connection between parts, pin assignments to parts, layout of parts on the wiring board, etc. are given as rough information, and wiring design support at the time of component placement and wiring best solution Ask in the system. After that, when the design of the connection information between the wiring boards and parts given in the rough information is completed and becomes detailed information, the information is replaced, and the previous layout and wiring solution and the detailed information of the design completed are replaced. Use to break down to more detailed component placement and wiring.

  In this embodiment, a “temporary information” file group for wiring design is input to the wiring design support system 400.

  That is, the temporary wiring board information file 901 is a file that defines the size of the wiring board in a rough size. The reserved area file 902 is a file for specifying in advance an area used for a part of a logic circuit not mounted on the wiring board.

  The temporary component information file 903 is a file for determining information on the number of pins connected to the portion and information on the pin positions as temporary components, although the components to be actually mounted are not determined. The temporary connection (net) information file 904 has a rough number of connections between components, and is a file indicating connections at a stage where the connection information has not been assigned to pins. The temporary arrangement information file 905 is a file for determining a rough arrangement position of parts.

  Then, the wiring design support system 400 determines the best solution in the wiring design based on the input rough information. As a result, a congestion degree evaluation file 915, a wiring route information file 916, and an arrangement information file 917 are output as the evaluation result of the wiring congestion degree at that time.

  The “temporary information” file group is input to the wiring design support system 400. Accordingly, in the wiring design support system 400, the temporary part 906 having only a rough pin position on the temporary wiring board, the part 907 having information on the actual part, the reserved area 908, and the temporary part 906 Information on the signal groups 909, 910, and 911 between the actual components 907 is obtained.

  Here, a part for which information about the part has not been determined is referred to as a “provisional part”, and a part for which all the information about the part has been determined is referred to as an “real part”.

  In the left wiring state of FIG. 9, it is assumed that the component 906 is a temporary component, the size of the component, the number of pins, and the position are not fixed, and the component 907 is an actual component. Further, it is assumed that a reserved area 908 is secured.

  At this time, the component 906, which is a temporary component, is processed assuming that all pins are at the center of the component, and a wiring route search process is performed. At this time, in the wiring route search process, wiring routes 912, 913, and 914 that do not pass through the reserved area 908 as much as possible are generated. In the wiring between the part 906 that is a temporary part and the part 907 that is an actual part, the end point of the temporary part 906 is the center of the part.

  In this way, appropriate component placement and wiring paths are generated in the wiring design support system 400 in consideration of temporary information, and the congestion degree evaluation file 915, wiring path information file 916, and placement information file 917 are output. . When the design progresses and actual information is created, the input information file is sequentially replaced from the temporary information file to the actual wiring board information file 918, the actual part information file 919, the actual connection information file 920, and the actual placement information file 922. This improves the accuracy of wiring design. Further, the route instruction information file 921 reflecting the wiring route information file 916 generated by the temporary information file is input. Further, an actual placement information file 922 reflecting the information of the placement information file 917 in consideration of actual wiring board information and actual component information is input.

  The actual connection information file 920 is a file representing wiring information for wiring up to the pin position of the actual component.

  The actual arrangement information file 922 determines the actual arrangement of parts, and corresponds to the reserved area information file 902 and the temporary arrangement information file 905.

  Note that the route instruction information file 921 instructs a route suitable for route search, and uses wiring information obtained using temporary information.

  In an actual wiring board, a component 923, a component 907, and a component 927 to a component 929 are arranged, and signal groups 924, 925, and 926 are wired between the component 923 and the component 907, and the components 927, 928, and 929 are arranged. Signal groups 930 and 931 are wired between the two.

  At this time, the reserved area 908 is replaced with an arrangement area for the parts 927 to 929. Then, the wiring route between the component 923 and the component 907 is searched using the wiring routes 912, 913, and 914 generated in the previous procedure as recommended routes. In addition, the pin position is determined in a portion where the recommended path and the pin of the actual part are not connected.

  Then, the wiring design is performed while effectively using the result of the provisional information, and the wiring paths 933, 934, and 935 determined up to the position of the actual pin of the component are generated.

  Also, appropriate wiring path search is performed for the replaced parts 927 to 929 to generate wiring paths 936 and 937.

  When the wiring design is completed, the wiring design support system outputs a congestion degree evaluation file 938, a wiring route information file 939, and an arrangement information file 940. In this embodiment, in this way, it is possible to examine the wiring design from the early stage of the floor plan stage before entering into the detailed wiring design based on the rough information, and the result is the actual wiring board. The result of the initial examination is made valid by passing it to

[Embodiment 4]
Next, a fourth embodiment according to the present invention will be described with reference to FIG.
FIG. 10 is a schematic diagram for explaining the processing flow of the wiring design support system according to the fourth embodiment of the present invention.

  In the present embodiment, it is possible to design a wiring in consideration of a capacitor, a power cut line, and the like which are indispensable for arranging electronic circuit board components.

  There are parts 1002, 1003, and 1004 on the wiring board 1009, and connection information 1005, 1006, 1007, and 1008 are provided between the parts 1002 and 1003. The connection information 1005 and 1006 indicate the same signal group. The connection information 1007 and 1008 indicate other signal groups.

  In addition, a capacitor information file 1010 having information on the required number of capacitors for each voltage type of parts is defined. For example, the component with the component name 1002 indicates that six capacitors having the voltage type VG1 are required and two capacitors having the voltage type VG2 are required.

  Further, a correspondence table 1012 of signals and voltage types is defined. This means that, for example, signals with signal names 1005 and 1006 must be arranged in a region to which the voltage of VG1 is supplied.

  The power cut line information file 1011 stores rough information about the power cut line of the wiring board. The power cut line is a line that represents the boundary of the voltage value supplied on the wiring board.

  The wiring design support system 400 of the present embodiment receives the net information 1001 representing the wiring board 1009, the capacitor information file 1010, the power cut line information file 1011 and the signal / voltage type correspondence table 1012.

  Then, the wiring design support system 400 refers to the capacitor information file 1010 in accordance with the rough power supply cut line 1013 and arranges the required number of capacitors around the target component. Thereafter, the power cut line 1014 is corrected based on the capacitor arrangement. Next, on the premise of these arrangements, a wiring route search process is performed.

  At this time, for the signal wiring passing through the wiring layers above and below the power cut line, a wiring path that does not cross the power cut line is generated. Then, the cut line is corrected again by partially shifting the position of the cut line in accordance with the wiring congestion degree of the obtained wiring paths 1015, 1016, and 1017. Thereafter, a congestion degree evaluation file 1018, a wiring route information file 1019, and a corrected power cut line information file 1020 are output. In this way, it is possible to simultaneously perform power supply design such as capacitors and cut lines and wiring design taking into account their influence, and both floorplanning and power supply design can be completed from an early stage in a short period of time.

[Embodiment 5]
Next, a fifth embodiment according to the present invention will be described with reference to FIG.
FIG. 11 is a schematic diagram for explaining the processing flow of the wiring design support system according to the fifth embodiment of the present invention.

  In this embodiment, the part pin assignment is changed as part of the wiring design.

  Components 1102 and 1103 are mounted on the wiring board 1108, and connection information 1104, 1105, 1106, and 1107 are provided between the components 1112 and 1113. The connection information 1104 and 1105 indicate the same signal group and are connected It is assumed that the information 1106 and 1107 indicate another signal group.

  In the present embodiment, a route search is performed by inputting the net information file 1101 representing the wiring board 1108. Then, wiring paths 1109 and 1110 are generated and the wiring length is evaluated. As a result of evaluating the detour length, if there is an extremely long difference between the wiring length and the Manhattan length (the shortest path connecting the parts by horizontal and vertical lines), or the pin assignment according to it is evaluated. If it is determined that the wiring design is hindered, review the pin assignments.

  In the example of this figure, it can be seen that the detour length of grpB is 7, which is extremely long.

  In such a case, the route search is performed again using the component 1113 whose pin assignment 1114 has been reviewed, the wiring routes 1115 and 1116 are generated, and the evaluation is performed again. If there is no extremely long difference between the wiring length and the Manhattan length in the evaluation result 1118 concerning the detour length, the pin assignment change information 1119, the congestion degree evaluation file 1120, and the wiring route information file 1121 are output as the end of route search.

1 is a configuration diagram of a wiring design support system according to the present invention. 5 is a schematic diagram illustrating an example of stored information in a route instruction file 104. FIG. It is a flowchart which shows the detail of a route search process. It is a figure explaining the route search using the recommended route of the present invention. It is the figure explaining the route search which makes the signal group which carried out the group division | segmentation of this invention adjoin. It is a figure explaining the procedure which determines a wiring path | route from a signal group. It is a schematic diagram explaining the flow of a process of the wiring design support system which concerns on 1st embodiment of this invention. It is a schematic diagram explaining the flow of a process of the wiring design support system which concerns on 2nd embodiment of this invention. It is a schematic diagram explaining the flow of a process of the wiring design support system which concerns on 3rd embodiment of this invention. It is a schematic diagram explaining the flow of a process of the wiring design support system which concerns on 4th embodiment of this invention. It is a schematic diagram explaining the flow of a process of the wiring design support system which concerns on 5th embodiment of this invention. It is a schematic diagram which shows an example when arrange | positioning the signal group which has adjacent wiring restrictions. It is a schematic diagram explaining the form of a wiring pattern in case the components of a wiring board become an obstruction of wiring.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 ... Wiring design support system 102 ... Net information file 103 ... Signal group information file 104 ... Route instruction information file 105 ... Placement instruction information file 106 ... Wiring restriction information file 107 ... Input processing unit 108 ... Wiring processing unit S01 ... Route unsearched Signal group selection S02 ... Route search S03 ... Route search determination S04 ... Wiring route evaluation S05 ... Relocation / placement necessity determination S06 ... Part placement / wiring route change determination S07 ... Subdivision determination S08 ... Subdivision threshold change S09 ... Search The route of the result is converted into a recommended route 115... Output processing unit 116... Wiring route information file 117.

Claims (1)

In the wiring design method that generates the wiring route by the wiring design system, considering the wiring constraints from the stage of the floor plan before the detailed wiring decision,
As temporary information for wiring design,
Temporary wiring board information file that defines the size of the wiring board in a rough size, reserved area file for pre-designating the area used for unmounted parts on the wiring board, and connection to that part as a temporary part Temporary part information file that defines information on the number of pins to be pinned and pin positions, and a temporary connection information file that has a rough number of connections between parts, and indicates connection when the connection information is not assigned to pins And a temporary placement information file that determines the rough placement position of the part,
Based on these temporary information, the connection of the temporary part is assumed that all pins are in the center of the part, and a wiring route is generated so as not to pass through the reserved area ,
The temporary connection information file is converted into the actual wiring board information file indicating the actual size of the wiring board, the temporary component information file is converted into the actual component information file designating the part to be actually mounted, and the temporary connection information file. Sequentially replace the temporary placement information with an actual connection information file that represents the wiring of actual parts, and an actual placement information file that defines the placement of actual parts.
A wiring design method , wherein a route search is performed using a wiring route generated based on the provisional information as a recommended route, and more detailed wiring routes are sequentially generated.

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