JP4164473B2 - Functional memory access control system, functional memory device, control method therefor, and program - Google Patents

Description

  The present invention provides a functional memory access control for controlling access from the central processing unit to the functional memory by connecting a chip called a functional memory in addition to the main memory to the memory bus of the central processing unit. The present invention relates to a system, a functional memory device constituting the system, a control method thereof, and a program.

  A circuit board mounted on a device such as a copying machine, a printer, or a personal computer has a main memory (ROM or RAM) connected to a memory bus of a central processing unit (CPU) as shown in FIG. A general system configuration is to connect a device or ASIC to a system bus (general-purpose bus). Devices and ASICs that perform various processes are connected to the system bus. Here, the system bus (general-purpose bus) is generally a PCI bus, a PCI Express (registered trademark), or the like.

  In addition, as shown in FIG. 7, there is a configuration in which a functional memory 104 is connected to the memory bus 102 of the CPU 101. The function memory 104 is a chip that performs processing such as image processing, and includes an image processing unit 107 and an internal memory 105.

  The function memory 104 is a chip that performs image processing. However, since the function memory 104 is connected to the memory bus 102, the function memory 104 looks only as a memory when viewed from the CPU 101. In other words, the function memory 104 is only a data read or write target from the CPU 101 in the same manner as a normal memory, although image processing is performed.

  In the configuration having the functional memory 104, the memory bus 102, which is higher in frequency than the general-purpose bus and is not normally used except for the memory 103, is used for data transfer to the image processing unit 107, so high-speed image processing is expected. can do. However, in the general-purpose bus, there is a signal notifying the waiting for processing such as a wait signal from the connected device or ASIC, but there is no signal informing the end of processing in the image processing unit 107 in this memory bus 102. .

  Therefore, when the CPU 101 performs read access to the internal memory 105 in a state where the processing of the function memory 104 is not completed, the data being processed is accessed and erroneous data being processed is received. A method for determining the end of processing in the memory 104 is required.

In order to solve such a problem, for example, as in Patent Document 1, a specific area (specific address) of the functional memory is accessed, and the processing in the functional memory is completed based on the contents of the area. There is a method of judging whether or not. Further, in Patent Document 1, the content of the memory after processing is set to other than 0, and when data being processed is accessed, 0 is returned and correct data is read only when the processing is completed. is suggesting.
Japanese Patent Laid-Open No. 10-222459

  However, in the configuration shown in FIG. 7, when the CPU 101 accesses the functional memory 104 via a memory bus that does not have a wait function, the data processing is not always completed, and erroneous data being processed can be received. There is sex.

  For this reason, when the function memory is handled, a configuration is required in which access to the data after the processing of the function memory is reliably performed.

  The present invention has been made in view of the above problems, and when a functional memory that performs processing for a specific application such as image processing is connected on a memory bus that does not have a wait function, the pseudo wait function is easily provided. An object of the present invention is to provide a functional memory access control system, a functional memory device, a control method thereof, and a program capable of reliably accessing data after the end of processing.

In order to achieve the above object, a functional memory access control system according to the present invention comprises the following arrangement. That is,
A functional memory access control system comprising a central processing unit, a main memory for the central processing unit, and a functional memory,
The functional memory is
Connection means for connecting to a memory bus for connecting the central processing unit and the main memory;
Processing means for executing processing for a specific application;
In response to an access request from the central processing unit, generating means for generating status information indicating whether processing by the processing means is being executed,
Transmission means for transmitting the status information generated by the generation means to the central processing unit;
The central processing unit is
Issuing means for issuing an access request to the functional memory to the functional memory via the memory bus;
In response to the access request, receiving means for receiving the status information from the functional memory via the memory bus;
Reissuing means for reissuing the access request to the functional memory based on the status information received by the receiving means.

  Preferably, the status information is an end signal indicating the end of processing by the processing means.

  Preferably, the status information is ECC.

Preferably, the generation unit includes a determination unit that determines whether or not the processing unit is executing a process.
The status information is generated based on the determination result of the determination means.

Preferably, the functional memory further includes an internal memory,
The internal memory stores data before processing by the processing means or data of processing results.

  Preferably, the reissue means reissues an access request to the internal memory.

In order to achieve the above object, a functional memory device according to the present invention comprises the following arrangement. That is,
A functional memory device that functions as a memory for a central processing unit,
Connection means for connecting to the central processing unit and a memory bus for connecting a main memory for the central processing unit;
Processing means for executing processing for a specific application;
In response to an access request from the central processing unit, generating means for generating status information indicating whether processing by the processing means is being executed,
Transmitting means for transmitting the status information generated by the generating means to the central processing unit.

The function memory device according to claim 7, wherein the status information is preferably an end signal indicating an end of processing by the processing unit.

The function memory device according to claim 7, wherein the status information is preferably ECC.

Preferably, the generation unit includes a determination unit that determines whether or not the processing unit is executing a process.
The status information is generated based on the determination result of the determination means.

Also preferably, it further has an internal memory,
The internal memory stores data before processing by the processing means or data of processing results.

In order to achieve the above object, a control method of a functional memory access control system according to the present invention comprises the following arrangement. That is,
A control method of a functional memory access control system comprising a central processing unit, a main memory for the central processing unit, and a functional memory,
Issuing step of issuing an access request to the functional memory connected to a memory bus connecting the central processing unit and the main storage memory from the central processing unit to the functional memory;
In response to the access request, a transmission step of transmitting status information indicating whether processing by a processing unit for a specific application included in the functional memory is being executed from the functional memory to the central processing unit via the memory bus; ,
Receiving the status information from the functional memory via the memory bus at the central processing unit;
A reissuing step of reissuing the access request to the functional memory from the central processing unit based on the status information received in the receiving step.

In order to achieve the above object, a method for controlling a functional memory device according to the present invention comprises the following arrangement. That is,
A control method of a functional memory device that functions as a memory for a central processing unit,
In response to an access request from the central processing unit, a generation step of generating status information indicating whether or not the processing by the processing unit for specific use included in the functional memory is being executed,
A transmission step of transmitting the status information generated in the generation step to the central processing unit via a memory bus connecting the central processing unit and the main memory.

In order to achieve the above object, a program according to the present invention comprises the following arrangement. That is,
A program for realizing control of a functional memory access control system comprising a central processing unit, a main memory for the central processing unit, and a functional memory,
A program code of an issuing step for issuing an access request to the functional memory connected to a memory bus connecting the central processing unit and the main memory to the functional memory from the central processing unit;
In response to the access request, a transmission step of transmitting status information indicating whether processing by a processing unit for a specific application included in the functional memory is being executed from the functional memory to the central processing unit via the memory bus. Program code,
The program code of the receiving step for receiving the status information from the functional memory via the memory bus at the central processing unit;
And a program code for a reissuing step for reissuing the access request to the functional memory from the central processing unit based on the status information received in the receiving step.

In order to achieve the above object, a program according to the present invention comprises the following arrangement. That is,
A program for controlling a functional memory device that functions as a memory for a central processing unit,
In response to an access request from the central processing unit, a program code of a generation process for generating status information indicating whether processing is being performed by a processing unit for specific use included in the functional memory;
And a program code of a transmitting step for transmitting the status information generated in the generating step to the central processing unit via a memory bus connecting the central processing unit and the main memory.

  According to the present invention, it is possible to easily provide a pseudo wait function when a functional memory that performs processing for a specific application such as image processing is connected on a memory bus that does not have a wait function. It is possible to provide a functional memory access control system, a functional memory device, a control method thereof, and a program that can reliably access the data.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

<Embodiment 1>
In the first embodiment, a functional memory having an image processing function will be described as an example.

<System configuration explanation>
FIG. 1 is a block diagram showing the configuration of the entire functional memory access control system according to the first embodiment of the present invention.

  In FIG. 1, reference numeral 101 denotes a central processing unit (CPU) for controlling memory access. Reference numeral 102 denotes a non-waitable memory bus for connecting a standard memory 103, a function memory 104, and a CPU 101, which will be described later.

  The memory bus 102 includes data input / output (DATA), row address / strobe command (RAS), column address / strobe command (CAS), write enable (WE), read enable (RE), address (Address), ECC signal, and the like. It is composed of various signal buses.

  Reference numeral 103 denotes a standard memory (main storage memory) that temporarily stores, for example, data after completion of image processing, and all data related to processing of the CPU 110. The standard memory is typified by a RAM that the CPU 101 uses as a main memory.

  Reference numeral 104 denotes a functional memory having an image processing function (image processing unit 107), which executes various processes according to predetermined procedures such as color conversion processing and halftone processing. The function memory 104 is a processing chip for a specific application such as an image processing function (communication function, data processing function, print control function, etc.), and includes an image processing unit 107 and an internal memory 105.

  Reference numeral 105 denotes an internal memory that temporarily stores data for the image processing unit 107 to execute image processing, stores the results of image processing, and functions as a data work area. Store the data to be loaded.

  Reference numeral 106 denotes an ECC generation unit that generates an error check code that is status information (signal) indicating whether processing in the function memory 104 is being executed. In particular, in the present invention, status information (signal) indicating the presence / absence of processing in the function memory 104 is generated. In particular, an error check code (for example, ECC) is used as status information (processing end signal).

  ECC is an abbreviation for Error Correcting Code and means an error correcting code. A code for detecting the legitimacy of the data is separately generated and added to the original data and used for error detection and correction. When data is written to the memory, the ECC code is written at the same time as the data, and when the data is read, the ECC read from the memory is compared with the ECC calculated from the read data. (See FIG. 2).

  The present invention writes an error code in the ECC when the processing of the function memory 104 is not completed. When the processing is not completed, the CPU 101 compares the data with the ECC, determines that it is an error, waits, and performs read access again, thereby reliably accessing the data after the processing is completed. To do.

<Description of operation>
Next, processing executed by the functional memory access control system according to the first embodiment will be described with reference to FIG.

  FIG. 3 is a flowchart showing processing executed by the functional memory access control system according to the first embodiment of the present invention.

  First, the CPU 101 executes a read access as an access request to the internal memory 105 in the functional memory 104, that is, issues an access request (step S401). Data in the internal memory 105 and a value (ECC) held by the ECC generation unit 106 are read out and collated (step S402). When an ECC error is detected, the CPU 101 sets the read data from the internal memory 105 as invalid data and waits. Thereafter, read access is made again to the internal memory 105 (step S403).

  On the other hand, when the ECC collation is correct in step S402, the read data from the internal memory 105 is set as valid data (step S404).

  In FIG. 3, the case of read access has been described as an example, but the same applies to the case of write access.

  Next, a timing chart at the time of read access to the internal memory 105, which is data read from the CPU 101 to the functional memory 104, will be described with reference to FIG.

  FIG. 4 is a timing chart at the time of read access from the CPU of the first embodiment of the present invention to the internal memory in the functional memory.

  When there is a read access from the CPU 101, the data (DATA) and the ECC code are read at the timing shown in FIG. 4, and in DATA1 to DATA4, collation with the corresponding ECC1 to ECC4 is performed and the data is valid data. Or invalid data.

  Next, the operation of the ECC generation unit 106 will be described with reference to FIG.

  FIG. 5 is a diagram illustrating the operation of the ECC generation unit according to the first embodiment of the present invention.

  At the time of read access from the CPU 101, the read address is input to the function memory 104, and the CPU 101 reads the output signal corresponding to the read address from the function memory 104 and the ECC value from the ECC generation unit 106.

  When the processing is completed, the function memory 104 outputs a processed signal indicating that to the ECC generation unit 106. When the processing of the function memory 104 is completed from the processed signal, the ECC generation unit 106 generates and outputs a correct ECC from the output data. On the other hand, if the process has not ended, an ECC error is output.

  4 and 5, the case of read access has been described as an example, but the same applies to the case of write access.

  As described above, according to the first embodiment, by using the ECC function as a pseudo wait signal, a pseudo wait function can be easily provided even on a memory bus having no wait function. It becomes possible to reliably access data after the processing of the memory is completed.

<Embodiment 2>
In the first embodiment, the functional memory having the image processing function has been described. However, the present invention is not limited to this, and the present invention can be easily applied to any functional memory having a memory bus having no wait function. Can have a pseudo weight function.

  In addition, as an implementation example of the memory access control system of the present invention, for example, it can be installed in various devices such as a printer, a copying machine, a digital camera, and an expansion board mounted on a personal computer.

  As described above, the embodiment has been described in detail. However, the present invention can take an embodiment as a system, apparatus, method, program, storage medium, or the like, and specifically includes a plurality of devices. The present invention may be applied to a system that is configured, or may be applied to an apparatus that includes a single device.

  In the present invention, a software program (in the embodiment, a program corresponding to the flowchart shown in the figure) that realizes the functions of the above-described embodiment is directly or remotely supplied to the system or apparatus, and the computer of the system or apparatus Is also achieved by reading and executing the supplied program code.

  Accordingly, since the functions of the present invention are implemented by computer, the program code installed in the computer also implements the present invention. In other words, the present invention includes a computer program itself for realizing the functional processing of the present invention.

  In that case, as long as it has the function of a program, it may be in the form of object code, a program executed by an interpreter, script data supplied to the OS, or the like.

  As a recording medium for supplying the program, for example, floppy (registered trademark) disk, hard disk, optical disk, magneto-optical disk, MO, CD-ROM, CD-R, CD-RW, magnetic tape, nonvolatile memory card ROM, DVD (DVD-ROM, DVD-R) and the like.

  As another program supply method, a client computer browser is used to connect to an Internet homepage, and the computer program of the present invention itself or a compressed file including an automatic installation function is downloaded from the homepage to a recording medium such as a hard disk. Can also be supplied. It can also be realized by dividing the program code constituting the program of the present invention into a plurality of files and downloading each file from a different homepage. That is, a WWW server that allows a plurality of users to download a program file for realizing the functional processing of the present invention on a computer is also included in the present invention.

  In addition, the program of the present invention is encrypted, stored in a storage medium such as a CD-ROM, distributed to users, and key information for decryption is downloaded from a homepage via the Internet to users who have cleared predetermined conditions. It is also possible to execute the encrypted program by using the key information and install the program on a computer.

  In addition to the functions of the above-described embodiments being realized by the computer executing the read program, the OS running on the computer based on the instruction of the program is a part of the actual processing. Alternatively, the functions of the above-described embodiment can be realized by performing all of them and performing the processing.

  Furthermore, after the program read from the recording medium is written in a memory provided in a function expansion board inserted into the computer or a function expansion unit connected to the computer, the function expansion board or The CPU or the like provided in the function expansion unit performs part or all of the actual processing, and the functions of the above-described embodiments are realized by the processing.

It is a block diagram which shows the structure of the whole functional memory access control system of Embodiment 1 of this invention. It is a figure for demonstrating the ECC function of Embodiment 1 of this invention. It is a flowchart which shows the process which the functional memory access control system of Embodiment 1 of this invention performs. 4 is a timing chart at the time of read access from the CPU according to the first embodiment of the present invention to the internal memory in the functional memory. It is a figure which shows operation | movement of the ECC production | generation part of Embodiment 1 of this invention. It is a figure which shows the basic composition of a system. It is a figure which shows the basic composition of a functional memory.

Explanation of symbols

101 CPU
102 memory bus 103 memory 104 functional memory 105 internal memory 106 ECC generation unit 107 image processing unit

Claims (13)

A functional memory access control system comprising a central processing unit, a main memory for the central processing unit, and a functional memory,
The functional memory is
Connection means for connecting to a memory bus for connecting the central processing unit and the main memory;
Processing means for executing processing for a specific application;
In response to an access request from the central processing unit, generation means for generating status information that is ECC as status information indicating whether processing is being executed by the processing means;
Transmission means for transmitting the status information generated by the generation means to the central processing unit;
The central processing unit is
Issuing means for issuing an access request to the functional memory to the functional memory via the memory bus;
In response to the access request, receiving means for receiving the status information from the functional memory via the memory bus;
A functional memory access control system comprising: reissuing means for reissuing the access request to the functional memory based on status information received by the receiving means. The functional memory access control system according to claim 1, wherein the status information is an end signal indicating the end of processing by the processing means. The generation unit includes a determination unit that determines whether or not the processing unit is executing a process,
The functional memory access control system according to claim 1, wherein the status information is generated based on a determination result of the determination unit. The functional memory further includes an internal memory,
The functional memory access control system according to claim 1, wherein the internal memory stores data before processing by the processing means or data of processing results. The functional memory access control system according to claim 4 , wherein the reissue means reissues an access request to the internal memory. A functional memory device that functions as a memory for a central processing unit,
Connection means for connecting to the central processing unit and a memory bus for connecting a main memory for the central processing unit;
Processing means for executing processing for a specific application;
In response to an access request from the central processing unit, generating means for generating status information that is ECC as status information indicating whether processing is being executed by the processing means;
A functional memory device comprising: transmission means for transmitting the status information generated by the generation means to the central processing unit. The functional memory device according to claim 6 , wherein the status information is an end signal indicating an end of processing by the processing unit. The generation unit includes a determination unit that determines whether or not the processing unit is executing a process,
The memory control device according to claim 6 , wherein the status information is generated based on a determination result of the determination unit. Furthermore, it has an internal memory,
The functional memory device according to claim 6 , wherein the internal memory stores data before processing by the processing unit or data of a processing result. A control method of a functional memory access control system comprising a central processing unit, a main memory for the central processing unit, and a functional memory,
Issuing step of issuing an access request to the functional memory connected to a memory bus connecting the central processing unit and the main storage memory from the central processing unit to the functional memory;
In response to the access request, status information that is ECC as status information indicating whether processing by a processing unit for a specific application included in the functional memory is being executed, from the functional memory via the memory bus, the central processing A transmission step for transmitting to the unit;
Receiving the status information from the functional memory via the memory bus at the central processing unit;
And a reissuing step of reissuing the access request to the functional memory from the central processing unit based on the status information received in the receiving step. A control method of a functional memory device that functions as a memory for a central processing unit,
In response to an access request from the central processing unit, a generation step of generating status information that is ECC as status information indicating whether processing is being performed by a processing unit for a specific application included in the functional memory;
A transmission step of transmitting the status information generated in the generation step to the central processing unit via a memory bus connecting the central processing unit and the main memory. Control method. A program for causing a computer to execute control of a functional memory access control system comprising a central processing unit, a main memory for the central processing unit, and a functional memory,
Issuing step of issuing an access request to the functional memory connected to a memory bus connecting the central processing unit and the main storage memory from the central processing unit to the functional memory;
In response to the access request, status information that is ECC as status information indicating whether processing by a processing unit for a specific application included in the functional memory is being executed, from the functional memory via the memory bus, the central processing A transmission step for transmitting to the unit;
Receiving the status information from the functional memory via the memory bus at the central processing unit;
A program causing a computer to execute a reissuing step of reissuing the access request to the functional memory from the central processing unit based on the status information received in the receiving step. A program for causing a computer to execute control of a functional memory device that functions as a memory for a central processing unit,
In response to an access request from the central processing unit, a generation step of generating status information that is ECC as status information indicating whether processing is being performed by a processing unit for a specific application included in the functional memory;
A program causing a computer to execute a transmission step of transmitting status information generated in the generation step to the central processing unit via a memory bus connecting the central processing unit and the main memory. .

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