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JP4159147B2 - Semiconductor device - Google Patents

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Publication number
JP4159147B2
JP4159147B2 JP24069998A JP24069998A JP4159147B2 JP 4159147 B2 JP4159147 B2 JP 4159147B2 JP 24069998 A JP24069998 A JP 24069998A JP 24069998 A JP24069998 A JP 24069998A JP 4159147 B2 JP4159147 B2 JP 4159147B2
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JP
Japan
Prior art keywords
height
sealing body
semiconductor chip
island
lead terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP24069998A
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Japanese (ja)
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JP2000068532A (en
Inventor
浩 小堀
勉 石川
智 関口
浩樹 瀬山
秀雄 国井
清 高田
公 落合
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

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  • Led Device Packages (AREA)
  • Light Receiving Elements (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、発光素子と受光素子とを、またはそれらを個別に樹脂封止した半導体装置に関するものであり、特に装置の薄形化に関するものである。
【0002】
【従来の技術】
最近、サブノートパソコン、携帯情報端末、電子スチルカメラ等のマルチメディア機器がめざましい発展を遂げている。これらの機器は、携帯性を求められることから外部とのデータ送受信にも簡便なものが要求され、赤外線等の光信号を用いることによりコードレスで外部機器と本体とを接続する装置を備えたものが多い。その中でも光信号として波長が870nmの赤外線を用いるIrDA(Infrared Data Association)規格が最も普及している。
【0003】
IrDA規格によるデータ通信を利用するためには、接続すべき両方の機器に、赤外線信号を発する発光素子と、赤外線信号を受ける受光素子とを備える必要がある。発光素子と受光素子とは、それぞれ別個のパッケージとして電子機器に組み込まれる場合もあるし、両者が1つのパッケージに収納されたモジュールとして供給される場合もある。
【0004】
図3に、発光素子と受光素子とを1つのパッケージに収納した赤外線データ通信用の半導体装置の例を示す(例えば、特開平10−70304号)。この装置は、装置本体1内に、半導体チップの形態で提供された受光素子2と発光素子3とを収納したもので、少なくとも赤外線に対して透明な樹脂で樹脂モールドしたものである。特に受光素子2においては、受光用のホトダイオードPDと、アンプ回路等の周辺回路とを同一チップ内に集積化する場合もある。
【0005】
半導体チップで提供された受光素子2のホトダイオードPDは、半導体チップの表面に対して垂直方向に光を受ける構造になっている。そのため、受光素子2、発光素子3共に、半導体チップに対して垂直に光信号6を発光/受光する構造になっており、該光信号6の集光のために各素子の上方に、半球体レンズ4、5を樹脂で形成している。
【0006】
【発明が解決しようとする課題】
電子機器における軽薄短小化の要求に対応するためには、プリント基板上に固着する電子部品自体の高さを制限することが不可欠である。しかしながら、光信号6がプリント基板に対して垂直方向に導入するように図3の装置本体1を実装すると、レンズ4、5の存在等により装置本体1の高さが高く、全体の薄形化が困難である欠点があった。
【0007】
一方、図4に示すようにリードを折り曲げてレンズ4、5を横にすることで、プリント基板7に対して水平方向に光信号6を導入する様にする事も可能である。しかし、受光素子2と発光素子3の半導体チップを垂直に立てるようにして実装することから、実装時の高さを半導体チップの大きさ以下にすることが原理的に不可能であり、やはり薄形化が困難である欠点があった。
【0008】
【課題を解決するための手段】
本発明は前述の課題に鑑みて成され、アイランド上に半導体チップを固着し、前記半導体チップの電極パッドとリード端子とをワイヤ接続し、前記リード端子の一部を含めて前記半導体チップを樹脂封止し、該封止体の側面から前記リード端子を外部に導出した半導体装置であって、
前記半導体チップの上方の前記封止体に所定の深さの溝を有し、
前記リード端子が前記アイランドの位置に対して第1の高さで前記封止体の側面から外部に導出され、
前記封止体の内部に延在するリード端子が、前記アイランドの位置と前記第1の高さとの中間に位置する第2の高さで延在する部分を有し、
前記ワイヤが前記第2の高さで延在する部分に接続されていることを特徴とするものである。
【0009】
【発明の実施の形態】
以下、本発明の第1の実施の形態を、図面を参照しながら詳細に説明する。本実施の形態は受光素子2と発光素子3とを1つのパッケージに収納したもので、図1(A)は本発明の構造を示す平面図、図2(A)は図1のAA線断面図、図2(B)は図1のBB線断面図を示している。
【0010】
これらの図中、21は受光素子2を搭載するアイランド、22は発光素子3を搭載するアイランド、23は外部接続用のリード端子を各々示している。これらは鉄または銅系の素材からなるリードフレームによって提供されており、各アイランド21、22の表面に受光素子2と発光素子3が半田などの接着剤で固着されている。
【0011】
受光素子2は、半導体チップとして提供されたPINホトダイオード等であり、周辺の駆動回路等を同一チップ上に集積化したものでもよい。図中の符号PDは受光素子2のホトダイオード部分(受光面)を示している。半導体チップの表面には電極パッド30が形成され、ボンディングワイヤ24によって電極パッドとリード23とが接続されている。
【0012】
発光素子3は、半導体チップとして提供された、例えば波長870nmの赤外光を発光するLEDチップである。LEDはチップの全体で発光し、全方位に光が発散する素子である。そのため、チップを固着するアイランド22を円錐形の「お椀」のような形状に加工し、アイランド22の中心部に固着した発光素子3からの光信号6をアイランド22の傾斜した側壁22aで反射させて、光を一方向に集めるような構造としている。前記アイランド22はアノードまたはカソードの一方の端子となり、チップ表面に形成した電極パッド30が他方の端子となる。他方の端子となる電極パッド30は、ボンディングワイヤ24により所定のリード端子23に接続されている。
【0013】
各アイランド21、22に固着された発光素子2と受光素子3は、リード23の先端部を含めて少なくとも赤外光に対して透明な樹脂でトランスファーモールドされる。樹脂は封止体25を構成し、封止体25の一表面にはアイランド21、22の裏面が封止体25表面と同一平面を成して露出する。
【0014】
リード端子23は封止体25の一方の側面25aの中間近傍から、アイランド21、22に対して第1の高さ(図2(A):t1)で外部に導出され、表面実装用途に適するように、Z字型に折り曲げられている。封止体25の内部に延在するリード端子23は、前記第1の高さt1を維持しながら各アイランド21、22の近傍まで延在する。リード端子23の一部はアイランド21、22に連続するアイランドリード23a、23bであり、これらはアイランド21、22と第1の高さt1との差を作るための曲げ加工が施されている。該曲げ加工が施された部分は封止体25の内部に封止される。
【0015】
また、一部のリード23cについては、封止体25の内部において曲げ加工が施されており、第1の高さt1とアイランド21、22の高さとの間に位置する第2の高さt2で延在させている。
【0016】
受光素子2のホトダイオード部分PDの上部には、封止体25の樹脂を所定の深さに凹ませて凹部26を形成し、凹部26の側壁によって反射面27を構成している。この反射面27は、封止体25をトランスファーモールドする際に、金型に凹部26に対応する雄型部分を形成しておくことによって形成するか、あるいは完成後に封止体25の表面を削ることで形成される。そして、反射面27は、封止体25の他の側面25bから導入させた光信号6を、反射させて受光素子2のホトダイオード部分PDに到達させる役割を果たす。
【0017】
尚、反射面27は、その境界における材料の屈折率の違いにより反射面となる。そのために、封止体25の全体が梨地加工されているのに対して、反射面27はそれより表面荒さが小さい鏡面加工としている。また、反射率を向上するために反射面27の表面を遮光性の金属被膜などで覆っても良い。
【0018】
一方、受光素子2と同様に、発光素子3側にもその上方に凹部26と反射面27を形成する。発光素子3から発光された信号光6を反射面27で反射し、封止体25の他の側壁25bから外部に出射する機能を有する。
【0019】
この様に、凹部26で形成した反射面27で光信号6を封止体25の他の側面25bから出入射させることで、封止体25全体の高さを低く抑えることが可能である。尚、他の側面25bに光信号6の集光を行うレンズ体を樹脂で一体化成形しても良い。
【0020】
上述の半導体装置において、反射面27で反射させることからいくつかの制約があることが明らかである。制約の一つは、凹部26の位置と深さである。反射面27が、ある設計された反射角度を維持した上で、平面視(図1のように観測して)でホトダイオード部PDまたは発光素子3の全表面を覆う事が必要だからである。当然、凹部26の最深部26aはホトダイオードPDまたは発光素子3より一側面25a側にシフトしている必要がある。制約のもう一つは、リード端子23の配置である。封止体25の他の側面25b側から光信号6を入射/出射させることから、各半導体チップの電気的接続を行う為のリード端子23は、封止体25の一側面25a側に集中して配置するのが簡便である。また、半導体チップの電極パッド30も一側面25a側に配置すると、ワイヤ24のループ長さを短縮できて簡便である。
【0021】
係る制約下において、電極パッド30とリード端子23とをボンディングワイヤ24で接続しようとすると、図2(A)から明らかなようにワイヤ24aのループが凹部26の最深部と干渉する場合があり得る。特に発光素子3側においては、半導体チップのチップサイズが比較的小さくしかも電極パッドがその中心付近に配置されている場合が多いので、電極パッド30が凹部26の最深部近傍に位置することが多く、前記干渉が生じやすい。また、受光素子2側でも電極パッド30が凹部26の最深部に近い位置に配置されている場合には同様の干渉が生じる場合がある。
【0022】
本発明は、リード端子23の先端部分に第2の高さt2で延在する部分31を形成し、第2の高さt2で延在する部分にワイヤ24を接続することにより、ワイヤループの高さを抑えてワイヤ24と凹部26との干渉を回避している。他の干渉しない電極パッド30では図2(B)に示したように第1の高さt1を持つリード端子23に接続している。むろん、全部のリード端子23に第2の高さt2を持たせる曲げ加工を施しても良い。
【0023】
以上に説明したとおり、本発明の半導体装置は、光信号6の伝達経路を折り曲げることによって、係る装置をプリント基板上に表面実装した時に、封止体25の側面25bから光信号6を出入射することができ、これによってプリント基板全体の高さを低く抑えることができ、電子機器の薄形化を推進することができるものである。その際に、リード端子23の先端の高さを下げる曲げ加工を施すことによって凹部26とワイヤ24との干渉を回避して、半導体装置全体の高さが増大することを防止したものである。
【0024】
尚、光半導体装置としては、受光素子2と発光素子3の両方を封止した構造の他、どちらか一方を封止した装置であっても良い。
【0025】
【発明の効果】
以上、本発明によれば、凹部26で反射面27を設けることにより、樹脂の側面25bから光信号6の出入斜を行える光半導体装置を実現できる利点を有する。この装置は、封止体25の全体の高さを小さくできるので、プリント基板に実装したときに大幅な薄形化を実現できるものである。
【0026】
更に、リード端子23cの先端部分に第2の高さt2で延在する部分31を設けることにより、ワイヤループの高さを抑え、もってボンディングワイヤ24と凹部26の最深部との干渉を回避できる利点を有する。また、干渉を防止することで装置全体の高さを薄形化できる利点を有する。
【図面の簡単な説明】
【図1】第1の実施の形態を説明する平面図である。
【図2】第1の実施の形態を説明する断面図である。
【図3】従来例を説明する斜視図である。
【図4】従来例を説明する斜視図である。
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device in which a light-emitting element and a light-receiving element are individually sealed with resin, and particularly relates to a reduction in the thickness of the device.
[0002]
[Prior art]
Recently, multimedia devices such as sub-notebook computers, personal digital assistants, and electronic still cameras have made remarkable progress. Since these devices require portability, they are required to be easy to send and receive data to and from the outside, and have a device that connects the external device and the main body cordlessly using an optical signal such as infrared rays. There are many. Among them, the IrDA (Infrared Data Association) standard that uses infrared light having a wavelength of 870 nm as an optical signal is most popular.
[0003]
In order to use data communication based on the IrDA standard, it is necessary that both devices to be connected include a light emitting element that emits an infrared signal and a light receiving element that receives the infrared signal. The light emitting element and the light receiving element may be incorporated in the electronic device as separate packages, respectively, or may be supplied as a module housed in one package.
[0004]
FIG. 3 shows an example of a semiconductor device for infrared data communication in which a light emitting element and a light receiving element are housed in one package (for example, Japanese Patent Laid-Open No. 10-70304). In this apparatus, a light receiving element 2 and a light emitting element 3 provided in the form of a semiconductor chip are housed in the apparatus main body 1, and are molded with a resin that is transparent to at least infrared rays. In particular, in the light receiving element 2, a light receiving photodiode PD and a peripheral circuit such as an amplifier circuit may be integrated in the same chip.
[0005]
The photodiode PD of the light receiving element 2 provided in the semiconductor chip has a structure for receiving light in a direction perpendicular to the surface of the semiconductor chip. Therefore, both the light receiving element 2 and the light emitting element 3 are configured to emit / receive the optical signal 6 perpendicular to the semiconductor chip. A hemisphere is formed above each element for condensing the optical signal 6. The lenses 4 and 5 are made of resin.
[0006]
[Problems to be solved by the invention]
In order to meet the demand for reduction in size and size in electronic devices, it is indispensable to limit the height of the electronic component itself that is fixed on the printed circuit board. However, if the apparatus main body 1 of FIG. 3 is mounted so that the optical signal 6 is introduced in a direction perpendicular to the printed circuit board, the apparatus main body 1 is high due to the presence of the lenses 4 and 5 and the like, and the overall thickness is reduced. There were drawbacks that were difficult.
[0007]
On the other hand, as shown in FIG. 4, it is possible to introduce the optical signal 6 in the horizontal direction with respect to the printed circuit board 7 by bending the lead and placing the lenses 4 and 5 sideways. However, since the semiconductor chips of the light receiving element 2 and the light emitting element 3 are mounted so as to stand vertically, it is impossible in principle to make the height during mounting below the size of the semiconductor chip. There was a drawback that it was difficult to form.
[0008]
[Means for Solving the Problems]
The present invention has been made in view of the above-mentioned problems, and a semiconductor chip is fixed on an island, an electrode pad of the semiconductor chip and a lead terminal are connected by wire, and the semiconductor chip including a part of the lead terminal is made of resin. A semiconductor device that seals and leads the lead terminal to the outside from a side surface of the sealing body,
A groove having a predetermined depth in the sealing body above the semiconductor chip;
The lead terminal is led out from a side surface of the sealing body at a first height with respect to the position of the island;
A lead terminal extending to the inside of the sealing body has a portion extending at a second height located between the position of the island and the first height;
The wire is connected to a portion extending at the second height.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a first embodiment of the present invention will be described in detail with reference to the drawings. In this embodiment, the light receiving element 2 and the light emitting element 3 are housed in one package. FIG. 1A is a plan view showing the structure of the present invention, and FIG. 2A is a cross-sectional view taken along line AA in FIG. FIG. 2 and FIG. 2B are cross-sectional views taken along line BB in FIG.
[0010]
In these drawings, reference numeral 21 denotes an island on which the light receiving element 2 is mounted, 22 denotes an island on which the light emitting element 3 is mounted, and 23 denotes a lead terminal for external connection. These are provided by a lead frame made of an iron or copper-based material, and the light receiving element 2 and the light emitting element 3 are fixed to the surface of each island 21 and 22 with an adhesive such as solder.
[0011]
The light receiving element 2 is a PIN photodiode provided as a semiconductor chip, and may be one in which peripheral drive circuits and the like are integrated on the same chip. A reference symbol PD in the drawing indicates a photodiode portion (light receiving surface) of the light receiving element 2. Electrode pads 30 are formed on the surface of the semiconductor chip, and the electrode pads and leads 23 are connected by bonding wires 24.
[0012]
The light emitting element 3 is an LED chip that is provided as a semiconductor chip and emits infrared light having a wavelength of, for example, 870 nm. An LED is an element that emits light from the entire chip and emits light in all directions. For this reason, the island 22 to which the chip is fixed is processed into a shape like a conical “bowl”, and the optical signal 6 from the light emitting element 3 fixed to the center of the island 22 is reflected by the inclined side wall 22 a of the island 22. The light is collected in one direction. The island 22 becomes one terminal of an anode or a cathode, and the electrode pad 30 formed on the chip surface becomes the other terminal. The electrode pad 30 serving as the other terminal is connected to a predetermined lead terminal 23 by a bonding wire 24.
[0013]
The light emitting element 2 and the light receiving element 3 fixed to the islands 21 and 22 are transfer-molded with a resin transparent to at least infrared light including the tip of the lead 23. The resin constitutes the sealing body 25, and the back surfaces of the islands 21 and 22 are exposed on one surface of the sealing body 25 in the same plane as the surface of the sealing body 25.
[0014]
The lead terminal 23 is led to the outside at a first height (FIG. 2 (A): t1) with respect to the islands 21 and 22 from near the middle of one side surface 25a of the sealing body 25, and is suitable for surface mounting applications. Thus, it is bent into a Z shape. The lead terminal 23 extending inside the sealing body 25 extends to the vicinity of the islands 21 and 22 while maintaining the first height t1. A part of the lead terminal 23 is an island lead 23a, 23b continuous to the islands 21, 22, and these are subjected to a bending process for making a difference between the islands 21, 22 and the first height t1. The portion subjected to the bending process is sealed inside the sealing body 25.
[0015]
Further, some of the leads 23c are bent inside the sealing body 25, and the second height t2 located between the first height t1 and the islands 21 and 22 is provided. It is extended with.
[0016]
On the upper part of the photodiode portion PD of the light receiving element 2, a resin 26 of the sealing body 25 is recessed to a predetermined depth to form a recess 26, and a reflecting surface 27 is configured by the side wall of the recess 26. The reflective surface 27 is formed by forming a male part corresponding to the recess 26 in the mold when the sealing body 25 is transfer molded, or the surface of the sealing body 25 is shaved after completion. Is formed. The reflection surface 27 plays a role of reflecting the optical signal 6 introduced from the other side surface 25 b of the sealing body 25 to reach the photodiode portion PD of the light receiving element 2.
[0017]
The reflecting surface 27 becomes a reflecting surface due to the difference in the refractive index of the material at the boundary. Therefore, the entire sealing body 25 is processed with a matte finish, whereas the reflecting surface 27 has a mirror finish with a smaller surface roughness. Further, the surface of the reflecting surface 27 may be covered with a light-shielding metal film or the like in order to improve the reflectance.
[0018]
On the other hand, similarly to the light receiving element 2, a concave portion 26 and a reflecting surface 27 are formed on the light emitting element 3 side. The signal light 6 emitted from the light emitting element 3 is reflected by the reflection surface 27 and has a function of emitting the light from the other side wall 25b of the sealing body 25 to the outside.
[0019]
In this way, by allowing the optical signal 6 to enter and exit from the other side surface 25b of the sealing body 25 through the reflecting surface 27 formed by the concave portion 26, the overall height of the sealing body 25 can be kept low. A lens body that collects the optical signal 6 may be integrally molded with resin on the other side surface 25b.
[0020]
In the above-described semiconductor device, it is apparent that there are some restrictions because the light is reflected by the reflecting surface 27. One of the constraints is the position and depth of the recess 26. This is because it is necessary for the reflecting surface 27 to cover the entire surface of the photodiode part PD or the light emitting element 3 in plan view (observed as shown in FIG. 1) while maintaining a designed reflection angle. Naturally, the deepest portion 26 a of the recess 26 needs to be shifted to the side surface 25 a side from the photodiode PD or the light emitting element 3. Another limitation is the arrangement of the lead terminals 23. Since the optical signal 6 is incident / exited from the other side surface 25 b side of the sealing body 25, the lead terminals 23 for electrical connection of each semiconductor chip are concentrated on the one side surface 25 a side of the sealing body 25. It is easy to arrange. If the electrode pad 30 of the semiconductor chip is also arranged on the side surface 25a side, the loop length of the wire 24 can be shortened, which is convenient.
[0021]
Under such restrictions, when it is attempted to connect the electrode pad 30 and the lead terminal 23 with the bonding wire 24, the loop of the wire 24a may interfere with the deepest portion of the recess 26 as is apparent from FIG. . In particular, on the light emitting element 3 side, since the chip size of the semiconductor chip is relatively small and the electrode pad is often arranged near the center thereof, the electrode pad 30 is often located near the deepest portion of the recess 26. The interference is likely to occur. Further, when the electrode pad 30 is arranged near the deepest part of the recess 26 on the light receiving element 2 side, the same interference may occur.
[0022]
In the present invention, the portion 31 extending at the second height t2 is formed at the tip portion of the lead terminal 23, and the wire 24 is connected to the portion extending at the second height t2, so that the wire loop The interference between the wire 24 and the recess 26 is avoided by suppressing the height. The other non-interfering electrode pad 30 is connected to the lead terminal 23 having the first height t1 as shown in FIG. Of course, all the lead terminals 23 may be bent to have the second height t2.
[0023]
As described above, the semiconductor device of the present invention bends the transmission path of the optical signal 6 so that the optical signal 6 enters and exits from the side surface 25b of the sealing body 25 when the device is surface-mounted on a printed board. Thus, the height of the entire printed circuit board can be kept low, and the electronic equipment can be made thinner. At that time, the bending of the tip of the lead terminal 23 is bent to avoid interference between the recess 26 and the wire 24, thereby preventing the height of the entire semiconductor device from increasing.
[0024]
In addition, as an optical semiconductor device, in addition to the structure in which both the light receiving element 2 and the light emitting element 3 are sealed, a device in which either one is sealed may be used.
[0025]
【The invention's effect】
As described above, according to the present invention, by providing the reflecting surface 27 with the recess 26, there is an advantage that an optical semiconductor device capable of entering and exiting the optical signal 6 from the side surface 25b of the resin can be realized. Since this apparatus can reduce the overall height of the sealing body 25, it can realize a significant reduction in thickness when mounted on a printed circuit board.
[0026]
Furthermore, by providing a portion 31 extending at the second height t2 at the tip of the lead terminal 23c, the height of the wire loop can be suppressed, and interference between the bonding wire 24 and the deepest portion of the recess 26 can be avoided. Have advantages. In addition, there is an advantage that the height of the entire apparatus can be reduced by preventing interference.
[Brief description of the drawings]
FIG. 1 is a plan view for explaining a first embodiment;
FIG. 2 is a cross-sectional view illustrating a first embodiment.
FIG. 3 is a perspective view illustrating a conventional example.
FIG. 4 is a perspective view illustrating a conventional example.

Claims (1)

アイランド上に発光または受光用の半導体チップを固着し、前記半導体チップの電極パッドとリード端子とをワイヤ接続し、前記リード端子の一部を含めて前記半導体チップを樹脂封止し、該封止体の側面から前記リード端子を外部に導出した半導体装置であって、
前記半導体チップの上方の前記封止体に、光学的な反射面を有する所定の深さの凹部を有し、前記反射面で光信号を反射し前記封止体の側面から、または前記封止体の側面へ光学信号を伝達するものであり、
前記リード端子が前記アイランドの位置に対して第1の高さで前記封止体の側面から外部に導出され、
前記封止体の内部に延在するリード端子が、前記アイランドの位置と前記第1の高さとの中間に位置する第2の高さで延在する部分を有し、
前記ワイヤが前記第2の高さで延在する部分に接続されていることを特徴とする半導体装置。
A semiconductor chip for light emission or reception is fixed on the island, electrode pads of the semiconductor chip and lead terminals are connected by wire, the semiconductor chip including a part of the lead terminals is resin-sealed, and the sealing is performed. A semiconductor device in which the lead terminal is led out from the side of the body,
The sealing body above the semiconductor chip has a concave portion with a predetermined depth having an optical reflecting surface, and reflects an optical signal from the reflecting surface and from the side surface of the sealing body, or the sealing It transmits optical signals to the side of the body,
The lead terminal is led out from a side surface of the sealing body at a first height with respect to the position of the island;
A lead terminal extending to the inside of the sealing body has a portion extending at a second height located between the position of the island and the first height;
The semiconductor device, wherein the wire is connected to a portion extending at the second height.
JP24069998A 1998-08-26 1998-08-26 Semiconductor device Expired - Fee Related JP4159147B2 (en)

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