JP4098374B2 - Random number generator for gaming machines - Google Patents

Description

[0001]
[Industrial application fields]
The present invention, by matching the random number, about the random number generator of the gaming machine used to determine a winning time of operating conditions, or other operating conditions.
[0002]
[Prior art]
Some gaming machines, such as pachinko machines or slot machines, are configured to determine a hit / decision using a random number and control the operation.
[0003]
In such a conventional gaming machine, a random number generation program is written in a part of the game operation control program stored in the control unit, and if necessary, a random number is generated according to the program in the central processing unit, The control of the game operation is advanced using this random number.
[0004]
[Problems to be solved by the invention]
In the conventional gaming machine as described above, the random number generation program written in the ROM can be rewritten. Therefore, it is possible to increase the hit probability by rewriting the random number generation program. However, in gaming machines such as pachinko machines, it is determined that the probability of hitting should be a certain value or less, so it is desirable to prevent fraudulent acts such as tampering with a random number generation program that increases the probability of winning. .
[0005]
Further, since the capacity of the ROM is below a certain value, the capacity for writing the remaining game operation programs in the ROM is reduced as much as the random number generating program part is written in the ROM. Therefore, in order to make the program short enough to fit into this small ROM capacity, the game content cannot be complicated and interesting.
[0006]
In addition, if a random number is generated by a simple method in order to shorten the random number generation program, periodicity may appear in the random number depending on the processing time by the central processing unit, and the hit probability cannot be made constant. is there.
[0007]
Furthermore, when a random number generation program is written in a part of the game program, it takes time and effort because the entire program must be strictly verified to verify the random number.
[0008]
In consideration of the above facts, the present invention prevents the random number generation program from being tampered with, reduces the ratio of the central processing unit program occupied by the random number generation program, prevents the generated random numbers from being periodic, It is an object to obtain a random number generator for a gaming machine that facilitates the construction and verification of the game machine.
[0009]
[Means for Solving the Problems]
In the invention according to claim 1, the period of the pulse signal is changed by changing the voltage to be applied, the signal generating means for generating the pulse signal whose period has been changed, the counter for counting the pulse signal, A random number generator having an upper limit value setting register in which an upper limit value of the count value of the counter is written by a control device that controls the operation of the gaming machine, and a timing at which the control device takes in the count value counted by the counter A random number acquisition timing generation device for determining, wherein the count value of the counter is configured not to exceed the upper limit value written in the upper limit value setting register, and the count value is generated by the random number acquisition timing generation The random number generated by the random number generator by the control device at the timing determined by the device. Characterized in that it is read.
[0010]
The invention according to claim 2 is characterized in that the upper limit value of the count value read by the control device is written into the upper limit value setting register when the power is turned on. According to a third aspect of the present invention, the random number generator is provided with a lower limit value setting register in which a lower limit value of the count value of the counter stored in the control ROM read by the control device is written. The value is configured not to exceed the range from the lower limit value written in the lower limit value setting register to the upper limit value written in the upper limit value setting register .
[0011]
The invention according to claim 4 is characterized in that the upper limit value and the lower limit value of the count value read by the control device are written in the upper limit value setting register and the lower limit value setting register when the power is turned on.
[0013]
[Action]
In the invention according to claim 1, the control device writes the upper limit value of the count value of the counter in the upper limit value setting register. The signal generating means generates a pulse signal whose cycle is changed by changing the cycle of the pulse signal by changing the applied voltage . Then, the counter sequentially counts the pulse signal generated by the signal generating means up to the upper limit value. Then, the control device reads the count value of this counter as the random number generated by the random number generation unit at the timing determined by the random number acquisition timing generation device.
[0014]
In the invention of claim 2, the upper limit value of the count value read by the control device is written in the upper limit value setting register when the power is turned on. In the invention of claim 3, in addition to the upper limit value setting register, the random number generator is provided with a lower limit value setting register in which the lower limit value of the count value of the counter stored in the control ROM read by the control device is written. . The counter sequentially counts the pulse signals generated by the signal generating means between the lower limit value and the upper limit value written in the lower limit value setting register and the upper limit value setting register. Then, the control device reads the count value of this counter as the random number generated by the random number generation unit at the timing determined by the random number acquisition timing generation device.
[0015]
In the invention of claim 4 , the upper limit value and the lower limit value of the count value read by the control device are written in the upper limit value setting register and the lower limit value setting register when the power is turned on.
[0017]
【Example】
A first embodiment of a random number generator for a gaming machine according to the present invention will be described below with reference to FIGS.
[0018]
The random number generator of the present embodiment can be used in a pachinko machine 60 as shown in FIG. This pachinko machine 60 is provided with two display devices, a special symbol display device 64 and a normal symbol display device 66, and a winning opening 72 on a game board 62.
[0019]
When the special symbol display device 64 wins the starting port 68, the special symbol display device 64 collates with the random number generated by the random number generation device of the present embodiment and displays a winning or losing symbol.
[0020]
The random number generator according to this embodiment is configured as shown in FIG. 2, and a probability setting device 12 is connected to a central processing unit (CPU) 10 via a bus 11. The probability setting device 12 is used for setting a winning probability before the manager starts the game.
[0021]
Further, a control ROM 14 and a RAM 15 are connected to the central processing unit 10.
[0022]
As shown in FIG. 5, the control ROM 14 stores a random number setting area 16, a data area 18, and a game execution in which a lower limit value 3 and an upper limit value 222, a lower limit value 3 and an upper limit value 122,. A game execution control program area 20, an unused area 22, and a vector area 24 in which the control program is stored are provided. Then, the upper and lower limit values stored in advance in the random number setting area 16 in the control ROM 14 are selected and used according to probability information such as high probability or low probability set by the probability setting device 12.
[0023]
The central processing unit 10 is connected to a random number fetch timing generation device 26. This random number capture timing generator 26 is for determining a timing for referring to a random number, and is set to capture a random number that determines whether to hit or miss when a pachinko ball wins a start of a pachinko machine, for example. The
[0024]
Further, the central processing unit 10 is connected with a winning detection unit 27 for detecting that a winning is made at the starting port of the pachinko machine.
[0025]
Further, a random number generator 28 is connected to the central processing unit 10. As illustrated in FIG. 3, the random number generator 28 is configured using a free running counter 30. The free running counter 30 is connected to a clock generator (provided separately from the clock generator of the central processing unit 10) 32 that outputs a clock signal (clock pulse) as a pulse signal, and constitutes a coefficient circuit.
[0026]
Further, a lower limit setting register 34 is connected to the free running counter 30. The central processing unit 10 is connected to the lower limit value setting register 34, and the lower limit value set by the central processing unit 10 is input to the free running counter 30. It is determined.
[0027]
The output of the free running counter 30 is connected to one input terminal of the digital comparator 36, and the other input terminal of the digital comparator 36 is connected to the upper limit setting register 38. As the digital comparator 36, trade name TC74HC688 or the like can be used. The central processing unit 10 is connected to the upper limit value setting register 38, and the upper limit value set by the central processing unit 10 is input to the digital comparator 36. The output terminal of the digital comparator 36 is connected to the reset terminal of the free running counter 30. According to the random number generator 28, the output signal counted up by the free running counter 30 is sent to one input terminal of the digital comparator 36, where it is set by the upper limit value setting register 38 and input from the other terminal. The output signal of the digital comparator 36 is sent to the reset terminal of the free running counter 30 and the count of the free running counter 30 is reset to the lower limit value. The counting up operation is resumed.
[0028]
The signal obtained by repeatedly counting the number sequence between the lower limit value and the upper limit value by the free running counter 30 in this way is read into the central processing unit 10 at the fetch timing of the random number fetch timing generator 26.
[0029]
The central processing unit 10 may read the upper / lower limit values input to the upper / lower limit value setting registers 38, 34 and check whether the upper / lower limit values written are correct.
[0030]
Next, the operation of the first embodiment configured as described above will be described with reference to FIG. First, the process up to the previous stage of executing the gaming process of the gaming machine with the random number generation device of the first embodiment will be described with reference to the flowchart of FIG.
[0031]
First, when the random number generator is started, it is next determined in step 42 whether or not it is started by turning on the power. If it is not when the power is turned on, the process proceeds to a game process in step 52. When the process is started by turning on the power, a predetermined area of the RAM in the control device is set to an initial value by the initialization process in step 44.
[0032]
Next, in step 46, the probability information set in the probability setting device 12 is fetched. Next, the upper limit value and the lower limit value corresponding to the probability information captured in step 48 are read from the random number setting area 16 of the control ROM 14.
[0033]
Next, the upper limit value read in step 50 is set in the upper limit value setting register 38 and the lower limit value is set in the lower limit value setting register 34. Next, in step 52, a random number is generated based on the upper and lower limit values set as described above, and the game proceeds. When the game is over, it is determined in step 54 whether or not the power is turned off. If the power is not turned off, the process returns to step 42. When the power is turned off, the operation is terminated.
[0034]
In the above-described embodiment, the case where the upper limit value setting register 38 and the lower limit value setting register 34 are used together has been described. However, only one of them may be configured. For example, when the free running counter 30 starts counting from 0, the free running counter 30 may repeatedly count a number sequence between the upper limit set by the upper limit setting register 38 and 0. Therefore, the lower limit setting register 34 can be omitted as shown in FIG. When the upper limit value that the free running counter 30 counts up is determined, the free running counter 30 repeatedly counts the sequence between the lower limit value set by the lower limit value setting register 34 and the upper limit value. Therefore, the upper limit setting register 38 can be omitted. The free running counter 30 may not only count up as described above but also count down.
[0035]
Also, the central processing unit 10 and the random number generation unit 28 Yes constructed separately and run with separate clock generator 32, using a VCO (voltage-controlled oscillator) as a clock generator 32 of the random number generator 28, the By changing the voltage of the VCO at random to change the cycle of the pulse signal, that is, by changing the cycle of the pulse signal at random, the generation state of the numerical value counted by the free running counter 30 corresponds to the cycle of fluctuation of the pulse signal. It may be configured to vary . Further, a function generator may be connected to the free running counter 30 so that each pulse signal periodically generated from the clock generator 32 is counted corresponding to the function.
[0036]
Further, the means for changing the period of the pulse signal described above and a function generator may be combined so as to generate a numerical value that changes more randomly. By configuring as described above, it is possible to make the numerical value generated by the random number generation unit 28 random and not generate periodicity.
[0037]
Next, a second embodiment of the present invention will be described with reference to FIGS. In the second embodiment, the game machine is controlled using two types of random numbers. In other words, the second embodiment is used in the pachinko machine 60 shown in FIG. 1, and this special symbol display device 64 is shown in the flowcharts of FIGS. As described above, the random number value taken in at step 96 is stored at step 110, and at step 128, the winning value is compared with the winning value set on the program or displayed. When the normal symbol display device 66 wins the normal symbol display device operation gate 70, the normal symbol display device 66 stores in step 122 the random number value acquired in step 96 as shown in the flowcharts of FIGS. The control unit controls the display so as to collate with the hit value set on the program or to display a missed symbol.
[0038]
The control device having these two types of random number functions is configured as illustrated in FIG. That is, two random number generators 28A and 28B are connected to the central processing unit 10. One random number generator 28A includes an upper limit setting register 38A, a free running counter 30A, a comparator 36A, a lower limit setting register 34A, and a clock generator 32. Further, the other random number generator 28B includes an upper limit value setting register 38B, a free running counter 30B, a comparator 36B, a lower limit value setting register B, and a clock generator 31 provided separately from the clock generator 32. The random number generators 28A and 28B have the same configuration as that shown in FIG. 3, and a detailed description thereof will be omitted. The central processing unit is connected to a control ROM 14 via a bus 72, a probability setting device 12 in which a high probability and a low probability are set, a random number fetch timing generation device 26, a winning detection unit 27, and a RAM 74. The
[0039]
Further, as shown in FIG. 8, the random number setting area 16 of the control ROM 14 has a lower limit value 3 and an upper limit value 222 for determination per ordinary symbol (low probability), and a lower limit value 3 for determination per special symbol (high probability). And the value of the upper limit 12 is written.
[0040]
Next, the operation of the second embodiment configured as described above will be described with reference to FIGS. First, the main routine in the control operation of the two random number generators of the second embodiment will be described with reference to FIG.
[0041]
When the power is turned on, based on the probability set in the probability setting device 12 in step 82, the upper limit value 12 and the lower limit value 3 of the random numbers for determination per special symbol written in the ROM 14 are read. Then, the upper limit value 12 and lower limit 3 of the special symbols per determination random number thus read out is set upper limit value setting register 38A, the lower limit value setting register 34 A for determining per special symbol. At the same time, the upper limit value 222 and the lower limit value 3 of the random number for determining per ordinary symbol are read out and set in the upper limit setting register 38B and the lower limit setting register 34B for determining per ordinary symbol.
[0042]
Next, in step 84, it is repeatedly determined whether the power is off. If the power is off, the control operation is terminated.
[0043]
Next, interrupt processing during the above-described control operation will be described with reference to FIGS. This interruption process is repeatedly executed every predetermined time, for example, every 4 msec. First, at step 90, it is determined whether or not the operation is the first operation since the power is turned on. When the operation is the first operation, the operation proceeds to step 92, and the RAM 74 and the like are set to initial values.
[0044]
After the first predetermined time has elapsed, the interrupt process is executed again. Next, when it is determined in step 90 that the operation is not the first operation, the process proceeds to step 96. In step 96, one random number for determination per special symbol specified by the random number generation unit 28A for determining special symbols is read from the free running counter 30A and written in the RAM 74. At the same time, one random number for normal symbol determination specified at that time is read from the free running counter 30B from the normal symbol determination random number generator 28B and written to the RAM 74.
[0045]
Next, in step 98, an output process for causing each electric device on the game board 62 to perform a predetermined operation and a timer process are executed.
[0046]
Next, in step 100, it is determined whether the electric device on the game board 62 is operating normally. If the electric device is not operating normally due to a ball jam or the like, the process proceeds to step 102 and an error is displayed. Thereby, the control operation is interrupted until the cause of the error is resolved. If it is determined that the operation is normal, the process proceeds to step 104 to perform a prize check for the special symbol determination start opening, and in step 106, the winning detection unit 27 detects that the start opening 68 has been won. If it is determined, step 108 follows. In step 108, it is determined whether or not the starting memory for storing the number of balls won in the starting port 68 is 4 or less.
[0047]
In step 110, when the pachinko ball wins the start opening 68 is detected by the random number capturing timing generator 26, and in the step 96, the central processing unit 10 reads one random number from the free running counter 30A as a winning random number. The random value written in the RAM 74 is stored in the area of the RAM 74 corresponding to the start memory.
[0048]
Next, in step 112, 1 is added to the starting memory, and the process proceeds to step 116.
On the other hand, if it is determined in step 106 that the start opening has not been won, the process proceeds to step 132.
[0049]
When the start memory is 4 or more at step 108, the process proceeds to the next step 114, the start memory is set to 4, and the process proceeds to step 116.
[0050]
Next, in step 116, it is checked whether or not the normal symbol operating gate has been won, and the process proceeds to step 118, where it is determined whether or not the winning detection unit 27 has detected that the operating gate 70 has been won. If it is determined that winning has been detected, the process proceeds to step 120. In step 120, it is determined whether the starting memory storing the number of balls won in the operating gate 70 is 4 or less.
[0051]
In step 122, when the pachinko ball wins the operating gate 70, the random number capturing timing generation device 26 detects the winning timing , and in step 96, the central processing unit 10 reads one random number from the free running counter 30B as a winning random number in step 96. The random value written in the RAM 74 is stored in the area of the RAM 74 corresponding to the winning memory.
[0052]
Next, in step 124, 1 is added to the starting memory, and the process proceeds to step 128.
When the start memory is 4 or more at step 120, the process proceeds to the next step 126, the start memory is set to 4, and the process proceeds to step 128.
[0053]
In step 128, special symbol control processing is performed. That is, first, the random number for determination per special symbol fetched in step 96 is stored in the winning memory of the RAM 74 in step 110, and the value is compared with the winning value on the program. However, if they do not match, it is determined that they are off. In the case of winning, after rotating the symbol of the special symbol display device 64, the rotation is stopped so that the winning symbol is displayed, and a predetermined hitting operation for opening the winning opening 72 is executed. In the case of detachment, after the symbol of the special symbol display device 64 is rotated, the rotation is stopped so that the detachment symbol is displayed, and the process proceeds to step 130.
[0054]
In step 130, normal symbol control processing is performed. That is, first, the random number for determining the normal symbol fetched in step 96 is stored in the winning memory of the RAM 74 in step 122, and the value is compared with the winning value in the program. In case of disagreement, it is determined that it is off. In the case of winning, after rotating the symbol of the normal symbol display device 66, the rotation is stopped so that the winning symbol is displayed, and a predetermined hitting operation for opening the winning opening 72 is executed. In the case of detachment, after the symbol of the normal symbol display device 66 is rotated, the rotation is stopped so that the detachment symbol is displayed, and the process proceeds to step 132.
[0055]
Further, when it is determined in step 118 that the operating gate 70 has not been won, the process proceeds to step 132.
[0056]
Next, in step 132, various operation processes are performed. That is, display processing of lamps in each part of the pachinko machine, dynamic display processing using LEDs, external information processing, liquid crystal display processing, prize ball payout, and sound processing are executed, and the process returns to the main routine.
[0057]
Since the configuration, operation, and effects of the second embodiment other than those described above are the same as those of the first embodiment described above, description thereof will be omitted.
[0058]
In addition, you may make it provide a random number generation part and three or more upper and lower limit values. One-time ROM is built in the upper limit value register and lower limit value register, regular data is written to the factory default value, and the data itself is used as the upper limit value and lower limit value. The probability setting value in the random number setting area 16, the upper limit value, and the lower limit value You may make it compare with. In this way, the central processing unit simply reads the upper / lower limit value data from the upper / lower limit setting registers 38 and 34, and cannot write the data from the central processing unit 10, so that the program cannot be altered.
[0059]
【The invention's effect】
Since the present invention is configured as described above, in the first aspect of the invention, the timing at which the counter counts the pulse signal is different from the timing at which the count value is taken in, and the count value is read as a random number so that a random number can be generated.
[0060]
Furthermore, since the random number generator uses a counter with an independent configuration that cannot be tampered with from the outside, it is possible to prevent the hit probability from being illegally changed. At the same time, since the program of the control device is not used for random number generation, this program can be fully used for controlling the game operation, and it is not necessary to incorporate a process for random number generation into the program. Easy to do. Also, when verifying the winning probability, it is only necessary to look at the upper limit and lower limit information of the setting means, so that the verification work can be facilitated.
[0061]
According to the second aspect of the present invention, it is possible to prevent the hit probability from being illegally changed in advance. In the invention of claim 3, even when the probability of winning is verified, it is only necessary to see the upper limit value and lower limit value information of the setting means, so that the verification work can be facilitated.
[0062]
In the invention of claim 4, it is possible to prevent the hit probability from being illegally changed in advance.
[Brief description of the drawings]
FIG. 1 is a main part front view illustrating a pachinko machine that can use a control device of the present invention.
FIG. 2 is a schematic configuration explanatory diagram showing a control device portion according to the first embodiment of the present invention;
FIG. 3 is a schematic configuration explanatory diagram illustrating an internal configuration of the random number generation unit of FIG. 2 taken out.
4 is a schematic configuration explanatory diagram illustrating an internal configuration in which a lower limit value setting register is omitted from the random number generation unit of FIG. 3;
FIG. 5 is an explanatory diagram showing a storage area of the control ROM of FIG. 2;
FIG. 6 is a flowchart illustrating a main part of a control operation according to the control device of the first embodiment of the present invention.
FIG. 7 is a schematic configuration explanatory diagram showing a control device portion according to a second embodiment of the present invention.
8 is an explanatory diagram showing a storage area of the control ROM of FIG. 7;
FIG. 9 is a flowchart for illustrating a control operation of the control device according to the second embodiment of the present invention;
FIG. 10 is a flowchart for illustrating a control operation of the control device according to the second embodiment of the present invention.
FIG. 11 is a flowchart for illustrating the control operation of the control device according to the second embodiment of the present invention;
[Explanation of symbols]
10 Central processing unit 12 Probability setting unit 14 Control ROM
26 random number acquisition timing generator 28 random number generator 30 free running counter 32 clock generator (signal generating means)
34 Lower limit setting register (setting means)
36 Digital comparator 38 Upper limit setting register (setting means)

Claims (4)

The period of the pulse signal is changed by changing the voltage to be applied, the signal generating means for generating the pulse signal whose period has been changed, the counter for counting the pulse signal, and the control for controlling the operation of the gaming machine A random number generator having an upper limit value setting register in which an upper limit value of the count value of the counter is written by the device;
A random number capture timing generator for determining the timing at which the control device captures the count value counted by the counter;
With
The count value of the counter is configured not to exceed the upper limit value written in the upper limit value setting register, and the count value is determined by the control device at a timing determined by the random number acquisition timing generation device. A random number generator for a gaming machine, which is read as a random number generated by the random number generator.   2. The random number generator for a gaming machine according to claim 1, wherein the upper limit value of the count value read by the control device is written in the upper limit value setting register when power is turned on.   The random number generator is provided with a lower limit value setting register in which a lower limit value of the counter value is written by the control device, and the count value of the counter is changed from the lower limit value written in the lower limit value setting register to the upper limit value. 3. The random number generator for a gaming machine according to claim 1, wherein the random number generator is configured so as not to exceed a range up to an upper limit value written in the value setting register.   4. The random number generator for a gaming machine according to claim 3, wherein the upper limit value and the lower limit value of the count value read by the control device are written in the upper limit value setting register and the lower limit value setting register when power is turned on.

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