JP4085665B2 - Capacitor mounting structure - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a capacitor mounting structure.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, a device using a three-terminal capacitor as a bypass capacitor is known as one of noise countermeasures for electronic devices, particularly digital devices. When the current flowing through the through electrode is small, the heat generated by the equivalent series resistance (ESR) of the three-terminal capacitor is not a problem. However, when the current flowing through the through electrode is large, a problem due to heat generation occurs. In order to solve such problems, conventionally, the equivalent series resistance of the through electrode has been reduced as much as possible by increasing the thickness of the through electrode.
[0003]
Further, as disclosed in Japanese Patent Laid-Open No. 6-349678, there is known a technique in which a short-circuited conductive path is connected in parallel with a three-terminal capacitor and a signal current (DC current) is caused to flow through the short-circuited conductive path. As shown in FIGS. 7 and 8, the three-terminal capacitor 1 is provided with a first external terminal 3 and a second external terminal 4 at both ends of the ceramic body 2, respectively. Internal electrodes 7A and 7B and a through electrode 6 are provided. Each internal electrode 7A, 7B is electrically connected to third external terminals 5A, 5B provided on both side surfaces of the ceramic body 2, and the through electrode 6 electrically connects the first external terminal 3 and the second external terminal 4 to each other. Connected.
[0004]
The three-terminal capacitor 1 is generally mounted with solder or the like on a circuit board 30 as shown in FIG. On the surface of the circuit board 30, hot-side lines (hot-side electrodes) 31, 32 to which the first external terminal 3 and the second external terminal 4 of the three-terminal capacitor 1 are electrically connected, respectively, and a third external terminal 5A , 5B are respectively connected to ground lines (ground electrodes) G11, G12. The hot side lines 31 and 32 are short-circuited by a short-circuit conductive path 35. The short circuit path 35 is configured such that the equivalent series resistance is smaller than that of the through electrode 6.
[0005]
[Problems to be solved by the invention]
However, in the capacitor mounting structure as shown in FIG. 7, the signal current (DC current) flows through the hot side line 31 -the first external terminal 3 -the short circuit conductive path 35 -the second external terminal 4 -the hot side line 32. . The short-circuited conductive path 35 has a resistance value because the line width is limited. Therefore, a potential difference is generated between the first external terminal 3 and the second external terminal 4, and the signal current passes through the through electrode 6 of the three-terminal capacitor 1. As a result, heat was generated by the equivalent series resistance of the through electrode 6, and only a signal current of several amperes could flow.
[0006]
Accordingly, an object of the present invention is to provide a capacitor mounting structure capable of reducing the heat generation of the capacitor regardless of the signal current.
[0007]
[Means and Actions for Solving the Problems]
In order to achieve the above object, a capacitor mounting structure according to the present invention includes a chip body, a through electrode provided inside the chip body, an internal electrode provided to face the through electrode, and a chip. A first external terminal and a second external terminal provided on both end faces of the element body and electrically connected to the through electrode, and a third external terminal provided on the side surface of the chip element body and electrically connected to the internal electrode. A capacitor mounting structure in which a capacitor having an external terminal is mounted on a circuit board having a hot side electrode and a ground side electrode, wherein the first external terminal and the second external terminal are electrically connected to the hot side electrode. The third external terminal is electrically connected to the ground side electrode, and the hot side electrode and the ground side electrode are stacked in different layers inside the circuit board. .
[0008]
With the above configuration, since the first external terminal and the second external terminal are electrically connected to the wide area hot side electrode and have the same potential, the signal current (DC current) almost flows through the through electrode of the capacitor. Absent. That is, substantially only the noise current (high-frequency current) flows to the through electrode of the capacitor. Since the signal current flows through the hot-side electrode having a large area, there is no current value limitation as in the conventional hot-side line in which the line width is limited.
[0009]
Furthermore, the hot side electrode is provided on at least one of the inside and the back surface of the circuit board, and the capacitor provided on the surface of the circuit board is connected to the capacitor via the electrical connection means provided inside the circuit board. By electrically connecting the first external terminal and the second external terminal, the hot-side electrode of the circuit board can be provided in a layer different from the ground-side electrode, and a hot area electrode having a wider area can be obtained. . Examples of the electrical connection means include a via hole and a through hole.
[0010]
The capacitor mounting structure according to the present invention includes a chip element body, a through electrode provided inside the chip element body, an internal electrode provided to face the through electrode, and both end faces of the chip element body. Each of the first external terminal and the second external terminal electrically connected to the through electrode, and a third external terminal provided on the side surface of the chip body and electrically connected to the internal electrode. A capacitor mounting structure in which a capacitor is mounted on a circuit board having a hot-side electrode and a ground-side electrode, wherein the width of the side surface of the chip body is wider than the width of the end surface of the chip body, The first external terminal and the second external terminal are electrically connected to the electrode, respectively, and the third external terminal is electrically connected to the hot side electrode.
[0011]
With the above configuration, since the side surface of the chip body is wider than the end surface, a wide third external terminal can be formed. Therefore, even if not only noise current but also signal current slightly flows through the internal electrode connected to the third external terminal, the equivalent series resistance can be reduced, so that heat generation can be prevented.
[0012]
In the case of the conventional mounting structure in which the ground-side electrode is connected to the third external terminal on the side surface of the chip body, if the ground-side electrode is formed to be wide, the first external terminal and the second external terminal on both end surfaces are formed. In order to prevent the contact with the terminal, a lead-out land is required for the ground side electrode. However, with the above-described configuration according to the present invention, even if the ground-side electrode connected to the first external terminal and the second external terminal is formed wide, it does not contact the third external terminal. Does not require land. Therefore, the equivalent series inductance (ESL) generated in the lead-out land can be eliminated, and a low ESL capacitor mounting structure can be realized.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of a capacitor mounting structure according to the present invention will be described below with reference to the accompanying drawings.
[0014]
[First Embodiment, FIGS. 1 to 4]
FIG. 1 is a cross-sectional view showing an embodiment of a capacitor mounting structure, and FIG. 2 is a schematic exploded perspective view thereof. The multilayer capacitor 1 and the IC 40 are mounted on the surface of the circuit board 30 with solder or the like. The multilayer capacitor 1 is the same as the so-called three-terminal capacitor shown in FIGS. That is, the first external terminal 3 and the second external terminal 4 are provided on both end surfaces of a rectangular parallelepiped ceramic element (chip element) 2 made of a dielectric resin or a composite material, and a plurality of elements are provided inside the ceramic element 2. Internal electrodes 7A, 7B and a through electrode 6 are provided. Each internal electrode 7A, 7B is electrically connected to third external terminals 5A, 5B provided on both side surfaces of the ceramic body 2, and the through electrode 6 electrically connects the first external terminal 3 and the second external terminal 4 to each other. Connected.
[0015]
Connection lands 10 and 11 to which the first external terminal 3 and the second external terminal 4 of the capacitor 1 are electrically connected and the third external terminals 5A and 5B are electrically connected to the surface of the circuit board 30, respectively. The connection lands G1 and G2, the connection land 22 to which the external terminal 41 of the IC 40 is electrically connected, and the connection land 23 to which the external terminal 42 is electrically connected are formed.
[0016]
Inside the circuit board 30, a large-area hot-side plane (hot-side electrode) 20 and a ground-side plane G (ground-side electrode) are stacked in different layers. Thereby, the hot side plane 20 can be made as wide as possible. The ground plane G is electrically connected to the connection lands G1, G2, and 23 via via holes 12c, 12d, and 12f provided in the circuit board 30. The hot side plane 20 is electrically connected to the connection lands 10, 11, and 22 through via holes 12 a, 12 b, and 12 e provided in the circuit board 30. The via holes 12 a, 12 b, and 12 e are prevented from being short-circuited with the ground plane G by inserting the large-diameter hole 15 provided in the ground plane G.
[0017]
Note that the hot-side plane 20 is not necessarily disposed inside the circuit board 30 and may be provided on the back surface of the circuit board 30. In this case, the electrical connection with the connection lands 10, 11 and 22 is performed through the through holes.
[0018]
FIG. 3 is an electrical equivalent circuit diagram of the mounting structure of the capacitor 1. The capacitor 1 is connected to the hot side plane 20 in parallel. The first external terminal 3 and the second external terminal 4 of the capacitor 1 are short-circuited through a large area hot side plane 20, and the external terminals 3 and 4 are substantially equidistant from the hot side plane 20. Accordingly, the first external terminal 3 and the second external terminal 4 are at the same potential (the hot side plane 20 has substantially no direction of signal current). Therefore, the signal current (DC current) hardly flows through the through electrode 6 of the capacitor 1. That is, only noise current (high-frequency current) flows through the through electrode 6 of the capacitor 1. Since the signal current flows through the large-area hot-side plane 20 having a low equivalent series resistance, the current value limitation of several amperes is eliminated as in the conventional hot-side line in which the line width is limited. As a result, a capacitor mounting structure capable of flowing a signal current of several tens of amperes is obtained.
[0019]
Note that the mounting structure of the first embodiment in which the capacitor 1 having a three-terminal structure is mounted like a two-terminal capacitor has a slightly equivalent series inductance (ESL) of the capacitor as compared with a normal three-terminal capacitor mounting structure. It will rise. Therefore, as shown in FIG. 4, the insertion loss characteristic (see solid line A1) of the first embodiment is slightly deteriorated as compared with the insertion loss characteristic (see dotted line A3) of the normally mounted three-terminal capacitor. However, the equivalent series inductance of the capacitor 1 of the first embodiment is 1/20 to 1/30 of the residual inductance of a general two-terminal capacitor, and the insertion loss characteristic is much better than the two-terminal capacitor.
[0020]
[Second Embodiment, FIGS. 5 and 6]
FIG. 5 is a perspective view showing another embodiment of the capacitor mounting structure. The multilayer capacitor 1 is mounted on the surface of the circuit board 30 with solder or the like.
[0021]
The multilayer capacitor 1 is the same as the so-called ordinary three-terminal capacitor shown in FIGS. As shown in FIG. 6, this capacitor 1 includes a protective ceramic dielectric sheet 51, ceramic dielectric sheets 52 and 54 provided with internal electrodes 7A and 7B, a ceramic dielectric sheet 53 provided with through electrodes 6, and the like. After being stacked, they are integrally fired to form a rectangular parallelepiped ceramic body (chip body) 2. The respective lead portions 55a and 55b of the internal electrodes 7A and 7B are electrically connected to the third external terminals 5A and 5B. In addition, one lead portion 56 a of the through electrode 6 is electrically connected to the first external terminal 3, and the other lead portion 56 b is electrically connected to the second external terminal 4.
[0022]
On the surface of the circuit board 30, there are one hot-side line (hot-side electrode) 25 to which the third external terminals 5 </ b> A and 5 </ b> B of the capacitor 1 are electrically connected, and the first external terminal 3 and the second external terminal 4. Ground patterns (ground side electrodes) G3 and G4 that are electrically connected to each other are formed. The ground-side patterns G3 and G4 are substantially parallel to the length L direction of the ceramic body 2 with the hot-side line 25 therebetween, and have a width W along the width W direction of both end faces of the ceramic body 2. It is stretched and arranged so as to be larger than the dimension. Accordingly, the ground patterns G3 and G4 can be widened while ensuring an insulation distance from the hot line 25. The capacitor 1 is mounted on the hot side line 25 so as to be symmetrical with respect to the hot side line 25. That is, the normal three-terminal capacitor 1 is arranged with its vertical and horizontal directions reversed (rotated by 90 degrees).
[0023]
With the above configuration, approximately half of the noise current flows through the internal electrode 7A-through electrode 6-first external terminal 3, and the rest flows through the internal electrode 7B-through electrode 6-second external terminal 4. Therefore, two capacitor portions having a small equivalent series inductance are formed in the capacitor 1. Further, since the capacitor 1 is arranged on the hot side line 25 so as to be symmetric with respect to the hot side line 25, as shown in FIG. 6, the through electrode 6 has a noise direct current I1 having substantially the same size. , I2 flows in opposite directions. As a result, the magnetic fields generated by the noise currents I1 and I2 cancel each other.
[0024]
As a result, the equivalent series inductance generated in the capacitor 1 is suppressed to 1/3, and the number of capacitors to be mounted can be reduced. FIG. 4 shows the insertion loss characteristic (see alternate long and short dash line A2) of the second embodiment.
[0025]
[Other Embodiments]
The capacitor mounting structure according to the present invention is not limited to the above-described embodiment, and can be variously modified within the scope of the gist thereof. For example, the third external terminals 5A and 5B connected to the capacitor ground of the embodiment are formed separately on the back side surface and the front side surface so as to wrap around the central body of the capacitor. One external terminal having a circular shape formed may be used. Further, the first and second external terminals may be formed with folded portions not only on both end surfaces of the chip body but also on the side surfaces.
[0026]
【The invention's effect】
As apparent from the above description, according to the present invention, since the first external terminal and the second external terminal are electrically connected to the large area hot side electrode and have the same potential, the signal current is the capacitor. Almost no flow through the through electrode. That is, substantially only the noise current flows through the through electrode of the capacitor. Since the signal current flows through the hot-side electrode having a large area, there is no current value limitation as in the conventional hot-side line in which the line width is limited. As a result, even when a signal current of, for example, several tens of amperes is applied, heat generation is prevented and a capacitor mounting structure without a voltage drop is obtained.
[0027]
In addition, according to the present invention, the first external terminal and the second external terminal are electrically connected to the ground side electrode, and the third external terminal is electrically connected to the hot side electrode, whereby the chip body By utilizing the fact that the side surface is wider than the end surface, a wide third external terminal can be formed. Therefore, even if not only noise current but also signal current slightly flows through the internal electrode connected to the third external terminal, the equivalent series resistance can be reduced, so that heat generation can be prevented.
[0028]
In the case of the conventional mounting structure in which the ground-side electrode is connected to the third external terminal on the side surface of the chip body, if the ground-side electrode is formed to be wide, the first external terminal and the second external terminal on both end surfaces are formed. In order to prevent the contact with the terminal, a lead-out land is required for the ground side electrode. However, according to the configuration of the present invention, even if the ground side electrode connected to the first external terminal and the second external terminal is formed wide, it does not contact the third external terminal, so a lead land is necessary. And not. Therefore, the equivalent series inductance (ESL) generated in the lead-out land can be eliminated, and a low ESL capacitor mounting structure can be realized.
[Brief description of the drawings]
FIG. 1 is a vertical sectional view showing a first embodiment of a capacitor mounting structure according to the present invention.
FIG. 2 is a schematic exploded perspective view of the capacitor mounting structure shown in FIG. 1;
3 is an electrical equivalent circuit diagram of the capacitor mounting structure shown in FIG. 1. FIG.
FIG. 4 is a graph showing insertion loss characteristics.
FIG. 5 is a perspective view showing a second embodiment of a capacitor mounting structure according to the present invention.
6 is an exploded perspective view of the capacitor shown in FIG. 5. FIG.
FIG. 7 is a perspective view showing a conventional capacitor mounting structure;
8 is a vertical sectional view of the capacitor shown in FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Capacitor 2 ... Ceramic body 3 ... 1st external terminal 4 ... 2nd external terminal 5A, 5B ... 3rd external terminal 6 ... Through-electrode 7A, 7B ... Internal electrode 12a-12d ... Via hole (electrical connection means)
20 ... Hot side plane (hot side electrode)
25 ... Hot side track (hot side electrode)
30 ... Circuit board G ... Ground side plane (Ground side electrode)
G3, G4 ... Ground side pattern (Ground side electrode)

Claims (5)

A chip body, a through electrode provided inside the chip body, an internal electrode provided to face the through electrode, and both end surfaces of the chip body, A capacitor having a first external terminal and a second external terminal electrically connected, and a third external terminal provided on a side surface of the chip body and electrically connected to the internal electrode, And a capacitor mounting structure that is mounted on a circuit board having a ground side electrode,
The first external terminal and the second external terminal are electrically connected to the hot side electrode to have the same potential, and the third external terminal is electrically connected to the ground side electrode ,
The capacitor mounting structure, wherein the hot-side electrode and the ground-side electrode are stacked on different layers inside the circuit board .   The hot side electrode is provided on at least one of the inside and the back surface of the circuit board, and the capacitor provided on the front surface of the circuit board is electrically connected to the inside of the circuit board. 2. The capacitor mounting structure according to claim 1, wherein the capacitor mounting structure is electrically connected to the first external terminal and the second external terminal of the capacitor through means.   3. The capacitor mounting structure according to claim 1, wherein a signal current does not substantially flow through the through electrode of the capacitor and a noise current substantially flows. 4. A chip element body, a through electrode provided inside the chip element body, an internal electrode provided so as to face the through electrode, and both end surfaces of the chip element body, A capacitor having a first external terminal and a second external terminal electrically connected, and a third external terminal provided on a side surface of the chip body and electrically connected to the internal electrode, And a capacitor mounting structure that is mounted on a circuit board having a ground side electrode,
The width of the side surface of the chip body is wider than the width of the end surface of the chip body,
A capacitor mounting structure, wherein the first external terminal and the second external terminal are electrically connected to the ground side electrode, respectively, and the third external terminal is electrically connected to the hot side electrode.   The ground side electrode is provided on both sides of the hot side electrode, and is extended along the width direction of the end face of the chip body so as to be larger than the dimension in the width direction, and the first external terminal and 5. The capacitor mounting structure according to claim 4, wherein the second external terminals are electrically connected to each other.

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