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JP4046827B2 - Planar coil and planar transformer - Google Patents

Planar coil and planar transformer Download PDF

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Publication number
JP4046827B2
JP4046827B2 JP00385398A JP385398A JP4046827B2 JP 4046827 B2 JP4046827 B2 JP 4046827B2 JP 00385398 A JP00385398 A JP 00385398A JP 385398 A JP385398 A JP 385398A JP 4046827 B2 JP4046827 B2 JP 4046827B2
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coil
planar
thickness
conductor
width
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JPH11204337A (en
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隆 楫野
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TDK Corp
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TDK Corp
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Priority to US09/228,971 priority patent/US6600404B1/en
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Description

【0001】
【発明の属する技術分野】
本発明は、平面コイル及び平面トランス、特に10W以下の小さいパワーで作動する平面コイル及び平面トランスに関するものである。
【0002】
【従来の技術】
平面コイルは、デジタルオーディオディスクの二軸アクチエータや人工衛星などの電源用又は信号用として広く用いられている。
ところで、最近、平面コイルの精密部品用としての需要が高まるに従い、幅が細く、かつ厚さの大きい、いわゆるハイアスペクト導体パターンを狭い間隔で複数個並列的に形成させたものが要求されるようになってきた。これまで、このような平面コイルは、絶縁基板上に、導体薄膜を被着し、その上にネガ型ホトレジスト層を施し、常法に従いレジストパターンを形成させたのち、エッチング処理して、導体薄膜の露出部分を食刻し、次いでレジストパターンを除去することによって製造されている。
【0003】
しかしながら、このようにして得られる平面コイルは、導体薄膜のエッチングに際し、エッチング液がレジストパターンで被覆されている部分にも入り込み、その部分の導体までも溶解除去してしまう結果、残存する導体の断面が台形となり、コイルパターン間の間隔が大幅に増大したものになるのを免れない。
【0004】
このような欠点を改善するために、前記の絶縁基板と導体薄膜との電気抵抗の差を利用して、導体薄膜へ選択的に厚いめっきを施す方法が提案されたが(特開昭58−12315号公報)、めっき下地膜が薄く、特にスパイラルパターンを形成する場合などに下地の配線抵抗が増大し、めっき電流を大きくすることができない上、めっきの成長速度に異方性がないため導体パターンの厚さを大きくすることができない。
【0005】
そのほか、絶縁基板全面に金属薄膜を設け、この上に厚いレジストパターンを形成させたのち、パターンめっきでハイアスペクト導体を形成させ、レジストを除去したのち、イオンミリングなどのドライエッチングで、線間の金属薄膜を除去する方法なども知られているが、レジストの厚さは、せいぜい50μmが限度であるので、導体パターンの厚さとしては、40μm程度が得られるにすぎない。
このように従来の平面コイルは、コイル導体の層厚自体を厚くすることが困難である上、エッチングにより導体パターンを形成するので、コイル導体を構成する各線条間の間隔はコイル導体の層厚の2倍程度が限度であるため、コイル導体部の空間的な意味での占積率が低く、直流抵抗が大きくなるのを免れず、良好な電気特性を得ることができない。
【0006】
【発明が解決しようとする課題】
本発明は、コイル導体の層厚を大きくするとともに、コイル導体を構成する各線条の間隔を狭くして、小型で直流抵抗の小さい高性能平面コイル及びそれを用いた高性能トランスを提供することを目的としてなされたものである。
【0007】
【課題を解決するための手段】
本発明者は、高性能平面コイルを得るために、鋭意研究を重ねた結果、コイル導体の各線条を異方性成長させて、マッシュルーム状断面に形成することにより、コイル導体の高さを50μm以上に、かつ各線条間の間隔を20μm以下で形成させうること、したがって、見掛け上の占積率を増大して電気特性を向上させうることを見出し、この知見に基づいて本発明をなすに至った。
【0008】
すなわち、本発明は、絶縁基板の片面又は両面に厚さ50〜400μmの複数のコイル導体線条をギャップ部のアスペクト比(H/G)1以上で設け、かつ所望によりその表面が金属めっき薄膜層で被覆されている平面コイルにおいて、該コイル導体線条がマッシュルーム状断面を有し、その断面の頭部の幅(L)が首部の幅(l)の2〜5倍、頭部の高さ(H)の0.5〜1.5及び各コイル導体線条間の最小間隔(G)の4〜10倍であることを特徴とする平面コイル、及びその平面コイルを、絶縁性フィルムを介して複数個積層し、全体を薄型強磁性体コアで挟着して構成された平面トランスを提供するものである。
なお、ここでマッシュルーム状断面とは、図1に示されるように、ひさし部分が大きく膨出し、脚部すなわち首部が細く短かい形状を意味する。
【0009】
【発明の実施の形態】
次に、添付図面に従って、本発明をさらに詳細に説明する。
図1は、本発明の平面コイルの部分断面拡大図であって、絶縁基板1の上に金属薄膜層2を介してコイル導体線条3,3′,3″…が並列的に設けられている。この各線条は頭部4と首部5からなるマッシュルーム状断面を有し、その頭部の幅(L)は首部の幅(l)2〜5倍、頭部の高さ(H)0.5〜1.5倍、各コイル導体線条間の最小間隔(G)4〜10倍であることが必要である。
【0010】
図2は、本発明の平面コイルを製造する方法の1例であって、先ず円板状絶縁基板1上にスルーホール7を穿設し、次いで該基板上に金属めっき薄膜層2を設け、さらにホトレジストパターン層6を形成した構造体を形成する(イ)。
次に、上記の金属めっき薄膜層2が露出している部分を中心として、好ましくはこれと同じ金属を光沢電気めっきすることにより、マッシュルーム状断面をもつ線条3,3′,3″…を並列的に形成させる(ロ)。
次いで、残存してるレジストを剥離したのち(ハ)、選択的なエッチング処理を施して、各線条間の金属めっき薄膜層のみを除去する(ニ)。
この場合、所望ならば、ハイアスペクトめっきの後で、保護用金属をめっきして、コイル導体線条の表面を被覆する。
【0011】
このように、ホトレジスト層が除去され、コイルパターン状に金属めっき薄膜層が露出した部分を中心に光沢電気めっきを行う場合、めっき条件を適切にすれば、高さ方向の成長速度が幅方向の成長速度に比べて大きくなり、めっき部分が膨成して1回の処理でもマッシュルーム状の、直流抵抗の小さいコイル導体線条が形成される。
【0012】
この際のめっき条件は、めっき浴の組成、めっき槽の形状、浴の撹拌条件に依存するが、予備的試験を繰り返すことにより容易に最適条件を選定することができる。この際の電流密度については、限界電流密度の70%以上で異方性成長を行わせる。
【0013】
また、この際のコイル導体の各線条の首部の幅は、まずレジストパターン上の露出している金属薄膜の幅をレジストの解像度及びコイル導体を形成したときの強度を考慮して最小に選び、このパターンでのめっき条件を検討して、もっともアスペクト比の大きい条件に設定し、所定の膜厚まで成長させたのち、各線条間の間隔の最小値を測定し、これに設計値を減じた値だけレジストパターン上の露出している金属薄膜の幅を増加することによって調整する。
【0014】
なお、この際のめっき浴としては、抵抗の低い金属の光沢めっき浴であればよく、特に制限はないが、無光沢めっき浴の場合は、コイル導体の線条間の間隔が狭くなると線条間でショートするので用いることはできない。
【0015】
本発明の平面コイルにおいて、アスペクト比の大きいものが得られる理由としては次のことが考えられる。すなわち、スルーホールめっきにおいて、孔のアスペクト比が大きい場合は孔内の膜厚が外部の膜厚より小さくなり、この傾向はアスペクト比が大きいほど顕著になるが、本発明において、コイル導体パターンを光沢めっきにより形成する場合も、これと類似した現像が起り、最初の間はめっきが等方的に成長するが、膜厚が大きくなるに従って、溝部のアスペクトが大きくなり異方的な成長が行われ、頭部を形成することにより、次第にこの傾向が助長されてアスペクト比が益々増大する。
図3は、本発明の平面コイルの1例を示す平面図であって、この図においては、コイルパターンが円形スパイラル状に形成されているが、このコイルパターンの形状としては、これ以外に角形スパイラル状、折れ線状など従来の平面コイルで用いられている任意の形状をとることができる。
このようにして得た平面コイルは、薄型強磁性体コアに挟着して用いることもできる。この薄型強磁性体コアとしては、例えば厚さ1.2mmのNiZn系フェライトなどが用いられる。
【0016】
次に、本発明の平面コイルを絶縁性フィルムを介して複数個積層し、全体を薄型強磁性体コアで挟着すれば、非常に電気特性の優れた平面トランスを得ることができる。
この際の絶縁性フィルムとしては、厚さ0.05mmのポリエステルフィルムのようなプラスチックフィルムが適当であり、薄型強磁性体コアとしては前記したものと同じものを用いることができる。
【0017】
【実施例】
次に実施例により本発明をさらに詳細に説明する。
【0018】
実施例1
3インチ基板に284個のコイルを製造するため、以下の処理を行った。すなわちアンクラッドFR4基板(厚さ100μm)の所定の位置に、直径0.2mmのスルーホールを開け、無電解銅めっき液でその両面に1μmの厚さの銅層を形成した。
その上にポジ型ホトレジストを乾燥膜厚で5μmになるようにスピンコートした。
次いで、スルーホール周囲のレジストを除去すると同時に、コイル部を形成するために、レジストパターン幅90μm、レジストパターン間隔(露出する導体の線幅)20μmのパターンをホトリソグラフィー法により形成した。ここでスルーホールは両面の銅層の接続のために用いている。コイル部となるレジスト除去部のパターンは円形スパイラル状で、最内周の半径は0.9mmで巻数は11.5回である。
これを光沢硫酸銅めっき浴でめっきした。めっき液の硫酸銅の濃度は70g/lであり、液温度は25℃である。小孔の開いているパイプをカソードの付近に設置して、ここからめっき液を20mm/秒で噴出させ、電流密度2.5A/dm2で膜厚が150μmになるまでめっきした。このときの導体間隔は10μmであった。
次に、レジストを剥離し、下地銅膜をイオンミリングでエッチングしてコイル導体部を形成したのち、単一の平面コイルにカットした。このようにして得た284個の平面コイルは、それぞれ外形寸法が3.1×3.1×0.4mmであり、コイル導体層の厚さ(H)が150μm、コイル導体線条間の間隔(G)が10μm、頭部の幅(L)が100μm、首部の幅(l)が20μm、L/l比が5、L/H比が0.67、L/G比が5であった。また、このものの電気特性は、直流抵抗0.1Ω、インダクタンス値0.37μHであった。
比較のために、同じパターンのコイルを通常のプリント配線板の製法によって、36μmの銅箔を両面に貼った100μm厚のFR4基板を用いて作成した。ファインパターンであるために、歩留まりは大幅に減少したが、良品の電気的特性を測定すると、直流抵抗1.1Ω、インダクタンス値0.37μHであった。なお、外形寸法は3.1×3.1×0.2mmである。
このことから、本発明の平面コイルは、通常のプリント配線板の製法で作成したものに比べて直流抵抗を1/10以下にできることが分かる。
【0019】
比較例
実施例1で導体の断面形状の首の幅が頭の幅と同じコイルをパターンめっき法により形成した。すなわち、実施例1と同じ手法で同一基板上に下地銅膜を形成し、コイル導体線条のギャップ位置に厚さ35μm、幅10μmのレジストパターンを形成し、これに実施例と同一条件で厚さ30μmのめっきを施した。これを5回繰り返し、レジストを剥離してイオンミリングで導体間の下地銅膜をエッチングして、実施例1で首の幅が頭の幅と同じ断面形状のコイルを片面に形成した。この時の基板の反りは1.2mmであった。一方、実施例1と同じ手法で片面のみにコイルを形成し、基板の反りを測定すると0.25mmであった。首を細くすることで基板の反り量が1/5に減少しているのが分かる。
【0020】
実施例2
実施例1で用いたものと同じアンクラッドFR4基板の所定の位置に、直径0.2mmのスルーホールを設け、無電解銅めっき液でその両面に1μmの厚さの銅層を形成した。
その上にポジ型ホトレジストを乾燥膜厚で5μmになるようにスピンコートし、レジストパターン幅110μm、レジストパターン間隔(露出する導体の線幅)20μmのパターンをホトリソグラフィー法により形成した。ここでスルーホールは両面の銅層の接続のために用いている。コイル部となるレジスト除去部のパターンは円形スパイラル状で、最内周の半径は0.9mmで巻数は11.5回である。
これを光沢硫酸銅めっき浴でめっきした。めっき液の硫酸銅の濃度は70g/lであり、液温度は25℃である。小孔の開いているパイプをカソードの付近に設置して、ここからめっき液を20mm/秒で噴出させ、電流密度2.5A/dm2で膜厚が200μmになるまでめっきした。このときの導体間隔は10μmであった。実施例1に比べて、頭部の長さ(L)が10μm長くなっているので、導体高さが大きく取れる。
次に、レジストを剥離し、下地銅膜をイオンミリングでエッチングしてコイル導体部を形成したのち、単一の平面コイルにカットした。このようにして得た284個の平面コイルは、それぞれ外形寸法が3.1×3.1×0.4mmであり、コイル導体層の厚さ(H)が200μm、コイル導体線条間の間隔(G)が10μm、頭部の幅(L)が100μm、首部の幅(l)が20μm、L/l比が5、L/H比が0.5、L/G比が10であった。また、このものの電気特性は、直流抵抗0.06Ω、インダクタンス値0.36μHであった。
比較のために、同じパターンのコイルを通常のプリント配線板の製法によって、36μmの銅箔を両面に貼った100μm厚のFR4基板を用いて作成した。ファインパターンであるために、歩留まりは大幅に減少したが、良品の電気的特性を測定すると、直流抵抗0.9Ω、インダクタンス値0.37μHであった。なお、外形寸法は3.1×3.1×0.2mmである。
このことから、本発明の平面コイルは、通常のプリント配線板の製法で作成したものに比べて直流抵抗を1/10以下にできることが分かる。
【0021】
実施例3
実施例1で用いたものと同じアンクラッドFR4基板の所定の位置に、直径0.2mmのスルーホールを設け、無電解銅めっき液でその両面に1μmの厚さの銅層を形成した。
その上にポジ型ホトレジストを乾燥膜厚で5μmになるようにスピンコートし、レジストパターン幅90μm、レジストパターン間隔(露出する導体の線幅)20μmのパターンをホトリソグラフィー法により形成した。ここでスルーホールは両面の銅層の接続のために用いている。コイル部となるレジスト除去部のパターンは円形スパイラル状で、最内周の半径は0.9mmで巻数は11.5回である。
これを光沢高速硫酸銅めっき浴でめっきした。めっき液の硫酸銅の濃度は110g/lであり、液温度は35℃である。小孔の開いているパイプをカソードの付近に設置して、ここからめっき液を50mm/秒で噴出させ、電流密度9A/dm2で膜厚が150μmになるまでめっきした。このときの導体間隔は10μmであった。
次に、レジストを剥離し、下地銅膜をイオンミリングでエッチングしてコイル導体部を形成した。このようにして得た平面コイルは、外形寸法が3.1×3.1×0.4mmであり、コイル導体層の厚さ(H)が150μm、コイル導体線条間の間隔(G)が10μm、頭部の幅(L)が100μm、首部の幅(l)が20μm、L/l比が5、L/H比が0.67、L/G比が5であった。また、このものの電気特性は、直流抵抗0.1Ω、インダクタンス値0.37μHであった。
比較のために、同じパターンのコイルを通常のプリント配線板の製法によって、36μmの銅箔を両面に貼った100μm厚のFR4基板を用いて作成した。ファインパターンであるために、歩留まりは大幅に減少したが、良品の電気的特性を測定すると、直流抵抗1.1Ω、インダクタンス値0.37μHであった。なお、外形寸法は3.1×3.1×0.2mmである。
このことから、本発明の平面コイルは、通常のプリント配線板の製法で作成したものに比べて直流抵抗を1/10以下にできることが分かる。
【0022】
実施例4
直径3インチ、厚さ350μm、比透磁率800のNiZn系フェライト基板に、無電解銅めっき液でその両面に1μmの厚さの銅層を形成した。
その上にポジ型ホトレジストを乾燥膜厚で5μmになるようにスピンコートし、レジストパターン幅90μm、レジストパターン間隔(露出する導体の線幅)20μmのパターンをホトリソグラフィー法により形成した。コイル部となるレジスト除去部のパターンは円形スパイラル状で、最内周の半径は0.9mmで巻数は5.75回である。
これを光沢硫酸銅めっき浴でめっきした。めっき液の硫酸銅の濃度を70g/l、液温度を25℃として、実施例1と同様にして、電流密度2.5A/dm2で膜厚が150μmになるまでめっきした。このときの導体間隔は10μmであった。
次に、レジストを剥離し、下地銅膜をイオンミリングでエッチングしてコイル導体部を形成した。さらにこの上にカーテンコート法で感光性エポキシ樹脂をギャップ部も含めて塗布し、仮硬化後、所定の位置に、慣用のホトリソグラフィー法によりコンタクトホールを形成し、本硬化した。次いで前記の感光性エポキシ樹脂を絶縁基板として、前記と同じ方法を繰り返し、第二のコイル層を形成し積層平面コイル集合体を製造した。この集合体を分割して得た1個の平面コイルは、外形寸法が3.1×3.1×0.7mmであり、コイル導体層の厚さ(H)が150μm、コイル導体線条間の間隔(G)が10μm、頭部の幅(L)が100μm、首部の幅(l)が20μm、L/l比が5、L/H比が0.67、L/G比が5であった。また、このものの電気特性は、直流抵抗0.1Ω、インダクタンス値0.6μHであった。このものは、実施例1の平面コイルに比べてインダクタンス値が約50%増加している。
【0023】
実施例5
直径3インチ、厚さ300μmのNiZn系複合フェライト基板(フェライト粉末70容量%及びエポキシ樹脂30容量%)に、無電解銅めっき液で1μmの厚さの銅層を形成した。
その上にポジ型ホトレジストを乾燥膜厚で5μmになるようにスピンコートし、レジストパターン幅90μm、レジストパターン間隔(露出する導体の線幅)20μmのパターンをホトリソグラフィー法により形成した。コイル部となるレジスト除去部のパターンは円形スパイラル状で、最内周の半径は0.9mmで巻数は5.75回である。
これを光沢硫酸銅めっき浴でめっきした。めっき液の硫酸銅の濃度を70g/l、液温度を25℃として、実施例1と同様にして、電流密度2.5A/dm2で膜厚が150μmになるまでめっきした。このときの導体間隔は10μmであった。
次に、レジストを剥離し、下地銅膜をイオンミリングでエッチングしてコイル導体部を形成した。さらにこの上にカーテンコート法で感光性エポキシ樹脂をギャップ部も含めて塗布し、仮硬化後、所定の位置に、慣用のホトリソグラフィー法によりコンタクトホールを形成し、本硬化した。次いで前記の感光性エポキシ樹脂を絶縁基板として、前記と同じ方法を繰り返し、第二のコイル層を形成し積層平面コイル集合体を製造した。この集合体を分割して得た1個の平面コイルは、外形寸法が3.1×3.1×0.6mmであり、コイル導体層の厚さ(H)が150μm、コイル導体線条間の間隔(G)が10μm、頭部の幅(L)が100μm、首部の幅(l)が20μm、L/l比が5、L/H比が0.67、L/G比が10であった。また、このものの電気特性は、直流抵抗0.1Ω、インダクタンス値0.48μHであった。このものは、実施例1の平面コイルに比べてインダクタンス値が約30%増加している。
【0024】
実施例6
実施例1で作成したコイルの中央部に穿孔し、外形寸法が3.2×3.2×1.3mmのNiZn系EI型フェライトコアで挟着し、平面コイルを形成した。この時のインダクタンス値は11μHであり、インダクタンス値が約30倍に増大している。
【0025】
実施例7
実施例1で用いたものと同じアンクラッドFR4基板の所定の位置に、直径0.2mmのスルーホールを設け、無電解銅めっき液でその両面に1μmの厚さの銅層を形成した。
その上にポジ型ホトレジストを乾燥膜厚で5μmになるようにスピンコートし、レジストパターン幅200μm、レジストパターン間隔(露出する導体の線幅)20μmのパターンをホトリソグラフィー法により形成した。ここでスルーホールは両面の銅層の接続のために用いている。コイル部となるレジスト除去部のパターンは円形スパイラル状で、最内周の半径は0.9mmで巻数は6回である。
これを光沢硫酸銅めっき浴でめっきした。めっき液の硫酸銅の濃度を70g/l、液温度を25℃として、液撹拌はカソードロックを3mm/秒の速さでストローク100mm、電流密度2.5A/dm2で膜厚が150μmになるまでめっきした。このときの導体間隔は10μmであった。
次に、レジストを剥離し、下地銅膜をイオンミリングでエッチングしてコイル導体部を形成した。外形寸法は3.1×3.1×0.4mmであり、電気特性は、直流抵抗0.05Ωであった。
これを絶縁性フィルムを介して実施例1で得た平面コイルの中央部を穿孔してから積層し、全体を外形寸法3.2×3.2×1.7mmのNiZn系EI型フェライトコアで挟着して、平面トランスを形成した。結合係数は、周波数500kHzで測定して0.95であった。
【0026】
参考例
コイル導体線条の頭部の幅(L)が110μmのもの(A)と170μmのもの(B)について、導体線条の間隔(G)を10μmとして同定してめっきを行い、(L−l)/2、すなわちマッシュルーム断面のひさしの長さを変えて、導体の厚さ(H)の変化を測定し、その結果をグラフとして図4に示す。なお、このグラフには参考のために等方成長の場合の結果をCとして示した。
このことより、オーバーハング部のひさしの長さを大きくすることで、横方向へのめっきの成長速度が抑制される結果、導体間隔を一定にしたままで、導体の厚さを大きくすることができ、直流抵抗の小さい平面コイルが得られることが分かる。
また、ひさしの長さを大きくするほど導体の厚さを大きくしうることが分かる。
【0027】
【発明の効果】
本発明の平面コイルは、コイル導体線条間の間隔を小さくしたまま、導体の厚さを大きくすることができるので、直流抵抗を小さくすることができ、これを用いて平面トランスを構成すると、特に10W以下の小パワーにおいて優れた電気特性を示すものになるという利点がある。
【図面の簡単な説明】
【図1】 本発明の平面コイルの部分断面図。
【図2】 本発明の平面コイルを製造する方法の1例の工程図。
【図3】 本発明の平面コイルの形状の1例を示す平面図。
【図4】 本発明の平面コイルにおけるひさし長さと導体高さとの関係を示すグラフ。
【符号の説明】
1 絶縁基板
2 金属薄膜層
3,3′,3″ コイル導体線条
6 ホトレジストパターン層
7 スルーホール
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a planar coil and a planar transformer, and more particularly to a planar coil and a planar transformer that operate with a small power of 10 W or less.
[0002]
[Prior art]
The planar coil is widely used for a power source or a signal for a two-axis actuator of a digital audio disk or an artificial satellite.
By the way, recently, as the demand for precision components of planar coils increases, it is expected that a plurality of so-called high aspect conductor patterns having a narrow width and a large thickness are formed in parallel at narrow intervals. It has become. Until now, such a planar coil has been obtained by depositing a conductive thin film on an insulating substrate, applying a negative photoresist layer thereon, forming a resist pattern in accordance with a conventional method, and then etching the conductive thin film. Are etched, and then the resist pattern is removed.
[0003]
However, in the planar coil obtained in this way, when etching the conductor thin film, the etching solution enters the portion covered with the resist pattern and dissolves and removes the conductor of the portion as a result. It is inevitable that the cross section becomes a trapezoid and the interval between the coil patterns is greatly increased.
[0004]
In order to improve such a defect, a method of selectively plating a conductive thin film using the difference in electrical resistance between the insulating substrate and the conductive thin film has been proposed (Japanese Patent Laid-Open No. 58-86). No. 12315), the plating base film is thin, especially when a spiral pattern is formed, the wiring resistance of the base increases, the plating current cannot be increased, and there is no anisotropy in the growth rate of the plating. The pattern thickness cannot be increased.
[0005]
In addition, a metal thin film is provided on the entire surface of the insulating substrate, a thick resist pattern is formed on the insulating substrate, a high aspect conductor is formed by pattern plating, the resist is removed, and then dry etching such as ion milling is used to remove the gap between the lines. Although a method for removing a metal thin film is also known, the thickness of the resist is limited to 50 μm at the maximum, so that the thickness of the conductor pattern is only about 40 μm.
As described above, in the conventional planar coil, it is difficult to increase the thickness of the coil conductor itself, and a conductor pattern is formed by etching. Therefore, the interval between the filaments constituting the coil conductor is determined by the layer thickness of the coil conductor. Therefore, the space factor in the spatial sense of the coil conductor portion is low, the direct current resistance is inevitably increased, and good electrical characteristics cannot be obtained.
[0006]
[Problems to be solved by the invention]
The present invention provides a high-performance planar coil having a small DC resistance and a high-performance transformer using the same by increasing the layer thickness of the coil conductor and narrowing the interval between the wires constituting the coil conductor. It was made for the purpose.
[0007]
[Means for Solving the Problems]
As a result of intensive research in order to obtain a high-performance planar coil, the present inventor has grown each filament of the coil conductor anisotropically and formed it in a mushroom-like cross section, so that the height of the coil conductor is 50 μm. As described above, it has been found that the interval between the filaments can be formed at 20 μm or less, and therefore the apparent space factor can be increased to improve the electrical characteristics, and the present invention is made based on this finding. It came.
[0008]
That is, according to the present invention, a plurality of coil conductor wires having a thickness of 50 to 400 μm are provided on one surface or both surfaces of an insulating substrate with an aspect ratio (H / G) of 1 or more of the gap portion, and the surface is optionally a metal-plated thin film. In a planar coil covered with a layer, the coil conductor wire has a mushroom-shaped cross section, the width (L) of the head of the cross section is 2 to 5 times the width (l) of the neck, and the height of the head The planar coil, which is 0.5 to 1.5 times the length (H) and 4 to 10 times the minimum distance (G) between the coil conductor wires, and the planar coil, an insulating film A planar transformer is provided which is formed by stacking a plurality of layers and sandwiching the whole with a thin ferromagnetic core.
Here, the mushroom-shaped cross section means a shape in which the eaves portion bulges greatly and the leg portion, that is, the neck portion is narrow and short, as shown in FIG.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Next, the present invention will be described in more detail with reference to the accompanying drawings.
FIG. 1 is an enlarged partial cross-sectional view of a planar coil according to the present invention, in which coil conductor wires 3, 3 ', 3 "... are provided in parallel on an insulating substrate 1 with a metal thin film layer 2 interposed therebetween. Each of the filaments has a mushroom-shaped cross section composed of a head 4 and a neck 5, and the width (L) of the head is 2 to 5 times the width (l) of the neck and the height (H) of the head. 0.5 to 1.5 times, it is necessary that 4 to 10 times the minimum distance (G) between the coil conductor filament.
[0010]
FIG. 2 shows an example of a method for producing a planar coil according to the present invention. First, a through hole 7 is formed on a disk-shaped insulating substrate 1, and then a metal-plated thin film layer 2 is provided on the substrate. Further, a structure in which the photoresist pattern layer 6 is formed is formed (a).
Next, centering on the portion where the metal plating thin film layer 2 is exposed, the same metal as this is preferably subjected to bright electroplating, thereby forming the strips 3, 3 ', 3 "... having a mushroom-like cross section. Form them in parallel (b).
Next, after removing the remaining resist (c), a selective etching process is performed to remove only the metal plating thin film layer between the filaments (d).
In this case, if desired, after the high aspect plating, a protective metal is plated to cover the surface of the coil conductor wire.
[0011]
As described above, when performing bright electroplating around a portion where the photoresist layer is removed and the metal plating thin film layer is exposed in a coil pattern, if the plating conditions are appropriate, the growth rate in the height direction is increased in the width direction. As compared with the growth rate, the plating portion expands, and a mushroom-like coil conductor wire having a low direct current resistance is formed even in a single treatment.
[0012]
The plating conditions at this time depend on the composition of the plating bath, the shape of the plating tank, and the stirring conditions of the bath, but the optimum conditions can be easily selected by repeating preliminary tests. As for the current density at this time, anisotropic growth is performed at 70% or more of the limit current density.
[0013]
In addition, the width of the neck portion of each line of the coil conductor at this time is first selected to be the minimum width of the exposed metal thin film on the resist pattern in consideration of the resolution of the resist and the strength when the coil conductor is formed, We examined the plating conditions in this pattern, set the conditions with the largest aspect ratio, grown to the prescribed film thickness, measured the minimum value of the spacing between each line, and reduced the design value to this The value is adjusted by increasing the width of the exposed metal thin film on the resist pattern.
[0014]
In this case, the plating bath is not particularly limited as long as it is a bright plating bath with a low resistance metal. However, in the case of a matte plating bath, if the spacing between the strips of the coil conductor is narrow, It cannot be used because it is short-circuited.
[0015]
The reason why the planar coil of the present invention has a large aspect ratio can be considered as follows. That is, in through-hole plating, when the aspect ratio of the hole is large, the film thickness in the hole is smaller than the external film thickness, and this tendency becomes more prominent as the aspect ratio increases. In the case of forming by bright plating, similar development occurs, and the plating grows isotropically at the beginning. However, as the film thickness increases, the groove aspect increases and anisotropic growth occurs. However, by forming the head, this tendency is gradually promoted and the aspect ratio increases more and more.
FIG. 3 is a plan view showing an example of a planar coil according to the present invention. In this figure, the coil pattern is formed in a circular spiral shape. Any shape used in a conventional planar coil, such as a spiral shape or a polygonal line shape, can be used.
The planar coil thus obtained can also be used by being sandwiched between thin ferromagnetic cores. As this thin ferromagnetic core, for example, a NiZn ferrite having a thickness of 1.2 mm is used.
[0016]
Next, if a plurality of planar coils of the present invention are laminated via an insulating film and the whole is sandwiched between thin ferromagnetic cores, a planar transformer having very excellent electrical characteristics can be obtained.
As the insulating film at this time, a plastic film such as a polyester film having a thickness of 0.05 mm is suitable, and the same thin film as described above can be used as the thin ferromagnetic core.
[0017]
【Example】
Next, the present invention will be described in more detail with reference to examples.
[0018]
Example 1
In order to manufacture 284 coils on a 3-inch substrate, the following processing was performed. That is, a through hole having a diameter of 0.2 mm was formed at a predetermined position of an unclad FR4 substrate (thickness: 100 μm), and a copper layer having a thickness of 1 μm was formed on both sides thereof with an electroless copper plating solution.
On top of this, a positive photoresist was spin-coated so as to have a dry film thickness of 5 μm.
Next, at the same time as removing the resist around the through hole, a pattern having a resist pattern width of 90 μm and a resist pattern interval (line width of exposed conductor) of 20 μm was formed by photolithography in order to form a coil portion. Here, the through hole is used to connect the copper layers on both sides. The pattern of the resist removal portion that becomes the coil portion is a circular spiral, the radius of the innermost circumference is 0.9 mm, and the number of turns is 11.5.
This was plated with a bright copper sulfate plating bath. The concentration of copper sulfate in the plating solution is 70 g / l, and the solution temperature is 25 ° C. A pipe with a small hole was installed in the vicinity of the cathode, from which a plating solution was ejected at 20 mm / second, and plating was performed at a current density of 2.5 A / dm 2 until the film thickness reached 150 μm. The conductor interval at this time was 10 μm.
Next, the resist was peeled off, the base copper film was etched by ion milling to form a coil conductor portion, and then cut into a single planar coil. The 284 planar coils thus obtained each have an outer dimension of 3.1 × 3.1 × 0.4 mm, the thickness (H) of the coil conductor layer is 150 μm, and the spacing between the coil conductor wires. (G) was 10 μm, head width (L) was 100 μm, neck width (l) was 20 μm, L / l ratio was 5, L / H ratio was 0.67, and L / G ratio was 5. . The electrical characteristics of this product were a direct current resistance of 0.1Ω and an inductance value of 0.37 μH.
For comparison, a coil having the same pattern was prepared by a normal printed wiring board manufacturing method using a FR4 substrate having a thickness of 36 μm and a 36 μm copper foil pasted on both sides. Although the yield was greatly reduced due to the fine pattern, the electrical characteristics of the non-defective product were measured to have a DC resistance of 1.1Ω and an inductance value of 0.37 μH. The external dimensions are 3.1 × 3.1 × 0.2 mm.
From this, it can be seen that the planar coil of the present invention can reduce the direct current resistance to 1/10 or less as compared with that produced by the ordinary method for producing a printed wiring board.
[0019]
In Comparative Example 1, a coil in which the width of the neck of the cross-sectional shape of the conductor was the same as the width of the head was formed by pattern plating. That is, a base copper film is formed on the same substrate by the same method as in Example 1, and a resist pattern having a thickness of 35 μm and a width of 10 μm is formed in the gap position of the coil conductor wire, and the thickness is increased under the same conditions as in the Example. A thickness of 30 μm was applied. This was repeated 5 times, the resist was peeled off, and the underlying copper film between the conductors was etched by ion milling. In Example 1, a coil having a cross-sectional shape with the same neck width as the head width was formed on one side. The warpage of the substrate at this time was 1.2 mm. On the other hand, when the coil was formed only on one side by the same method as in Example 1 and the warpage of the substrate was measured, it was 0.25 mm. It can be seen that the amount of warpage of the substrate is reduced to 1/5 by narrowing the neck.
[0020]
Example 2
A through hole having a diameter of 0.2 mm was provided at a predetermined position on the same unclad FR4 substrate as used in Example 1, and a copper layer having a thickness of 1 μm was formed on both sides thereof with an electroless copper plating solution.
A positive photoresist was spin-coated thereon so as to have a dry film thickness of 5 μm, and a pattern having a resist pattern width of 110 μm and a resist pattern interval (line width of exposed conductor) of 20 μm was formed by a photolithography method. Here, the through hole is used to connect the copper layers on both sides. The pattern of the resist removal portion that becomes the coil portion is a circular spiral, the radius of the innermost circumference is 0.9 mm, and the number of turns is 11.5.
This was plated with a bright copper sulfate plating bath. The concentration of copper sulfate in the plating solution is 70 g / l, and the solution temperature is 25 ° C. A pipe with a small hole was installed in the vicinity of the cathode, from which a plating solution was ejected at 20 mm / second, and plating was carried out at a current density of 2.5 A / dm 2 until the film thickness reached 200 μm. The conductor interval at this time was 10 μm. Compared with Example 1, the length (L) of the head is 10 μm longer, so that the conductor height can be increased.
Next, the resist was peeled off, the base copper film was etched by ion milling to form a coil conductor portion, and then cut into a single planar coil. The 284 planar coils thus obtained each have an outer dimension of 3.1 × 3.1 × 0.4 mm, the thickness (H) of the coil conductor layer is 200 μm, and the spacing between the coil conductor wires. (G) was 10 μm, head width (L) was 100 μm, neck width (l) was 20 μm, L / l ratio was 5, L / H ratio was 0.5, and L / G ratio was 10. . The electrical characteristics of this product were a DC resistance of 0.06Ω and an inductance value of 0.36 μH.
For comparison, a coil having the same pattern was prepared by a normal printed wiring board manufacturing method using a FR4 substrate having a thickness of 36 μm and a 36 μm copper foil pasted on both sides. Although the yield was greatly reduced due to the fine pattern, the electrical characteristics of the non-defective product were measured to have a DC resistance of 0.9Ω and an inductance value of 0.37 μH. The external dimensions are 3.1 × 3.1 × 0.2 mm.
From this, it can be seen that the planar coil of the present invention can reduce the direct current resistance to 1/10 or less as compared with that produced by the ordinary method for producing a printed wiring board.
[0021]
Example 3
A through hole having a diameter of 0.2 mm was provided at a predetermined position on the same unclad FR4 substrate as used in Example 1, and a copper layer having a thickness of 1 μm was formed on both sides thereof with an electroless copper plating solution.
A positive photoresist was spin-coated thereon so as to have a dry film thickness of 5 μm, and a pattern having a resist pattern width of 90 μm and a resist pattern interval (line width of exposed conductor) of 20 μm was formed by a photolithography method. Here, the through hole is used to connect the copper layers on both sides. The pattern of the resist removal portion that becomes the coil portion is a circular spiral, the radius of the innermost circumference is 0.9 mm, and the number of turns is 11.5.
This was plated with a bright high-speed copper sulfate plating bath. The concentration of copper sulfate in the plating solution is 110 g / l, and the solution temperature is 35 ° C. A pipe with a small hole was installed in the vicinity of the cathode, from which a plating solution was ejected at 50 mm / second, and plating was performed at a current density of 9 A / dm 2 until the film thickness reached 150 μm. The conductor interval at this time was 10 μm.
Next, the resist was peeled off, and the base copper film was etched by ion milling to form a coil conductor portion. The planar coil thus obtained has an outer dimension of 3.1 × 3.1 × 0.4 mm, a thickness (H) of the coil conductor layer of 150 μm, and an interval (G) between the coil conductor wires. The head width (L) was 10 μm, the neck width (l) was 20 μm, the L / l ratio was 5, the L / H ratio was 0.67, and the L / G ratio was 5. The electrical characteristics of this product were a direct current resistance of 0.1Ω and an inductance value of 0.37 μH.
For comparison, a coil having the same pattern was prepared by a normal printed wiring board manufacturing method using a FR4 substrate having a thickness of 36 μm and a 36 μm copper foil pasted on both sides. Although the yield was greatly reduced due to the fine pattern, the electrical characteristics of the non-defective product were measured to have a DC resistance of 1.1Ω and an inductance value of 0.37 μH. The external dimensions are 3.1 × 3.1 × 0.2 mm.
From this, it can be seen that the planar coil of the present invention can reduce the direct current resistance to 1/10 or less as compared with that produced by the ordinary method for producing a printed wiring board.
[0022]
Example 4
On a NiZn ferrite substrate having a diameter of 3 inches, a thickness of 350 μm, and a relative magnetic permeability of 800, a copper layer having a thickness of 1 μm was formed on both sides with an electroless copper plating solution.
A positive photoresist was spin-coated thereon so as to have a dry film thickness of 5 μm, and a pattern having a resist pattern width of 90 μm and a resist pattern interval (line width of exposed conductor) of 20 μm was formed by a photolithography method. The pattern of the resist removal portion to be a coil portion is a circular spiral, the innermost radius is 0.9 mm, and the number of turns is 5.75.
This was plated with a bright copper sulfate plating bath. Plating was performed at a current density of 2.5 A / dm 2 and a film thickness of 150 μm in the same manner as in Example 1 with a copper sulfate concentration of 70 g / l and a solution temperature of 25 ° C. The conductor interval at this time was 10 μm.
Next, the resist was peeled off, and the base copper film was etched by ion milling to form a coil conductor portion. Further, a photosensitive epoxy resin including a gap portion was applied thereon by a curtain coating method, and after temporary curing, a contact hole was formed at a predetermined position by a conventional photolithography method, followed by main curing. Next, using the photosensitive epoxy resin as an insulating substrate, the same method as described above was repeated to form a second coil layer to produce a laminated planar coil assembly. One planar coil obtained by dividing this assembly has an outer dimension of 3.1 × 3.1 × 0.7 mm, a thickness (H) of the coil conductor layer of 150 μm, and between the coil conductor wires. The gap (G) is 10 μm, the head width (L) is 100 μm, the neck width (l) is 20 μm, the L / l ratio is 5, the L / H ratio is 0.67, and the L / G ratio is 5. there were. The electrical characteristics of this product were a DC resistance of 0.1Ω and an inductance value of 0.6 μH. This has an inductance value increased by about 50% compared to the planar coil of the first embodiment.
[0023]
Example 5
A copper layer having a thickness of 1 μm was formed with an electroless copper plating solution on a NiZn composite ferrite substrate (70% by volume ferrite powder and 30% by volume epoxy resin) having a diameter of 3 inches and a thickness of 300 μm.
A positive photoresist was spin-coated thereon so as to have a dry film thickness of 5 μm, and a pattern having a resist pattern width of 90 μm and a resist pattern interval (line width of exposed conductor) of 20 μm was formed by a photolithography method. The pattern of the resist removal portion to be a coil portion is a circular spiral, the innermost radius is 0.9 mm, and the number of turns is 5.75.
This was plated with a bright copper sulfate plating bath. Plating was performed at a current density of 2.5 A / dm 2 and a film thickness of 150 μm in the same manner as in Example 1 with a copper sulfate concentration of 70 g / l and a solution temperature of 25 ° C. The conductor interval at this time was 10 μm.
Next, the resist was peeled off, and the base copper film was etched by ion milling to form a coil conductor portion. Further, a photosensitive epoxy resin including a gap portion was applied thereon by a curtain coating method, and after temporary curing, a contact hole was formed at a predetermined position by a conventional photolithography method, followed by main curing. Next, using the photosensitive epoxy resin as an insulating substrate, the same method as described above was repeated to form a second coil layer to produce a laminated planar coil assembly. One planar coil obtained by dividing this assembly has an outer dimension of 3.1 × 3.1 × 0.6 mm, a coil conductor layer thickness (H) of 150 μm, and between coil conductor wires. The gap (G) is 10 μm, the head width (L) is 100 μm, the neck width (l) is 20 μm, the L / l ratio is 5, the L / H ratio is 0.67, and the L / G ratio is 10. there were. The electrical characteristics of this product were a direct current resistance of 0.1Ω and an inductance value of 0.48 μH. This has an inductance value increased by about 30% compared to the planar coil of the first embodiment.
[0024]
Example 6
A central portion of the coil prepared in Example 1 was punched and sandwiched between NiZn-based EI type ferrite cores having outer dimensions of 3.2 × 3.2 × 1.3 mm to form a planar coil. The inductance value at this time is 11 μH, and the inductance value increases about 30 times.
[0025]
Example 7
A through hole having a diameter of 0.2 mm was provided at a predetermined position on the same unclad FR4 substrate as used in Example 1, and a copper layer having a thickness of 1 μm was formed on both sides thereof with an electroless copper plating solution.
A positive photoresist was spin-coated thereon so as to have a dry film thickness of 5 μm, and a pattern having a resist pattern width of 200 μm and a resist pattern interval (line width of exposed conductor) of 20 μm was formed by a photolithography method. Here, the through hole is used to connect the copper layers on both sides. The pattern of the resist removing portion to be a coil portion is a circular spiral, the innermost radius is 0.9 mm, and the number of turns is six.
This was plated with a bright copper sulfate plating bath. The concentration of copper sulfate in the plating solution is 70 g / l, the solution temperature is 25 ° C., and the agitation is performed with a cathode lock at a stroke of 3 mm / second, a stroke of 100 mm, a current density of 2.5 A / dm 2 and a film thickness of 150 μm. Plated until. The conductor interval at this time was 10 μm.
Next, the resist was peeled off, and the base copper film was etched by ion milling to form a coil conductor portion. The external dimensions were 3.1 × 3.1 × 0.4 mm, and the electrical characteristics were DC resistance 0.05Ω.
This was laminated after punching the central portion of the planar coil obtained in Example 1 through an insulating film, and the whole was formed of a NiZn-based EI type ferrite core having an outer dimension of 3.2 × 3.2 × 1.7 mm. The planar transformer was formed by sandwiching. The coupling coefficient was 0.95 measured at a frequency of 500 kHz.
[0026]
Reference Example For the coil conductor wire with a head width (L) of 110 μm (A) and 170 μm (B), the conductor wire spacing (G) is identified as 10 μm and plated (L -L) / 2, that is, the change in the thickness (H) of the conductor was measured by changing the length of the eaves of the mushroom cross section, and the result is shown as a graph in FIG. In this graph, the result of isotropic growth is shown as C for reference.
As a result, by increasing the eave length of the overhang portion, the growth rate of the plating in the lateral direction is suppressed. As a result, the conductor thickness can be increased while keeping the conductor interval constant. It can be seen that a planar coil with low DC resistance can be obtained.
It can also be seen that the conductor thickness can be increased as the length of the eaves is increased.
[0027]
【The invention's effect】
Since the planar coil of the present invention can increase the thickness of the conductor while reducing the spacing between the coil conductor wires, the direct current resistance can be reduced, and when a planar transformer is configured using this, In particular, there is an advantage that excellent electrical characteristics are exhibited at a small power of 10 W or less.
[Brief description of the drawings]
FIG. 1 is a partial sectional view of a planar coil of the present invention.
FIG. 2 is a process chart of an example of a method for producing a planar coil of the present invention.
FIG. 3 is a plan view showing an example of the shape of the planar coil of the present invention.
FIG. 4 is a graph showing the relationship between the eave length and the conductor height in the planar coil of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Insulating substrate 2 Metal thin film layer 3, 3 ', 3 "Coil conductor filament 6 Photoresist pattern layer 7 Through hole

Claims (3)

絶縁基板の片面又は両面に厚さ50〜400μmの複数のコイル導体線条をギャップ部のアスペクト比(H/G)1以上で設けた平面コイルにおいて、該コイル導体線条がマッシュルーム状断面を有し、その断面の頭部の幅(L)が首部の幅(l)の2〜5倍、頭部の高さ(H)の0.5〜1.5及び各コイル導体線条間の最小間隔(G)の4〜10倍であることを特徴とする平面コイル。In a planar coil in which a plurality of coil conductor wires having a thickness of 50 to 400 μm are provided on one or both sides of an insulating substrate with an aspect ratio (H / G) of 1 or more in the gap portion, the coil conductor wires have a mushroom-like cross section. The width (L) of the head of the cross section is 2 to 5 times the width (l) of the neck, 0.5 to 1.5 times the height (H) of the head, and between the coil conductor wires. A planar coil characterized by being 4 to 10 times the minimum gap (G). コイル導体線条が保護用金属めっき薄膜層で被覆されている請求項1記載の平面コイル。2. The planar coil according to claim 1, wherein the coil conductor wire is coated with a protective metal plating thin film layer. 請求項1又は2の平面コイルを、絶縁性フィルムを介して複数個積層し、全体を薄型強磁性体コアで挟着して構成された平面トランス。A planar transformer configured by laminating a plurality of planar coils according to claim 1 or 2 through an insulating film, and sandwiching the whole with a thin ferromagnetic core.
JP00385398A 1998-01-12 1998-01-12 Planar coil and planar transformer Expired - Fee Related JP4046827B2 (en)

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