JP4038304B2 - Lead frame forming method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for forming a lead frame for a semiconductor, and more particularly to a method for processing silver (Ag) plating used in a semiconductor chip mounting or wire bonding process.
[0002]
[Prior art]
When a semiconductor chip is mounted on a lead frame and sealed with resin, gold (Au) is provided between the pad of the semiconductor chip mounted on the chip mounting portion (die island) of the lead frame and the terminal portion of the lead frame. It is necessary to connect with a wire. In order to make this connection smoothly and without any defect, gold or silver is plated on the terminal portion of the lead frame. Recently, silver plating has become common for economic reasons.
[0003]
This silver plating is more effective not only from the viewpoint of economy but also from the viewpoint of preventing silver migration, rather than being applied only to the necessary portion rather than the entire surface around the terminal portion of the lead frame. This silver migration is a phenomenon in which silver is deposited by applying DC voltage due to moisture and contaminants entering from the gap between the lead frame and the mold resin sealing the semiconductor chip, causing a short-circuit accident between adjacent terminals on the outside of the package. To tell.
[0004]
Therefore, many measures are required for resin sealing of the lead frame in order to block outside air as much as possible and to prevent the silver plating portion from being exposed to the outside of the mold resin.
[0005]
FIG. 5 is a plan view of a lead frame material 10 ′ before separation of a SOP (small outline package, terminal pitch is 1.27 mm) type. Each lead frame 11 is subjected to a semiconductor chip by press working. The mounting portion 12 and the wire bonding terminal portion 13 are formed by punching. Reference numeral 14 denotes a positioning guide hole. FIG. 6 is an enlarged view of the lead frame 11 before separation. The semiconductor chip mounting portion 12 and the wire bonding terminal portion 13 are silver-plated 12a and 13a (shaded portions). Reference numeral 15 denotes a punching hole for forming the lead frame 11, and 16 denotes a resin mold region of the lead frame 11.
[0006]
FIG. 7 is a view showing a silver plating jig 20 for performing the plating by electrolysis. 21 is a plating sparger that forms an outer casing, 22 is a plating solution introduction port, 23 is a plating solution outlet port, 24 is a plating solution nozzle also serving as an anode, 25 is a mask plate for masking non-plated portions, and 26 is the same. A mask rubber, 27 is a pressing rubber for pressing the lead frame material 10 ', and 28 is a similar pressing plate.
[0007]
Here, each lead frame 11 of the lead frame material 10 ′ shown in FIG. 5 is positioned so that the plating region 17 (see FIG. 6) to which the silver plating 12a, 13a is applied is exposed on the lower surface, and the mask rubber 26 and the pressing rubber. 27, a DC voltage is applied so that the nozzle 24 side is a positive electrode and the lead frame material 10 ′ is a negative electrode, and a plating solution is introduced from the introduction port 22 at a predetermined pressure and ejected to the plating region 17 by the nozzle 24. Do silver plating.
[0008]
However, in this method, silver plating is performed on the lead frame 11 that has been punched by press processing to a shape immediately before cutting and separation into individual lead frames, so that in addition to the silver plating 13a necessary for wire bonding of the terminal portion 13 In addition, as shown in FIG. 8, the silver plating 13b is also attached to the side surface (cut end surface) irrelevant to the wire bond, and particularly when the side surface silver plating 13b extends to the outside of the package and further to the outside. There is a risk of silver migration as described above.
[0009]
For this reason, the plating 13b on this side surface is peeled off or covered with solder with a silver plating peeling solution, but it could not be completely removed or covered with solder because the terminal pitch was small. This was conspicuous in the small surface mount package and the ultra small surface mount package in which the terminal pitch is even smaller.
[0010]
Therefore, as shown in FIG. 9, a method of applying silver plating to the lead frame material 10 ′ at the stage where only the guide holes 14 are formed is employed. This is a lead frame forming method called a “front mask plating + stamping (pressing) method”, in which only the guide hole 14 is formed in the lead frame material 10 ′ (primary press working), and this guide hole 14 is used as a reference. Is set on the silver plating jig 20, and the surface of the plating region 17 is preliminarily subjected to silver plating 17a, and then pressed into a shape that forms the lead frame 11 shown in FIG. 5 (secondary press processing). Then, the semiconductor chip mounting portion 12 and the terminal portion 13 are formed, and an offset (step) is formed as necessary. According to this method, the side surface of the terminal portion 13 is subjected to press working after the plating process. Silver plating does not adhere to the (cut end face).
[0011]
[Problems to be solved by the invention]
However, in this “tip mask plating + stamping method”, the plating region 17 of the lead frame material 10 ′ is located in the back of the bag region surrounded by the mask rubber 26 and the mask plate 25, so as shown in FIG. The plating solution blown up from the nozzle 24 flows so as to create a vortex in the bag region, and bubbles are generated at the corners.
[0012]
Since the bubbles of the plating solution have no escape, a large number of minute voids (30 μm to 50 μmφ) due to non-plating are generated in the portion, and there is a problem that the plating quality deteriorates due to uneven plating. The portion where the uneven plating is generated is a portion that is later pressed to become the wire bond terminal portion 13 and has a great influence on the quality of the wire bond.
[0013]
The present invention has been made in view of the above points, and an object of the present invention is to provide a method for forming a lead frame in which plating unevenness does not occur in a plating process such as “front mask plating + stamping method”. It is.
[0014]
[Means for Solving the Problems]
According to a first invention for solving the above-described problem, a guide hole is formed in a lead frame material by primary processing, and then a silver plating is applied to a plating region of the lead frame material, and then by secondary processing. In the lead frame forming method of forming a lead frame shape so that a part of the plating region becomes a semiconductor chip mounting portion and a terminal portion and the remaining portion of the plating region is removed, the plating region is formed during the primary processing. A plating solution reservoir hole that bites into at least a part of the plating region is formed in the corner.
[0015]
According to a second invention, in the first invention, the reservoir hole for the plating solution is formed at all corners of the plating region.
[0016]
According to a third invention, in the second invention, the shape of the plating solution reservoir hole is a key shape bent 90 degrees so as to surround the plating region.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a plan view of a lead frame material 10 according to an embodiment of the present invention. FIG. 2 is an enlarged view of the plating area. Reference numeral 14 denotes a guide hole for setting at the time of plating or pressing, and reference numeral 17 denotes a plating area, which is the same as that shown in FIGS. Reference numeral 18 denotes reservoir holes formed at the four corners of the plating region 17.
[0018]
In the present embodiment, at the time of the primary press processing of the lead frame material 10, the accumulation hole 18 is simultaneously formed in addition to the guide hole 14, and thereafter, the plating region 17 is subjected to silver plating, and then punched into the shape of the lead frame. Secondary press work is performed. That is, the lead frame is formed by “front mask plating + stamping method”.
[0019]
FIG. 3 is an explanatory diagram of this silver plating process. The same components as those shown in FIG. Also in this embodiment, the plating region 17 of the lead frame material 10 is located in the back of the bag region surrounded by the mask rubber 26 and the mask plate 25, and the plating solution blown up from the nozzle 24 vortexes in this bag region. It flows as if to make bubbles in the corners.
[0020]
However, since this bubble accumulates from the corner of the plating region 17 of the lead frame material 10 and escapes to the hole 18, there is no generation of minute voids due to non-plating, and high-quality silver plating 17 a (for example, (Plating thickness 3 μm) can be applied.
[0021]
Therefore, when this lead frame material 10 is subjected to secondary press processing and offset processing is performed as necessary, or a semiconductor chip mounting portion and a terminal portion are formed, the silver plating processing is surely performed on the portions where silver plating is necessary. In addition, it is possible to obtain a lead frame in which no silver plating is applied to a portion where the plating is unnecessary, such as a cut end face of the terminal, and there is no fear of silver migration.
[0022]
The reservoir hole 18 needs to be formed so that at least a part thereof penetrates into the plating region 17, but the shape thereof is formed in a key-shaped reservoir hole 18A bent 90 degrees as shown in FIG. Alternatively, as shown in FIG. 4 (b), the circular reservoir hole 18B may be formed in another shape. In the case of the key shape of FIG. 4 (a), it is easy to confirm the displacement of the plating area, the presence or absence of creaking, etc. by the inspection after the silver plating after the primary press. Further, in the present invention, the guide hole and the lead frame shape are formed by press working, but the same effect can be obtained even if the press working method and the etching processing method are appropriately selected and combined or only the etching processing is combined. Needless to say.
[0023]
【The invention's effect】
As described above, according to the present invention, even a lead frame having a fine terminal pitch can be subjected to silver plating with high accuracy on its terminal portion and semiconductor chip mounting portion, and there is no fear of silver migration. .
[Brief description of the drawings]
FIG. 1 is a plan view of a lead frame material of the present invention before pressing the lead frame.
FIG. 2 is an enlarged view of the plating region of FIG. 1 and reservoir holes formed at the four corners thereof.
FIG. 3 is an explanatory diagram of a plating process on a plating region.
FIGS. 4A and 4B are modified examples of a pool hole formed in a plating region.
FIG. 5 is a plan view of a lead frame made of a conventional lead frame frame material after being pressed.
6 is an enlarged view of the lead frame portion of FIG. 5. FIG.
FIG. 7 is a cross-sectional view of a silver plating jig.
FIG. 8 is a partial perspective view of a silver-plated terminal portion.
FIG. 9 is a plan view of a conventional lead frame material before pressing the lead frame.
FIG. 10 is an explanatory diagram of a conventional plating process on a plating region.
[Explanation of symbols]
10, 10 ': Lead frame material, 11: Lead frame, 12: Semiconductor chip mounting part, 12a: Silver plating, 13: Wire bond terminal part, 13a: Silver plating, 14: Guide hole, 15: Punching hole, 16: Resin mold area, 17: plating area, 17a: silver plating, 18, 18A, 18B: reservoir hole,
20: Jig for silver plating, 21: Plating sparger, 22: Plating solution inlet, 23: Plating solution outlet, 24: Nozzle, 25: Mask plate, 26: Mask rubber, 27: Pressing rubber, 28: Pressing plate

Claims (3)

A guide hole is formed in the lead frame material by primary processing, and then silver plating is applied to the plating region of the lead frame material, and then part of the plating region is subjected to a semiconductor chip mounting portion and a terminal by secondary processing. In the lead frame forming method of forming a lead frame shape so that the remaining portion of the plating region is removed,
A lead frame forming method, characterized in that, at the time of the primary processing, a plating solution reservoir hole is formed at a corner of the plating region so as to bite into at least a part of the plating region. 2. The lead frame forming method according to claim 1, wherein the plating solution pooling holes are formed at all corners of the plating region. 3. The lead frame forming method according to claim 2, wherein the shape of the plating solution reservoir hole is a key shape bent 90 degrees so as to surround the plating region.

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