JP4014112B1 - Capacitor module characteristic inspection device - Google Patents

Abstract

A capacitor module characteristic inspection apparatus capable of inspecting normal / abnormality of basic parameters of a capacitor module with a relatively simple configuration.
A capacitor module characteristic inspection device includes a plurality of capacitor cells (C1, C2,... Cn) connected in series and connected in parallel to the plurality of capacitor cells, and the plurality of capacitor cells are fully charged. The capacitor module is composed of a plurality of parallel monitors (M1, M2,... Mn) that emit a full charge signal when it reaches, a constant current generation unit 11, a constant voltage generation unit 12, and a current detection Unit 13, voltage detection unit 14, discharge control unit 15 that performs discharge control, F signal detection unit 16, display unit 17, and main control unit 18 that performs a predetermined calculation based on the detection result. It is the composition which has.
[Selection] Figure 1

Description

  The present invention relates to a capacitor module characteristic inspection apparatus for inspecting the quality of a parallel monitor in a capacitor module, the quality of connection between a capacitor cell in the capacitor module and a parallel monitor, normality / abnormality of basic parameters of the capacitor module, and the like. is there.

  In recent years, electric double layer capacitors capable of charging and discharging a large current have attracted attention. An electric double layer capacitor is a capacitor that uses an electric double layer formed by the polarization of ions at the interface between the electrode and the electrolyte. It can charge a large capacitance compared to conventional capacitors, and can be charged and discharged quickly. Is possible and its application is expected. Applications of the electric double layer capacitor include memory backup, electric vehicle power assist, and power storage battery replacement, and are widely studied from small capacity products to large capacity products. The present applicant, for example, connects a plurality of electric double layer capacitor cells in series, and a capacitor power storage device configured in combination with an electronic circuit that charges and discharges while monitoring each capacitor cell with a parallel monitor, as an ECS (Energy Capacitor). System) or ECaSS (Energy Capacitor Systems) (registered trademark). Here, the parallel monitor is connected between the terminals of each electric double layer capacitor of the capacitor bank in which a plurality of electric double layer capacitors are connected in series. When the charge voltage of the capacitor bank exceeds the set value of the parallel monitor, the charge current is It is a device that bypasses.

The capacitor bank with the parallel monitor described above bypasses the charging current so that the charging voltage of the capacitor bank does not rise above a set value when charging, so that all electric double layer capacitors in the capacitor bank are kept constant. The battery is evenly charged up to a set voltage, and the storage capacity of the electric double layer capacitor can be exhibited almost 100%. Therefore, the parallel monitor can equalize the maximum voltage, prevent backflow, detect and control the end-of-charge voltage, etc., even when there are variations in capacitor characteristics and residual charge, so that it can be used to the full withstand voltage. As such, it has an extremely important role and is an indispensable device for effective use of energy density. Such a parallel monitor is disclosed in Patent Document 1 (Japanese Patent No. 3306325).
Japanese Patent No. 3306325

  In ECS and ECaSS as described above, a configuration in which a capacitor module is configured in advance by a plurality of capacitor cells and a parallel monitor and the capacitor module is provided to a customer as a basic structural unit is being studied. In such a capacitor module, several variations with different numbers of capacitor cells are prepared, and the customer selects from the variations from these capacitor modules and combines them as appropriate to optimize their design specifications. A power storage device can be formed. As a provider of such a capacitor module, in addition to the characteristic inspection at the capacitor cell stage, the characteristic inspection at the capacitor module stage when a plurality of unit capacitor cells are combined is required. In addition to checking the basic parameters of the capacitor, such as whether the storage capacity of the capacitor module is within a specified value or whether self-discharge is not appropriate, the capacitor module is tested for characteristics. When cells are assembled as a module, such as whether they are properly connected to each other, or whether a parallel monitor incorporated in a capacitor module operates together with a unit capacitor cell, a specific check is also required. However, conventionally, there has not been proposed an apparatus for simply and efficiently performing a characteristic inspection of a capacitor module in units of modules.

In order to solve the above-described problems, the present invention provides a plurality of capacitor cells connected in series and connected in parallel to the plurality of capacitor cells, and the plurality of capacitor cells are fully charged. In a capacitor module characteristic inspection device that performs a characteristic inspection of a capacitor module consisting of a plurality of parallel monitors that emit full charge signals when reached,
A constant current generator for applying a constant current to the capacitor module; a constant voltage generator for applying a constant voltage to the capacitor module; a current detector for detecting the current of the capacitor module; and detecting a voltage of the capacitor module A voltage detection unit that performs discharge control of the capacitor module, a full charge signal detection unit that detects a logical sum signal of the full charge signals generated from the plurality of parallel monitors, and characteristics of the capacitor module A display unit for displaying an inspection status, and a current and a voltage generated by the constant current generation unit and the constant voltage generation unit are controlled, and detected by the current detection unit, the voltage detection unit, and the full charge signal detection unit. A main control unit that records a detection result and performs a predetermined calculation based on the detection result;
While charging the capacitor module with the constant current generator, the full charge signal detection unit detects a full charge signal, and the voltage detection unit detects the capacitor module voltage value when the full charge signal is detected. Then, according to the voltage value of the capacitor module, the quality of the parallel monitor, the quality of the connection state between the capacitor cell and the parallel monitor, the quality of the capacitor module is determined
The main control unit detects the full charge signal by the full charge signal detection unit while charging the capacitor module by the constant current generation unit, and when the full charge signal is detected, charging by the constant current generation unit The current is controlled so as to be gradually reduced, and when the reduced charging current becomes a predetermined current value or less, control is performed so as to perform relaxation charging for at least a certain period of time,
When discharging the capacitor module by the discharge controller, the internal resistance value is calculated by the IR drop detected by the voltage detector,
Compare the calculated internal resistance value with the preset internal resistance reference value, determine the quality of the capacitor module,
While calculating the capacitance value based on the detection results of the current detection unit and the voltage detection unit when discharging the capacitor module by the discharge control unit,
The calculated capacitance value is compared with a preset capacitance reference value to determine whether the capacitor module is good or bad .

According to a second aspect of the present invention , in the capacitor module characteristic inspection device according to the first aspect, the module-specific characteristic inspection information storage unit for storing the internal resistance reference value and capacitance reference value for each type of capacitor module is provided. It is characterized by having.

  According to the capacitor module characteristic inspection apparatus according to the embodiment of the present invention, with a relatively simple configuration, the quality of the parallel monitoring in the capacitor module, the quality of the connection between the capacitor cell in the capacitor module and the parallel monitor, Basic parameters such as normal / abnormal can be easily and efficiently inspected.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing a block configuration of a capacitor module characteristic inspection apparatus according to an embodiment of the present invention. In FIG. 1, 10 is a capacitor module characteristic inspection device, 11 is a constant current generator, 12 is a constant voltage generator, 13 is a current detector, 14 is a voltage detector, 15 is a discharge controller, and 16 is an F signal detector. , 17 is a display unit, 18 is a main control unit, 20 is a capacitor module, 21 is an OR logic circuit, C1, C2, C3... Cn is a capacitor cell, M1, M2, M3. Show.

  In the capacitor module characteristic inspection apparatus 10 of the present invention, the capacitor module 20 is an object to be inspected, and basically the capacitor module 20 is packaged in series connection of C1, C2, C3... Cn which are unit capacitor cells. Is. Each of the unit capacitor cells C1, C2, C3... Cn is connected in parallel with each other as shown in FIG. The parallel monitors M1, M2, M3... Mn monitor unit capacitor cells C1, C2, C3... Cn connected in parallel to each other, and when the capacitor cell to be monitored reaches full charge. F1 signal, F2 signal, F3 signal... Fn signal are emitted. The F1 signal, F2 signal, F3 signal... Fn signal are ORed by the OR logic circuit 21. The output of the OR logic circuit 21 is output to the outside of the module as the F signal of the entire capacitor module 20. Since the OR logic circuit 21 takes a logical sum from the F1 signal, the F2 signal, the F3 signal,... Fn signal, the fact that the F signal is output means that the unit capacitor cells C1, C2, C3,. This means that at least one of the capacitor cells has reached full charge. The F signal of the capacitor module 20 as a whole is input to the capacitor module characteristic inspection device 10.

  The constant current generator 11 in the capacitor module characteristic inspection apparatus 10 generates a constant current to charge the capacitor module 20 with a constant current, and the constant voltage generator 12 generates a constant voltage to charge the capacitor module 20 with a constant voltage. It is the structure to make. The amount of current and voltage to be generated in the constant current generator 11 and the constant voltage generator 12 is based on the program control of the main controller 18 such as a microcomputer.

  The current detector 13 detects and monitors the current when the capacitor module 20 is being charged / discharged. The voltage detector 14 detects and monitors the voltage when the capacitor module 20 is charged and discharged at a constant current.

  The discharge controller 15 appropriately sets a discharge current when discharging the capacitor module 20. When such discharge control of the capacitor module 20 is being performed, the voltage detection unit 14 detects and monitors the voltage of the capacitor module 20.

  Note that the set current in the constant current generator 11 during charging / discharging of the capacitor module 20, the set voltage in the constant voltage generator 12, the detected current in the current detector 13, and the detected voltage in the voltage detector 14 are stored in a storage means (not shown). The data is stored and accumulated, and is used as basic data when the main control unit 18 determines the capacitor module 20.

  The F signal detector 16 in the capacitor module characteristic inspection apparatus 10 is configured to detect an F signal output from the capacitor module 20. By detecting the F signal, it can be determined that at least one of the unit capacitor cells C1, C2, C3... Cn in the capacitor module 20 has reached full charge. Information detected by the F signal detection unit 16 is used to determine whether the capacitor module 20 is good or bad in the main control unit 18.

  The display unit 17 in the capacitor module characteristic inspection apparatus 10 displays a charge / discharge characteristic curve of the capacitor module 20 or displays a result of determination of the quality of the capacitor module 20 by the main control unit 18. Yes.

  The main control unit 18 is a central processing unit (not shown) such as a CPU and a non-volatile storage element (not shown) such as a ROM or a rewritable storage element such as a RAM connected to the central processing unit (not shown) via a system bus (not shown). (Not shown), and a known computer having a large-capacity storage means (not shown) such as an HDD and a communication control unit (not shown) with the outside. The constant current generation unit 11, the constant voltage generation unit 12, the current detection unit 13, the voltage detection unit 14, the discharge control unit 15, the F signal detection unit 16, and the display unit 17 are all connected to the central processing unit via the system bus. The configuration connected to these central processing units is based on a program for operating the capacitor module characteristic inspection device 10 stored in the large-capacity storage means. Control and get data. The detection data acquired by each detection unit is stored in the mass storage means. The detection data stored in the large-capacity storage means is subjected to various determinations as will be described later based on a program for operating the capacitor module characteristic inspection apparatus 10.

  Next, the parallel monitors M1, M2, M3,... Mn that are connected to the unit capacitor cells C1, C2, C3,. FIG. 2 is a diagram showing a circuit configuration of the parallel monitor M built in the capacitor module 20. FIG. 2 shows an extracted parallel monitor M connected in parallel to one capacitor cell C of the capacitor module 20, where Tr is a transistor, R is a resistor, CMP is a comparator, and Vref is a reference voltage. Each is shown.

  The operation of the parallel monitor M configured as described above will be described. As the reference voltage Vref, a full charge voltage of the capacitor cell C (generally, a rated voltage of the capacitor cell C) is set. The parallel monitor M compares and monitors the voltage between the terminals of each capacitor cell C (between TT ′) and the reference voltage Vref in the comparator CMP, and the voltage of the capacitor cell C sets the set value based on the reference voltage Vref. If it exceeds, the transistor Tr is turned on to bypass the charging current, and the Fn signal is issued to notify the outside of the parallel monitor M that the capacitor cell C has reached full charge.

  Next, the flow of the characteristic inspection of the capacitor module 20 by the capacitor module characteristic inspection apparatus 10 will be described. 3 to 5 are flowcharts showing a characteristic inspection operation of the capacitor module characteristic inspection apparatus according to the embodiment of the present invention. The program of the capacitor module characteristic inspection apparatus 10 of the present embodiment stored in the large capacity storage means (not shown) is operated based on the flowcharts of FIGS. In the capacitor module characteristic inspection apparatus 10, the main control unit 18 in FIG. This is realized by cooperating with the F signal detection unit 16 and the display unit 17.

FIG. 6 is a diagram illustrating an example of a charge / discharge characteristic curve acquired by the capacitor module characteristic inspection apparatus according to the embodiment of the present invention during the characteristic inspection of the capacitor module 20. FIG. 6A shows a charge / discharge characteristic curve of current value, and FIG. 6B shows a charge / discharge characteristic curve of voltage value. In both of FIGS. 6A and 6B, the horizontal axis indicates time, and the scale is the same. In FIG. 6A, from time 0 to t ₁₀ , the charging current of the capacitor module 20 is shown in a positive direction, and after time t ₁₀ , the discharging current of the capacitor module 20 is shown in a positive direction. It is a thing. The flowcharts of FIGS. 3 to 5 will be described below with reference to these charge / discharge characteristic curves as appropriate.

  The flowcharts described in FIGS. 3 to 5 are for the capacitor module characteristic inspection apparatus 10 to determine the capacitor module 20 having a series connection of n unit capacitor cells having the full charge voltage Vc. 3 to 5, Vt represents a detection (charging) voltage value of the capacitor module 20, It represents a detection (charging) current value of the capacitor module 20, and Id represents a discharging current.

  When the process of the flowchart of the capacitor module characteristic inspection apparatus is started in step S100, the process proceeds to step S101, where both the internal resistance reference value Ro and the capacitance reference value Co of the inspection target capacitor module 20 are input. Is called. The internal resistance reference value Ro and the electrostatic capacitance reference value Co are the internal resistance value and the electrostatic capacitance value of the normal capacitor module 20, respectively. The values of the inspection target capacitor module 20 calculated in the subsequent steps are The quality of the test target capacitor module 20 is determined.

  In step S102, m = 1 is set for a variable m (where m is a natural number). As will be described later, when an F signal is detected from the capacitor module 20 to be inspected, the charging current for the capacitor module 20 is controlled to be reduced by one step. In this embodiment, charging is performed using this variable m at this time. Configure to reduce current. In this embodiment, the charging current is reduced by using m as described above. However, this is not necessarily an essential configuration requirement. In short, the charging current may be appropriately reduced every time the F signal is detected. .

Next, in step S103, the charging current It is set to Io / m using the previous variable m, and charging of the inspection target capacitor module 20 is started. Here, Io is an initial charging current value set at the initial stage of starting the characteristic inspection. Incidentally, indicating the step S103 by using the charge-discharge characteristic curve of FIG. 6, period from the time t ₀ shown in FIG. 6 (A) until t ₁ corresponds to it.

  Next, in step S104, it is determined whether an F signal has been detected. If the determination result in this step S104 is Yes, it will progress to step S105, and if it is No, it will progress to step S106.

  If the process proceeds to step S106, it means that the F signal has not been detected. That is, in this case, the possibility of the parallel monitor failure can be found by comparing Ve and Vs at the time of detecting the F signal with those in which the parallel monitor of the inspection target capacitor module 20 is faulty.

  If the process proceeds to step S105, it means that the F signal has been detected. In this case, it can be determined that the parallel monitor of the inspection target capacitor module 20 is operating. In addition, you may comprise so that the determination result of the quality of the above parallel monitor may be displayed on the display part 18. FIG.

  From step S105, the process proceeds to step S107, where it is determined whether Vt> (Vc × n × 1.02) / 2. Here, what is specifically determined in step S105 will be described with reference to FIG. FIG. 7 is a diagram illustrating a normal connection state and an erroneous connection state of capacitor cells constituting the capacitor module. FIG. 7A shows a state in which the capacitor cell is normally connected, and FIG. 7B shows a state in which the capacitor cell is erroneously connected. In FIG. 7, Ca, Cb, and Cc indicate capacitor cells, and Ma, Mb, and Mc indicate parallel monitors. As shown in FIG. 7A, in a normal connection state, each of the capacitor cells Ca, Cb, Cc is configured to be monitored by each parallel monitor Ma, Mb, Mc. On the other hand, when an erroneous connection state as shown in FIG. 7B is reached, for example, the parallel monitor Ma is configured to monitor two series connections of the capacitor cells Ca and Cb. Since such a parallel monitor Ma monitors the sum of the voltage for the capacitor cell Ca and the voltage for the capacitor cell Cb, the parallel monitor operates at about half the voltage at which the normal parallel monitor operates. Will end up.

  Step S107 is a step for determining such an erroneous connection. Here, “(Vc × n × 1.02) / 2”, which is a determination criterion compared with the detection voltage Vt, will be described. Since the capacitor module 20 to be inspected has a configuration in which n capacitors having a full charge voltage Vc are connected in series, in a normal connection state, about Vc × n. One should detect the full charge voltage. However, since there are variations in the charging state of the capacitor cell, the parallel monitor detects the full charge by considering a certain margin K (Vc × n × K). For this reason, “(Vc × n × K) / 2”, which is a half of the value, is used as the determination criterion for the erroneous connection as described above.

  If the result of determination in step S107 is Yes, the process proceeds to step S108, and a display indicating that the connection state of the capacitor cells in the capacitor module 20 is normal is displayed on the display unit 18 or the like, for example. Further, if the result of determination in step S107 is No, the process proceeds to step S109, and for example, the display unit 18 is configured to display that a capacitor cell is erroneously connected.

  From step S108, the process proceeds to step S110. In step S110, it is determined whether Vt> Vc × n × α. Here, what is specifically determined in step S110 will be described. Step S110 is a step of detecting whether or not the voltage at which the parallel monitor operates is too low. As described above, the capacitor module 20 to be inspected has a configuration in which n capacitors with the full charge voltage Vc are connected in series, so that the connection is about Vc × n in a normal connection state. Any one of the connected parallel monitors should detect a full charge voltage. However, since there are variations in charging methods depending on the capacitor cell, a value obtained by multiplying Vc × n by a coefficient of about 0.8 as α is set as the lower limit value of the parallel monitoring operation.

  If the result of determination in step S110 is Yes, the process proceeds to step S111. In step S111, since it is considered that the capacitor module 20 is normal from the viewpoint of the operating voltage of the parallel monitor, this is displayed, for example, on the display unit 18 or the like. Conversely, if the result of determination in step S110 is No, the process proceeds to step S112. Proceeding to step S112 is considered that the capacitor module 20 has some defect because the voltage at which the parallel monitor operates is as low as Vc × n × α or less. Therefore, for example, the display unit 18 is configured to display that the capacitor module 20 is defective.

  From step S111, the process proceeds to step S200 in FIG. First, in step S200, the variable m is incremented by one. As described above, when an F signal is detected from the capacitor module 20 to be inspected, the charging current for the capacitor module 20 is controlled to be reduced by one step. In this step, the variable m used for this control is incremented.

  In step S201, it is determined whether the charging current It = Io / m to be set next is larger than 1 [A]. Here, the comparison of the magnitude relationship between the charging current It = Io / m and 1 [A] is due to the fact that the withstand current value of the parallel monitor is 1 [A], but the determination at this step is not necessarily required. It is not necessary to set the reference to 1 [A], and this is not a problem as long as the allowable current value of the parallel monitor is sufficiently lower than Io.

  If the result of determination in step S201 is Yes, the process proceeds to step S202, and the capacitor module 20 is charged again at the charging voltage It = Io / m.

  In step S203, it is determined whether an F signal is detected. If the F signal is detected (in the case of Yes), the process proceeds to step S200, and if the F signal is not detected (in the case of No), the process proceeds to step S200.

A case where the F signal is detected in step S203 will be described. In the capacitor module characteristic inspection apparatus according to the embodiment of the present invention, as described above, when the F signal is detected from the inspection target capacitor module 20, the charging current to the capacitor module 20 is controlled to be reduced by one step. Therefore, every time the F signal is detected, the charging current is lowered stepwise from Io to Io / 2, from Io / 2 to Io / 3, from Io / 3 to Io / 4, and so on. That is why. A loop for performing such control is a loop from step S200 to step S203. As can be seen from steps S200 to S203, m is incremented by 1 each time an F signal is detected, and the charging current is set to It = Io / m. By following such a loop, the control for reducing the current as described above is performed. The charge / discharge characteristic curve of the capacitor module characteristic inspection apparatus in this loop is between t ₁ and t ₉ . Referring to FIG. 6, it can be seen that the charging current is gradually reduced.

  If the determination result in step S201 is No, the process proceeds to step S204, and the capacitor module 20 is charged with a predetermined current value (for example, 1 [A]).

  In a succeeding step S205, it is determined whether Vt ≦ Vc × n. If the determination result in step S205 is Yes, the process proceeds to step S206, and if the determination result is No, the process proceeds to step S207. In step S205, it is determined whether or not the voltage of the entire capacitor module 20 has reached (capacitor cell full charge voltage Vc) × (number of cells n). If it has not reached, it is assumed that charging can be continued, and if it has reached, it shifts to a relaxation charging mode for a certain period of time, which will be described later, for preparation for subsequent discharge.

  In step S206, it is determined whether or not a predetermined time has elapsed since the charging of the capacitor module 20 was started at the charging voltage It = Io / m (where Io / m ≦ 1 [A]). In step S206, if the predetermined time has not elapsed and the determination result is No, the process returns to step S204 to continue charging. In step S206, if the predetermined time has elapsed and the determination result is Yes, the process proceeds to step S207, and the relaxation charging for a predetermined time is shifted to the mode.

  In step S207, the capacitor module 20 is subjected to relaxation charging for a certain time. The relaxation charging time is set to be suitable for the type of capacitor cell. This relaxed charging can be considered as preparation for unifying the preconditions before the capacitor module 20 is discharged.

In step S208, it is detected whether I _VL is sufficiently close to 0, and if I _VL is larger than a certain reference value I _refL (I _VL > I _refL ), a cell having a large self-discharge or a pseudo short circuit has occurred. There may be a cell. In step S208, a cell having a large leakage current is to be detected. If a cell having a large leakage current exists in the capacitor module, I _VL does not approach zero.

  If a certain amount of ΔVt is detected in step S208 (in the case of Yes), the process proceeds to step S209. In this case, since it can be determined that no capacitor cell having a large self-discharge is included in the capacitor module 20, such display is performed on the display unit 17.

The period of the step S204 to step S209, in the charge-discharge curve of the capacitor module characteristic test device of FIG. 6 being indicated as the period from t ₉ to t _10.

  From step S209, the process proceeds to step S300 in FIG. Steps after step S300 shown in FIG. 5 are steps related to the data acquired by the discharge of the capacitor module characteristic inspection apparatus 10 and the discharge. First, in step S300, the discharge start voltage Vs is detected and data is acquired.

  Subsequently, the discharge operation is started by the discharge controller 15 of the capacitor module characteristic inspection apparatus 10 in step S301. The discharge end voltage at this time is Vo as shown in FIG. 6, and the discharge start current is Ido.

It is known that the discharge voltage characteristic of the capacitor module 20 exhibits a remarkable voltage drop characteristic called IR drop at the beginning of discharge, and this IR drop reflects the internal resistance of the capacitor. ing. In step S302, the voltage drop ΔVd corresponding to the IR drop is detected, and the internal resistance R is calculated from the sum of the discharge current Id and the current I _VL during relaxation charging. For calculation of the internal resistance value R, R = ΔVd / (Id + | I _VL |) is used. Such a calculation result may be appropriately calculated on the display unit 17.

  Next, it is determined whether or not the calculation result of the internal resistance value R in step S302 is within the normal range. That is, in step S303, it is determined whether or not Ro−ΔRo <R <Ro + ΔRo. Here, Ro is the internal resistance reference value of the inspection target capacitor module 20 input in step S101, and ΔRo is an allowable amount of deviation from the internal resistance reference value Ro.

  If the result of determination in step S303 is Yes, the process proceeds to step S304. In step S304, since the internal resistance value R is considered to be within the allowable amount as viewed from the internal resistance reference value Ro, for example, the display unit 18 displays that “the internal resistance value is normal”. Conversely, if the result of the determination in step S303 is No, the process proceeds to step S305. Proceeding to step S305 is not within the allowable amount as seen from the internal resistance reference value Ro and is abnormal. For example, an indication that “internal resistance value is abnormal” is displayed on the display unit 18. The configuration.

  Next, proceeding to step S306, it is determined whether or not the voltage of the capacitor module 20 has reached the discharge end voltage. If not reached, S306 is looped until Vo is reached. If it is determined that Vo has been reached, the process proceeds to step S307.

  In step S307, the discharge of the capacitor module 20 is terminated. In step S308, the voltage Vo of the capacitor module 20 at the end of the discharge is detected and data is acquired.

  In subsequent step S309, the energy E of the discharge and the capacitance C and further ΩF are calculated based on the energy E. First, the energy of discharge is calculated by integrating the product of Ido (discharge current) and Vt (discharge voltage) from the start of discharge to the end of discharge. This can be shown by the following equation (1). The calculation according to the equation (1) is performed by the main control unit 18 based on data acquired in a mass storage means (not shown).

次に、キャパシタモジュール２０の静電容量をＣとすると、放電分のエネルギーは次式（２）によっても計算することができる。

Next, assuming that the capacitance of the capacitor module 20 is C, the energy for discharge can be calculated by the following equation (2).

式（１）によって求めた放電分のエネルギーと式（２）によって求めた放電分のエネルギーとは等しいことから、静電容量Ｃを求めることができる。

Since the energy of the discharge obtained by the equation (1) is equal to the energy of the discharge obtained by the equation (2), the capacitance C can be obtained.

  In step S309, ΩF is obtained by taking the product of R obtained in step S302 and the capacitance C described above.

  Next, in step S310, it is determined whether the calculation result of the capacitance C is within a normal range. That is, in step S310, it is determined whether or not Co−ΔCo <C <Co + ΔCo. Here, Co is the capacitance reference value of the inspection target capacitor module 20 input in step S101, and ΔCo is an allowable amount of deviation from the capacitance reference value Co.

  If the result of determination in step S310 is Yes, the process proceeds to step S311. In step S311, the measured capacitance value C of the inspection target capacitor module 20 is considered to be within an allowable amount as viewed from the capacitance reference value Co, and therefore, for example, “capacitance value is normal”. Displayed on the display unit 18 or the like. Conversely, if the determination result in step S310 is No, the process proceeds to step S312. Proceeding to step S312 is not within the allowable amount as seen from the capacitance reference value Co, and is abnormal, so that, for example, “capacitance value abnormality” is displayed on the display unit 18. The configuration is as follows.

  In a succeeding step S313, it is determined whether or not the calculation result of ΩF is within a normal range. That is, in step S313, it is determined whether or not RoCo−ΔRoCo <RC <RoCo + ΔRoCo. Here, RoCo (ΩF reference value) is a product of the internal resistance reference value and the capacitance reference value of the inspection target capacitor module 20 input in step S101, and ΔRoCo is an allowable amount of deviation from the ΩF reference value RoCo. It is. RC is the product of the internal resistance value R calculated in step S302 and the capacitance value C calculated in step S309.

  If the result of determination in step S313 is Yes, the process proceeds to step S314. In step S314, since the measured ΩF value R · C of the capacitor module 20 to be inspected is considered to be within an allowable amount as viewed from the ΩF reference value RoCo, for example, the display unit 18 indicates that the ΩF value is normal. To display. Conversely, if the result of the determination in step S313 is No, the process proceeds to step S315. Proceeding to step S315 means that the ΩF value R · C is not within the allowable amount with respect to the ΩF reference value RoCo and is abnormal. For example, the display unit 18 indicates that “ΩF value is abnormal”. The display is configured to be displayed.

  As described above, according to the capacitor module characteristic inspection apparatus according to the embodiment of the present invention, with a relatively simple configuration, the quality of the parallel monitoring in the capacitor module, the quality of the connection of the capacitor cells in the capacitor module, the basic definition of the capacitor module, and the like. It is possible to easily and efficiently inspect whether normal parameters are normal or abnormal.

  Next, a capacitor module characteristic inspection apparatus according to another embodiment of the present invention will be described. FIG. 8 is a diagram showing a block configuration of a capacitor module characteristic inspection apparatus according to another embodiment of the present invention. In FIG. 8, the same components as those in FIG. The present embodiment is different from the previous embodiment in that a module-specific characteristic inspection information storage unit 19 is provided. Information relating to the capacitor module stored in the module-specific characteristic inspection information storage unit 19 is specified by a not-shown specifying unit and is set in a storage unit (not shown) of the main control unit 18.

  Data contents stored in the module-specific characteristic inspection information storage unit 19 will be described. FIG. 9 is a diagram showing an outline of the data contents of the module-specific characteristic inspection information storage unit in the capacitor module characteristic inspection apparatus according to another embodiment of the present invention. As shown in FIG. 9, the module-specific characteristic inspection information storage unit 19 includes a capacitor module type, a type of capacitor cell used in the capacitor module, the number of series capacitor cells, an internal resistance reference value, and a capacitance reference value. The characteristic inspection data for each capacitor module such as are stored in a database.

  As described above, a plurality of variations of the capacitor module are prepared and provided to the user. Therefore, it is desirable that the capacitor module characteristic inspection apparatus immediately supports a plurality of variations of capacitor modules. For this reason, when it is desired to perform the characteristic inspection of a certain type of capacitor module, the capacitor module type information stored in the module-specific characteristic inspection information storage unit 19 is designated by a not-illustrated designation means, thereby corresponding to the type. The characteristic test data for each capacitor module such as the type of capacitor cell to be performed, the number of series capacitor cells, the internal resistance reference value and the capacitance reference value are set in a storage means (not shown) of the main control unit 18. To be configured.

  As described above, in the present embodiment, at the time of the characteristic inspection of the capacitor module, it is configured such that the parameter required for the characteristic inspection is set in the capacitor module characteristic inspection apparatus simply by specifying the model. It becomes possible to quickly respond to the characteristic inspection of the capacitor module.

It is a figure which shows the block configuration of the capacitor module characteristic inspection apparatus which concerns on embodiment of this invention. 2 is a diagram showing a circuit configuration of a parallel monitor M built in a capacitor module 20. FIG. It is a figure which shows the flowchart (the 1) of the characteristic test | inspection operation | movement of the capacitor module characteristic test | inspection apparatus which concerns on embodiment of this invention. It is a figure which shows the flowchart (the 2) of the characteristic test | inspection operation | movement of the capacitor module characteristic test | inspection apparatus which concerns on embodiment of this invention. It is a figure which shows the flowchart (the 3) of the characteristic test | inspection operation | movement of the capacitor module characteristic test | inspection apparatus which concerns on embodiment of this invention. 3 is a diagram illustrating an example of a charge / discharge characteristic curve acquired by the capacitor module characteristic inspection apparatus according to the embodiment of the present invention when the capacitor module 20 is subjected to characteristic inspection. It is a figure which shows the normal connection state and incorrect connection state of the capacitor cell which comprises a capacitor module. It is a figure which shows the block configuration of the capacitor module characteristic inspection apparatus which concerns on other embodiment of this invention. It is a figure which shows the outline of the data content of the characteristic inspection information storage part classified by module in the capacitor module characteristic inspection apparatus which concerns on other embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Capacitor module characteristic inspection apparatus, 11 ... Constant current generation part, 12 ... Constant voltage generation part, 13 ... Current detection part, 14 ... Voltage detection part, 15 ... Discharge control , 16 ... F signal detection unit, 17 ... display unit, 18 ... main control unit, 19 ... module-specific characteristic inspection information storage unit, 20 ... capacitor module, 21 ... OR Logic circuit

Claims (2)

Capacitor module characteristic inspection comprising a plurality of capacitor cells connected in series and a plurality of parallel monitors connected in parallel with the plurality of capacitor cells and generating a full charge signal when the plurality of capacitor cells reach full charge In the capacitor module characteristic inspection device to perform,
A constant current generator for applying a constant current to the capacitor module; a constant voltage generator for applying a constant voltage to the capacitor module; a current detector for detecting the current of the capacitor module; and detecting a voltage of the capacitor module A voltage detection unit that performs discharge control of the capacitor module, a full charge signal detection unit that detects a logical sum signal of the full charge signals generated from the plurality of parallel monitors, and characteristics of the capacitor module A display unit for displaying an inspection status, and a current and a voltage generated by the constant current generation unit and the constant voltage generation unit are controlled, and detected by the current detection unit, the voltage detection unit, and the full charge signal detection unit. A main control unit that records a detection result and performs a predetermined calculation based on the detection result;
While charging the capacitor module with the constant current generator, the full charge signal detection unit detects a full charge signal, and the voltage detection unit detects the capacitor module voltage value when the full charge signal is detected. Then, according to the voltage value of the capacitor module, the quality of the parallel monitor, the quality of the connection state between the capacitor cell and the parallel monitor, the quality of the capacitor module is determined,
The main control unit detects the full charge signal by the full charge signal detection unit while charging the capacitor module by the constant current generation unit, and when the full charge signal is detected, charging by the constant current generation unit The current is controlled so as to be gradually reduced, and when the reduced charging current becomes a predetermined current value or less, control is performed so as to perform relaxation charging for at least a certain period of time,
When discharging the capacitor module by the discharge controller, the internal resistance value is calculated by the IR drop detected by the voltage detector,
Compare the calculated internal resistance value with the preset internal resistance reference value, determine the quality of the capacitor module,
While calculating the capacitance value based on the detection results of the current detection unit and the voltage detection unit when discharging the capacitor module by the discharge control unit,
A capacitor module characteristic inspection device, wherein the calculated capacitance value is compared with a preset capacitance reference value to determine whether the capacitor module is good or bad . 2. The capacitor module characteristic inspection apparatus according to claim 1, further comprising a module-specific characteristic inspection information storage unit that stores an internal resistance reference value and a capacitance reference value for each type of capacitor module.

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