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JP3979234B2 - Liquid crystal display and manufacturing method thereof - Google Patents

Liquid crystal display and manufacturing method thereof Download PDF

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Publication number
JP3979234B2
JP3979234B2 JP2002251323A JP2002251323A JP3979234B2 JP 3979234 B2 JP3979234 B2 JP 3979234B2 JP 2002251323 A JP2002251323 A JP 2002251323A JP 2002251323 A JP2002251323 A JP 2002251323A JP 3979234 B2 JP3979234 B2 JP 3979234B2
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electrode
pixel
liquid crystal
capacitor
pixel electrode
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JP2002251323A
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JP2004093654A (en
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隆幸 加藤
慎一郎 田中
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Seiko Epson Corp
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Seiko Epson Corp
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Description

【0001】
【発明の属する技術分野】
本発明は1画素内に複数のドメインを設けた広視野角の液晶表示器に関し、より詳細には、点欠陥を修復可能な液晶表示器に関する。
【0002】
【従来の技術】
液晶表示器は薄型軽量、低消費電力という特徴を生かし、携帯端末から大型テレビに至るまで幅広く利用されている。これまで液晶表示器で表示する画像には静止画が多かったが、携帯電話による動画配信や液晶テレビの開発などにより動画を表示するケースが多くなり、液晶表示器の性能として広視野角、高速応答などの要素が重要視されるようになってきた。こうした要求に伴い、例えば視野角を改善するために、画素内に突起や溝を設けて1画素内に複数のドメインを形成するMVA(Multi-domain vertically aligned)方式が提案されている。これは例えば特許第3005418号公報や特許第3011720号公報に記載されている。
【0003】
この従来のMVA型液晶表示器を図6、図7に基づいて説明する。図6はアレイ基板側の1画素分の平面図であり、図7は液晶表示器の断面図である。なお図7は補助容量配線上の断面図に相当する。
【0004】
平行に対向配置する一対のガラス基板のうち、アレイ基板50となる一方のガラス基板52上には走査線53、信号線54、TFT57、画素電極59が形成され、対向基板51となる他方のガラス基板63にはカラーフィルタ65、対向電極66、突起67が形成される。なお図6にはカラーフィルタ65や突起67を省略している。走査線53と信号線54はマトリクス状に配線され、その交差部分にTFT57を、走査線53と信号線54で囲まれる領域内に画素電極59をそれぞれ形成する。TFT57のゲート電極は走査線53に、ソース電極は信号線54に、ドレイン電極は画素電極59にそれぞれ電気的に接続している。画素電極59にはスリット69が形成され、対向電極51には複数の帯状の突起67がジグザグ状に形成されている。スリット69はこの複数の突起67の間に位置し、隣り合う突起67と略平行に形成されている。画素電極59や対向電極66上にはそれぞれ配向膜60、68が積層され、画素電極59に電圧が印加されていない時は配向膜60、68の影響により液晶分子70は垂直配列する。
【0005】
画素電極59に所定以上の電圧が印加されたとき、液晶分子70が傾斜する。このとき、対向基板51の法線方向から見たとき、液晶分子70は突起67及びスリット89に対して90°方向に傾斜し、突起67やスリット89を境にして逆方向に傾斜する。一対のガラス基板52、63の外側には直交ニコルの一対の偏光板71、72が配置され、偏光板71、72の透過軸と突起67の延長方向との成す角度が約45°になるように設定し、偏光板71、72の法線方向から見たときに傾斜した液晶分子70と偏光板71、72の透過軸との成す角度が45°になるようにしている。傾斜した液晶分子70と偏光板71、72の透過軸との角度が45°になるとき、最も効率よく偏光板から透過光を得ることができる。
【0006】
各画素の中央付近には補助容量配線55が設けられている。補助容量配線55は走査線53を形成するときに同時形成され、走査線53と平行に配置されている。補助容量配線55は走査線53と同様にゲート絶縁膜56で覆われ、ゲート絶縁膜56上で補助容量配線55と対向する位置に容量電極61が形成されている。容量電極61は信号線54と同時形成されるが、信号線54とは電気的に接続しないように独立している。信号線54や容量電極61上には例えばSiNxからなる保護膜58が積層され、保護膜58には容量電極61の一部を露出させるコンタクトホール62が形成されている。画素電極59は保護膜58上に形成され、画素電極59と容量電極61はコンタクトホール62を介して電気的に接続している。従って画素電極59と容量電極61が同電位になり、補助容量配線55と容量電極61によって補助容量を形成する。
【0007】
【発明が解決しようとする課題】
容量電極が補助容量配線や信号線と電気的に接続すると、画素電極へ印加される電圧がその接続箇所を介してリークするため、表示不良の原因になる。例えばゲート絶縁膜56中に異物73が混在して補助容量配線55と容量電極61が短絡したり、信号線54の形成時のエッチング不良による残留物74によって信号線54と容量電極61が短絡するケースがある。しかしながら、このような画素欠陥に対して図6、図7に示す従来例では、画素を修復することができなかった。
【0008】
そこで、このような補助容量線や信号線に短絡した画素電極に対して、その画素電極の一部分を取除いて短絡部分を分離し、表示品位の低下を防ぐものがある。こうした技術は、例えば特開2000−221527号公報に記載されている。これは画素電極の中央付近に補助容量配線上に位置するスリットを形成する。そして補助容量付近に短絡が生じた場合、スリットから画素電極のエッジまでの一部分をレーザーで切断し、短絡箇所を含む部分を画素電極から独立させる。また特開2001−83522号公報の図30には、MVA方式の液晶表示器における短絡時の修復方法が記載されている。MVA方式では、画素電極に配向規制用のスリットが複数形成されている。このスリットのなかで画素電極の中央付近のスリットを、補助容量配線上にも形成する。そして短絡時には、このスリット付近の画素電極の一部をレーザーで切断し、修復を行う。
【0009】
しかしながら、従来の方法で画素電極を修復した場合、その修復した画素では補助容量が機能しない。つまり図6、図7に示すように画素電極と容量電極を電気的に接続するものでは、切断されて独立した画素電極に容量電極が接続して、容量電極が表示に用いる画素電極から切離されてしまうため、画素電極と容量電極が同電位にならず、容量電極と補助容量配線との間で補助容量を形成することができない。従って、例え画素を修復してその画素で表示を行っても、補助容量がないために、TFTがOFFしているときに画素電極の電荷のリークによる電圧降下が生じ、その画素では適正な表示ができなかった。
【0010】
そこで本発明は、画素欠陥が生じた画素を修復でき、修復後も表示品位の低下を抑えた液晶表示器を提供することを目的とする。
【0011】
【課題を解決するための手段】
上記課題を解決するために本発明は、一対の基板間に液晶を挟持し、基板上には画素をマトリクス状に配置した液晶表示器において、一方の基板上に形成した補助容量配線と、補助容量配線を覆う絶縁膜と、補助容量配線と対向して絶縁膜上に形成した容量電極と、容量電極を覆う保護膜と、保護膜に形成すると共に容量電極の一部を露出させるコンタクトホールと、画素内に形成すると共にコンタクトホールで容量電極と接続する画素電極とを備え、画素電極に補助容量配線をまたがるスリットを形成し、1画素内の容量電極を2分割して、その各容量電極をそれぞれ画素電極に接続し、スリットは一方の容量電極が画素電極に接続する部分と他方の容量電極が画素電極に接続する部分との間に位置し、他方の基板には画素に対応したカラーフィルタが形成され、カラーフィルタ上には液晶分子の傾斜方向を規制する複数の帯状の突起が形成されていることを特徴とする。
【0012】
また、一対の基板間に液晶を挟持し、基板上には画素をマトリクス状に配置した液晶表示器において、一方の基板上に形成した補助容量配線と、補助容量配線を覆う絶縁膜と、補助容量配線と対向して絶縁膜上に形成した容量電極と、容量電極を覆う保護膜と、保護膜に形成すると共に容量電極の一部を露出させるコンタクトホールと、画素内に形成すると共にコンタクトホールで容量電極と接続する画素電極とを備え、画素電極に補助容量配線をまたがる複数のスリットを形成し、容量電極を補助容量配線上におけるスリットで区切られた画素電極に対応して複数に分割し、各容量電極を対応する画素電極に接続し、他方の基板には画素に対応したカラーフィルタが形成され、カラーフィルタ上には液晶分子の傾斜方向を規制する複数の帯状の突起が形成されていることを特徴とする。
【0013】
さらに、1画素内の各容量電極がほぼ同じ大きさであることを特徴とする。また、画素電極に液晶分子の傾斜方向を規制する複数のスリットを形成し、補助容量配線をまたがるスリットが補助容量配線付近に位置するスリットと連なっていることを特徴とする。
【0014】
また、一対の基板間に液晶を挟持し、基板上には画素をマトリクス状に配置した液晶表示器の製造方法において、一方の基板上に走査線と補助容量配線をほぼ平行に形成する工程と、走査線及び補助容量配線上に絶縁膜を積層する工程と、絶縁膜上に走査線と直交する信号線を形成する工程と、各画素内に補助容量配線と対向する複数の容量電極を絶縁膜上に形成する工程と、容量電極上に保護膜を積層する工程と、保護膜に各容量電極の一部を露出させるコンタクトホールを形成する工程と、各画素内にコンタクトホールを介して容量電極と接続する画素電極を形成する工程と、各画素電極上に補助容量配線をまたがるスリットを形成する工程と、容量電極が補助容量配線又は信号線と短絡した際に、その容量電極と接続する画素電極の一部分をその画素電極から分割する工程と、他方の基板に画素に対応したカラーフィルタを形成する工程と、カラーフィルタ上に液晶分子の傾斜方向を規制する複数の帯状の突起を形成する工程とを有することを特徴とする。
【0015】
さらに、各容量電極と画素電極との接続部分の間にスリットを形成する工程と、補助容量配線又は信号線と短絡した容量電極に沿って画素電極のエッジからスリットまで画素電極の一部を取除く工程を有することを特徴とする。また、各画素内の容量電極を2分割にすることを特徴とする。
【0016】
【発明の実施の形態】
以下、本発明の実施の形態を図に基づいて説明する。図1は画素電極を有するアレイ基板10の平面図、図2は補助容量配線3に沿った液晶表示器の断面図、図3は画素電極6のスリット8と対向基板20上の突起25との位置関係を示す模式図である。
【0017】
1はアレイ基板10を構成する第一基板であり、ガラス基板などの透明基板により形成されている。2はAlなどで形成された走査線、3は走査線2と同時形成される補助容量配線であり、走査線2と補助容量配線3は平行に配置される。4は走査線2や補助容量配線3上に積層されるゲート絶縁膜であり、ゲート絶縁膜4上にはAl又はCr等からなる信号線5が形成される。この信号線5を走査線2に直交するように配置し、走査線2と信号線5で囲まれる領域が1画素に相当する。各画素内にはITO又はIZO等からなる画素電極6を形成し、走査線2と信号線5の交差部付近にはスイッチング素子であるTFT7を配置する。TFT7はゲート電極7aが走査線2に、ソース電極7bが信号線5に、ドレイン電極7cが画素電極6にそれぞれ電気的に接続されている。画素電極6にはスリット8が形成され、このスリット8により液晶分子の傾斜方向を規制する。9は信号線5やTFT7を覆う保護膜であり、画素電極6は保護膜9上に形成されている。この実施例では信号線5と画素電極6の間に保護膜9を1層だけ積層しているが、2層以上の保護膜を積層してもよい。保護膜9にはTFT7のドレイン電極7cに対応する部分にコンタクトホール11が設けられ、コンタクトホール11を介して画素電極6はドレイン電極7cと電気的に接続している。12は画素電極4を覆う配向膜であり、垂直配向処理が施されている。こうしてアレイ基板10が形成される。
【0018】
アレイ基板10に対向して対向基板20が配置される。21は対向基板20を構成する第二基板であり、第二基板21はガラス基板などの透明基板で形成されている。第二基板21上には各画素を区切るようにブラックマトリックス22が形成され、ブラックマトリックス22の開口部には各画素に対応したカラーフィルタ23が形成されている。カラーフィルタ23は各画素に対応して赤色(R)、緑色(G)、青色(B)のうちいずれか1色が配置されている。カラーフィルタ23上には例えばITOやIZO等からなる対向電極24が積層され、対向電極24上には所定パターンの突起25が形成され、対向電極24及び突起25を垂直配向処理が施された配向膜26で覆っている。こうして対向基板20が形成される。
【0019】
両基板10、20間には誘電率異方性が負の液晶層27が介在する。そして画素電極6と対向電極24の間に所定以上の電界が生じないときは液晶分子27が配向膜12、26に規制されて垂直配列し、画素電極6と対向電極24の間に所定以上の電界が発生したときは液晶分子27が水平方向に傾斜する。このとき液晶分子27はスリット8や突起25に規制されて所定の方向に傾斜し、1画素内に複数のドメインを形成する。なお図2は画素電極6と透明電極15の間に電界が発生した状態を模式的に示している。
【0020】
第一基板1の外側には第一偏光板28が、第二基板21の外側には第二偏光板29がそれぞれ配置され、第一偏光板28と第二偏光板29は互いの透過軸が直交するように設定されている。対向基板20の法線方向から観察したときに、偏光板28、29の透過軸と液晶分子27の傾斜方向が約45°を成すとき、最も効率良く透過光が第二偏光板29を通過することができる。そして液晶分子27は突起25やスリット8に対して約90°方向に傾斜するため、画素内のスリット8や突起25の延在方向と第二偏光板29の透過軸とが約45°を成すように両偏光板19、20を配置する。この実施例では第一偏光板28の透過軸が走査線2の延在方向と一致し、第二偏光板29の透過軸が信号線5の延在方向と一致するように設定する。
【0021】
そして画素電極6と透明電極15の間に所定以上の電界が生じないときは液晶分子27が垂直配列するため、第一偏光板28を通過した直線偏光の透過光が液晶層18を直線偏光のまま通過して第二偏光板29で遮断され、黒表示になる。また画素電極6に所定の電圧が印加されて画素電極6と透明電極15の間に電界が発生したとき、液晶分子27が水平方向に傾斜するため、第一偏光板28を通過した直線偏光の透過光が液晶層27により楕円偏光になり第二偏光板29を通過して、白表示になる。
【0022】
次にスリット8と突起25の形状について説明する。なお図3では突起25を点線で示している。1画素内には複数の帯状の突起25が存在し、各突起25は各画素内において第二基板21の法線方向から見たときに信号線5と約45°を成す方向に延在している。各突起25は隣接する突起25に対して平行に配置され、画素電極6のエッジから伸びる突起25が補助容量配線3上にまで達した所でほぼ直角に屈曲している。従って画素内の突起25は補助容量配線3を軸にして上下でほぼ対称に配置されている。この実施例では突起25が複数の画素にまたがってジグザク状に形成されているが、画素毎に突起25を独立して設けてもよい。
【0023】
画素電極6に形成されたスリット8は、対向基板20の法線方向から見たときに、隣り合う突起25の中間にその突起25と平行に位置する。従ってスリット8も補助容量配線3を軸にして上下でほぼ対称になっている。画素内にあるスリット8のうち、画素の中央付近に位置するスリット8aは補助容量配線3を跨いで形成され、隣接する突起25と同様に補助容量配線3上でほぼ直角に屈曲する。この補助容量配線3付近のスリット8aを、補助容量配線3を跨ぐように形成することにより、後述する画素欠陥に対する画素電極6の修復が可能になる。
【0024】
次に補助容量の構成について説明する。13は補助容量配線3に対向して配置された容量電極であり、信号線5と同時形成される。容量電極13はゲート絶縁膜4上に形成され、補助容量配線3からはみ出ない大きさであり、保護膜9によって覆われている。14は保護膜9に形成されたコンタクトホールであり、容量電極13はこのコンタクトホール14を介して画素電極6と接続する。従って容量電極13は画素電極6と同電位になり、容量電極13と補助容量配線3の間で補助容量を構成する。1画素内の容量電極13はほぼ同等の大きさに2分割され、各容量電極13はスリット8を挟んで左右に存在する画素電極6とそれぞれ接続する。つまり図2において、右側に位置する容量電極13はスリット8の右側に位置する画素電極6と接続し、左側に位置する容量電極13はスリット8の左側に位置する画素電極6と接続する。
【0025】
次に図4、図5に基づいて、容量電極13が補助容量配線3や信号線5と短絡したときの修復方法を説明する。図4及び図5は容量電極13が短絡したときの修復状態を示す平面図である。図4では、右側の容量電極13aと信号線5との間にエッチング不良による残留物30が存在し、容量電極13aと信号線5が短絡している。この画素を修復するとき、レーザによって画素電極6の一部を取除き、画素電極6に2つの溝31を形成する。この溝31はスリット8から画素電極6の右側のエッジまで補助容量配線3に沿って形成され、短絡した容量電極13aと接続する画素電極6aをその他の部分から切離す。これにより画素電極6aから分離した画素電極6は短絡した容量電極13aと離れるため、この画素により所望の表示が行える。さらに、左側の容量電極13bにより補助容量が形成されるため、画素電極6で保持期間中も画素電極6の電荷のリークを抑えることができ、最適な表示が行える。
【0026】
図5では、左側に位置する容量電極13bが短絡した場合を示す。容量電極13bと補助容量配線3の間に異物32が存在し、容量電極13bが補助容量配線3と同電位になっている。このときレーザーにより画素電極6に2本の溝31形成する。この溝31も図4の場合と同様に補助容量配線3に沿って形成され、スリット8から画素電極6の左側のエッジまで形成されている。そしてこの溝31により、容量電極13bと接続する画素電極6bをその他の部分から分離している。このとき右側の容量電極13aにより補助容量が形成されため、画素電極6は保持期間中に所定の電荷を維持することができる。なお、画素電極6の溝31は、短絡した容量電極13と接続する画素電極6をその他の部分から分離できればよく、その大きさや深さを特に限定するものではない。
【0027】
このように本発明では、容量電極13を複数に分割し、それぞれの容量電極13をスリット8で区切られた画素電極6のうち異なる領域の画素電極6と接続するため、例え容量電極13が信号線5等に短絡したときでも、画素の修復後にその画素に補助容量を残すことができる。
【0028】
この容量電極13を1画素内でほぼ均等の大きさに分割すれば、どの容量電極13が短絡したとしてもほぼ同じ容量の補助容量を残すことができ、画素の修復後においても均等な能力の補助容量を確保することができる。
【0029】
この実施例では容量電極を2分割したが、3つ以上に分割しても良い。このとき補助容量配線3上において、画素電極6がスリット8により区切られた領域毎にそれぞれ独立した容量電極を設けるとよい。つまり、スリット8により区切られた領域数と同数の容量電極13を形成し、各領域毎にその領域の画素電極6と接続する容量電極13を配置する。こうすることにより、画素欠陥を修復した後の補助容量の減少を最低限に抑えることができる。
【0030】
【発明の効果】
本発明によれば、容量電極が信号線や補助容量配線と短絡して画素欠陥が生じたときに、その画素を修復した後でも補助容量が存在するため、表示品位の低下を防ぐことができる。
【図面の簡単な説明】
【図1】本発明の実施例である液晶表示器のアレイ基板の平面図である。
【図2】本発明の液晶表示器の補助容量配線に沿った断面概略図である。
【図3】本発明の突起と画素電極のスリットとの位置関係を示した模式図である。
【図4】本発明の容量電極が信号線に短絡した際の修復状態を示す模式図である。
【図5】本発明の容量電極が補助容量配線に短絡した際の修復状態を示す模式図である。
【図6】従来の液晶表示器のアレイ基板の平面図である。
【図7】従来の液晶表示器の補助容量配線に沿った断面図である。
【符号の説明】
1 第一基板
3 補助容量配線
5 信号線
6 画素電極
8 スリット
10 アレイ基板
13 容量電極
14 コンタクトホール
20 対向基板
21 第二基板
25 突起
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a liquid crystal display with a wide viewing angle in which a plurality of domains are provided in one pixel, and more particularly to a liquid crystal display capable of repairing point defects.
[0002]
[Prior art]
Liquid crystal displays are widely used from portable terminals to large-sized televisions, taking advantage of their thin and light weight and low power consumption. Until now, there have been many still images in the images displayed on the liquid crystal display, but there are many cases where moving images are displayed due to the distribution of moving images via mobile phones and the development of liquid crystal televisions. The performance of the liquid crystal display is wide viewing angle and high speed. Response and other factors have become important. In order to improve the viewing angle, for example, an MVA (Multi-domain vertically aligned) method in which a plurality of domains are formed in one pixel by providing protrusions and grooves in the pixel has been proposed. This is described in, for example, Japanese Patent No. 3005418 and Japanese Patent No. 3011720.
[0003]
This conventional MVA type liquid crystal display will be described with reference to FIGS. 6 is a plan view of one pixel on the array substrate side, and FIG. 7 is a cross-sectional view of the liquid crystal display. FIG. 7 corresponds to a cross-sectional view on the auxiliary capacitance wiring.
[0004]
Of the pair of glass substrates arranged in parallel and opposite to each other, a scanning line 53, a signal line 54, a TFT 57, and a pixel electrode 59 are formed on one glass substrate 52 to be the array substrate 50, and the other glass to be the counter substrate 51. A color filter 65, a counter electrode 66, and a protrusion 67 are formed on the substrate 63. In FIG. 6, the color filter 65 and the protrusion 67 are omitted. The scanning lines 53 and the signal lines 54 are wired in a matrix, and TFTs 57 are formed at intersections thereof, and pixel electrodes 59 are formed in a region surrounded by the scanning lines 53 and the signal lines 54. The gate electrode of the TFT 57 is electrically connected to the scanning line 53, the source electrode is electrically connected to the signal line 54, and the drain electrode is electrically connected to the pixel electrode 59. A slit 69 is formed in the pixel electrode 59, and a plurality of band-like protrusions 67 are formed in a zigzag shape on the counter electrode 51. The slit 69 is located between the plurality of protrusions 67 and is formed substantially parallel to the adjacent protrusions 67. Alignment films 60 and 68 are stacked on the pixel electrode 59 and the counter electrode 66, respectively, and when no voltage is applied to the pixel electrode 59, the liquid crystal molecules 70 are vertically aligned due to the influence of the alignment films 60 and 68.
[0005]
When a predetermined voltage or higher is applied to the pixel electrode 59, the liquid crystal molecules 70 are tilted. At this time, when viewed from the normal direction of the counter substrate 51, the liquid crystal molecules 70 are inclined in the 90 ° direction with respect to the protrusions 67 and the slits 89, and are inclined in the opposite direction with respect to the protrusions 67 and the slits 89. A pair of crossed Nicols polarizing plates 71 and 72 are arranged outside the pair of glass substrates 52 and 63 so that the angle formed by the transmission axis of the polarizing plates 71 and 72 and the extending direction of the protrusion 67 is about 45 °. The angle between the tilted liquid crystal molecules 70 and the transmission axes of the polarizing plates 71 and 72 when viewed from the normal direction of the polarizing plates 71 and 72 is set to 45 °. When the angle between the tilted liquid crystal molecules 70 and the transmission axes of the polarizing plates 71 and 72 is 45 °, the transmitted light can be most efficiently obtained from the polarizing plate.
[0006]
A storage capacitor line 55 is provided near the center of each pixel. The auxiliary capacitance line 55 is formed at the same time as the scanning line 53 is formed, and is arranged in parallel with the scanning line 53. The auxiliary capacitance line 55 is covered with a gate insulating film 56 similarly to the scanning line 53, and a capacitance electrode 61 is formed on the gate insulating film 56 at a position facing the auxiliary capacitance line 55. The capacitor electrode 61 is formed simultaneously with the signal line 54, but is independent so as not to be electrically connected to the signal line 54. A protective film 58 made of, for example, SiNx is laminated on the signal line 54 and the capacitor electrode 61, and a contact hole 62 for exposing a part of the capacitor electrode 61 is formed in the protective film 58. The pixel electrode 59 is formed on the protective film 58, and the pixel electrode 59 and the capacitor electrode 61 are electrically connected via the contact hole 62. Accordingly, the pixel electrode 59 and the capacitor electrode 61 are at the same potential, and an auxiliary capacitor is formed by the auxiliary capacitor line 55 and the capacitor electrode 61.
[0007]
[Problems to be solved by the invention]
When the capacitor electrode is electrically connected to the auxiliary capacitor wiring or the signal line, a voltage applied to the pixel electrode leaks through the connection portion, which causes a display defect. For example, the foreign substance 73 is mixed in the gate insulating film 56 and the auxiliary capacitance line 55 and the capacitance electrode 61 are short-circuited, or the signal line 54 and the capacitance electrode 61 are short-circuited by the residue 74 due to the etching failure when forming the signal line 54. There is a case. However, in the conventional example shown in FIGS. 6 and 7 for such a pixel defect, the pixel cannot be repaired.
[0008]
Therefore, there is a pixel electrode that is short-circuited to such an auxiliary capacitance line or a signal line, by removing a part of the pixel electrode and separating the short-circuited portion, thereby preventing a deterioration in display quality. Such a technique is described in, for example, Japanese Patent Application Laid-Open No. 2000-221527. This forms a slit located on the storage capacitor line near the center of the pixel electrode. When a short circuit occurs in the vicinity of the auxiliary capacitor, a part from the slit to the edge of the pixel electrode is cut with a laser, and a part including the short circuit part is made independent from the pixel electrode. Further, FIG. 30 of Japanese Patent Laid-Open No. 2001-83522 describes a repair method at the time of a short circuit in an MVA liquid crystal display. In the MVA method, a plurality of alignment regulating slits are formed in the pixel electrode. Among these slits, a slit near the center of the pixel electrode is also formed on the auxiliary capacitance wiring. At the time of short circuit, a part of the pixel electrode in the vicinity of the slit is cut with a laser for repair.
[0009]
However, when the pixel electrode is repaired by the conventional method, the auxiliary capacitor does not function in the repaired pixel. That is, in the case where the pixel electrode and the capacitor electrode are electrically connected as shown in FIGS. 6 and 7, the capacitor electrode is connected to the cut and independent pixel electrode, and the capacitor electrode is separated from the pixel electrode used for display. Therefore, the pixel electrode and the capacitor electrode are not at the same potential, and an auxiliary capacitor cannot be formed between the capacitor electrode and the auxiliary capacitor line. Therefore, even if a pixel is repaired and displayed on that pixel, since there is no auxiliary capacitance, a voltage drop occurs due to charge leakage of the pixel electrode when the TFT is OFF, and an appropriate display is displayed on that pixel. I could not.
[0010]
Accordingly, an object of the present invention is to provide a liquid crystal display capable of repairing a pixel in which a pixel defect has occurred, and suppressing deterioration in display quality even after the repair.
[0011]
[Means for Solving the Problems]
In order to solve the above problems, the present invention provides a liquid crystal display in which a liquid crystal is sandwiched between a pair of substrates and pixels are arranged in a matrix on the substrate. An insulating film covering the capacitive wiring; a capacitive electrode formed on the insulating film facing the auxiliary capacitive wiring; a protective film covering the capacitive electrode; a contact hole formed on the protective film and exposing a part of the capacitive electrode; A pixel electrode that is formed in the pixel and connected to the capacitor electrode through a contact hole, a slit that extends over the auxiliary capacitor wiring is formed in the pixel electrode, the capacitor electrode in one pixel is divided into two, and each capacitor electrode The slit is located between the portion where one capacitor electrode is connected to the pixel electrode and the portion where the other capacitor electrode is connected to the pixel electrode, and the other substrate has a column corresponding to the pixel. Filter is formed on the color filter, wherein a plurality of strip-shaped projections for regulating the inclining direction of the liquid crystal molecules is formed.
[0012]
In addition, in a liquid crystal display in which a liquid crystal is sandwiched between a pair of substrates and pixels are arranged in a matrix on the substrate, an auxiliary capacitance line formed on one substrate, an insulating film covering the auxiliary capacitance line, and an auxiliary A capacitor electrode formed on the insulating film opposite to the capacitor wiring, a protective film covering the capacitor electrode, a contact hole formed in the protective film and exposing a part of the capacitor electrode, and a contact hole formed in the pixel And a pixel electrode connected to the capacitor electrode, forming a plurality of slits across the auxiliary capacitor wiring in the pixel electrode, and dividing the capacitor electrode into a plurality corresponding to the pixel electrodes delimited by the slit on the auxiliary capacitor wire Each capacitor electrode is connected to a corresponding pixel electrode, and a color filter corresponding to the pixel is formed on the other substrate, and a plurality of bands for regulating the tilt direction of the liquid crystal molecules are formed on the color filter. Wherein the protrusions are formed.
[0013]
Further, each capacitor electrode in one pixel is approximately the same size. In addition, the pixel electrode is formed with a plurality of slits for restricting the tilt direction of the liquid crystal molecules, and the slits straddling the auxiliary capacitance lines are connected to the slits located in the vicinity of the auxiliary capacitance lines.
[0014]
Further, in a method for manufacturing a liquid crystal display in which liquid crystal is sandwiched between a pair of substrates and pixels are arranged in a matrix on the substrate, a step of forming the scanning lines and the auxiliary capacitance lines on the one substrate substantially in parallel. , A step of laminating an insulating film on the scanning line and the auxiliary capacitance wiring, a step of forming a signal line orthogonal to the scanning line on the insulating film, and insulating a plurality of capacitance electrodes facing the auxiliary capacitance wiring in each pixel A step of forming on the film, a step of laminating a protective film on the capacitive electrode, a step of forming a contact hole in the protective film to expose a part of each capacitive electrode, and a capacitance in each pixel via the contact hole A step of forming a pixel electrode to be connected to the electrode, a step of forming a slit across the auxiliary capacitance line on each pixel electrode, and a connection between the capacitance electrode when the capacitance electrode is short-circuited with the auxiliary capacitance line or the signal line One of the pixel electrodes Dividing the portion from the pixel electrode, forming a color filter corresponding to the pixel on the other substrate, and forming a plurality of strip-shaped protrusions for regulating the tilt direction of the liquid crystal molecules on the color filter. It is characterized by having.
[0015]
Further, a step of forming a slit between the connection portions of each capacitor electrode and the pixel electrode, and a part of the pixel electrode from the edge of the pixel electrode to the slit along the capacitor electrode short-circuited with the auxiliary capacitor wiring or the signal line. It has the process of removing. Further, the capacitor electrode in each pixel is divided into two.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a plan view of an array substrate 10 having pixel electrodes, FIG. 2 is a cross-sectional view of a liquid crystal display along the auxiliary capacitance wiring 3, and FIG. 3 shows the slits 8 of the pixel electrodes 6 and the protrusions 25 on the counter substrate 20. It is a schematic diagram which shows a positional relationship.
[0017]
Reference numeral 1 denotes a first substrate constituting the array substrate 10, which is formed of a transparent substrate such as a glass substrate. 2 is a scanning line formed of Al or the like, 3 is an auxiliary capacitance line formed simultaneously with the scanning line 2, and the scanning line 2 and the auxiliary capacitance line 3 are arranged in parallel. Reference numeral 4 denotes a gate insulating film stacked on the scanning line 2 and the auxiliary capacitance wiring 3, and a signal line 5 made of Al, Cr, or the like is formed on the gate insulating film 4. The signal line 5 is arranged so as to be orthogonal to the scanning line 2, and a region surrounded by the scanning line 2 and the signal line 5 corresponds to one pixel. A pixel electrode 6 made of ITO, IZO or the like is formed in each pixel, and a TFT 7 serving as a switching element is disposed near the intersection of the scanning line 2 and the signal line 5. In the TFT 7, the gate electrode 7 a is electrically connected to the scanning line 2, the source electrode 7 b is electrically connected to the signal line 5, and the drain electrode 7 c is electrically connected to the pixel electrode 6. A slit 8 is formed in the pixel electrode 6, and the tilt direction of liquid crystal molecules is regulated by the slit 8. A protective film 9 covers the signal line 5 and the TFT 7, and the pixel electrode 6 is formed on the protective film 9. In this embodiment, only one protective film 9 is laminated between the signal line 5 and the pixel electrode 6, but two or more protective films may be laminated. A contact hole 11 is provided in the protective film 9 at a portion corresponding to the drain electrode 7 c of the TFT 7, and the pixel electrode 6 is electrically connected to the drain electrode 7 c through the contact hole 11. An alignment film 12 covers the pixel electrode 4 and is subjected to a vertical alignment process. Thus, the array substrate 10 is formed.
[0018]
A counter substrate 20 is disposed to face the array substrate 10. Reference numeral 21 denotes a second substrate constituting the counter substrate 20, and the second substrate 21 is formed of a transparent substrate such as a glass substrate. A black matrix 22 is formed on the second substrate 21 so as to divide each pixel, and a color filter 23 corresponding to each pixel is formed in an opening of the black matrix 22. The color filter 23 is arranged with any one of red (R), green (G), and blue (B) corresponding to each pixel. A counter electrode 24 made of, for example, ITO or IZO is laminated on the color filter 23, and projections 25 having a predetermined pattern are formed on the counter electrode 24. The counter electrode 24 and the projections 25 are subjected to vertical alignment processing. It is covered with a film 26. In this way, the counter substrate 20 is formed.
[0019]
A liquid crystal layer 27 having a negative dielectric anisotropy is interposed between the substrates 10 and 20. When an electric field of a predetermined level or higher is not generated between the pixel electrode 6 and the counter electrode 24, the liquid crystal molecules 27 are vertically aligned by being regulated by the alignment films 12 and 26, and a predetermined level or higher is set between the pixel electrode 6 and the counter electrode 24. When an electric field is generated, the liquid crystal molecules 27 are tilted in the horizontal direction. At this time, the liquid crystal molecules 27 are restricted by the slits 8 and the protrusions 25 and are inclined in a predetermined direction to form a plurality of domains in one pixel. FIG. 2 schematically shows a state where an electric field is generated between the pixel electrode 6 and the transparent electrode 15.
[0020]
A first polarizing plate 28 is disposed outside the first substrate 1, and a second polarizing plate 29 is disposed outside the second substrate 21, and the first polarizing plate 28 and the second polarizing plate 29 have transmission axes of each other. It is set to be orthogonal. When observed from the normal direction of the counter substrate 20, the transmitted light passes through the second polarizing plate 29 most efficiently when the transmission axis of the polarizing plates 28 and 29 and the inclination direction of the liquid crystal molecules 27 form about 45 °. be able to. Since the liquid crystal molecules 27 are inclined in the direction of about 90 ° with respect to the protrusions 25 and the slits 8, the extending direction of the slits 8 and the protrusions 25 in the pixel and the transmission axis of the second polarizing plate 29 form about 45 °. Thus, both polarizing plates 19 and 20 are arranged. In this embodiment, the transmission axis of the first polarizing plate 28 is set to coincide with the extending direction of the scanning line 2, and the transmission axis of the second polarizing plate 29 is set to match the extending direction of the signal line 5.
[0021]
When no electric field of a predetermined level or more is generated between the pixel electrode 6 and the transparent electrode 15, the liquid crystal molecules 27 are vertically aligned, so that the linearly polarized transmitted light that has passed through the first polarizing plate 28 passes through the liquid crystal layer 18 to be linearly polarized. It passes through as it is and is blocked by the second polarizing plate 29 to display black. Further, when a predetermined voltage is applied to the pixel electrode 6 and an electric field is generated between the pixel electrode 6 and the transparent electrode 15, the liquid crystal molecules 27 tilt in the horizontal direction. The transmitted light becomes elliptically polarized light by the liquid crystal layer 27, passes through the second polarizing plate 29, and becomes white display.
[0022]
Next, the shapes of the slit 8 and the protrusion 25 will be described. In FIG. 3, the protrusion 25 is indicated by a dotted line. A plurality of band-like protrusions 25 exist in one pixel, and each protrusion 25 extends in a direction that forms about 45 ° with the signal line 5 when viewed from the normal direction of the second substrate 21 in each pixel. ing. Each protrusion 25 is arranged in parallel to the adjacent protrusion 25, and is bent substantially at a right angle when the protrusion 25 extending from the edge of the pixel electrode 6 reaches the auxiliary capacitance wiring 3. Accordingly, the protrusions 25 in the pixel are arranged substantially symmetrically in the vertical direction with the auxiliary capacitance line 3 as an axis. In this embodiment, the protrusions 25 are formed in a zigzag shape across a plurality of pixels, but the protrusions 25 may be provided independently for each pixel.
[0023]
The slit 8 formed in the pixel electrode 6 is positioned in parallel with the protrusion 25 in the middle of the adjacent protrusions 25 when viewed from the normal direction of the counter substrate 20. Therefore, the slit 8 is also almost symmetrical in the vertical direction with the auxiliary capacitance wiring 3 as an axis. Of the slits 8 in the pixel, the slit 8 a located near the center of the pixel is formed so as to straddle the auxiliary capacitance line 3, and bends substantially at right angles on the auxiliary capacitance line 3 like the adjacent protrusion 25. By forming the slit 8a in the vicinity of the auxiliary capacitance line 3 so as to straddle the auxiliary capacitance line 3, it becomes possible to repair the pixel electrode 6 for a pixel defect to be described later.
[0024]
Next, the configuration of the auxiliary capacity will be described. Reference numeral 13 denotes a capacitor electrode disposed to face the auxiliary capacitor line 3 and is formed simultaneously with the signal line 5. The capacitor electrode 13 is formed on the gate insulating film 4, has a size that does not protrude from the auxiliary capacitor wiring 3, and is covered with the protective film 9. Reference numeral 14 denotes a contact hole formed in the protective film 9, and the capacitor electrode 13 is connected to the pixel electrode 6 through the contact hole 14. Therefore, the capacitor electrode 13 has the same potential as the pixel electrode 6 and constitutes an auxiliary capacitor between the capacitor electrode 13 and the auxiliary capacitor line 3. The capacitor electrode 13 in one pixel is divided into two substantially equal sizes, and each capacitor electrode 13 is connected to the pixel electrode 6 existing on the left and right with the slit 8 interposed therebetween. That is, in FIG. 2, the capacitor electrode 13 located on the right side is connected to the pixel electrode 6 located on the right side of the slit 8, and the capacitor electrode 13 located on the left side is connected to the pixel electrode 6 located on the left side of the slit 8.
[0025]
Next, based on FIG. 4 and FIG. 5, a repair method when the capacitor electrode 13 is short-circuited with the auxiliary capacitor line 3 and the signal line 5 will be described. 4 and 5 are plan views showing a repaired state when the capacitor electrode 13 is short-circuited. In FIG. 4, a residue 30 due to defective etching exists between the right capacitive electrode 13a and the signal line 5, and the capacitive electrode 13a and the signal line 5 are short-circuited. When repairing this pixel, a part of the pixel electrode 6 is removed by a laser, and two grooves 31 are formed in the pixel electrode 6. The groove 31 is formed along the auxiliary capacitance wiring 3 from the slit 8 to the right edge of the pixel electrode 6 and separates the pixel electrode 6a connected to the short-circuited capacitance electrode 13a from other portions. As a result, the pixel electrode 6 separated from the pixel electrode 6a is separated from the short-circuited capacitor electrode 13a, so that a desired display can be performed by this pixel. Further, since the auxiliary capacitor is formed by the left capacitor electrode 13b, the pixel electrode 6 can be prevented from leaking charges during the holding period, and an optimal display can be performed.
[0026]
FIG. 5 shows a case where the capacitor electrode 13b located on the left side is short-circuited. A foreign substance 32 exists between the capacitance electrode 13 b and the auxiliary capacitance line 3, and the capacitance electrode 13 b is at the same potential as the auxiliary capacitance line 3. At this time, two grooves 31 are formed in the pixel electrode 6 by a laser. This groove 31 is also formed along the auxiliary capacitance wiring 3 as in the case of FIG. 4 and is formed from the slit 8 to the left edge of the pixel electrode 6. The groove 31 separates the pixel electrode 6b connected to the capacitor electrode 13b from other portions. At this time, since the auxiliary capacitor is formed by the right capacitor electrode 13a, the pixel electrode 6 can maintain a predetermined charge during the holding period. Note that the groove 31 of the pixel electrode 6 is not particularly limited in size and depth as long as the pixel electrode 6 connected to the short-circuited capacitor electrode 13 can be separated from other portions.
[0027]
As described above, in the present invention, the capacitive electrode 13 is divided into a plurality of parts, and each capacitive electrode 13 is connected to the pixel electrode 6 in a different region among the pixel electrodes 6 divided by the slits 8. Even when short-circuited to the line 5 or the like, an auxiliary capacitor can be left in the pixel after the pixel is repaired.
[0028]
If this capacitive electrode 13 is divided into substantially equal sizes within one pixel, it is possible to leave an auxiliary capacitor having substantially the same capacity regardless of which capacitive electrode 13 is short-circuited, and even capacity after repairing the pixel. Auxiliary capacity can be secured.
[0029]
In this embodiment, the capacitive electrode is divided into two, but it may be divided into three or more. At this time, it is preferable to provide independent capacitance electrodes for each region where the pixel electrode 6 is divided by the slit 8 on the auxiliary capacitance wiring 3. That is, the same number of capacitor electrodes 13 as the number of regions divided by the slits 8 are formed, and the capacitor electrodes 13 connected to the pixel electrodes 6 in the regions are arranged for each region. By doing so, it is possible to minimize the decrease in the auxiliary capacitance after the pixel defect is repaired.
[0030]
【The invention's effect】
According to the present invention, when a capacitor defect is short-circuited with a signal line or an auxiliary capacitor wiring and a pixel defect occurs, an auxiliary capacitor is present even after the pixel is repaired, so that deterioration in display quality can be prevented. .
[Brief description of the drawings]
FIG. 1 is a plan view of an array substrate of a liquid crystal display which is an embodiment of the present invention.
FIG. 2 is a schematic cross-sectional view along the storage capacitor line of the liquid crystal display of the present invention.
FIG. 3 is a schematic diagram showing the positional relationship between the protrusions of the present invention and the slits of the pixel electrode.
FIG. 4 is a schematic diagram showing a repaired state when the capacitive electrode of the present invention is short-circuited to a signal line.
FIG. 5 is a schematic diagram showing a repaired state when the capacitor electrode of the present invention is short-circuited to the auxiliary capacitor wiring.
FIG. 6 is a plan view of an array substrate of a conventional liquid crystal display.
FIG. 7 is a cross-sectional view taken along an auxiliary capacitance line of a conventional liquid crystal display.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 1st board | substrate 3 Auxiliary capacity | capacitance wiring 5 Signal line 6 Pixel electrode 8 Slit 10 Array substrate 13 Capacitance electrode 14 Contact hole 20 Opposite substrate 21 Second substrate 25 Protrusion

Claims (7)

一対の基板間に液晶を挟持し、前記基板上には画素をマトリクス状に配置した液晶表示器において、一方の基板上に形成した補助容量配線と、前記補助容量配線を覆う絶縁膜と、前記補助容量配線と対向して前記絶縁膜上に形成した容量電極と、前記容量電極を覆う保護膜と、前記保護膜に形成すると共に前記容量電極の一部を露出させるコンタクトホールと、画素内に形成すると共に前記コンタクトホールで前記容量電極と接続する画素電極とを備え、前記画素電極に前記補助容量配線をまたがるスリットを形成し、1画素内の前記容量電極を2分割して、その各容量電極をそれぞれ前記画素電極に接続し、前記スリットは一方の容量電極が前記画素電極に接続する部分と他方の容量電極が前記画素電極に接続する部分との間に位置し、他方の基板には画素に対応したカラーフィルタが形成され、前記カラーフィルタ上には液晶分子の傾斜方向を規制する複数の帯状の突起が形成されていることを特徴とする液晶表示器。  In a liquid crystal display in which a liquid crystal is sandwiched between a pair of substrates and pixels are arranged in a matrix on the substrate, an auxiliary capacitance line formed on one substrate, an insulating film covering the auxiliary capacitance line, A capacitance electrode formed on the insulating film facing the auxiliary capacitance wiring, a protective film covering the capacitance electrode, a contact hole formed in the protective film and exposing a part of the capacitance electrode, and in the pixel A pixel electrode that is formed and connected to the capacitor electrode through the contact hole, a slit is formed in the pixel electrode so as to straddle the auxiliary capacitor wiring, and the capacitor electrode in one pixel is divided into two, and each of the capacitors Each electrode is connected to the pixel electrode, and the slit is located between a portion where one capacitor electrode is connected to the pixel electrode and a portion where the other capacitor electrode is connected to the pixel electrode, and the other The substrate is a color filter corresponding to the pixel is formed, the liquid crystal display device, characterized in that the on the color filter a plurality of strip-shaped projections for regulating the inclining direction of the liquid crystal molecules is formed. 一対の基板間に液晶を挟持し、前記基板上には画素をマトリクス状に配置した液晶表示器において、一方の基板上に形成した補助容量配線と、前記補助容量配線を覆う絶縁膜と、前記補助容量配線と対向して前記絶縁膜上に形成した容量電極と、前記容量電極を覆う保護膜と、前記保護膜に形成すると共に前記容量電極の一部を露出させるコンタクトホールと、画素内に形成すると共に前記コンタクトホールで前記容量電極と接続する画素電極とを備え、前記画素電極に前記補助容量配線をまたがる複数のスリットを形成し、前記容量電極を前記補助容量配線上における前記スリットで区切られた前記画素電極に対応して複数に分割し、各容量電極を対応する前記画素電極に接続し、他方の基板には画素に対応したカラーフィルタが形成され、前記カラーフィルタ上には液晶分子の傾斜方向を規制する複数の帯状の突起が形成されていることを特徴とする液晶表示器。  In a liquid crystal display in which a liquid crystal is sandwiched between a pair of substrates and pixels are arranged in a matrix on the substrate, an auxiliary capacitance line formed on one substrate, an insulating film covering the auxiliary capacitance line, A capacitance electrode formed on the insulating film facing the auxiliary capacitance wiring, a protective film covering the capacitance electrode, a contact hole formed in the protective film and exposing a part of the capacitance electrode, and in the pixel A pixel electrode connected to the capacitor electrode through the contact hole, and forming a plurality of slits across the auxiliary capacitor wiring in the pixel electrode, and the capacitor electrode is divided by the slit on the auxiliary capacitor wire The pixel electrode is divided into a plurality of parts corresponding to the pixel electrodes, each capacitor electrode is connected to the corresponding pixel electrode, and a color filter corresponding to the pixel is formed on the other substrate. The liquid crystal display device is on the color filter, wherein a plurality of strip-shaped projections for regulating the inclining direction of the liquid crystal molecules is formed. 1画素内の各容量電極がほぼ同じ大きさであることを特徴とする請求項1又は請求項2に記載の液晶表示器。  3. The liquid crystal display according to claim 1, wherein each capacitor electrode in one pixel has substantially the same size. 前記画素電極に液晶分子の傾斜方向を規制する複数のスリットを形成し、前記補助容量配線を跨るスリットが前記補助容量配線付近に位置するスリットと連なっていることを特徴とする請求項1〜請求項3のいずれかに記載の液晶表示器。  2. A plurality of slits for regulating a tilt direction of liquid crystal molecules is formed in the pixel electrode, and the slits straddling the auxiliary capacitance line are connected to a slit located in the vicinity of the auxiliary capacitance line. Item 4. The liquid crystal display according to any one of Items 3 to 4. 一対の基板間に液晶を挟持し、前記基板上には画素をマトリクス状に配置した液晶表示器の製造方法において、一方の基板上に走査線と補助容量配線をほぼ平行に形成する工程と、前記走査線及び前記補助容量配線上に絶縁膜を積層する工程と、絶縁膜上に走査線と直交する信号線を形成する工程と、各画素内に前記補助容量配線と対向する複数の容量電極を前記絶縁膜上に形成する工程と、前記容量電極上に保護膜を積層する工程と、前記保護膜に各容量電極の一部を露出させるコンタクトホールを形成する工程と、各画素内にコンタクトホールを介して前記容量電極と接続する画素電極を形成する工程と、各画素電極上に補助容量配線をまたがるスリットを形成する工程と、前記容量電極が前記補助容量配線又は前記信号線と短絡した際に、その容量電極と接続する画素電極の一部分をその画素電極から分割する工程と、他方の基板に画素に対応したカラーフィルタを形成する工程と、前記カラーフィルタ上に液晶分子の傾斜方向を規制する複数の帯状の突起を形成する工程を有することを特徴とする液晶表示器の製造方法。  In a method for manufacturing a liquid crystal display in which a liquid crystal is sandwiched between a pair of substrates and pixels are arranged in a matrix on the substrate, a step of forming scanning lines and auxiliary capacitance lines on the one substrate substantially in parallel; A step of laminating an insulating film on the scanning line and the auxiliary capacitance line; a step of forming a signal line orthogonal to the scanning line on the insulating film; and a plurality of capacitance electrodes facing the auxiliary capacitance line in each pixel Forming on the insulating film, laminating a protective film on the capacitive electrode, forming a contact hole exposing a part of each capacitive electrode in the protective film, and contacting in each pixel Forming a pixel electrode connected to the capacitor electrode through a hole; forming a slit across the auxiliary capacitor line on each pixel electrode; and the capacitor electrode short-circuited with the auxiliary capacitor line or the signal line When A step of dividing a part of the pixel electrode connected to the capacitor electrode from the pixel electrode, a step of forming a color filter corresponding to the pixel on the other substrate, and a tilt direction of liquid crystal molecules on the color filter A method of manufacturing a liquid crystal display, comprising a step of forming a plurality of strip-shaped protrusions. 各容量電極と画素電極との接続部分の間に前記スリットを形成する工程と、補助容量配線又は信号線と短絡した容量電極に沿って画素電極のエッジからスリットまで画素電極の一部を取除く工程を有することを特徴とする請求項5に記載の液晶表示器の製造方法。  A step of forming the slit between the connection portions of the capacitor electrodes and the pixel electrode, and removing a part of the pixel electrode from the edge of the pixel electrode to the slit along the capacitor electrode short-circuited with the auxiliary capacitor wiring or the signal line. 6. The method of manufacturing a liquid crystal display according to claim 5, further comprising a step. 各画素内の容量電極を2分割にすることを特徴とする請求項5又は請求項6に記載の液晶表示器の製造方法7. The method of manufacturing a liquid crystal display according to claim 5, wherein the capacitive electrode in each pixel is divided into two.
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