JP3941309B2 - Gate drive circuit for voltage-driven switching element - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a gate drive circuit for a voltage-driven switching element such as an FET or an IGBT.
[0002]
[Prior art]
FIG. 9 shows a general circuit configuration of a voltage source inverter using an IGBT (Insulated Gate Bipolar Transistor). The alternating current power is supplied from the direct current power source E to the motor of the load by alternately turning on and off the IGBTs constituting the upper and lower series three arms. In the figure, Ls is the stray inductance of the main circuit wiring. However, in recent years, the inverter mounting technology has advanced, and it has become possible to reduce Ls, which has been close to 1 μH, to 150 nH or less. As a result, energy stored in the floating inductance Ls is reduced, so that a snubber circuit (for example, FIG. 10) for suppressing the jumping voltage at the time of switching becomes unnecessary, and the simplification of the main circuit can be realized. Yes.
[0003]
However, the idle inductance Ls of the main circuit wiring also played a role of suppressing di / dt at the time of turn-on, and the snubber circuit (for example, FIG. 10) also played a role of suppressing dv / dt at the time of turn-off. There is a new problem that high di / dt and high dv / dt occur at the time of switching.
[0004]
[Problems to be solved by the invention]
Higher di / dt and higher dv / dt in the switching operation of the inverter circuit not only cause a malfunction of the peripheral device but also adversely affect the load motor. For example, in a vehicle inverter, a load motor is often installed at a location away from the inverter. In addition to the inductance Ls ′, the motor wiring includes a stray capacitance Cs ′ as indicated by a broken line in FIG. For this reason, as the dv / dt of the inverter increases, the impedance of the motor of the load becomes larger, and resonance due to Ls ′ and Cs ′ occurs. For this reason, a voltage close to twice the output voltage of the inverter is applied to the motor, which may cause failure such as motor breakdown. For this reason, suppression of di / dt and dv / dt during IGBT switching is an important issue.
[0005]
It is known that the switching speed of turn-on and turn-off of an IGBT, which is a voltage-driven switching element, can be suppressed by increasing the gate drive method, for example, increasing the gate resistance and increasing the charging time constant of the gate capacitance of the IGBT. However, an improvement in switching the gate resistance of the gate drive circuit in accordance with the switching timing of the IGBT has been proposed because the switching time becomes long only by this method and the loss in the IGBT becomes too large (Japanese Patent Laid-Open No. Hei 1). -183214, JP-A-3-93457, JP-A-6-291631, JP-A-8-322240, JP-A-10-150764, etc.). However, if the di / dt and dv / dt variable ranges are to be widened by switching the gate resistance, a large number of resistors and switches for switching the resistors are required, and the switching control becomes complicated.
[0006]
An object of the present invention is to suppress di / dt and dv / dt during switching while suppressing an increase in switching time or loss of a voltage-driven switching element such as an IGBT.
[0007]
[Means for Solving the Problems]
In the present invention, when the voltage-driven switching element is turned on, the driving means for amplifying a signal for controlling the switching operation of the voltage-driven switching element, and the operation state (main voltage or main current or means for detecting a gate voltage), which provided a power decrease means for gradually lowering with the output power during turn-on of the drive means over time, gradually and power increase means for increasing the output power is lowered It is.
[0008]
In the present invention, when the voltage-driven switching element is turned off, the driving means for amplifying a signal for controlling the switching operation of the voltage-driven switching element and the operating state (main voltage or main current) of the voltage-driven switching element. (Or gate voltage) detecting means, power increasing means for gradually increasing the output power when the driving means is turned off, and power decreasing means for gradually decreasing the output power are provided, and voltage driven switching By switching from the power lowering means to the power increasing means according to the detected value of the operating state of the element, the amount of suppression of di / dt and dv / dt at the time of turn-off of the voltage driven switching element can be varied. Yes.
[0009]
Further, according to the present invention, driving means for amplifying a signal for controlling the switching operation of the voltage driven switching element, means for detecting an operating state (main voltage or main current or gate voltage) of the voltage driven switching element, and driving means There are provided means for gradually decreasing or increasing the output power at the time of turn-on or turn-off with time, detection means for detecting the temperature of the voltage-driven switching element, and means for converting the temperature detection amount into voltage, Depending on the detected value of the operating state (main voltage or main current or gate voltage) of the voltage-driven switching element and the temperature detection amount of the voltage-driven switching element, the power increasing means or the power increasing means of the driving means By changing the timing of switching from the power drop means to the power drop means, the voltage-driven switching element is turned on or off. When di / dt, is to be able to vary the suppression amount of dv / dt.
[0010]
Furthermore, in the present invention, the power increasing means and the power decreasing means are realized by a simple configuration of a resistor, a capacitor, and a switching element in parallel or in series.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a functional configuration diagram of an IGBT gate drive circuit 101 showing an embodiment of the present invention. The IGBT module 102 to which the gate drive circuit 101 is connected is one element that constitutes a power converter as shown in FIG. 9, for example. The output of the driving means 107 that amplifies the signal for controlling on / off of the IGBT is connected between the gate and the emitter of the IGBT, and the power raising means 105 and the power lowering means 106 that change the output power transiently are the driving means 107. Connected in series. Switching from the power lowering means to the power increasing means is performed according to the operation state of the IGBT (collector voltage or collector current or gate voltage). In this case, the gate voltage exceeds the reference voltage set by the reference voltage setting means 108. Is going. Hereinafter, the operation of the gate drive circuit 101 will be specifically described with reference to the operation waveform of the IGBT. In the figure, 103 is a comparison circuit, and 104 is a gate voltage detector.
[0012]
FIG. 2 shows an example of an operation waveform of IGBT turn-on, and FIG. 3 shows an example of operation waveform of turn-off. 2A and 3A show the case where the power increasing means and the power decreasing means according to the present invention are used, FIGS. 2B and 3B simply increase the gate resistance to di / dt, It is the prior art example which suppressed dv / dt. The switching operation of the IGBT is performed when the output voltage of the driving means changes from negative to positive or from positive to negative according to a signal from the control device. Here, the turn-on operation will be mainly described with reference to FIG. Further, in the drawing, a waveform named output capability of the gate driving means is shown for the following reason.
[0013]
8A to 8D show an IGBT gate drive circuit 101 and operation waveform examples. R1 is an ON gate current limiting resistor, and R2 is an OFF gate current limiting resistor. At turn-on, Q1 is on and Q2 is off, and E1 is applied between the gate and emitter of the IGBT via R1 and Q1. At turn-off, Q1 is off, Q2 is on, and E2 is applied between the gate and emitter of the IGBT via R2 and Q2. The load of the gate driving means of the voltage source driving element is a capacitive load having a collector feedback capacitance C _gc and a gate capacitance C _ge as shown by a broken line in FIG. For this reason, when the gate driving means of the present invention is described in a state where the gate and the emitter of the IGBT are connected, there are places where the expression method tends to be confused. For example, FIG. 8C shows the case where the ON gate resistance R1 is constant, and FIG. 8D shows the case where the gate resistance R1 is varied over time. It is difficult to understand how the conditions of the gate driving means are changed from the gate current Iout and the gate voltage Vout. For example, there is a period in which the gate current lout continuously decreases even when the output power of the gate driving means is constant. This is because a capacitive load is connected to the gate driving means. Therefore, a load resistor R is connected as shown in FIG. 8B, and the voltage applied to the load resistor R is expressed as output power (output capability) of the gate driving means. In this case, the voltage of the load resistor R is determined by the ratio with the on-resistance R1 or the off-resistance R2. Therefore, the value of the load resistance R is not limited, but by selecting a value equivalent to R1 or R2, the change in the capability of the gate driving means can be easily understood.
[0014]
In the case of the conventional example of FIG. 2 (B), a positive constant voltage is output, whereas in the case of the present invention of FIG. 2 (A), after the positive voltage is output once, the output voltage is The difference is that it gradually descends over time and rises again. It is known that di / dt at the turn-on time of the IGBT depends on the rising speed of the gate voltage, and in the case of FIG. 2B, it corresponds to the case where the rising speed of the gate voltage is slowed by increasing the gate resistance. is doing. In this case, an increase in the collector current can be suppressed, but the turn-on time (T1) is long, and the decrease in the collector voltage in the portion A after the turn-on is delayed. In the case of FIG. 2A of the present invention, a large positive voltage is output at the beginning of turn-on, the voltage is gradually decreased with time, the voltage is increased again with time after T2, and returned to the initial voltage after T3. ing. The first large output voltage accelerates the rising speed of the gate voltage of the IGBT and plays a role of shortening the turn-on time (T1). When the IGBT gate voltage reaches the threshold value, the output voltage decreases, and di / dt is suppressed as in the case of FIG. Furthermore, after the gate voltage of the IGBT exceeds the threshold value, the output voltage is increased again to speed up the rise of the gate voltage, and the fall of the collector voltage at the portion A in FIG. The loss is reduced.
[0015]
As described above, the first feature of the present invention is that a large positive voltage is output at the beginning of turn-on and the voltage is gradually decreased with time, and again according to the operation state of the IGBT (in this case, the gate voltage). By increasing the voltage, the switching speed of the IGBT is reduced while the switching time is shortened and the turn-on loss is reduced. However, it has the following characteristics compared to the conventional technology. ing.
[0016]
As a method for reducing the turn-on and turn-off time and switching loss when the IGBT switching speed is softened, a method of switching the gate resistance (JP-A-1-183214, JP-A-3-93457, JP-A-6-291631) Etc.) has been proposed. The output voltage of the driving means when the gate resistance is switched is as shown by broken lines in FIGS. 2A and 3A, and some of the same effects as the present invention can be obtained. Depending on the reason, there will be a large difference in controllability, effect and configuration. Since softening of the switching speed of the IGBT inherently increases switching loss, it is desirable to avoid unnecessary softening of the switching speed. As described in JP-A-6-291631, JP-A-8-322240, JP-A-10-150764, etc., it varies depending on the power supply voltage and temperature at the time of energization of IGBT di / dt, dv / dt, etc. If di / dt and dv / dt controlled by the method of switching the gate resistance are to be changed, a large number of gate resistances and switching devices are required. Further, in the method of switching the gate resistance, after suppressing the di / dt and dv / dt of the IGBT, the gate resistance is reduced during the voltage rise period T3 (see FIGS. 2A and 3A) of the present invention. However, if the timing is early, di / dt and dv / dt suddenly increase from the middle, and if the timing is too late, the switching loss increases, which makes it difficult to switch the gate resistance. .
[0017]
In the present invention, there is provided a power lowering means and a power increasing means for outputting a large positive voltage at the beginning of turn-on and changing with time. The power lowering means for gradually decreasing the voltage is equivalent to switching the gate resistance to a large resistance continuously when compared to a method of switching the gate resistance. The power increasing means for increasing the voltage again with time after the operation period T2 of the power decreasing means corresponds to switching the gate resistance to a small resistance continuously. That is, shortening the operation period T2 of the power lowering means and lengthening the operation period T3 of the power increasing means correspond to reducing the gate resistance, lengthening the operation period T2 and shortening the operation period T3 of the power increasing means. This is equivalent to increasing the gate resistance. By providing the function of continuously changing the gate resistance equivalently in this way, it is possible to suppress a rapid change in di / dt and dv / dt by controlling the timing of switching from the power lowering means to the power increasing means.
[0018]
For example, in the case of the 3.3 kV-1200 A IGBT that we used in this experiment, when the main circuit inductance is about 100 nH and the power supply voltage is turned on from 2 kV, the IGBT main current starts to flow from the output of the gate drive means. The turn-on delay time Td was about 1.5 μs, and the main current rise di / dt was about 6000 A / μs. In this case, the operation period T until the main current rises to 1200 A is T = rated current (1200 A) / suppression di / dt (6000 A / μs).
= 0.2μs
(T1 = about 1.7 μs). In such a case, if the rising period T3 of the power increasing means is set to be longer than 0.2 μs, di / in the range of T2 = Td + T−T3 from the falling period T2 = Td + T = 1.5 μs + 0.2 μs of the power decreasing means. It can be seen that dt can be suppressed. However, T3 = Td + T is excluded because T2 = 0 and the power lowering means does not operate. Actually, since the rise time T of the main current is shorter than the turn-on delay time Td from the output of the gate driving means until the main current of the IGBT starts to flow, it is effective to suppress it in the relationship of T2> T3. As described above, the present invention changes di / dt by changing the operating point T2 from descending to ascending by combining the continuously descending power lowering means and the continuously increasing power increasing means. Is possible. This also means that the amount of suppression of di / dt does not change abruptly due to a slight shift of the switching operation point T2.
[0019]
As described above, the most significant feature of the present invention is that the power lowering means and the power increasing means are equivalently functioning so that the gate resistance is continuously variable. Even when (T2) is used as a conventional method for switching the gate resistance and the power increasing means (T3) of the present invention is combined, even if the switching timing between the two (corresponding to the period T2) is slightly shifted, di / There is an advantage that dt and dv / dt do not change abruptly. Further, since di / dt and dv / dt can be controlled by changing the operating point of the power increasing means, di / dt and dv / dt when the energization conditions (power supply voltage, collector current, temperature, etc.) are changed. It can be used to control
[0020]
As described above, the embodiment of the present invention has been described by taking the IGBT turn-on operation as a representative. However, as shown in FIG. 3A, the turn-off operation can be controlled similarly to the turn-on operation. In the case of a voltage-driven element, the ON / OFF operation is performed with the gate threshold as a boundary, and the gate voltage is controlled in the positive direction, but the difference is whether it is controlled in the negative direction. Although a detailed description of the turn-off operation is omitted, another feature of the present invention not described in the turn-on operation will be described in the turn-off operation.
[0021]
FIG. 3A is an example of the present invention, and FIG. 3B is an example of an operation waveform of the IGBT when the conventional gate resistance is increased to suppress dv / dt. Comparing the two collector voltage waveforms, in the embodiment of the present invention of FIG. 3 (A), the slope in which the voltage rises is almost constant, whereas in FIG. It can be seen that is slow and gradually steep. This is due to the influence of the feedback capacitance C _gc inside the IGBT connected by a broken line in FIG. The current through the feedback capacitor C _gc flows from the gate to the emitter side with the rise of the collector voltage at the time of turn-off and cancels a part of the gate current, so that the turn-off operation is delayed. At the turn-on time, a part of the gate current is caused to flow to the collector side as the collector voltage is lowered to delay the turn-on. It is known that the feedback capacitance C _gc is large when the collector voltage is low and decreases by two orders of magnitude or more as it increases. When the IGBT is operated with a large gate current, the ratio of the current through the feedback capacitor is small. However, when the gate current is reduced to suppress dv / dt, the ratio of the current through the feedback capacitor is increased. For this reason, in the case of FIG. 3B, the voltage rise at a low collector voltage is moderate.
[0022]
On the other hand, in the case of FIG. 3A of the present invention, as described above, the driving ability is continuously varied by the power lowering means, and a higher gate current is supplied at a lower collector voltage than at a higher one. Therefore, the collector voltage rise is almost equalized.
[0023]
FIG. 4 is a functional configuration diagram of an IGBT gate driving circuit showing another embodiment of the present invention. The difference from FIG. 1 is that a sensor 402 for detecting temperature is added and that the output of the sensor is converted into voltage by the voltage conversion means 401 and used for control of the reference voltage. As described above, di / dt and dv / dt at the time of switching of the IGBT of the IGBT module 102 vary depending on the power supply voltage, current, temperature, and the like at the time of energization. For example, depending on the operating temperature of the IGBT, dv / dt at turn-off changes as shown in FIG. Since it greatly depends on the temperature, if the gate condition is set at a low temperature, dv / dt is suppressed more than necessary at a high temperature, leading to an increase in turn-on loss.
[0024]
In this embodiment, the timing of switching from the operation period T5 of the power drop means 106 to the operation period T6 of the power rise means 105 is changed by controlling the reference voltage with the output of the temperature sensor. That is, when the temperature is low, the operation period T5 of the power dropping means is lengthened, and the operation period T5 is shortened as the temperature increases. Reduction of turn-off loss when the operating temperature becomes high is realized by equalizing dv / dt at turn-off. Although an example of an example using the temperature dependence of di / dt and dv / dt is shown here, the same applies if the physical quantity (for example, power supply voltage, collector current) depends on di / dt and dv / dt. Control by this method is possible.
[0025]
FIG. 5 is an embodiment of an IGBT gate driving circuit 101 showing another embodiment of the present invention. Complementary-connected Q1 and Q2 for amplifying a signal for controlling the switching operation of the voltage-driven switching element including the IGBT and gate resistors R1 and R2 are connected in series, and two sets of voltage raising / lowering means 501 and 502 are further connected. Are connected in series to it. The power increasing / decreasing means 501 and 502 are constituted by capacitors (C1, C2), resistors (R3, R4) and switches (Q3, Q4) connected in parallel. The gates of the switches (Q3, Q4) are connected to the outputs of the comparators 1 and 2 of the gate voltage detecting means 503, and the operations of the comparators 1 and 2 are respectively performed from the reference voltage setting means 108-1 and 108-2. It is controlled by comparing the reference voltage and the gate voltage. The turn-on operation is performed as follows. When Q1 and Q3 are turned off, Q2 and Q4 are turned on, Q1 and Q3 are turned off, and Q1 is turned on, the gate-emitter path of the power supply E1- (C1, R3) -R1-Q1-IGBT The gate current flows. At this time, the gate current flows in parallel with C1 and R3, but since the gate capacity of the IGBT is initially reversely charged to the power supply E2, a large gate current determined by the power supply E1 and the power supplies E2 and R1 flows to C1. Eventually, the charging of the capacitor C1 progresses and the current is determined by the power sources E1, R1, R3, and plays the role of the power drop means of the present invention.
[0026]
Next, when the gate voltage rises and exceeds the reference voltage of the comparator 1, Q3 is turned on. When Q3 is turned on, the path of the gate current is changed to the gate-emitter of the power supply E1-Q3-R1-Q1-IGBT, so that the gate current is increased and the gate voltage is rapidly increased. However, C1 immediately before Q3 is turned on is charged with the polarity shown in FIG. 5, and immediately after Q3 is turned on, the charge accumulated in C1 is discharged. The discharge in this case is performed by the time constant of the capacitance of C1 and the on-resistance of Q3, and plays the role of the power increasing means of the present invention along with the discharge of the capacitor C1. Although the turn-off is opposite to the turn-on and the description is omitted, Q4, R4, and C2 serve as power lowering and raising means at the turn-off, and the present invention is realized with a simple circuit configuration.
[0027]
The capacitors C1 and C2 also serve to shorten the switching time (T1, T4). Since the IGBT gate capacitance _Cge is charged to minus E2 before the turn-on, the charge for charging this to the gate threshold voltage Vth of the IGBT is
_{Qon = C ge × (E2 +} Vth) ... (1)
, And the time of turning off the discharge charge from E1 to the gate threshold voltage Vth is _{Qoff = C ge × (E1-} Vth) ... (2)
It is. If the charge accumulated in C1 and C2 is made almost equal to the charges of Qon and Qoff during the power fall period (T2) at the on time and the power fall period (T5) at the off time, the switching time is greatly increased. Shortened. However, the fall or rise of the gate voltage becomes gradual, and the suppression range of di / dt and dv / dt at the time of IGBT switching becomes narrow. As shown in the above equations (1) and (2), Qon and Qoff themselves vary depending on the voltage of the gate circuit, but the gate circuit conditions (E1 = 15V, E2 = 10V), if the capacitances of C1 and C2 are set to about 1 to 5 times the gate capacitance _Cge of the IGBT, a great effect is obtained in both the switching time reduction and the di / dt and dv / dt suppression.
[0028]
FIG. 6 shows another example of the gate drive circuit of the IGBT showing the embodiment of the present invention. The difference between the power raising / lowering means 501 and 502 in FIG. 5 and the power raising / lowering means 501 and 502 in FIG. 6 is that resistors (R5 and R6) are provided in series with the switches (Q3 and Q4). The on-resistance of the switches (Q3, Q4) can be varied depending on the base input. In this case, the resistance (R5, R6) is added to increase the discharge time constant of C1, thereby increasing the power rise period ( This is an example in which T3) is changed.
[0029]
FIG. 13 shows another embodiment of the gate circuit of the IGBT showing the embodiment of the present invention. The difference from FIG. 6 is that R51 is provided in series with R3 and C1, and R61 is provided in series with R4 and C2. In the state where the switches (Q3, Q4) are turned on, both gate resistances are R1 + R5 for on and R2 + R6 for off. When R5 and R6 are increased, R1 and R2 are decreased accordingly, but in the case of FIG. 6, if R1 and R2 are decreased, the currents flowing through R3 and C1 and R4 and C2 change in a chain, and the circuit design is complicated. It becomes. In the embodiment of FIG. 13, resistors (R51, R61) equivalent to R5 and R6 are connected in series with R3, C1, R4, and C2 so that the currents flowing through R3 and C1, and R4 and C2 do not change. Yes.
[0030]
FIG. 12 shows another example of the gate drive circuit of the IGBT showing the embodiment of the present invention. The difference between the power increasing means and the power decreasing means in FIG. 6 is that a change in the base current of the switches (Q3, Q4) is used. When the switch Q1 is turned on, the power supply voltage E1 is applied through the path of the gate of R3-R1-IGBT. Then, by the voltage applied to R3, the base current ib1 of Q3 flows in the path from the emitter of Q3 to the base and further C3-R5, and Q3 is turned on. However, when Q3 is turned on, the voltage applied to Q3 is reduced and the base current ib1 does not flow. Eventually, a current determined by the charging current of C3 and the hfe of Q3 flows, and serves as a power lowering means. Next, when a base current flows through R7 and Q3 is turned on, ib2 flows using C3 as a power source. During this time, the current flowing through R1 is reduced and serves as a power increasing means. It is obvious that the power drop period T2 and the power rise period T3 in this case can be changed by C3 and R5. Further, as shown in FIG. 5, it is possible to use a capacitor C1 in parallel with Q3.
[0031]
FIG. 7 is a functional configuration diagram of another embodiment of the gate drive circuit of the IGBT showing the embodiment of the present invention. In the embodiment of FIG. 1, the power raising means 105 and the power lowering means 106 are connected in series with the driving means 107, but in this embodiment, the power raising and lowering means 501 and 502 are connected to the driving means 107 in parallel. By lowering the output from the driving means by the power increase / decrease means 501, 502, the output power is decreased and increased. The operation is the same as in the case of FIG.
[0032]
As described above, the present invention has been described from the viewpoint of suppressing di / dt and dv / dt at the time of switching of a voltage-driven switching element such as an IGBT or an FET. It is also effective in protecting against overcurrent that occurs when an arm short circuit occurs. That is, it has a function of controlling the reference voltage by the output of the sensor, and it is easy to control the increase and decrease of the reference voltage by arranging the temperature sensor and the overcurrent sensor in parallel. For example, if an overcurrent is detected at turn-on, the reference voltage of the comparator is raised, and the switching from the gate voltage lowering means to the raising means is prevented, and this occurs due to a load short circuit or arm short circuit of the power converter. The present invention can be applied to prevent the overcurrent from being further increased.
[0033]
【The invention's effect】
As can be seen from the above description, the present invention is not only due to the high di / dt and high dv / dt of the circuit operation of the inverter using the voltage-driven switching device, but also the cause of the malfunction of the peripheral device. There is an effect that problems such as motor insulation breakdown can be solved.
[Brief description of the drawings]
FIG. 1 is a functional configuration diagram of a gate drive circuit of a voltage drive element showing an embodiment of the present invention.
FIG. 2 is a turn-on operation waveform for explaining the operation of the embodiment of the present invention.
FIG. 3 is a turn-off operation waveform for explaining the operation of the embodiment of the present invention.
FIG. 4 is a functional configuration diagram of a gate drive circuit of a voltage drive element showing another embodiment of the present invention.
FIG. 5 is a specific circuit configuration diagram of the embodiment of FIG. 1;
6 is a modification of the specific circuit of FIG.
FIG. 7 is a functional configuration diagram of a gate drive circuit of a voltage drive element showing another embodiment of the present invention.
FIG. 8 is a circuit and operation waveforms for explaining the output capability of the gate drive circuit of the voltage drive element.
FIG. 9 is a general circuit diagram of a voltage source inverter using an IGBT which is the subject of the present invention.
FIG. 10 is an example of a snubber circuit that suppresses a jumping voltage.
FIG. 11 shows temperature dependence of dv / dt of IGBT.
12 is a modification of the embodiment of FIG.
13 is a modification of the specific circuit shown in FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 101 ... Gate drive circuit, 102 ... IGBT module, 103 ... Comparison circuit, 104 ... Gate voltage detection, 105 ... Power increase means, 106 ... Power decrease means, 107 ... Drive means, 108 ... Reference voltage setting means

Claims (7)

Driving means for amplifying a signal for controlling the switching operation of the voltage-driven switching element;
An operating state detecting means for detecting a collector voltage, a collector current or a gate voltage of the voltage-driven switching element;
A power lowering means for continuously dropping the voltage of the output terminal of the driving means when a resistor is connected between the output terminal of the driving means and the ground at the time of turn-on with time;
And a power increase means for increasing continuously with a voltage obtained by the drop time,
At the time of turn-on, the output terminal of the driving means outputs a positive voltage, and then the voltage is continuously reduced with time, and the voltage of the voltage-driven switching element, the collector current or the gate voltage detected by the operating state detecting means When the voltage reaches a predetermined value, the voltage of the output terminal of the driving means is continuously increased as time elapses . In claim 1,
A gate drive circuit for a voltage-driven switching element, wherein a power drop operation time of the power drop means is longer than a power rise operation time of the power rise means. In any one of Claim 1 to Claim 2 ,
Means for detecting the temperature of the voltage-driven switching element;
Means for converting the detected amount into a voltage;
A gate drive circuit for a voltage-driven switching element, wherein the power raising means is switched according to the temperature detection amount from a power lowering means for lowering the output power of the driving means with time. In any one of Claims 1-3 ,
Either or both of the power lowering means for lowering and raising the output power of the driving means over time, the power raising means, or both are constituted by a capacitor and a switching device in parallel. Switching element gate drive circuit. In any one of Claims 1-4 ,
Either or both of the power lowering means for lowering and raising the output power of the driving means over time and the power increasing means are configured by a resistor or a capacitor and a switching device in parallel or in series. A gate drive circuit for a voltage-driven switching element. In claim 4 or claim 5 ,
A gate driving circuit for a voltage-driven switching element, wherein a capacitor capacity used for the power lowering means or the power increasing means is 1 to 5 times the gate capacity of the voltage-driven switching element. An inverter comprising a plurality of voltage-driven switching elements driven by the gate drive circuit according to claim 1 .

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