JP3872156B2 - Subscriber circuit accommodation system - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a subscriber circuit accommodation system in which analog subscriber circuits (SLC) and digital subscriber circuits (DLC) can be mixedly accommodated in a shelf accommodating subscriber circuits.
[0002]
[Prior art]
The subscribers accommodated in the exchange are roughly divided into analog subscribers and digital subscribers. Currently, in the exchange, most subscribers are analog subscribers. However, the number of digital subscribers using ISDN (Integrated Services Digital Network) has increased in recent years.
[0003]
In an exchange, in order to accommodate analog subscribers, a subscriber circuit (SLC) having a BORSCHT function, an SLC common unit for controlling the same, and a back wiring board (BWB) for connecting them are necessary. The SLC shelf (SLCSH) is combined into one.
[0004]
Here, the BORSCHT function is an acronym for a function required for the subscriber circuit, and is B (Battery feed: battery supply), O (Overvoltage: Overvoltage), R (Ringing: Ringing), S ( It is an acronym for “Supervision”, “C” (Codec), “H” (Hybrid), and “T” (Testing).
[0005]
FIG. 8 is a diagram showing an example of mounting a conventional shelf. In the figure, reference numeral 10 denotes a shelf, and power supply packages 1 are mounted at both ends thereof, and each power supply package supplies power to the 0-system and 1-system packages. 2 is a subscriber circuit (SLC), 3 is an SLC common part. The SLC common part is duplicated and two are mounted.
[0006]
FIG. 9 is a block diagram showing an example of the electrical configuration of a conventional shelf. The same components as those in FIG. 8 are denoted by the same reference numerals. The SLC common unit 3 is duplicated, and the SLC 2 is connected to the SLC common unit 3. Reference numeral 4 denotes a subscriber terminal connected to the SLC2. The subscriber terminal 4 is a terminal that operates on an analog signal. In the case of the figure, the subscriber terminal 4 is a telephone, and the signal exchanged between the subscriber and the exchange is a voice.
[0007]
A back wiring board (BWB) 5 has a motherboard printed board (not shown) at the rear of the shelf shown in FIG. 8, and BWB pattern wiring is performed on the printed board. Reference numeral 6 denotes an interface between the SLC common unit 3 and SLC2.
[0008]
Similarly, when the subscriber is a digital subscriber, a digital subscriber circuit (DLC), a DLC common unit, and a BWB are combined into one as a shelf.
[0009]
[Problems to be solved by the invention]
In general, SLC and DLC have a great difference in function, and it is quite difficult to share the subscriber circuit, common unit, BWB, and shelf in terms of cost. On the other hand, as a customer who uses the exchange, the analog subscriber is switched to the digital subscriber so that the SLC common section for the analog subscriber that has been used so far is not wasted. Sometimes.
[0010]
The present invention has been made in view of such problems, and an object of the present invention is to provide a subscriber circuit accommodation system in which analog subscriber circuits and digital subscriber circuits can be mixed.
[0011]
[Means for Solving the Problems]
(1) FIG. 1 is a principle block diagram of the present invention. The same components as those in FIG. 9 are denoted by the same reference numerals. In the figure, reference numeral 10 denotes a shelf, and 3 denotes an SLC common section provided in the shelf 10. In the figure, the SLC common unit 3 is duplexed, but it is not necessarily required to be duplexed. The SLC common unit 3 has a function of interfacing signals between the network and the shelf 10.
[0012]
The shelf 10 is connected to a network (not shown). 2 is an analog subscriber circuit (SLC) connected to the SLC common unit 3, 6 is a digital subscriber circuit (DLC) mounted in the shelf 10, and 20 is connected to the DLC 6 to process DLC dedicated signals. It is a DLC controller. 4a is a subscriber terminal connected to the SLC2, and 4b is a subscriber terminal connected to the DLC6.
[0013]
In the figure, the DLC controller 20 is duplexed, but it is not necessarily required to be duplexed. The DLC controller 20 is connected to the DLC 6 using the D channel of ISDN. A back wiring board (BWB) 7 connects the SLC common unit 3 and the DLC controllers 20, DLC6 and SLC2. An interface 8 connects the SLC common unit 3 and the DLC controllers 20, SLC2, and DLC6. Although not shown, the D channel is also wired to SLC2. This is because the SLC 2 and the DLC 6 can be freely mounted on the shelf.
[0014]
Here, the D channel is a control signal for enabling the following functions.
(1) Incoming calls directly to the extension without going through the operator (2) Number specifying the destination communication device, etc. (3) Transmitting data transfer (128-byte unit) between terminals (4) Telephone numbers, etc. In the present invention for retrieving information, the SLC common unit 3 is provided which supports functions commonly required by analog subscribers and digital subscribers. Here, the SLC common unit 3 is a part that interfaces signals between the network and the shelf 10.
[0015]
Analog subscribers are mainly responsible for voice processing, but digital subscribers need to terminate voice processing and D-channel signals, and need to perform digital processing using a processor.
[0016]
Therefore, the processing for digital subscribers is divided into voice processing common to analog subscribers and D channel processing, and voice processing is processed using the same hardware (SLC common unit 3) as analog subscribers. Processes other than the above are processed using DLC dedicated hardware (DLC controller 20).
[0017]
If the shelf 10 is configured only by an analog subscriber (SLC), the DLC controller 20 is not necessary, and the processing can be performed only by the SLC common unit 3, and if the DLC 6 is necessary, the SLC common unit 3 and the DLC controller 20 are used. Both control the DLC 6.
[0018]
According to the present invention, SLC and DLC can be mixed as shown in FIG. FIG. 2 is a diagram showing a mounting example of the shelf according to the present invention. In the figure, the same components as those in FIGS. 1 and 8 are denoted by the same reference numerals. In this mounting example, the DLC controller 20 is mounted at the positions of SLC 15 and SLC 30 in FIG. 8 to configure a duplex system. And SLC2 and DLC6 can be mounted | worn in arbitrary positions except SLC15 and SLC30.
[0019]
If the shelf 10 has only the analog subscriber circuit (SLC) 2 (see FIG. 8), the DLC controller 20 is not necessary, and the processing can be performed only by the SLC common unit 3. If DLC is required, the DLC 6 is controlled by both the SLC common unit 3 and the DLC controller 20.
[0020]
According to the configuration of the present invention, the SLC common unit 3 that supports functions commonly required by an analog subscriber and a digital subscriber is provided, and the digital subscriber (DLC) 6 is a voice that is common to the analog subscriber. The processing is divided into D channel processing, voice processing is performed using the SLC common unit 3 which is the same hardware as the analog subscriber, and other processing is performed using the DLC controller 20 which is hardware dedicated to DLC. By processing, it is possible to provide a subscriber circuit accommodation system in which analog subscriber circuits and digital subscriber circuits can be mixed.
[0021]
(2) Further, the communication between the SLC common unit 3 and the DLC controller 20 is performed using a voice channel for SLC.
According to the configuration of the present invention, the SLC can be mounted in the slot for the DLC controller.
[0023]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
First, the operation of the present invention will be described with reference to FIG. The DLC 6 divides the signal with the digital subscriber into a voice signal and a D channel signal, and interfaces the SLC common unit 3 with the voice signal using the same data accommodation position as the voice channel used by the analog subscriber. As a result, the SLC common unit 3 may perform the same voice processing as the SLC 2 without being conscious of the DLC 6, that is, the processing can be performed without being conscious of the subscriber type (digital / analog), and there is no cost impact. DLC6 voice channel control is possible.
[0024]
Further, the D channel signal peculiar to DLC 6 is controlled between the DLC controller 20 and the DLC 6 using a dedicated line (D channel dedicated interface 9). The DLC 6 is configured to be controllable when the SLC common unit 3 and the DLC controller 20 are mounted. The SLC common unit 3 controls the audio part, and the DLC controller 20 processes the D channel control signal for the DLC 6.
[0025]
Further, DLC 6 is synchronized with SLC 2 and operates at the same timing. The timing used by the DLC 6 and SLC 2 is created by the SLC common unit 3. By matching the timings of the SLC common unit 3 and the DLC 6 and the DLC controller 20, it is not necessary to increase the timing line of the BWB 7 or to add a functional circuit to follow the two timings in the DLC 6, thereby reducing the cost. .
[0026]
Further, since the DLC controller 20 operates in accordance with the processor of the exchange main body, the DLC controller 20 must communicate with the exchange main body. Therefore, the signal from the exchange to the DLC controller 20 communicates using the same accommodating portion as the SLC voice channel.
[0027]
With this configuration, the SLC common unit 3 can handle the DLC controller 20 in the same manner as the SLC 2. Therefore, if the DLC 6 is not mounted on the shelf 10 and only the SLC 2 is configured, the SLC can be mounted at the mounting position of the DLC controller 20, and the slot of the shelf is not wasted. Also,
FIG. 3 is a diagram showing a signal connection state according to the present invention. The same components as those in FIG. 1 are denoted by the same reference numerals. An analog subscriber circuit (SLC) 2, a digital subscriber circuit (DLC) 6, and a DLC controller 20 are connected to the duplexed SLC common unit 3.
[0028]
The SLC common unit 3 and the SLC2, DLC6, and DLC controller 20 are connected by four lines, C2Mxx, MFCKxx, DSHWxx, and USHWxx, respectively. The signal lines going to each SLC are physically different lines and are called C2M01 to C2M30, MFCK01 to MFCK30, DSHW01 to DSHW30, and USHW01 to USHW30 in a distinguishing sense.
[0029]
The DLC controller 20 and SLC2 and DLC6 are connected by two DCHWxx and UCDHWxx, respectively. The respective signals are called DCDHW01 to DCDHW29 and UCDHW01 to UCDHW29 (except for 15 respectively).
[0030]
The DSHWxx includes voice going from the network to SLC2 and SLC control bits (SD). USHWxx includes voice going from SLC2 to the network and SLC status signal bits (SCN). DCDHWxx contains control bits for DLC6 from the network. Further, the UCDHWxx includes a status notification bit from the DLC 6 to the network.
[0031]
4 and 5 are explanatory diagrams of data storage in the SLC, and show the interface 8 used in the SLC slot. As an example, operations of two SLCs, SLC01 and SLC08, are shown. 4 and 5 are connected at points (1), (2), and (3).
[0032]
In FIG. 4, (a) is a 2 MHz clock, (MF) of (b) and (c) is a clock for determining the head of data, DSHW of (d) and (e) is data going from the network to SLC (or DLC), USHW is data going from the SLC (or DLC) to the network. The MFCK clock has a period of 2M2 once every 16 times. The reason is to indicate a delimiter in units of 16 frames.
[0033]
In FIG. 5, (f) and subsequent figures are enlarged views of information from (a) to (e). (F) is a clock of 2 MHz, (g) is MFCKW which is a clock for determining the head of the data of SLC01, (h) is DSHW is data going from SLC01 network to SLC (or DLC), and (i) USHW is SLC01 The data goes from the SLC (or DLC) to the network. (J) is the MFCK of SLC08, (k) is the DSHW of SLC08, and (l) is the USHW of SLC08.
[0034]
MFCK, USHW, DSHW, and USHW indicate information of SLC01 and SLC02, respectively.
D / USHW shown in the figure is a highway through which voice and control signals pass, and has a frame configuration. The signal has a time slot (TS) with 8 bits as one unit, and two TRs are used in one circuit (1 CCT). One frame is composed of 32 TSs as a unit. One frame is 125 μsec.
[0035]
On the other hand, the SLC 2 has 16 circuits mounted on one package, and the D / USHW signal transmits and receives audio and control signals for 16 circuits in one frame. DSHW (Down Shelf High Way) is an HW (highway) containing voice and control signals from the switch body to the SLC2, and uses even-numbered TS to control voice and odd-numbered TS to control signal. Is sending. Two lines, TS0 and TS1, are used by the 0th line mounted on the SLC2, and TS30 and TS31 are sequentially used by the 15th line.
[0036]
The audio signal is an 8-bit PCM, and the control signal is composed of a 4-bit SD signal, a 2-bit HK, and a 2-bit PLT signal. The SD signal is a control signal for sending an instruction to ring a bell to the telephone terminal 4 or sending a billing signal. For example, SDa is a bit for reporting the presence / absence of ringing, SDb is a bit for reporting the presence / absence of test pull-in, SDc is a bit for reporting the presence / absence of polarity reversal, and SDd is a notification bit for the presence / absence of charging.
[0037]
The HK (House Keeping) signal is an internal state control signal of the SLC 2 such as a loss setting in the SLC. In the PLT (Pilot) signal, the PLT0 bit is fixed to “0” and the PLT1 bit is fixed to “1” for monitoring the stack of signal lines.
[0038]
The control signals SD and HK are negative polarity signals. Here, the negative polarity indicates that the bit is meaningful when the level is “L” or “0”.
As shown in the figure, the time slot TS0 of SLC01 is an audio channel and is composed of 8 bits from bit1 to bit8. The time slot TS1 of SLC01 is a control channel and is composed of the SD4 bit, HK2 bit, and PLT2 bit described above.
[0039]
On the other hand, the SCN is used as a control bit in the case of data transmitted from the SLC 2 to the network. USHW01 is delayed by 1 bit of 2 MHz compared to DSHW01. The reason is that, for example, when making a test jig having the same function as the SLC, it is impossible to return data in the same time.
[0040]
On the other hand, for SLC08, TS31 comes in the time slot corresponding to TS0 of SLC01, and TS0 comes in the time slot corresponding to TS1 of SLC01.
[0041]
As described above, when accommodating SLC data, the information of 8 bits of voice channel and 8 bits of control channel per channel is transmitted from SLC2 to the exchange or from the exchange to SLC2, regardless of DLC. Therefore, normal operation can be performed.
[0042]
FIG. 6 and FIG. 7 are explanatory diagrams of data accommodation of the DLC according to the present invention, and show the interface 8 used in the DLC slot. 4 and 5 are denoted by the same reference numerals. 6 and 7 are connected at points (1), (2), and (3).
[0043]
In FIG. 6, (a) is a 2 MHz clock, (b) and (c) MFCK are clocks that determine the head of data, (d) and (e) DSHW are data going from the network to SLC (or DLC), USHW is data going from the SLC (or DLC) to the network. The MFCK clock has a cycle of 2 MHz once every 16 times.
[0044]
In FIG. 7, (f) and the subsequent figures are enlarged views of information from (a) to (e). (F) is a clock of 2 MHz, (g) is MFCKW which is a clock for determining the head of SLC01 data, (h) DSHW is data going from SLC08 network to SLC (or DLC), (i) USHW is SLC08 The data goes from the SLC (or DLC) to the network. (J) is the DSHW of SLC08, and (k) is the USHW of SLC08.
[0045]
Here, the state of data accommodation of DLC08 is shown. In the case of DLC, data is transferred using the SLC voice channel, and control information is exchanged between the DLC controller 20 and the DLC 08 using the D channel. In addition, data is transferred using the voice channel in the even-numbered TS of the time slot (TS), and control information is transferred using the odd-numbered channel.
[0046]
In DLC08, only audio signals are handled in DSHW and USHW. Therefore, the SD, SCN, and HK signals that existed in FIGS. 4 and 5 do not exist. However, stack monitoring of DSHW and USHW is necessary, and PLT0 and PLT1 exist. In the figure, (h) indicates that PLT0 = 0 and PLT1 = 1.
[0047]
In the figure, the reason why USHW01 is delayed by one bit compared to DSHW01 is that it is impossible to return at the same time.
Control signals for DLC 6 (corresponding to SD, SCN, and HK in FIGS. 4 and 5) are handled by DCHW and UCDHW as separate lines from the DLC controller 20 (see FIG. 1).
[0048]
As described above in detail, according to the present invention,
(1) When an analog subscriber circuit (SLC) and a digital subscriber circuit (DLC) are mixedly mounted on the shelf, an SLC common unit for interfacing the network with SLC and DLC in the shelf; One end is connected to the SLC common part, the other end is connected to the DLC, and a DLC controller that processes the DLC dedicated signal is provided.
An SLC common unit that supports functions commonly required by analog subscribers and digital subscribers is provided, and digital subscribers (DLC) are divided into voice processing that is common to analog subscribers and D-channel processing. Processing is performed using the SLC common unit, which is the same hardware as the analog subscriber, and other processing is performed using the DLC controller, which is hardware dedicated to DLC. It is possible to provide a subscriber circuit accommodation system in which a subscriber circuit can be mixed.
[0049]
(2) Also, by performing communication between the SLC common unit and the DLC controller on the voice channel for SLC,
An SLC can be mounted in the slot for the DLC controller.
[0051]
As described above, according to the present invention, it is possible to provide a subscriber circuit accommodation system in which an analog subscriber circuit and a digital subscriber circuit can be mixed.
[Brief description of the drawings]
FIG. 1 is a principle block diagram of the present invention.
FIG. 2 is a diagram showing a mounting example of a shelf according to the present invention.
FIG. 3 is a diagram illustrating a connection state of signals according to the present invention.
FIG. 4 is an explanatory diagram of data accommodation in SLC.
FIG. 5 is an explanatory diagram of data accommodation in SLC.
FIG. 6 is an explanatory diagram of DLC data accommodation;
FIG. 7 is an explanatory diagram of data accommodation of DLC.
FIG. 8 is a diagram illustrating a mounting example of a conventional shelf.
FIG. 9 is a block diagram showing an example of the electrical configuration of a conventional shelf.
[Explanation of symbols]
2 Analog subscriber circuit (SLC)
3 SLC common part 4a Subscriber terminal 4b Subscriber terminal 6 Digital subscriber circuit (DLC)
10 Shelf 20 DLC controller

Claims (2)

In the case where analog subscriber circuit (SLC) and digital subscriber circuit (DLC) are mixed and installed on the shelf,
In the shelf, an SLC common unit that interfaces the network with SLC and DLC;
A DLC controller having one end connected to the SLC common unit and the other end connected to the DLC, and processing a DLC dedicated signal;
Provided ,
The processing for the digital subscriber circuit is divided into voice processing common to the analog subscriber circuit and D channel processing,
The voice processing is processed using the SLC common unit which is the same hardware as the analog subscriber, and the other processing is processed using a DLC controller which is hardware dedicated to DLC.
A subscriber circuit accommodation system characterized in that it is configured as described above .   2. The subscriber circuit accommodation system according to claim 1, wherein communication between the SLC common unit and the DLC controller is performed by an SLC voice channel.

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