JP3852510B2 - Semiconductor plastic package - Google Patents
Semiconductor plastic package Download PDFInfo
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- JP3852510B2 JP3852510B2 JP00398498A JP398498A JP3852510B2 JP 3852510 B2 JP3852510 B2 JP 3852510B2 JP 00398498 A JP00398498 A JP 00398498A JP 398498 A JP398498 A JP 398498A JP 3852510 B2 JP3852510 B2 JP 3852510B2
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- printed wiring
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- metal plate
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Description
【０００１】
【産業上の利用分野】
本発明は、半導体チップを小型プリント配線板に搭載した形の、新規な半導体プラスチックパッケージに関する。特に、マイクロプロセッサー、マイクロコントローラー、ASIC、グラフィック等の比較的高ワットで、多端子高密度の半導体プラスチックパッケージに関する。本半導体プラスチックパッケージは、ソルダーボールを用いてマザーボードプリント配線板に実装して電子機器として使用される。
【０００２】
【従来の技術】
従来、半導体プラスチックパッケージとして、プラスチックボールグリッドアレイ（P-BGA)やプラスチックランドグリッドアレイ（P-LGA)等、プラスチックプリント配線板の上面にチップを固定し、チップを、プリント配線板上面に形成された導体回路にワイヤボンディングで結合し、プリント配線板の下面にはソルダーボールを用いて、マザーボードプリント配線板と接続するための導体パッドを形成し、表裏回路導体がメッキされたスルーホールで接続されて、半導体チップが樹脂封止されている構造の半導体プラスチックパッケージが公知である。本公知構造において、半導体から発生する熱をマザーボードプリント配線板に拡散させるため、半導体チップを固定するための上面の金属箔から下面に接続するメッキされた熱拡散スルーホールが形成されている。
【０００３】
該スルーホールの孔を通して水分が半導体固定に使われている、銀粉入り樹脂接着剤に吸湿され、マザーボードへの実装時の加熱により、また、半導体部品をマザーボードから取り外す際の加熱により、層間フクレを発生する危険性があり、これはポップコーン現象と呼ばれている。このポップコーン現象が生じた場合、パッケージは使用不能となることが多く、この現象を大幅に改善する必要がある。
また、半導体の高機能化、高密度化は、ますます発熱量の増大を意味し、熱放散用のための半導体チップ直下のスルーホールのみでは熱の放散は不十分となってきている。
【０００４】
【発明が解決しようとする課題】
本発明は、以上の問題点を改善した半導体プラスチックパッケージを提供するものである。
【０００５】
【課題を解決するための手段】
すなわち、本発明は、プリント配線板の片方の面(a)に回路導体 (a-1) が、もう一方の面 (b) に回路導体 (b-1) が、形成されているプリント配線板の片方の面 (a) に半導体チップが接合されており、該半導体チップの回路導体が該プリント配線板の片方の面(a) に形成されている回路導体(a-1)とワイヤボンディングで接続されており、少なくとも、回路導体(a-1)が該プリント配線板のもう一方の面(b)に形成されている回路導体(b-1)もしくはハンダボール接続用導体パッドとスルーホールで結線されており、該半導体チップの周囲が樹脂封止されており、該接続用導体パッドにハンダボールが接合されている構造の半導体プラスチックパッケージにおいて、該プリント配線板が、該プリント配線板の厚さ方向のほぼ中央に該プリント配線板とほぼ同じ平面積の金属板が配置されており、該金属板は該プリント配線板の片方の面 (a) に形成されている回路導体(a-1) ともう一方の面 (b) に形成されている回路導体 (b-1)とは該プリント配線板を構成する熱硬化性樹脂組成物で絶縁されており、該金属板の片方の面に該半導体チップとほぼ同じ平面積の突起部 (a-2) が、もう一方の面に該半導体チップとほぼ同じ平面積の突起部 (b-2) が、該金属板の表裏両面のほぼ同位置に形成されており、突起部 (a-2) の先端平面が該プリント配線板の片方の面(a)に露出されており、突起部 (b-2) の先端平面が該プリント配線板のもう一方の面 (b) に露出されており、該金属板の突起部以外の箇所には、少なくとも１個以上のクリアランスホールが形成されており、該クリアランスホールの内側に該熱硬化性樹脂組成物を介して該スルーホールが形成されている構造のプリント配線板であり、該プリント配線板の片方の面(a)の突起部 (a-2) の先端平面に該半導体チップが接合されており、もう一方の面(b)の突起部 (b-2) の先端平面に伝熱用ハンダボールが接合されている構造の半導体プラスチックパッケージである。
【０００６】
本発明の該金属板及び該プリント配線板の片方の面 (a) に形成されている回路導体(a-1) ともう一方の面 (b) に形成されている回路導体 (b-1)用金属が銅95重量％以上の銅合金、或いは純銅であることが好ましく、また、該熱硬化性樹脂組成物が、多官能性シアン酸エステル、該シアン酸エステルプレポリマーを必須成分とする熱硬化性樹脂組成物であることが好ましい。本半導体プラスチックパッケージは、露出した熱放散用の金属板突起部により、半導体から発生した熱はこの金属板突起部の先端平面から直接ハンダボールを通して、マザーボード側に容易に逃げるものであり、また、半導体チップの下面からの吸湿がなく、吸湿後の耐熱性、すなわちポップコーン現象が大幅に改善できた。加えて大量生産性にも適しており、経済性の改善された、新規な構造の半導体プラスチックパッケージを得ることができた。
【０００７】
【発明の実施の形態】
本発明のプラスチックパッケージは、プリント配線板の厚み方向のほぼ中央に熱放散性の良好な金属板を配置し、表裏の回路導体導通用のメッキされたスルーホールは、金属板にあけられたクリアランスホール径より小さめの径の孔とし、埋め込まれた樹脂のほぼ中央に形成することにより、金属板との絶縁性を保持する。
【０００８】
公知のスルーホールを有する金属芯プリント配線板の上面に半導体チップを固定する方法においては、従来のP-BGA パッケージと同様に半導体チップからの熱は直下の熱放散用スルーホールに落として熱放散せざるを得ず、ポップコーン現象は改善できない。
本発明は、まず金属芯とする金属板をあらかじめ公知のエッチング法、冷間機械加工、圧延異型状加工法等の方法で、少なくとも１個以上の半導体チップ固定用に、半導体チップとほぼ同等の大きさの突起を形成しておく。次いで、表裏の導通スルーホールを形成可能なように、スルーホールを形成しようとする位置にスルーホール径より大きめのクリアランスホールを、公知のエッチング法、打ち抜き法、ドリル、レーザー等で金属芯に孔を形成しておく。
半導体から発生する熱は、直接搭載する金属部分から金属板全体に熱伝導されるために、反対面に形成された、表面に露出した金属板突起部から、熱をマザーボードプリント配線板に拡散する構造とする。
【０００９】
該突起とスルーホールが形成された金属板の表面を公知の方法で酸化処理、微細凹凸形成、皮膜形成等の接着性や電気絶縁性向上のための表面処理を必要に応じて施す。該表面処理され、突起部とクリアランスホールが形成された金属板の、半導体チップを直接固定する面及び反対面の突起部以外は、すべて熱硬化性樹脂組成物で絶縁部を形成する。熱硬化性樹脂組成物による絶縁部の形成は、半硬化状態の熱硬化性樹脂組成物を含浸、乾燥した半硬化のプリプレグ、樹脂シート、樹脂付き銅箔等を用い、半導体チップを直接固定する突起或いは反対面の突起のある金属部分に相当するプリプレグ等の部分を、あらかじめ突起部分の面積よりやや大きめの孔を打ち抜き等によってあけておき、これを両面に配置し、必要により、その外側に金属箔を配置し、加熱、加圧下に積層成形する。プリプレグの厚みは金属突起の高さよりやや高めになるように作成する。加熱、加圧工程中に、熱により１度熔融した半硬化状態の熱硬化性樹脂を金属板のクリアランスホールに流し込んでクリアランスホールの中を埋め込むと同時に、金属突起物の表面以外は熱硬化性樹脂組成物で一体化する。
【００１０】
また、無溶剤或いは溶剤タイプの熱硬化性樹脂組成物を用い、スクリーン印刷等で該金属板突起場所以外に塗布し、更には裏面も同様に塗布してから加熱して半硬化状態とした後、このまま加熱して硬化するか、加熱、加圧下に積層成形して一体化する。積層成形する場合、上記と同様にクリアランスホール内に樹脂を流し込むと同時に熱硬化させる。塗布、半硬化する場合、低圧にてクリアランスホールの中に樹脂を流し込み、溶剤或いは空気を加熱しながら抜き、半硬化する。溶剤が入っている場合、クリアランスホール内の未充填が起こり易いため、あらかじめ無溶剤液状の熱硬化性樹脂組成物をクリアランスホール内に流し込み、硬化しておく方法が一般的であるが、いずれの方法においても、金属板のクリアランスホール内を熱硬化性樹脂組成物で充填されるように加工する。
【００１１】
金属板の側面については、熱硬化性樹脂組成物で埋め込まれている形、露出している形、いずれの形でも良い。
【００１２】
また、サブトラクティブ法によるスルーホールプリント配線板の形成のためには、積層成形時に、表裏の最外層に、プリント配線板よりやや大きめの金属箔、或いは片面金属箔張積層板を配置して、加熱、加圧下に積層成形することにより、外層回路形成用の金属箔で表裏が覆われた金属箔張多層板が形成される。
【００１３】
表裏層に金属箔を使用しないで積層成形する場合、公知のアディティブ法にて回路を形成し、プリント配線板を作る。
【００１４】
上記サブトラクティブ法、セミアディティブ法で作成した板の、半導体を固定する部分以外の箇所に表裏の回路を導通するスルーホール用孔をドリル、レーザー或いはプラズマ等、公知の方法にて小径の孔をあける。
【００１５】
表裏信号回路用のスルーホール用孔は、樹脂の埋め込まれた金属板クリアランスホールのほぼ中央に、金属板と接触しないように形成する。次いで、無電解メッキや電解メッキによりスルーホール内部の金属層を形成して、メッキされたスルーホールを形成するとともに、フルアディティブ法では、同時に表裏にワイヤボンディング用端子、信号回路、ソルダーボール用パッド、導体回路等を形成する。
【００１６】
セミアディティブ法では、スルーホールをメッキすると同時に、表裏も全面メッキされ、その後、公知の方法にて上下に回路を形成する。
また、表裏金属箔を使用して積層成形されたものは、表裏の回路形成工程で、半導体チップ固定部分の金属突起部分及び反対面突起部の表面にある金属箔も除去される。次いで、ワイヤボンディング用の貴金属メッキを、少なくともワイヤボンディングパッド表面に形成してプリント配線板を完成させる。この場合、貴金属メッキの必要のない箇所は、事前にメッキレジストで被覆しておく。また、メッキ後に、必要により公知の熱硬化性樹脂組成物、或いは光選択熱硬化性樹脂組成物で表面に被膜を形成する。
【００１７】
該プリント配線板の半導体を接着する金属突起部分の表面に接着剤や金属粉混合接着剤を用いて、半導体チップを固定し、さらに半導体チップとプリント配線板回路のボンディングパッドとをワイヤボンディング法で接続し、少なくとも、半導体チップ、ボンディングワイヤ、及びボンディングパッドを公知の封止樹脂で封止する。
【００１８】
半導体チップと反対面のソルダーボール接続用導体パッドに、ソルダーボールを接続してP-BGA を作り、マザーボードプリント配線板上の回路にソルダーボールを重ね、熱によってボールを熔融接続するか、またはパッケージにソルダーボールをつけずにP-LGA を作り、マザーボードプリント配線板に実装する時に、マザーボードプリント配線板面に形成されたソルダーボール接続用導体パッドとP-LGA 用のソルダーボール用導体パッドとを、ソルダーボールを加熱熔融することにより接続する。
【００１９】
本発明に用いる金属板は、特に限定しないが、高弾性率、高熱伝導性で、厚さ30〜300 μｍのものが好適である。具体的には、純銅、無酸素銅、その他、銅95重量％以上のFe、Sn、Ｐ、Cr、Zr、Zn等との合金などが好適に使用される。また、42アロイ等の合金の表面を銅メッキした金属板等も使用され得る。
【００２０】
本発明の金属突起部の高さは、30〜200 μm が好適である。また、突起部をくり抜いたプリプレグ、樹脂シート、樹脂付き銅箔、或いはスクリーン印刷等で形成する熱硬化性樹脂層の高さは、この突起と同じ高さか、やや高いことが好ましい。突起部の面積は、半導体チップの面積とほぼ同等であり、僅かに大きめが好ましい。一般的には５〜20mm角である。金属突起部は、エッチング、冷間機械加工、或いは圧延異型条等の一般に公知の加工方法で作成できる。また、平滑な金属板の上に、所定の大きさの同質、或いは異質の金属板を、熱伝導の良好な銅ペースト等、一般に公知の接着方法にて接着させることも可能である。
【００２１】
本発明で使用される熱硬化性樹脂組成物の樹脂としては、一般に公知の熱硬化性樹脂が使用される。具体的には、エポキシ樹脂、多官能性シアン酸エステル樹脂、多官能性マレイミド−シアン酸エステル樹脂、多官能性マレイミド樹脂、不飽和基含有ポリフェニレンエーテル樹脂等が挙げられ、１種或いは２種類以上が組み合わせて使用される。耐熱性、耐湿性、耐マイグレーション性、吸湿後の電気的特性等の点から多官能性シアン酸エステル樹脂組成物が好適である。
【００２２】
本発明の好適な熱硬化性樹脂分である多官能性シアン酸エステル化合物とは、分子内に２個以上のシアナト基を有する化合物である。
具体的に例示すると、1,3-又は1,4-ジシアナトベンゼン、1,3,5-トリシアナトベンゼン、1,3-、1,4-、1,6-、1,8-、2,6-又は2,7-ジシアナトナフタレン、1,3,6-トリシアナトナフタレン、4,4-ジシアナトビフェニル、ビス（4-ジシアナトフェニル）メタン、2,2-ビス（4-シアナトフェニル）プロパン、2,2-ビス（3,5-ジブロモ-4- シアナトフェニル）プロパン、ビス（4-シアナトフェニル）エーテル、ビス（4-シアナトフェニル）チオエーテル、ビス（4-シアナトフェニル）スルホン、トリス（4-シアナトフェニル）ホスファイト、トリス（4-シアナトフェニル）ホスフェート、およびノボラックとハロゲン化シアンとの反応により得られるシアネート類などである。
【００２３】
これらのほかに特公昭41-1928 、同43-18468、同44-4791 、同45-11712、同46-41112、同47-26853及び特開昭51-63149等に記載の多官能性シアン酸エステル化合物類も用いられ得る。
また、これら多官能性シアン酸エステル化合物のシアナト基の三量化によって形成されるトリアジン環を有する分子量400 〜6,000 のプレポリマーが使用される。このプレポリマーは、上記の多官能性シアン酸エステルモノマーを、例えば鉱酸、ルイス酸等の酸類；ナトリウムアルコラート等、第三級アミン類等の塩基；炭酸ナトリウム等の塩類等を触媒として重合させることにより得られる。このプレポリマー中には一部未反応のモノマーも含まれており、モノマーとプレポリマーとの混合物の形態をしており、このような原料は本発明の用途に好適に使用される。一般には可溶な有機溶剤に溶解させて使用する。
【００２４】
エポキシ樹脂としては、一般に公知のものが使用できる。具体的には、液状或いは固形のビスフェノールＡ型エポキシ樹脂、ビスフェノールＦ型エポキシ樹脂、フェノールノボラック型エポキシ樹脂、クレゾールノボラック型エポキシ樹脂、脂環式エポキシ樹脂；ブタジエン、ペンタジエン、ビニルシクロヘキセン、ジシクロペンチルエーテル等の二重結合をエポキシ化したポリエポキシ化合物類；ポリオール、水酸基含有シリコン樹脂類とエポハロヒドリンとの反応によって得られるポリグリシジル化合物類等が挙げられる。これらは１種或いは２種類以上が組み合わせて使用され得る。
【００２５】
ポリイミド樹脂としては、一般に公知のものが使用され得る。具体的には、多官能性マレイミド類とポリアミン類との反応物、特公昭57-005406 に記載の末端三重結合のポリイミド類が挙げられる。
【００２６】
これらの熱硬化性樹脂は、単独でも使用されるが、特性のバランスを考え、適宜組み合わせて使用するのが良い。
【００２７】
本発明の熱硬化性樹脂組成物には、組成物本来の特性が損なわれない範囲で、所望に応じて種々の添加物を配合することができる。これらの添加物としては、不飽和ポリエステル等の重合性二重結合含有モノマー類及びそのプレポリマー類；ポリブタジエン、エポキシ化ブタジエン、マレイン化ブタジエン、ブタジエン−アクリロニトリル共重合体、ポリクロロプレン、ブタジエン−スチレン共重合体、ポリイソプレン、ブチルゴム、フッ素ゴム、天然ゴム等の低分子量液状〜高分子量のelastic なゴム類；ポリエチレン、ポリプロピレン、ポリブテン、ポリ-4- メチルペンテン、ポリスチレン、AS樹脂、ABS 樹脂、MBS 樹脂、スチレン−イソプレンゴム、ポリエチレン−プロピレン共重合体、4-フッ化エチレン-6- フッ化エチレン共重合体類；ポリカーボネート、ポリフェニレンエーテル、ポリスルホン、ポリエステル、ポリフェニレンサルファイド等の高分子量プレポリマー若しくはオリゴマー；ポリウレタン等が例示され、適宜使用される。また、その他、公知の無機或いは有機の充填剤、染料、顔料、増粘剤、滑剤、消泡剤、分散剤、レベリング剤、光増感剤、難燃剤、光沢剤、重合禁止剤、チキソ性付与剤等の各種添加剤が、所望に応じて適宜組み合わせて用いられる。必要により、反応基を有する化合物は硬化剤、触媒が適宜配合される。
【００２８】
本発明の熱硬化性樹脂組成物は、それ自体は加熱により硬化するが硬化速度が遅く、作業性、経済性等に劣るため使用した熱硬化性樹脂に対して公知の熱硬化触媒を用い得る。使用量は、熱硬化性樹脂100 重量部に対して0.005 〜10重量部、好ましくは0.01〜５重量部である。
【００２９】
プリプレグの補強基材として使用するものは、一般に公知の無機或いは有機の織布、不織布が使用される。具体的には、Ｅガラス、Ｓガラス、Ｄガラス等の公知のガラス繊維布、全芳香族ポリアミド繊維布、液晶ポリエステル繊維布等が挙げられる。これらは、混抄でも良い。
また、ポリイミドフィルム等のフィルムの表裏、或いは金属箔の片面に熱硬化性樹脂組成物を塗布、加熱して半硬化状態にしたものも使用できる。
【００３０】
最外層の金属箔は、一般に公知のものが使用できる。好適には厚さ３〜100 μｍの銅箔、ニッケル箔等が使用される。
【００３１】
金属板に形成するクリアランスホールの径は、表裏導通用スルーホール径よりやや大きめに形成する。具体的には、該スルーホール壁と金属板クリアランスホール壁とは50μｍ以上の距離が、熱硬化性樹脂組成物で絶縁されていることが好ましい。表裏導通用スルーホール径については、特に限定はないが、50〜300 μｍが好適である。
【００３２】
本発明の多層プリント配線板用プリプレグを作成する場合、基材に熱硬化性樹脂組成物を含浸、乾燥し、半硬化状態の積層材料とする。また基材を使用しない半硬化状態とした樹脂シート、樹脂付き金属箔も使用できる。或いは塗料も使用できる。この場合、半硬化状態の程度により、ハイフロー化、ローフロー化、ノーフロー化する。ノーフローとした場合、加熱、加圧して積層成形した時、樹脂の流れ出しが 100μｍ以下、好ましくは50μｍ以下とする。また、この際、金属板、金属箔とは接着し、ボイドが発生しないことが肝要である。加熱温度は一般的には 100〜180 ℃である。時間は５〜60分であり、目的とするフローの程度により、適宜選択する。
【００３３】
本発明の金属芯の入った半導体プラスチックパッケージを作成する方法は特に限定しないが、例えば以下（図１）の方法による。
(1) まず、内層となる金属板全面を液状エッチングレジストで被覆し、加熱して溶剤を除去した後、半導体チップを固定する突起部及び反対面の熱放散用突起部のレジストが残るように作成したネガフィルムを被せ、紫外線照射後、１％炭酸ナトリウム水溶液で未露光部分を溶解除去する。
(2) エッチングにて金属板を所定厚み溶解してから、エッチングレジストを溶解除去する。
(3) 再び液状エッチングレジストで上下を被覆し、両面の金属突起部をくり抜き、クリアランスホール部分の光が遮断できるように作成したネガフィルムをその上にあて、紫外線で露光する。
【００３４】
(4) クリアランスホール部のエッチングレジストを溶解除去してから、エッチング法にて両側からエッチングし、金属板にクリアランスホールを作成する。
(5) エッチングレジストを除去後、金属板全面を化学表面処理し、金属突起部の部分よりやや大きめに孔をあけたノーフロー又はローフロープリプレグを両側に配置し、上下に金属箔を置く。
(6) 加熱、加圧、真空下に積層成形した後、所定の位置にドリル、或いはレーザー等でスルーホールを内層金属板に接触しないようにあけ、デスミア処理を施した後、金属メッキを行う。
(7) 公知の方法にて上下に回路を作成すると同時に、金属板突起部の金属箔を除去し、貴金属メッキを施し、内層金属板の半導体チップ搭載部である突起部の表面に半導体チップを接着する。その後、樹脂封止を行い、必要によりハンダボールを接着する。
【００３５】
【実施例】
以下に実施例、比較例で本発明を具体的に説明する。尚、特に断らない限り、『部』は重量部を表す。
実施例１
2,2-ビス（4-シアナトフェニル）プロパン 900部とビス（4-マレイミドフェニル）メタン 100部とを 150℃に熔融させ、撹拌しながら４時間反応させ、プレポリマーを得た。これをメチルエチルケトンとジメチルホルムアミドの混合溶剤に溶解した。
【００３６】
これにビスフェノールＡ型エポキシ樹脂（商品名：エピコート1001、油化シェルエポキシ＜株＞製） 400部、クレゾールノボラック型エポキシ樹脂（商品名：ESCN-220F 、住友化学工業＜株＞製） 600部を加え、均一に溶解混合した。更に触媒としてオクチル酸亜鉛0.4 部を加え、溶解混合し、これに無機充填剤（商品名：タルクP-3 、日本タルク＜株＞製） 500部を加え、均一撹拌混合してワニスＡを得た。
このワニスを厚さ 100μｍのガラス織布に含浸し 150℃で乾燥して、ゲル化時間(at170℃）10秒、 170℃,20kgf/cm2,5分間での樹脂流れ85μｍとなるように作成した、厚さ 105μｍの半硬化状態のプリプレグ（プリプレグＢ）を得た。
【００３７】
一方、内層金属板となる厚さ 250μｍの銅板を用意し、大きさ50mm角のパッケージの中央に13mm角、高さ 100μｍの突起を、反対面には13mm角、高さ 100μｍの突起をエッチング法にて形成した。
その後、該金属板の全面に液状エッチングレジストを厚さ25μｍ塗布し、乾燥して溶剤を飛ばした後、突起部をくり抜いたネガフィルムを両面にそれぞれ重ね、クリアランスホール部以外を紫外線照射してからクリアランスホール部のレジスト膜を１％炭酸ナトリウム水溶液で除去した後、両側からエッチングによって 0.6mmφのクリアランスホールをあけた。
【００３８】
金属板全面に黒色酸化銅処理を施し、この両面には、突起部分に相当する位置に、突起部より50μｍ大きめの孔をルーターにてあけた上記プリプレグＢを被せ、その両外側に厚さ18μｍの電解銅箔を配置し、 200℃、20kgf/cm2 、30mmHg以下の真空下で２時間積層成形し、一体化した。
クリアランスホール箇所は、クリアランスホール部の内層金属に接触しないように、中央に孔径0.25mmのスルーホールをレーザーにてあけ、デスミア処理後、銅メッキを無電解、電解メッキで行い、孔内に18μｍの銅メッキ層を形成した。
【００３９】
表裏に液状エッチングレジストを塗布、乾燥してからポジフィルムを重ねて露光、現像し、表裏回路を形成するとともに、突起部上の銅箔も同時にエッチング除去した。
金属突起部、ボンディングパッド部及びボールパッド部以外にメッキレジストを形成し、ニッケル、金メッキを施してプリント配線板を完成した。
上面突起部に大きさ13mm角の半導体チップを銀ペーストで接着固定した後、ワイヤボンディングを行い、次いで、シリカ入りエポキシ封止用コンパウンドを用い、トランスファーモールドにて樹脂封止し、ボールパッドにハンダボールを接合して半導体プラスチックパッケージを作成した（図１及び図２）。このパッケージをエポキシ樹脂マザーボードプリント配線板に、ハンダボールを熔融して接合した。評価結果を表１に示す。
【００４２】
比較例１
実施例１のプリプレグＢを２枚使用し、上下に上記18μｍ電解銅箔を配置し、 190℃,35kgf/cm2,30mmHg 以下の 真空下で90分間積層成形し、両面銅張積層板を得た。所定の位置に穴径0.25mmφのスルーホールをドリルであけ、銅メッキを施した。この板の上下に公知の方法で回路を形成し、ニッケルメッキ、金メッキを施した。これは半導体チップを搭載する箇所に放熱用のスルーホールが形成されており、この上に銀ペーストで半導体チップを接着し、ワイヤボンディング後、液状封止樹脂で封止し、実施例と同様にハンダボールを接合、マザーボードプリント配線板上に乗せた（図３）。評価結果を表１に示す。
【００４３】
比較例２
比較例１のプリント配線板の半導体チップ搭載部分をザグリマシーンで上下くりぬいてから裏面に厚さ 200μｍの銅板を、上記プリプレグＢを打ち抜いたもので加熱、加圧下に接着させ、放熱板付きプリント配線板を作成した。これはややソリが見られた。これの放熱板に銀ペーストで半導体チップを接着し、ワイヤボンディングした後、液状封止樹脂で封止し、ハンダボールでマザーボードプリント配線板上に接合した（図４）。評価結果を表１に示す。
【００４４】
表１
実施例１ 比較例１ 比較例２
吸湿後の耐熱性(1) 常態 異常なし 異常なし 異常なし
120hrs 異常なし 異常なし 異常なし
144hrs 異常なし 一部剥離 異常なし
168hrs 異常なし 一部剥離 一部剥離
吸湿後の耐熱性(2) 常態 異常なし 異常なし 異常なし
24hrs 異常なし 一部剥離 異常なし
48hrs 異常なし 剥離大 一部剥離
72hrs 異常なし 剥離大 剥離大
96hrs 異常なし ワイヤ切れ 剥離大
120hrs 異常なし ワイヤ切れ ワイヤ切れ
144hrs 異常なし − −
168hrs 異常なし − −
ガラス転移温度 ( ℃ ) ２３５ − −
プレッシャークッ 常態 ４×1014 − −
カー処理後の絶縁 200hrs ４×1012
抵抗値 (Ω) 500hrs ５×1011
700hrs ８×1010
1000hrs ２× 10 10
耐マイグレーショ 常態 ５×1013 − −
ン性 200hrs ５×1011
(Ω) 500hrs ３×1011
700hrs １×1011
1000hrs ８× 10 10
放熱性 ( ℃ ) ３２ ５７ ４８
【００４５】
＜測定方法＞
１）吸湿後の耐熱性(1) ：JEDEC STANDARD TEST METHOD A113-A LEVEL3：30℃・ 60％RHで所定時間処理後、220 ℃リフローソルダー３サイクル後の基板の異常の有無について、断面観察及び電気的チェックによって確認した。
２）吸湿後の耐熱性(2) ：JEDEC STANDARD TEST METHOD A113-A LEVEL2：85℃・ 60％RHで所定時間（Max.168hrs.)処理後、220 ℃リフローソルダー３サイクル後の基板の異常の有無を断面観察及び電気的チェックによって確認した。
３）ガラス転移温度 ：DMA 法にて測定した。
４）プレッシャークッカー処理後の絶縁抵抗値 ： 121℃・２気圧で所定時間処理した後、25℃・60％RHで２時間後処理し、500VDCを印加60秒で、その端子間（ライン／スペース＝70μm/70μm)の絶縁抵抗値を測定した。
５）耐マイグレーション性 ：85℃・85％RH、50VDC 印加して端子間の絶縁抵抗値を測定した。
６）放熱性 ：パッケージを同一マザーボードプリント配線板にハンダボールで接着させ、1000時間連続使用してから、パッケージの温度を測定した。
【００４６】
【発明の効果】
プリント配線板の片方の面(a)に回路導体 (a-1) が、もう一方の面 (b) に回路導体 (b-1) が、形成されているプリント配線板の片方の面 (a) に半導体チップが接合されており、該半導体チップの回路導体が該プリント配線板の片方の面(a) に形成されている回路導体(a-1)とワイヤボンディングで接続されており、少なくとも、回路導体(a-1)が該プリント配線板のもう一方の面(b)に形成されている回路導体(b-1)もしくはハンダボール接続用導体パッドとスルーホールで結線されており、該半導体チップの周囲が樹脂封止されており、該接続用導体パッドにハンダボールが接合されている構造の半導体プラスチックパッケージにおいて、該プリント配線板が、該プリント配線板の厚さ方向のほぼ中央に該プリント配線板とほぼ同じ平面積の金属板が配置されており、該金属板は該プリント配線板の片方の面 (a) に形成されている回路導体(a-1) ともう一方の面 (b) に形成されている回路導体 (b-1)とは該プリント配線板を構成する熱硬化性樹脂組成物で絶縁されており、該金属板の片方の面に該半導体チップとほぼ同じ平面積の突起部 (a-2) が、もう一方の面に該半導体チップとほぼ同じ平面積の突起部 (b-2) が、該金属板の表裏両面のほぼ同位置に形成されており、突起部 (a-2) の先端平面が該プリント配線板の片方の面(a)に露出されており、突起部 (b-2) の先端平面が該プリント配線板のもう一方の面 (b) に露出されており、該金属板の突起部以外の箇所には、少なくとも１個以上のクリアランスホールが形成されており、該クリアランスホールの内側に該熱硬化性樹脂組成物を介して該スルーホールが形成されている構造のプリント配線板であり、該プリント配線板の片方の面(a)の突起部 (a-2) の先端平面に該半導体チップが接合されており、もう一方の面(b)の突起部 (b-2) の先端平面に伝熱用ハンダボールが接合されている構造の半導体プラスチックパッケージとすることにより、半導体チップの下面からの吸湿がなく、吸湿後の耐熱性、すなわちポップコーン現象が大幅に改善できるとともに、熱放散性も改善でき、加えて大量生産性にも適しており、経済性の改善された、新規な構造の半導体プラスチックパッケージを得ることができた。
【図面の簡単な説明】
【図１】実施例１の半導体プラスチックパッケージの製造工程。
【図２】実施例１の半導体プラスチックパッケージの製造工程。
【図３】比較例１の半導体プラスチックパッケージの製造工程。
【図４】比較例２の半導体プラスチックパッケージの製造工程。
【符号の説明】
ａ：エッチングレジスト、 ｂ：金属板、 ｃ：ネガフィルム、
ｄ：クリアランスホール、 ｅ：金属箔、 ｆ：プリプレグＢ、
ｇ：表裏回路導通用スルーホール、 ｈ：放熱用スルーホール、
ｉ：半導体チップ、 ｊ：熱伝導性接着剤、 ｋ：ボンディングワイヤ、
ｌ：封止樹脂、 ｍ：ハンダボール、 ｎ：メッキレジスト[0001]
[Industrial application fields]
The present invention relates to a novel semiconductor plastic package in which a semiconductor chip is mounted on a small printed wiring board. In particular, the present invention relates to a relatively high-wattage, multi-terminal, high-density semiconductor plastic package such as a microprocessor, microcontroller, ASIC, and graphic. This semiconductor plastic package is mounted on a mother board printed wiring board using a solder ball and used as an electronic device.
[0002]
[Prior art]
Conventionally, as a semiconductor plastic package, a chip is fixed on the upper surface of a plastic printed wiring board such as a plastic ball grid array (P-BGA) or plastic land grid array (P-LGA), and the chip is formed on the upper surface of the printed wiring board. The conductor circuit is connected to the printed circuit board by wire bonding, and a solder ball is used on the lower surface of the printed circuit board to form a conductor pad for connection to the motherboard printed circuit board. The front and back circuit conductors are connected by plated through holes. A semiconductor plastic package having a structure in which a semiconductor chip is sealed with a resin is known. In this known structure, in order to diffuse the heat generated from the semiconductor to the mother board printed wiring board, plated heat diffusion through-holes connected to the lower surface from the metal foil on the upper surface for fixing the semiconductor chip are formed.
[0003]
Moisture is absorbed by the resin adhesive containing silver powder, which is used for fixing the semiconductor through the hole in the through-hole, and is heated when mounting on the motherboard, and when removing the semiconductor components from the motherboard, There is a risk of this occurring, which is called the popcorn phenomenon. When this popcorn phenomenon occurs, the package often becomes unusable, and this phenomenon needs to be significantly improved.
Further, the higher functionality and higher density of semiconductors means an increase in the amount of heat generation, and heat dissipation is insufficient only with through holes directly under the semiconductor chip for heat dissipation.
[0004]
[Problems to be solved by the invention]
The present invention provides a semiconductor plastic package in which the above problems are improved.
[0005]
[Means for Solving the Problems]
That is, the present invention provides a printed wiring board piece.One ofsurface(a)InCircuit conductor (a-1) But the other side (b) To circuit conductor (b-1) Is one side of the printed wiring board (a) InSemiconductor chipJoiningIsAnd,ThesemiconductorChipCircuit conductorThePrinted wiring boardOne ofsurface(a) InFormedingCircuit conductor(a-1)And at least a circuit conductor.(a-1)ButThePrinted circuit boardThe othersurface(b)Formed intoingCircuit conductor(b-1)Or it is connected with the conductor pad for solder ball connection with the through hole,TheIn a semiconductor plastic package having a structure in which the periphery of a semiconductor chip is sealed with a resin, and a solder ball is bonded to the connecting conductor pad, the printed wiring board is approximately at the center in the thickness direction of the printed wiring board. Almost the same plane area as the printed wiring boardofA metal plate is arranged, the metal plateThePrinted circuit boardOne side (a) Formed inCircuit conductor(a-1) And the other side (b) Circuit conductor formed on (b-1)WhenIs theInsulated with the thermosetting resin composition constituting the printed wiring boardAnd,Protrusions having substantially the same area as the semiconductor chip on one surface of the metal plate (a-2) However, the other surface has a projection having the same area as the semiconductor chip. (b-2) Is formed at substantially the same position on both sides of the metal plate,ProtrusionPart (a-2) Tip of flatFaceThePrinted circuit boardone ofsurface(a)Exposed toThe protrusions (b-2) Is the other side of the printed wiring board. (b) Exposed to theMetal plateLocations other than the protrusionsAt least one clearance hole is formed.AndA printed wiring board having a structure in which the through hole is formed inside the clearance hole via the thermosetting resin composition,one ofsurface(a)ProtrusionPart (a-2) Tip of flatThe semiconductor chip is bonded to the surface,The othersurface(b)ProtrusionPart (b-2) Tip of flatThis is a semiconductor plastic package having a structure in which a solder ball for heat transfer is bonded to the surface.
[0006]
The metal plate and the printed wiring board of the present inventionOne side (a) Formed inCircuit conductor(a-1) And the other side (b) Circuit conductor formed on (b-1)It is preferable that the metal for use is a copper alloy of 95% by weight or more of copper or pure copper, and the thermosetting resin composition is a polyfunctional cyanate ester, a heat containing the cyanate ester prepolymer as an essential component. A curable resin composition is preferred. This semiconductor plastic package is an exposed metal plate protrusion for heat dissipation.PartDue to the heat generated from the semiconductor, this metal plate protrusionFlat endIt easily escapes from the surface through the solder ball to the motherboard side, and there is no moisture absorption from the lower surface of the semiconductor chip, so that the heat resistance after moisture absorption, that is, the popcorn phenomenon can be greatly improved. In addition, a semiconductor plastic package having a novel structure that is suitable for mass productivity and improved in economic efficiency has been obtained.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
In the plastic package of the present invention, a metal plate with good heat dissipation is arranged at the approximate center in the thickness direction of the printed wiring board, and plated through holes for conduction of circuit conductors on the front and back sides are clearances formed in the metal plate. By forming the hole with a diameter smaller than the hole diameter and forming it at substantially the center of the embedded resin, the insulation with the metal plate is maintained.
[0008]
In the method of fixing a semiconductor chip on the upper surface of a metal core printed wiring board having a known through hole, the heat from the semiconductor chip is dropped into the heat dissipation through hole just like the conventional P-BGA package to dissipate the heat. The popcorn phenomenon cannot be improved.
In the present invention, a metal plate used as a metal core is first substantially the same as a semiconductor chip for fixing at least one semiconductor chip by a known method such as etching, cold machining, or rolling profile processing. A projection having a size is formed in advance. Next, a clearance hole larger than the diameter of the through hole is formed at a position where the through hole is to be formed so that a conductive through hole on the front and back sides can be formed, and a hole is formed in the metal core by a known etching method, punching method, drill, laser, or the like. Is formed.
The heat generated from the semiconductor is conducted from the metal part directly mounted to the entire metal plate, so that the heat is diffused to the motherboard printed wiring board from the exposed metal plate protrusion formed on the opposite surface. Structure.
[0009]
The surface of the metal plate on which the protrusions and the through holes are formed is subjected to surface treatment for improving adhesiveness and electrical insulation, such as oxidation treatment, fine unevenness formation, and film formation, as required. The insulating part is formed of the thermosetting resin composition except for the surface directly fixed to the semiconductor chip and the protrusion on the opposite surface of the metal plate that has been surface-treated and formed with the protrusion and the clearance hole. The insulating part is formed from the thermosetting resin composition by directly fixing the semiconductor chip using a semi-cured thermosetting resin composition, using a dried semi-cured prepreg, a resin sheet, a copper foil with resin, and the like. A part of the prepreg or the like corresponding to the protrusion or the metal part having the protrusion on the opposite surface is previously punched by punching a hole slightly larger than the area of the protrusion, and this is arranged on both sides, and if necessary, on the outside A metal foil is placed and laminated and formed under heat and pressure. The thickness of the prepreg is made to be slightly higher than the height of the metal protrusion. During the heating and pressurizing process, a semi-cured thermosetting resin melted once by heat is poured into the clearance hole of the metal plate to fill the clearance hole, and at the same time, other than the surface of the metal protrusion is thermosetting. Integrate with resin composition.
[0010]
Also, after using a solvent-free or solvent-type thermosetting resin composition and applying it to a place other than the metal plate protrusion by screen printing or the like, and further applying the back side in the same manner, and then heating to a semi-cured state It is heated and cured as it is, or is laminated and integrated under heating and pressure. In the case of laminate molding, the resin is poured into the clearance hole and cured at the same time as described above. In the case of coating and semi-curing, the resin is poured into the clearance hole at a low pressure, and the solvent or air is removed while heating, and semi-curing is performed. When a solvent is contained, the clearance hole is likely to be unfilled. Therefore, a method of pouring a solvent-free liquid thermosetting resin composition into the clearance hole in advance and curing is generally used. Also in the method, the clearance holes of the metal plate are processed so as to be filled with the thermosetting resin composition.
[0011]
The side surface of the metal plate may be in a form embedded with a thermosetting resin composition or an exposed form.
[0012]
In addition, in order to form a through-hole printed wiring board by the subtractive method, a metal foil slightly larger than the printed wiring board or a single-sided metal foil-clad laminated board is disposed on the outermost layers of the front and back during the lamination molding, By laminating and forming under heating and pressurization, a metal foil-clad multilayer board whose front and back are covered with a metal foil for forming an outer layer circuit is formed.
[0013]
When laminate molding is performed without using metal foil for the front and back layers, a circuit is formed by a known additive method to produce a printed wiring board.
[0014]
In the plate made by the subtractive method or the semi-additive method, a hole for a small diameter is formed by a known method such as drilling, laser or plasma in a hole other than the portion where the semiconductor is fixed. I can make it.
[0015]
The through hole for the front and back signal circuits is formed in the center of the clearance hole in which the resin is embedded so as not to contact the metal plate. Next, a metal layer inside the through hole is formed by electroless plating or electrolytic plating to form a plated through hole. At the same time, in the full additive method, a wire bonding terminal, a signal circuit, and a solder ball pad Forming a conductor circuit or the like.
[0016]
In the semi-additive method, through holes are plated and the front and back surfaces are also plated, and then circuits are formed up and down by a known method.
Moreover, what was laminated and formed using the front and back metal foils also removes the metal foils on the surfaces of the metal protrusion portions of the semiconductor chip fixing portion and the opposite surface protrusion portions in the front and back circuit forming step. Next, a precious metal plating for wire bonding is formed on at least the surface of the wire bonding pad to complete the printed wiring board. In this case, a portion where no noble metal plating is necessary is previously covered with a plating resist. Moreover, after plating, a coating film is formed on the surface with a known thermosetting resin composition or a photoselective thermosetting resin composition, if necessary.
[0017]
A semiconductor chip is fixed to the surface of the metal protrusion portion to which the semiconductor of the printed wiring board is bonded by using an adhesive or a metal powder mixed adhesive, and the semiconductor chip and the bonding pad of the printed wiring board circuit are bonded by a wire bonding method. At least the semiconductor chip, the bonding wire, and the bonding pad are sealed with a known sealing resin.
[0018]
A solder ball is connected to the solder ball connecting conductor pad on the opposite side of the semiconductor chip to make a P-BGA, and the solder ball is stacked on the circuit on the motherboard printed wiring board, and the ball is melt-connected by heat or package When making a P-LGA without attaching a solder ball to the board and mounting it on the motherboard printed wiring board, the solder ball connection conductor pad formed on the motherboard printed wiring board surface and the solder ball conductor pad for P-LGA The solder balls are connected by heating and melting.
[0019]
The metal plate used in the present invention is not particularly limited, but preferably has a high elastic modulus and high thermal conductivity and a thickness of 30 to 300 μm. Specifically, pure copper, oxygen-free copper, other alloys of 95% by weight or more of Fe, Sn, P, Cr, Zr, Zn, etc. are preferably used. A metal plate or the like having a copper-plated surface of an alloy such as 42 alloy can also be used.
[0020]
The height of the metal protrusion of the present invention is preferably 30 to 200 μm. Moreover, it is preferable that the height of the thermosetting resin layer formed by the prepreg, the resin sheet, the resin-coated copper foil, the screen printing, or the like in which the protrusion is cut out is the same as or slightly higher than the protrusion. The area of the protrusion is almost the same as the area of the semiconductor chip and is preferably slightly larger. Generally, it is 5 to 20 mm square. The metal protrusion can be formed by a generally known processing method such as etching, cold machining, or a rolled profile. It is also possible to adhere a homogeneous or heterogeneous metal plate of a predetermined size on a smooth metal plate by a generally known adhesion method such as a copper paste having good heat conduction.
[0021]
As the resin of the thermosetting resin composition used in the present invention, generally known thermosetting resins are used. Specific examples include an epoxy resin, a polyfunctional cyanate ester resin, a polyfunctional maleimide-cyanate ester resin, a polyfunctional maleimide resin, an unsaturated group-containing polyphenylene ether resin, and the like. Are used in combination. In view of heat resistance, moisture resistance, migration resistance, electrical properties after moisture absorption, and the like, a polyfunctional cyanate ester resin composition is preferable.
[0022]
The polyfunctional cyanate ester compound which is a preferred thermosetting resin component of the present invention is a compound having two or more cyanato groups in the molecule.
Specific examples include 1,3- or 1,4-dicyanatobenzene, 1,3,5-tricyanatobenzene, 1,3-, 1,4-, 1,6-, 1,8-, 2 , 6- or 2,7-dicyanatonaphthalene, 1,3,6-tricyanatonaphthalene, 4,4-dicyanatobiphenyl, bis (4-dicyanatophenyl) methane, 2,2-bis (4-cyanato Phenyl) propane, 2,2-bis (3,5-dibromo-4-cyanatophenyl) propane, bis (4-cyanatophenyl) ether, bis (4-cyanatophenyl) thioether, bis (4-cyanato) Phenyl) sulfone, tris (4-cyanatophenyl) phosphite, tris (4-cyanatophenyl) phosphate, and cyanates obtained by the reaction of novolac and cyanogen halide.
[0023]
In addition to these, polyfunctional cyanic acid described in JP-B-41-1928, 43-18468, 44-4791, 45-11712, 46-41112, 47-26853 and JP-A-51-63149 Ester compounds can also be used.
A prepolymer having a molecular weight of 400 to 6,000 having a triazine ring formed by trimerization of cyanate groups of these polyfunctional cyanate ester compounds is used. This prepolymer polymerizes the above-mentioned polyfunctional cyanate ester monomers using, for example, acids such as mineral acids and Lewis acids; bases such as sodium alcoholates and tertiary amines; salts such as sodium carbonate and the like as catalysts. Can be obtained. This prepolymer also includes a partially unreacted monomer, which is in the form of a mixture of the monomer and the prepolymer, and such a raw material is suitably used for the application of the present invention. Generally, it is used after being dissolved in a soluble organic solvent.
[0024]
As the epoxy resin, generally known epoxy resins can be used. Specifically, liquid or solid bisphenol A type epoxy resin, bisphenol F type epoxy resin, phenol novolac type epoxy resin, cresol novolac type epoxy resin, alicyclic epoxy resin; butadiene, pentadiene, vinylcyclohexene, dicyclopentyl ether, etc. And polyglycidyl compounds obtained by reaction of polyols, hydroxyl group-containing silicon resins and epohalohydrin, and the like. These may be used alone or in combination of two or more.
[0025]
As the polyimide resin, generally known resins can be used. Specific examples include reaction products of polyfunctional maleimides and polyamines and terminal triple bond polyimides described in JP-B-57-005406.
[0026]
These thermosetting resins may be used alone, but may be used in appropriate combination in consideration of balance of characteristics.
[0027]
In the thermosetting resin composition of the present invention, various additives can be blended as desired within a range where the original properties of the composition are not impaired. These additives include polymerizable double bond-containing monomers such as unsaturated polyesters and prepolymers thereof; polybutadiene, epoxidized butadiene, maleated butadiene, butadiene-acrylonitrile copolymer, polychloroprene, butadiene-styrene copolymer. Low molecular weight liquid to high molecular weight elastic rubber such as polymer, polyisoprene, butyl rubber, fluoro rubber, natural rubber; polyethylene, polypropylene, polybutene, poly-4-methylpentene, polystyrene, AS resin, ABS resin, MBS resin Styrene-isoprene rubber, polyethylene-propylene copolymer, 4-fluoroethylene-6-fluoroethylene copolymers; high molecular weight prepolymers such as polycarbonate, polyphenylene ether, polysulfone, polyester, polyphenylene sulfide Or oligomer; polyurethane and the like are exemplified and used as appropriate. In addition, other known inorganic or organic fillers, dyes, pigments, thickeners, lubricants, antifoaming agents, dispersants, leveling agents, photosensitizers, flame retardants, brighteners, polymerization inhibitors, thixotropic properties Various additives such as an imparting agent are used in appropriate combination as desired. If necessary, the compound having a reactive group is appropriately mixed with a curing agent and a catalyst.
[0028]
Although the thermosetting resin composition of the present invention itself is cured by heating, the curing rate is slow and the workability, economy and the like are inferior, so that a known thermosetting catalyst can be used for the thermosetting resin used. . The amount used is 0.005 to 10 parts by weight, preferably 0.01 to 5 parts by weight, based on 100 parts by weight of the thermosetting resin.
[0029]
In general, a known inorganic or organic woven fabric or non-woven fabric is used as a prepreg reinforcing substrate. Specific examples include known glass fiber cloths such as E glass, S glass, and D glass, wholly aromatic polyamide fiber cloths, and liquid crystal polyester fiber cloths. These may be mixed papers.
Moreover, what applied the thermosetting resin composition to the front and back of films, such as a polyimide film, or one side of metal foil, and was made into the semi-hardened state by heating can also be used.
[0030]
As the outermost metal foil, generally known metal foils can be used. Preferably, a copper foil, nickel foil or the like having a thickness of 3 to 100 μm is used.
[0031]
The diameter of the clearance hole formed in the metal plate is slightly larger than the diameter of the through hole for front and back conduction. Specifically, the through hole wall and the metal plate clearance hole wall are preferably insulated by a thermosetting resin composition at a distance of 50 μm or more. The through-hole diameter for front and back conduction is not particularly limited, but is preferably 50 to 300 μm.
[0032]
When preparing the prepreg for multilayer printed wiring boards of the present invention, the base material is impregnated with a thermosetting resin composition and dried to obtain a semi-cured laminated material. Moreover, the resin sheet made into the semi-hardened state which does not use a base material, and metal foil with resin can also be used. Alternatively, paint can be used. In this case, depending on the degree of the semi-cured state, high flow, low flow, or no flow is achieved. In the case of no flow, when the laminate is formed by heating and pressurizing, the flow of the resin is 100 μm or less, preferably 50 μm or less. At this time, it is important that the metal plate and the metal foil adhere to each other and no void is generated. The heating temperature is generally 100 to 180 ° C. The time is 5 to 60 minutes, and is appropriately selected depending on the target flow level.
[0033]
The method for producing the semiconductor plastic package containing the metal core of the present invention is not particularly limited. For example, the method is as follows (FIG. 1).
(1) First, the entire surface of the metal plate as the inner layer is coated with a liquid etching resist, heated to remove the solvent, and then the resist for the protrusions for fixing the semiconductor chip and the heat dissipation protrusions on the opposite surface remain. Cover the prepared negative film, and after irradiating with ultraviolet light, dissolve and remove the unexposed portion with 1% aqueous sodium carbonate solution.
(2) After the metal plate is dissolved by etching to a predetermined thickness, the etching resist is dissolved and removed.
(3) Cover the top and bottom again with a liquid etching resist, cut out the metal projections on both sides, apply a negative film created so that the light in the clearance hole can be blocked, and expose with ultraviolet light.
[0034]
(4) Dissolve and remove the etching resist in the clearance hole, and then etch from both sides using the etching method to create a clearance hole in the metal plate.
(5) After removing the etching resist, chemically treat the entire surface of the metal plate, place no-flow or low-flow prepregs with holes slightly larger than the metal protrusions on both sides, and place metal foil on the top and bottom.
(6) After laminating and forming under heating, pressurization, and vacuum, open a through-hole at a predetermined position with a drill or laser so as not to contact the inner metal plate, apply desmear treatment, and perform metal plating .
(7) At the same time as creating the circuit up and down by a known method, the metal foil of the metal plate protrusion is removed, noble metal plating is applied, and the semiconductor chip is placed on the surface of the protrusion that is the semiconductor chip mounting portion of the inner metal plate. Glue. Thereafter, resin sealing is performed, and solder balls are bonded as necessary.
[0035]
【Example】
The present invention will be specifically described below with reference to examples and comparative examples. Unless otherwise specified, “parts” represents parts by weight.
Example 1
900 parts of 2,2-bis (4-cyanatophenyl) propane and 100 parts of bis (4-maleimidophenyl) methane were melted at 150 ° C. and reacted for 4 hours with stirring to obtain a prepolymer. This was dissolved in a mixed solvent of methyl ethyl ketone and dimethylformamide.
[0036]
400 parts of bisphenol A type epoxy resin (trade name: Epicoat 1001, manufactured by Yuka Shell Epoxy Co., Ltd.), 600 parts of cresol novolac type epoxy resin (trade name: ESCN-220F, manufactured by Sumitomo Chemical Co., Ltd.) In addition, it was uniformly dissolved and mixed. Furthermore, 0.4 parts of zinc octylate as a catalyst was added and dissolved and mixed. To this, 500 parts of an inorganic filler (trade name: Talc P-3, manufactured by Nippon Talc Co., Ltd.) was added, and stirred uniformly to obtain varnish A. It was.
This varnish is impregnated into a glass fabric with a thickness of 100μm and dried at 150 ° C. Gelation time (at 170 ° C) 10 seconds, 170 ° C, 20kgf / cm2Thus, a semi-cured prepreg (prepreg B) having a thickness of 105 μm and having a resin flow of 85 μm in 5 minutes was obtained.
[0037]
On the other hand, a copper plate with a thickness of 250 μm is prepared as an inner metal plate, and a 13 mm square and 100 μm high protrusion is etched in the center of a 50 mm square package, and a 13 mm square and 100 μm high protrusion is etched on the opposite surface. Formed.
After that, a liquid etching resist was applied to the entire surface of the metal plate to a thickness of 25 μm, dried, and the solvent was blown off. After that, the negative films with the protrusions cut out were stacked on both sides, and the portions other than the clearance holes were irradiated with ultraviolet rays. After removing the resist film in the clearance hole portion with 1% sodium carbonate aqueous solution, a 0.6 mmφ clearance hole was formed by etching from both sides.
[0038]
The entire surface of the metal plate is treated with black copper oxide, and the both sides are covered with the prepreg B with a hole that is 50μm larger than the protruding portion at the position corresponding to the protruding portion. Place the electrolytic copper foil at 200 ℃, 20kgf / cm2Then, they were laminated and integrated for 2 hours under a vacuum of 30 mmHg or less.
Clearance hole is drilled with a laser through hole with a hole diameter of 0.25mm in the center so that it does not contact the inner layer metal of the clearance hole, and after desmear treatment, copper plating is performed by electroless and electrolytic plating, and 18μm in the hole A copper plating layer was formed.
[0039]
A liquid etching resist was applied to the front and back and dried, and then a positive film was overlaid and exposed and developed to form a front and back circuit, and the copper foil on the protrusions was simultaneously etched away.
A plating resist was formed in addition to the metal protrusion, bonding pad and ball pad, and nickel and gold plating were applied to complete a printed wiring board.
A 13 mm square semiconductor chip is bonded and fixed to the upper surface protrusion with silver paste, then wire bonding is performed, and then resin-sealed by transfer molding using a silica-containing epoxy sealing compound, and soldered to the ball pad The balls were joined to produce a semiconductor plastic package (FIGS. 1 and 2). This package was bonded to an epoxy resin motherboard printed wiring board by melting solder balls. The evaluation results are shown in Table 1.
[0042]
Comparative Example 1
Two prepregs B of Example 1 were used, and the above 18 μm electrolytic copper foil was placed on the top and bottom, 190 ° C., 35 kgf / cm2And laminated for 90 minutes under a vacuum of 30 mmHg or less to obtain a double-sided copper-clad laminate. A through hole with a hole diameter of 0.25 mmφ was drilled at a predetermined position, and copper plating was applied. Circuits were formed on the top and bottom of this plate by a known method, and nickel plating and gold plating were performed. This is where a through-hole for heat dissipation is formed at the place where the semiconductor chip is mounted, and the semiconductor chip is bonded to it with silver paste, and after wire bonding, it is sealed with a liquid sealing resin. Solder balls were joined and placed on the motherboard printed wiring board (FIG. 3). The evaluation results are shown in Table 1.
[0043]
Comparative Example 2
The semiconductor chip mounting part of the printed wiring board of Comparative Example 1 is cut up and down with a counterbore machine, and then a copper plate with a thickness of 200 μm is punched on the back side, and the above prepreg B is punched and bonded under pressure, and printed wiring with a heat sink A board was created. This was somewhat warped. A semiconductor chip was bonded to the heat radiating plate with silver paste, wire-bonded, sealed with a liquid sealing resin, and bonded onto a motherboard printed wiring board with solder balls (FIG. 4). The evaluation results are shown in Table 1.
[0044]
Table 1
Example 1 Comparative Example 1 Comparative Example 2
Heat resistance after moisture absorption (1) Normal No abnormality No abnormality No abnormality
120hrs No abnormality No abnormality No abnormality
144hrs No abnormality Partial peeling No abnormality
168hrs No abnormality Partial peeling Partial peeling
Heat resistance after moisture absorption (2) Normal No abnormality No abnormality No abnormality
24hrs No abnormality Partial peeling No abnormality
48hrs No abnormality Peeling large Partial peeling
72hrs No abnormality Peeling large Peeling large
96hrs No abnormality Wire breakage Peeling large
120hrs No abnormality Wire cut Wire cut
144hrs No abnormality − −
168hrs No abnormality − −
Glass-transition temperature ( ℃ ) 235--
Insulation after
Resistance value (Ω) 500hrs 5 × 1011
700hrs 8 × 10Ten
1000hrs 2x Ten Ten
Anti-migration resistance Normal 5 × 1013 − −
200hrs 5 × 1011
(Ω) 500hrs 3 × 1011
1000hrs 8x Ten Ten
Heat dissipation ( ℃ ) 32 57 48
[0045]
<Measurement method>
1) Heat resistance after moisture absorption (1): JEDEC STANDARD TEST METHOD A113-A LEVEL3: After processing for a predetermined time at 30 ° C and 60% RH, cross-sectional observation and presence of substrate abnormality after 3 cycles of 220 ° C reflow soldering Confirmed by electrical check.
2) Heat resistance after moisture absorption (2): JEDEC STANDARD TEST METHOD A113-A LEVEL2: After processing for a predetermined time (Max. 168hrs.) At 85 ° C and 60% RH, abnormalities of the substrate after 3 cycles of 220 ° C reflow soldering The presence or absence was confirmed by cross-sectional observation and electrical check.
3) Glass transition temperature: measured by DMA method.
4) Insulation resistance after pressure cooker treatment: After treatment at 121 ° C and 2 atm for a predetermined time, after treatment at 25 ° C and 60% RH for 2 hours, applying 500 VDC for 60 seconds between terminals (line / space) = 70 μm / 70 μm) was measured.
5) Migration resistance: 85 ° C / 85% RH, 50VDC was applied, and the insulation resistance value between terminals was measured.
6) Heat dissipation: The package was bonded to the same motherboard printed wiring board with solder balls and used continuously for 1000 hours, and then the temperature of the package was measured.
[0046]
【The invention's effect】
Printed wiring board fragmentOne ofsurface(a)InCircuit conductor (a-1) But the other side (b) To circuit conductor (b-1) Is one side of the printed wiring board (a) InSemiconductor chipJoiningIsAnd,ThesemiconductorChipCircuit conductorThePrinted wiring boardOne ofsurface(a) InFormedingCircuit conductor(a-1)And at least a circuit conductor.(a-1)ButThePrinted circuit boardThe othersurface(b)Formed intoingCircuit conductor(b-1)Or it is connected with the conductor pad for solder ball connection with the through hole,TheIn a semiconductor plastic package having a structure in which the periphery of a semiconductor chip is sealed with a resin, and a solder ball is bonded to the connecting conductor pad, the printed wiring board is approximately at the center in the thickness direction of the printed wiring board. Almost the same plane area as the printed wiring boardofA metal plate is arranged, the metal plateThePrinted circuit boardOne side (a) Formed inCircuit conductor(a-1) And the other side (b) Circuit conductor formed on (b-1)WhenIs theInsulated with the thermosetting resin composition constituting the printed wiring boardAnd,Protrusions having substantially the same area as the semiconductor chip on one surface of the metal plate (a-2) However, the other surface has a projection having the same area as the semiconductor chip. (b-2) Is formed at substantially the same position on both sides of the metal plate,ProtrusionPart (a-2) Tip of flatFaceThePrinted circuit boardone ofsurface(a)Exposed toThe protrusions (b-2) Is the other side of the printed wiring board. (b) Exposed to theMetal plateLocations other than the protrusionsAt least one clearance hole is formed.AndA printed wiring board having a structure in which the through hole is formed inside the clearance hole via the thermosetting resin composition,one ofsurface(a)ProtrusionPart (a-2) Tip of flatThe semiconductor chip is bonded to the surface,The othersurface(b)ProtrusionPart (b-2) Tip of flatBy adopting a semiconductor plastic package with a structure in which solder balls for heat transfer are bonded to the surface, there is no moisture absorption from the bottom surface of the semiconductor chip, heat resistance after moisture absorption, that is, popcorn phenomenon can be greatly improved, and heat dissipation In addition, the semiconductor plastic package having a novel structure, which is suitable for mass productivity and improved in economic efficiency, can be obtained.
[Brief description of the drawings]
FIG. 1 shows a manufacturing process of a semiconductor plastic package of Example 1.
FIG. 2 shows a manufacturing process of the semiconductor plastic package of Example 1.
FIG. 3 shows a manufacturing process of the semiconductor plastic package of Comparative Example 1;
4 shows a manufacturing process of a semiconductor plastic package of Comparative Example 2. FIG.
[Explanation of symbols]
a: etching resist, b: metal plate, c: negative film,
d: clearance hole, e: metal foil, f: prepreg B,
g: Through hole for front and back circuit conduction, h: Through hole for heat dissipation,
i: semiconductor chip, j: thermally conductive adhesive, k: bonding wire,
l: sealing resin, m: solder ball, n: plating resist
Claims (3)
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP00398498A JP3852510B2 (en) | 1998-01-12 | 1998-01-12 | Semiconductor plastic package |
| EP98310022A EP0926729A3 (en) | 1997-12-10 | 1998-12-08 | Semiconductor plastic package and process for the production thereof |
| US09/207,115 US6376908B1 (en) | 1997-12-10 | 1998-12-08 | Semiconductor plastic package and process for the production thereof |
| TW87120501A TW401723B (en) | 1997-12-10 | 1998-12-10 | Semiconductor plastic package and process for the production thereof |
| KR1019980054122A KR19990062959A (en) | 1997-12-10 | 1998-12-10 | Semiconductor plastic package and manufacturing method thereof |
| US10/036,385 US6720651B2 (en) | 1997-12-10 | 2002-01-07 | Semiconductor plastic package and process for the production thereof |
| US10/790,039 US20040171189A1 (en) | 1997-12-10 | 2004-03-02 | Semiconductor plastic package and process for the production thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP00398498A JP3852510B2 (en) | 1998-01-12 | 1998-01-12 | Semiconductor plastic package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11204682A JPH11204682A (en) | 1999-07-30 |
| JP3852510B2 true JP3852510B2 (en) | 2006-11-29 |
Family
ID=11572306
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP00398498A Expired - Fee Related JP3852510B2 (en) | 1997-12-10 | 1998-01-12 | Semiconductor plastic package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3852510B2 (en) |
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1998
- 1998-01-12 JP JP00398498A patent/JP3852510B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH11204682A (en) | 1999-07-30 |
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