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JP3847248B2 - Semiconductor element storage package and semiconductor device using the same - Google Patents

Semiconductor element storage package and semiconductor device using the same Download PDF

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Publication number
JP3847248B2
JP3847248B2 JP2002321750A JP2002321750A JP3847248B2 JP 3847248 B2 JP3847248 B2 JP 3847248B2 JP 2002321750 A JP2002321750 A JP 2002321750A JP 2002321750 A JP2002321750 A JP 2002321750A JP 3847248 B2 JP3847248 B2 JP 3847248B2
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Prior art keywords
semiconductor element
input
wiring conductor
base
conductor
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JP2004158576A (en
Inventor
哲生 平川
伸 松田
義信 澤
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Kyocera Corp
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Kyocera Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は高周波の電気信号を送受信する半導体素子を収納する半導体素子収納用パッケージ、およびその半導体素子収納用パッケージを用いて成る半導体装置に関するものである。
【0002】
【従来の技術】
従来、電気信号を送受信する半導体素子を収容するための半導体素子収納用パッケージは、一般に、酸化アルミニウム質焼結体、ムライト質焼結体、窒化アルミニウム質焼結体等の電気絶縁材料から成り、上面に半導体素子の搭載部が形成された基体と、タングステン、モリブデン、マンガン等の金属材料から成り、基体の半導体素子搭載部から下面にかけて被着導出された複数の入出力用配線導体(第1配線導体)およびグランド用配線導体と、この配線導体と電気的に接続するようにして基体の下面に形成された複数個のグランド用パッドおよび入出力用パッドと、基体の搭載部より上面もしくは側面にかけて導出されている出入力用配線導体(第2配線導体)と、導電性の線材と絶縁性の外囲体とから成り、線材の一端が出入力用配線導体(第2配線導体)に接続され、他端が外部に導出されているコネクターとにより構成されている。
【0003】
かかる半導体素子収納用パッケージは、その搭載部に電気信号を送受信する半導体素子がAu−Snろう材あるいは半田等の接合材を介して接着固定されるとともに、半導体素子の電極が入出力配線導体(第1配線導体)、グランド用配線導体および出入力配線導体(第2配線導体)にボンディングワイヤや接続用リボン、半田等の導電性接続材を介して接続され、その後、必要に応じて蓋体等で半導体素子を封止することによって半導体装置となる。
【0004】
また前記半導体装置は基体の下面に形成されているグランド用パッドおよび入出力用パッドを外部電気回路基板の回路導体に半田バンプ等を介し接続させることによって内部に収容する半導体素子が外部電気回路に接続され、同時にコネクターに同軸ケーブル等を介し外部の通信装置等の外部機器を接続させることによって半導体素子と外部機器とが接続するようになっている。
【0005】
なお、前記半導体装置に使用されている半導体素子は複数の電気信号を合成して一つの電気信号に変換する、或いは一つの電気信号を分離して複数の電気信号に変換する機能を有しており、外部電気回路から入出力用パッド及び第1配線導体を介して入力される5〜10GHzの複数の電気信号は半導体素子で合成されて40〜80GHzの一つの電気信号となり、この40〜80GHzの電気信号は第2配線導体を介してコネクターに伝送されるとともにコネクターより外部の通信装置等の外部機器に伝送され、またコネクターを介して外部機器より伝送された40〜80GHzの電気信号は半導体素子で5〜10GHzの複数の電気信号に変換され、各々の5〜10GHzの電気信号は第1配線導体及び入出力用パッドを介して外部電気回路に伝送されることとなる。
【0006】
また前記酸化アルミニウム質焼結体やムライト質焼結体等から成る基体はその線膨張係数が4×10-6/℃〜7.5×10-6/℃であるのに対し、外部電気回路基板は一般にガラスエポキシ樹脂材で形成されており、その線膨張係数は約15×10-6/℃程度であり、大きく相違することから外部電気回路基板の回路導体に入出力用パッドを半田バンプ等を介して接続した後、基体と外部電気回路基板に熱が作用すると基体と外部電気回路基板の熱膨張量の相違に起因して大きな応力が発生しこの応力によって入出力用パッドが基体より剥離したり、半田バンプに破断が発生して半導体素子と外部電気回路との間の接続が破られてしまう。そのためこの従来の半導体素子収納用パッケージ等は入出力用パッドを直径が1mm以上の円形形状(平面積が0.785mm2以上の円形形状)とし基体と入出力用パッドとの接合強度を強くするとともに外部電気回路基板の回路導体と入出力用パッドとを接続する半田バンプ等の量を多くし破断が発生しないようにしている。
【0007】
【特許文献1】
特開2002−164466号公報
【0008】
【発明が解決しようとする課題】
しかしながら、この従来の半導体素子収納用パッケージおよび半導体装置においては、第1配線導体と外部電気回路基板の回路導体とを接続する入出力用パッドが直径1mm以上の円形形状(平面積で0.785mm2以上の円形形状)をなし、第1配線導体の外形寸法(直径が約0.3mm以上、平面積で約0.07mm2以上の円形形状等)に比し約10倍大きく、入出力用パッドのインピーダンスが第1配線導体や外部電気回路基板の回路導体に比べ低いものとなっている。そのためこの入出力用パッドを介して第1配線導体と外部電気回路基板の回路導体とを接続するとともに5〜10GHzの電気信号を伝送させた場合、5〜10GHzの電気信号は高周波信号であるためインピーダンスが低い入出力用パッドで反射等を起こし、伝送特性が大きく劣化してしまうという欠点を有していた。
【0009】
本発明は上記欠点に鑑み案出されたもので、その目的は入出力用パッドでの高周波の電気信号の反射等を有効に防止し、外部電気回路と半導体素子とを接続する第1配線導体および入出力用パッドでの電気信号の伝送特性を改善した半導体素子収納用パッケージおよび半導体装置を提供することにある。
【0010】
【課題を解決するための手段】
本発明の半導体素子収納用パッケージは、40GHz〜80GHzの電気信号を送受信する半導体素子が搭載される搭載部を有する基体と、該基体の前記搭載部より下面にかけて導出されている複数個のグランド配線導体および第1配線導体と、前記基体の下面に形成され、前記グランド配線導体および第1配線導体に電気的に接続している複数個のグランド用パッドおよび入出力用パッドと、前記基体の搭載部より上面もしくは側面にかけて導出されている第2配線導体と、導電性の線材と絶縁性の外囲体とから成り、線材が前記第2配線導体に電気的に接続され、前記基体における前記第2配線導体が形成された面と側面との間の切り欠きに、上側が開放されるように取着されたコネクターとで形成され、前記入出力用パッドの平面積が0.196mm以下であり、かつ前記基体の線膨張係数が9×10−6/℃乃至20×10−6/℃であることを特徴とするものである。
【0011】
また本発明の半導体装置は、上記構成の半導体素子収納用パッケージと40GHz〜80GHzの電気信号を送受信する半導体素子とから成り、前記パッケージの搭載部に半導体素子を搭載固定するとともに該半導体素子の各電極を第1配線導体および第2配線導体に電気的に接続したことを特徴とするものである。
【0012】
本発明の半導体素子収納用パッケージおよび半導体装置によれば、第1配線導体を外部電気回路基板の回路導体に接続する入出力用パッドの平面積を0.196mm2以下とし、入出力用パッドのインピーダンスを第1配線導体や外部電気回路基板の回路導体のインピーダンスに近似させたことから入出力用パッドを介して第1配線導体と外部電気回路基板の回路導体とを接続するとともに5〜10GHzの高周波の電気信号を伝送させたとしても入出力用パッドで大きな反射等を起こすことはなく、伝送特性を優れたものとなすことができる。
【0013】
また本発明の半導体素子収納用パッケージおよび半導体装置によれば、入出力用パッドが形成されている基体の線膨張係数を9×10-6/℃乃至20×10-6/℃とし、ガラスエポキシ樹脂等の樹脂材で形成されている外部電気回路基板の線膨張係数に近似させたことから外部電気回路基板の回路導体に入出力用パッドを半田バンプ等を介して接続した後、基体と外部電気回路基板に熱が作用したとしても基体と外部電気回路基板との間には両者の線膨張係数の相違に起因する大きな応力が発生することはなく、これによって入出力用パッドを基体に強固に接合させておくことができるとともに半田バンプ等に破断が発生するのを有効に防止して半導体素子と外部電気回路との接続の信頼性を極めて高いものとなすことができる。
【0014】
【発明の実施の形態】
次に、本発明を添付図面に基づき詳細に説明する。
【0015】
図1は本発明の半導体素子収納用パッケージの一実施礼を示し、1は基体、2aは第1配線導体、2bはグランド配線導体、3aは入出力用パッド、3bはグランド用パッド、4は第2配線導体、5はコネクターである。これら基体1、第1配線導体2a、グランド配線導体2b、入出力用パッド3a、グランド用パッド3b、第2配線導体4およびコネクター5により半導体素子6を収納するための半導体素子収納用パッケージ7が基本的に構成される。
【0016】
前記基体1は線膨張係数が9×10−6/℃乃至20×10−6/℃の例えば、ガラスセラミックスから成り、原料粉末に適当な有機溶剤、溶媒、可塑剤、分散剤を添加混合して泥漿物を作り、この泥漿物を従来周知のドクターブレード法やカレンダーロール法等のシート成形法を採用しシート状に形成してグリーンシート(生シート)を得、しかる後、それらグリーンシートに適当な打ち抜き加工を施すとともにこれを必要に応じて複数枚積層し、約1000℃の温度で焼成することによって製作される。
【0017】
また前記基体1は、半導体素子の搭載部1aから下面にかけて複数個の第1配線導体2aおよびグランド用配線導体2bが形成されており、該各配線導体2a、2bは半導体素子の電気信号入出力用、接地用の各電極を、入出力用パッド3aやグランド用パッド3bに接続するための導電路として作用し、搭載部1a側の一端には半導体素子6の電気信号入出力用、接地用の各電極が導電性接続材を介して電気的に接続される。
【0018】
前記第1配線導体2aおよびグランド用配線導体2b、入出力用パッド3aおよびグランド用パッド3bは、銅、銀、金、パラジウム等の金属材料から成り、例えば銅から成る場合であれば、銅粉末に有機溶剤を添加して成る金属ペーストを基体1となるグリーンシートの表面にスクリーン印刷法により所定パターンに印刷しておくことによって形成される。
【0019】
この第1配線導体2aおよびグランド用配線導体2bの基体1下面側の一端は、それぞれ対応する入出力用パッド3aおよびグランド用パッド3bと電気的に接続しており、これらの入出力用パッド3a、グランド用パッド3bを外部電気回路の所定の信号用や接地用等の回路導体に接続することにより、半導体素子6の電気信号入出力用、接地用の各電極が外部電気回路と電気的に接続される。
【0020】
また前記基体1は、半導体素子の搭載部1aから上面や側面等にかけて第2配線導体4が形成されており、該第2配線導体4は半導体素子6の電極をコネクター5の線材5aに接続するための導電路として作用し、搭載部1a側の一端には半導体素子6の電極が導電性接続材8を介して電気的に接続される。
【0021】
前記第2配線導体4は、上述の第1配線導体2a等と同様に、銅、銀、金、パラジウム等の金属材料から成り、例えば銅から成る場合であれば、銅粉末に有機溶剤等を添加して成る金属ペーストを基体1となるグリーンシートの表面にスクリーン印刷法により所定パターンに印刷しておくことによって形成される。
【0022】
この第2配線導体4の基体1外表面側の一端はコネクター5の線材5aと電気的に接続しており、このコネクター5を同軸ケーブル等を介して通信装置等の外部機器に接続することにより半導体素子6と外部機器との間で高周波信号の送受信が行われる。
【0023】
前記コネクター5は、半導体素子収納用パッケージ7の第2配線導体4を同軸ケーブル等を介して外部機器に接続するための接続体として作用し、例えば、鉄−ニッケル−コバルト合金等の金属の線材5aの周囲を、ホウ珪酸系ガラス等の絶縁性の外囲体5bで取り囲んだ構造である。
【0024】
前記線材5aと外囲体5bとから成るコネクター5は、例えば、鉄−ニッケル−コバルト合金から成る線材5aを、鉄−ニッケル−コバルト合金等の金属から成る円筒状の容器の中央にセットし、容器内にホウ珪酸ガラス等のガラス粉末を充填した後、ガラス粉末を加熱溶融させて線材5aの周囲に被着させることによって製作される。
【0025】
かくして上述の半導体素子収納用パッケージによれば、基体1の搭載部1aに半導体素子6を搭載するとともにガラス、樹脂、ロウ材等の接着材を介して固定し、しかる後、半導体素子6の各電極を第1配線導体2aおよびグランド用配線導体2bに、例えば、ボンディングワイヤ8を介して接続し、最後に蓋体10を基体1の上面に封止材を介して接合させ、半導体素子6を気密に封止することによって半導体装置11となる。
【0026】
この半導体装置11は基体1下面の入出力用パッド3aおよびグランド用パッド3bが外部電気回路基板の所定の信号用や接地用等の回路導体に半田バンプ等の外部端子を介して接続され、これによって半導体素子6の信号用、接地用の各電極は外部電気回路と電気的に接続される。
【0027】
また、この半導体装置11に取着されているコネクター5の線材5aに同軸ケーブル等の外部接続用の導線を接続することにより、半導体素子6の電極が通信装置等の外部機器に接続される。
【0028】
そしてかかる半導体装置11は、外部電気回路から供給される5〜10GHzの複数電気信号を入出力用パッド3a及び第1配線導体2aを介して半導体素子6に入力させ、半導体素子6でこれら入力された電気信号を合成して、40〜80GHzの一つの電気信号とするとともにこれを第2配線導体4を介してコネクター5に出力し、該コネクター5の線材5aを介して外部の通信装置等の外部機器に伝送する、或いは、外部の通信装置等の外部機器から伝送された40〜80GHzの一つの電気信号をコネクター5の線材5a及び第2配線導体4を介して半導体素子6に入力し、半導体素子6で入力された40〜80GHzの電気信号を5〜10GHzの複数の電気信号に変換するとともにこれらの個々の電気信号を第1配線導体2a及び入出力用パッド3aを介して外部電気回路に供給することとなる。
【0029】
本発明の半導体素子収納用パッケージおよびこれを用いた半導体装置においては、第1配線導体2aと外部電気回路基板の回路導体を接続する入出力用パッド3aの平面積を0.196mm2以下としておくことが重要である。
【0030】
前記入出力用パッド3aの平面積を0.196mm2以下としておくと入出力用パッド3aのインピーダンスが第1配線導体2aと外部電気回路基板の回路導体等のインピーダンスに近似し、その結果、入出力用パッド3aを介して第1配線導体2aと外部電気回路基板の回路導体とを接続するとともに5〜10GHzの高周波の電気信号を伝送させたとしても入出力用パッド3aで大きな反射等を起こすことはなく、伝送特性が極めて優れたものとなすことができる。
【0031】
なお、前記入出力用パッド3aはその平面積が0.196mm2を超えると第1配線導体2aと外部電気回路基板の回路導体とを入出力用パッド3aを介して接続した後、5〜10GHzの高周波の電気信号が伝送された場合、入出力用パッド3aで電気信号に反射が発生し伝送特性が大きく劣化してしまう。従って、前記入出力用パッド3aはその平面積が0.196mm2以下のものに特定される。
【0032】
また前記入出力用パッド3aの平面積を0.196mm2以下にする方法としては、金属ペーストを基体1となるグリーンシートに印刷しておくことによって入出力用パッド3aを形成する際、スクリーン印刷におけるスクリーンマスクの開口を0.196mm2以下としておくことによって行われる。
【0033】
また本発明の半導体素子収納用パッケージおよび半導体装置においては入出力用パッド3aが形成されている基体1の線膨張係数を9×10-6/℃乃至20×10-6/℃の範囲としておくことが重要である。
【0034】
前記入出力用パッド3aが形成されている基体1の線膨張係数を9×10-6/℃乃至20×10-6/℃の範囲とすると基体1の線膨張係数をガラスエポキシ樹脂等の樹脂材で形成されている外部電気回路基板の線膨張係数に近似させることができ、これによって外部電気回路基板の回路導体に入出力用パッド3aを半田バンプ等を介して接続した後、基体1と外部電気回路基板に熱が作用したとしても基体1と外部電気回路基板との間には両者の線膨張係数の相違に起因する大きな応力が発生することはなく、その結果、入出力用パッド3aの平面積が0.196mm2以下と小さいものであっても入出力用パッド3aを基体1に強固に接合させておくことができるとともに半田バンプ等に破断が発生するのを有効に防止して半導体素子6と外部電気回路との接続の信頼性を極めて高いものとなすことができる。
【0035】
なお、前記基体1はその線膨張係数が9×10-6/℃未満、或いは20×10-6/℃を超えると基体1と外部電気回路基板の線膨張係数が相違し、外部電気回路基板の回路導体に入出力用パッド3aを半田バンプ等を介して接続した後、基体1と外部電気回路基板に熱が作用すると基体1と外部電気回路基板の熱膨張量の相違に起因して大きな応力が発生しこの応力によって入出力用パッド3aが基体1より剥離したり、半田バンプに破断が発生して半導体素子と外部電気回路との間の接続が破れてしまう。従って、前記基体1はその線膨張係数が9×10-6/℃乃至20×10-6/℃の範囲に特定される。
【0036】
また前記線膨張係数が9×10-6/℃乃至20×10-6/℃の基体1は具体的には、例えば、酸化バリウムを5〜60質量%含有するガラスと、40〜400℃における線膨張係数が8×10-6/以上の金属酸化物粒子を含むフィラーとからなり、前記ガラスおよび/またはフィラー中にジルコニウム(Zr)化合物をZrO2換算で0.1〜25質量%の割合で含有させたガラスセラミック焼結体が好適に使用される。
【0037】
なお、本発明は上述の実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば変更は可能である。
【0038】
【発明の効果】
本発明の半導体素子収納用パッケージおよび半導体装置によれば、第1配線導体を外部電気回路基板の回路導体に接続する入出力用パッドの平面積を0.196mm2以下とし、入出力用パッドのインピーダンスを第1配線導体や外部電気回路基板の回路導体のインピーダンスに近似させたことから入出力用パッドを介して第1配線導体と外部電気回路基板の回路導体とを接続するとともに5〜10GHzの高周波の電気信号を伝送させたとしても入出力用パッドで大きな反射等を起こすことはなく、伝送特性を優れたものとなすことができる。
【0039】
また本発明の半導体素子収納用パッケージおよび半導体装置によれば、入出力用パッドが形成されている基体の線膨張係数を9×10-6/℃乃至20×10-6/℃とし、ガラスエポキシ樹脂等の樹脂材で形成されている外部電気回路基板の線膨張係数に近似させたことから外部電気回路基板の回路導体に入出力用パッドを半田バンプ等を介して接続した後、基体と外部電気回路基板に熱が作用したとしても基体と外部電気回路基板との間には両者の線膨張係数の相違に起因する大きな応力が発生することはなく、これによって入出力用パッドを基体に強固に接合させておくことができるとともに半田バンプ等に破断が発生するのを有効に防止して半導体素子と外部電気回路との接続の信頼性を極めて高いものとなすことができる。
【図面の簡単な説明】
【図1】本発明の半導体素子収納用パッケージおよびこの半導体素子収納用パッケージを用いた半導体装置の一実施例を示す断面図である。
【符号の説明】
1・・・・・基体
1a・・・・搭載部
2a・・・・第1配線導体
2b・・・・グランド配線導体
3a・・・・入出力用パッド
3b・・・・グランド用パッド
4・・・・・第2配線導体
5・・・・・コネクター
5a・・・・線材
5b・・・・外囲体
6・・・・・半導体素子
7・・・・・半導体素子収納用パッケージ
8・・・・・ボンディングワイヤ
10・・・・蓋体
11・・・・半導体装置
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor element storage package for storing a semiconductor element that transmits and receives a high-frequency electrical signal, and a semiconductor device using the semiconductor element storage package.
[0002]
[Prior art]
Conventionally, a package for housing a semiconductor element for housing a semiconductor element that transmits and receives an electrical signal is generally made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, A base having a semiconductor element mounting portion formed on the upper surface, and a plurality of input / output wiring conductors (first electrode) made of a metal material such as tungsten, molybdenum, manganese, etc. Wiring conductors) and ground wiring conductors, a plurality of ground pads and input / output pads formed on the lower surface of the substrate so as to be electrically connected to the wiring conductors, and an upper surface or a side surface from the mounting portion of the substrate Consisting of an input / output wiring conductor (second wiring conductor) that is led out to the end of the wire, a conductive wire, and an insulating envelope, and one end of the wire is connected to the input / output wiring. Is connected to the body (second wiring conductor), the other end is constituted by a connector that is led to the outside.
[0003]
In such a package for housing a semiconductor element, a semiconductor element that transmits and receives an electrical signal is bonded and fixed to the mounting portion via a bonding material such as an Au—Sn brazing material or solder, and the electrode of the semiconductor element is connected to an input / output wiring conductor ( The first wiring conductor), the ground wiring conductor and the input / output wiring conductor (second wiring conductor) are connected to each other through a conductive connecting material such as a bonding wire, a connecting ribbon, or solder, and then a lid as required. A semiconductor device is obtained by sealing the semiconductor element with, for example.
[0004]
In the semiconductor device, a ground pad and an input / output pad formed on the lower surface of the base are connected to a circuit conductor of an external electric circuit board through a solder bump or the like, so that a semiconductor element accommodated in the semiconductor device is an external electric circuit. At the same time, an external device such as an external communication device is connected to the connector via a coaxial cable or the like, so that the semiconductor element and the external device are connected.
[0005]
The semiconductor element used in the semiconductor device has a function of synthesizing and converting a plurality of electric signals into one electric signal, or separating one electric signal into a plurality of electric signals. A plurality of electrical signals of 5 to 10 GHz input from the external electrical circuit via the input / output pads and the first wiring conductor are combined by the semiconductor elements to become one electrical signal of 40 to 80 GHz, and this 40 to 80 GHz Is transmitted to the connector through the second wiring conductor and is transmitted from the connector to an external device such as an external communication device. The 40 to 80 GHz electrical signal transmitted from the external device through the connector is a semiconductor. The device converts the electrical signal into a plurality of electrical signals of 5 to 10 GHz. Each electrical signal of 5 to 10 GHz is externally connected via the first wiring conductor and the input / output pad. And thus transmitted to the road.
[0006]
To Also said substrate consisting of sintered aluminum oxide and mullite sintered body such that the linear expansion coefficient of 4 × 10 -6 /℃~7.5×10 -6 / ℃ , external electric circuit The substrate is generally made of a glass epoxy resin material, and its linear expansion coefficient is about 15 × 10 −6 / ° C., which is greatly different. Therefore, input / output pads are solder bumps on the circuit conductor of the external electric circuit substrate. After the connection is established, the heat is applied to the base and the external electric circuit board, and a large stress is generated due to the difference in thermal expansion between the base and the external electric circuit board. The connection between the semiconductor element and the external electric circuit is broken due to peeling or breakage of the solder bump. For this reason, in this conventional package for housing semiconductor elements, the input / output pads have a circular shape with a diameter of 1 mm or more (a circular shape with a flat area of 0.785 mm 2 or more), and the bonding strength between the substrate and the input / output pads is increased. At the same time, the amount of solder bumps connecting the circuit conductors of the external electric circuit board and the input / output pads is increased to prevent breakage.
[0007]
[Patent Document 1]
Japanese Patent Laid-Open No. 2002-164466
[Problems to be solved by the invention]
However, in this conventional semiconductor element housing package and semiconductor device, the input / output pads for connecting the first wiring conductor and the circuit conductor of the external electric circuit board have a circular shape with a diameter of 1 mm or more (0.785 mm in flat area). 2 or more circular shape), and about 10 times larger than the external dimensions of the first wiring conductor (circular shape with a diameter of about 0.3 mm or more and a flat area of about 0.07 mm 2 or more), for input and output The pad impedance is lower than the first wiring conductor and the circuit conductor of the external electric circuit board. For this reason, when the first wiring conductor and the circuit conductor of the external electric circuit board are connected via the input / output pad and an electric signal of 5 to 10 GHz is transmitted, the electric signal of 5 to 10 GHz is a high-frequency signal. The input / output pads with low impedance cause reflection and the like, and have the disadvantage that transmission characteristics are greatly deteriorated.
[0009]
The present invention has been devised in view of the above drawbacks, and its purpose is to effectively prevent reflection of high-frequency electrical signals at the input / output pads, and to connect the external electric circuit and the semiconductor element. Another object of the present invention is to provide a package for housing a semiconductor element and a semiconductor device with improved electrical signal transmission characteristics at an input / output pad.
[0010]
[Means for Solving the Problems]
A package for housing a semiconductor element according to the present invention includes a base having a mounting portion on which a semiconductor element that transmits and receives an electrical signal of 40 GHz to 80 GHz is mounted, and a plurality of ground wirings extending from the mounting portion to the lower surface of the base A plurality of ground pads and input / output pads formed on a lower surface of the base body and electrically connected to the ground wiring conductor and the first wiring conductor; and mounting the base body A second wiring conductor led out from the upper surface to the side surface, a conductive wire and an insulating envelope, the wire being electrically connected to the second wiring conductor, Two wiring conductors are formed in a notch between a side surface and a connector attached so that the upper side is opened, and the plane area of the input / output pad is .196mm 2 or less, and is characterized in that the linear expansion coefficient of said substrate is 9 × 10 -6 / ℃ to 20 × 10 -6 / ℃.
[0011]
A semiconductor device according to the present invention includes a semiconductor element storage package having the above-described configuration and a semiconductor element that transmits and receives an electrical signal of 40 GHz to 80 GHz. The semiconductor element is mounted and fixed on the mounting portion of the package, and each of the semiconductor elements is mounted. The electrode is electrically connected to the first wiring conductor and the second wiring conductor.
[0012]
According to the semiconductor element storage package and the semiconductor device of the present invention, the plane area of the input / output pad for connecting the first wiring conductor to the circuit conductor of the external electric circuit board is 0.196 mm 2 or less, and Since the impedance is approximated to the impedance of the first wiring conductor and the circuit conductor of the external electric circuit board, the first wiring conductor and the circuit conductor of the external electric circuit board are connected via the input / output pads, and 5-10 GHz. Even if a high-frequency electrical signal is transmitted, the input / output pad does not cause a large reflection or the like, and the transmission characteristics can be improved.
[0013]
Further, according to the semiconductor element storage package and the semiconductor device of the present invention, the linear expansion coefficient of the substrate on which the input / output pads are formed is 9 × 10 −6 / ° C. to 20 × 10 −6 / ° C. After approximating the linear expansion coefficient of the external electric circuit board formed of resin material such as resin, after connecting the input / output pads to the circuit conductor of the external electric circuit board via solder bumps etc., the base and the external Even if heat acts on the electric circuit board, no large stress is generated between the base and the external electric circuit board due to the difference in coefficient of linear expansion between the two, thereby making the input / output pads strong on the base. In addition, it is possible to effectively prevent breakage of the solder bumps and the like, and to improve the reliability of the connection between the semiconductor element and the external electric circuit.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Next, the present invention will be described in detail with reference to the accompanying drawings.
[0015]
FIG. 1 shows an embodiment of a package for housing a semiconductor device according to the present invention, wherein 1 is a base, 2a is a first wiring conductor, 2b is a ground wiring conductor, 3a is an input / output pad, 3b is a ground pad, The second wiring conductor 5 is a connector. A semiconductor element housing package 7 for housing the semiconductor element 6 by the substrate 1, the first wiring conductor 2a, the ground wiring conductor 2b, the input / output pad 3a, the ground pad 3b, the second wiring conductor 4 and the connector 5 is provided. Basically composed.
[0016]
The substrate 1 is made of, for example, glass ceramic having a linear expansion coefficient of 9 × 10 −6 / ° C. to 20 × 10 −6 / ° C., and an appropriate organic solvent, solvent, plasticizer, and dispersant are added to and mixed with the raw material powder. The mud is made into a sheet by using a sheet forming method such as a doctor blade method or a calender roll method, which is conventionally known, to obtain a green sheet (raw sheet). It is manufactured by performing an appropriate punching process, stacking a plurality of sheets as necessary, and firing at a temperature of about 1000 ° C.
[0017]
The base 1 is formed with a plurality of first wiring conductors 2a and ground wiring conductors 2b from the semiconductor element mounting portion 1a to the lower surface, and the wiring conductors 2a and 2b are input / output electric signals of the semiconductor elements. Each of the electrodes for grounding and grounding acts as a conductive path for connecting to the input / output pad 3a and the grounding pad 3b, and one end on the mounting portion 1a side is for electrical signal input / output of the semiconductor element 6 and grounding These electrodes are electrically connected through a conductive connecting material.
[0018]
The first wiring conductor 2a, the ground wiring conductor 2b, the input / output pad 3a, and the ground pad 3b are made of a metal material such as copper, silver, gold, or palladium. It is formed by printing a metal paste formed by adding an organic solvent on the surface of a green sheet serving as the substrate 1 in a predetermined pattern by a screen printing method.
[0019]
One end of the first wiring conductor 2a and the ground wiring conductor 2b on the lower surface side of the base body 1 is electrically connected to the corresponding input / output pad 3a and ground pad 3b, respectively, and these input / output pads 3a. By connecting the ground pad 3b to a predetermined signal or ground circuit conductor of the external electric circuit, the electric signal input / output and ground electrodes of the semiconductor element 6 are electrically connected to the external electric circuit. Connected.
[0020]
The base 1 has a second wiring conductor 4 formed from the semiconductor element mounting portion 1 a to the upper surface, side surface, and the like. The second wiring conductor 4 connects the electrode of the semiconductor element 6 to the wire 5 a of the connector 5. The electrode of the semiconductor element 6 is electrically connected to one end on the mounting portion 1a side via the conductive connecting material 8.
[0021]
The second wiring conductor 4 is made of a metal material such as copper, silver, gold, or palladium, like the first wiring conductor 2a described above. For example, if the second wiring conductor 4 is made of copper, an organic solvent or the like is added to the copper powder. The added metal paste is formed by printing a predetermined pattern on the surface of the green sheet to be the substrate 1 by a screen printing method.
[0022]
One end of the second wiring conductor 4 on the outer surface side of the base 1 is electrically connected to the wire 5a of the connector 5, and the connector 5 is connected to an external device such as a communication device via a coaxial cable or the like. High frequency signals are transmitted and received between the semiconductor element 6 and the external device.
[0023]
The connector 5 acts as a connection body for connecting the second wiring conductor 4 of the package 7 for housing a semiconductor element to an external device via a coaxial cable or the like. For example, a metal wire such as iron-nickel-cobalt alloy This is a structure in which the periphery of 5a is surrounded by an insulating envelope 5b such as borosilicate glass.
[0024]
The connector 5 consisting of the wire 5a and the enclosure 5b is set, for example, by setting the wire 5a made of iron-nickel-cobalt alloy in the center of a cylindrical container made of metal such as iron-nickel-cobalt alloy, After the container is filled with glass powder such as borosilicate glass, the glass powder is heated and melted and deposited around the wire 5a.
[0025]
Thus, according to the above-described package for housing a semiconductor element, the semiconductor element 6 is mounted on the mounting portion 1a of the base 1 and fixed through an adhesive such as glass, resin, brazing material, and then each of the semiconductor elements 6 is mounted. The electrodes are connected to the first wiring conductor 2a and the ground wiring conductor 2b through, for example, bonding wires 8, and finally the lid body 10 is bonded to the upper surface of the base body 1 through a sealing material, so that the semiconductor element 6 is bonded. The semiconductor device 11 is formed by hermetically sealing.
[0026]
In this semiconductor device 11, input / output pads 3a and ground pads 3b on the lower surface of the substrate 1 are connected to predetermined signal or ground circuit conductors of an external electric circuit board via external terminals such as solder bumps. Thus, the signal and ground electrodes of the semiconductor element 6 are electrically connected to an external electric circuit.
[0027]
Further, by connecting an external connection conductor such as a coaxial cable to the wire 5a of the connector 5 attached to the semiconductor device 11, the electrode of the semiconductor element 6 is connected to an external device such as a communication device.
[0028]
The semiconductor device 11 inputs a plurality of electric signals of 5 to 10 GHz supplied from an external electric circuit to the semiconductor element 6 via the input / output pad 3a and the first wiring conductor 2a, and these are input by the semiconductor element 6. The electrical signal is synthesized into one electrical signal of 40 to 80 GHz and output to the connector 5 via the second wiring conductor 4, and an external communication device or the like is connected via the wire 5 a of the connector 5. One electrical signal of 40 to 80 GHz transmitted to an external device or transmitted from an external device such as an external communication device is input to the semiconductor element 6 through the wire 5a of the connector 5 and the second wiring conductor 4, The electrical signal of 40-80 GHz input by the semiconductor element 6 is converted into a plurality of electrical signals of 5-10 GHz, and these individual electrical signals are converted into the first wiring conductors 2a and 2a. The supplying to the external electrical circuit through the input-output pads 3a.
[0029]
In the package for housing a semiconductor element and the semiconductor device using the same according to the present invention, the plane area of the input / output pad 3a connecting the first wiring conductor 2a and the circuit conductor of the external electric circuit board is set to 0.196 mm 2 or less. This is very important.
[0030]
If the plane area of the input / output pad 3a is 0.196 mm 2 or less, the impedance of the input / output pad 3a approximates the impedance of the first wiring conductor 2a and the circuit conductor of the external electric circuit board. Even if the first wiring conductor 2a is connected to the circuit conductor of the external electric circuit board through the output pad 3a and a high frequency electric signal of 5 to 10 GHz is transmitted, the input / output pad 3a causes a large reflection or the like. In other words, the transmission characteristics can be extremely excellent.
[0031]
When the plane area of the input / output pad 3a exceeds 0.196 mm 2 , the first wiring conductor 2a and the circuit conductor of the external electric circuit board are connected via the input / output pad 3a and then 5 to 10 GHz. When a high-frequency electrical signal is transmitted, reflection occurs in the electrical signal at the input / output pad 3a, and transmission characteristics are greatly deteriorated. Therefore, the input / output pad 3a is specified to have a plane area of 0.196 mm 2 or less.
[0032]
Further, as a method for reducing the plane area of the input / output pad 3a to 0.196 mm 2 or less, when the input / output pad 3a is formed by printing a metal paste on a green sheet as the base 1, screen printing is performed. The opening of the screen mask is set to 0.196 mm 2 or less.
[0033]
In the semiconductor element storage package and the semiconductor device of the present invention, the linear expansion coefficient of the substrate 1 on which the input / output pads 3a are formed is set in the range of 9 × 10 −6 / ° C. to 20 × 10 −6 / ° C. This is very important.
[0034]
When the linear expansion coefficient of the substrate 1 on which the input / output pads 3a are formed is in the range of 9 × 10 −6 / ° C. to 20 × 10 −6 / ° C., the linear expansion coefficient of the substrate 1 is a resin such as glass epoxy resin. The linear expansion coefficient of the external electric circuit board formed of the material can be approximated. With this, the input / output pad 3a is connected to the circuit conductor of the external electric circuit board via a solder bump or the like, and then the base 1 and Even if heat is applied to the external electric circuit board, no large stress is generated between the base 1 and the external electric circuit board due to the difference in linear expansion coefficient between the two, and as a result, the input / output pad 3a. The input / output pad 3a can be firmly bonded to the substrate 1 even when the flat area of the substrate is as small as 0.196 mm 2 or less, and it is possible to effectively prevent the solder bumps from being broken. Semiconductor element 6 and The reliability of connection between the parts the electric circuit can be made extremely high.
[0035]
When the linear expansion coefficient of the base 1 is less than 9 × 10 −6 / ° C. or exceeds 20 × 10 −6 / ° C., the linear expansion coefficient of the base 1 and the external electric circuit board is different, and the external electric circuit board is different. After the input / output pads 3a are connected to the circuit conductors via solder bumps or the like, if heat is applied to the base 1 and the external electric circuit board, the difference is caused by the difference in thermal expansion between the base 1 and the external electric circuit board. Stress is generated, and the input / output pad 3a is peeled off from the base body 1 due to this stress, or the solder bump is broken and the connection between the semiconductor element and the external electric circuit is broken. Therefore, the linear expansion coefficient of the substrate 1 is specified in the range of 9 × 10 −6 / ° C. to 20 × 10 −6 / ° C.
[0036]
The substrate 1 having a linear expansion coefficient of 9 × 10 −6 / ° C. to 20 × 10 −6 / ° C. specifically includes, for example, glass containing 5 to 60% by mass of barium oxide, and 40 to 400 ° C. It consists of a filler containing metal oxide particles having a linear expansion coefficient of 8 × 10 −6 / or more, and a zirconium (Zr) compound is contained in the glass and / or filler in a proportion of 0.1 to 25% by mass in terms of ZrO 2. The glass-ceramic sintered body contained in is preferably used.
[0037]
It should be noted that the present invention is not limited to the above-described embodiments, and modifications can be made without departing from the gist of the present invention.
[0038]
【The invention's effect】
According to the semiconductor element storage package and the semiconductor device of the present invention, the plane area of the input / output pad for connecting the first wiring conductor to the circuit conductor of the external electric circuit board is 0.196 mm 2 or less, and Since the impedance is approximated to the impedance of the first wiring conductor and the circuit conductor of the external electric circuit board, the first wiring conductor and the circuit conductor of the external electric circuit board are connected via the input / output pads, and 5-10 GHz. Even if a high-frequency electrical signal is transmitted, the input / output pad does not cause a large reflection or the like, and the transmission characteristics can be improved.
[0039]
Further, according to the semiconductor element storage package and the semiconductor device of the present invention, the linear expansion coefficient of the substrate on which the input / output pads are formed is 9 × 10 −6 / ° C. to 20 × 10 −6 / ° C. After approximating the linear expansion coefficient of the external electric circuit board formed of resin material such as resin, after connecting the input / output pads to the circuit conductor of the external electric circuit board via solder bumps etc., the base and the external Even if heat acts on the electric circuit board, no large stress is generated between the base and the external electric circuit board due to the difference in the coefficient of linear expansion between the two, thereby making the input / output pads strong on the base. In addition, it is possible to effectively prevent breakage of the solder bumps and the like, and to improve the reliability of the connection between the semiconductor element and the external electric circuit.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing an embodiment of a semiconductor element housing package and a semiconductor device using the semiconductor element housing package of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Base | substrate 1a ... Mounting part 2a ... 1st wiring conductor 2b ... Ground wiring conductor 3a ... Input / output pad 3b ... Ground pad 4 2nd wiring conductor 5 Connector 5a Wire 5b Enclosure 6 Semiconductor element 7 Package 8 for housing semiconductor elements .... Bonding wire 10 ... Lid 11 ... Semiconductor device

Claims (2)

40GHz〜80GHzの電気信号を送受信する半導体素子が搭載される搭載部を有する基体と、該基体の前記搭載部より下面にかけて導出されている複数個のグランド配線導体および第1配線導体と、前記基体の下面に形成され、前記グランド配線導体および第1配線導体に電気的に接続している複数個のグランド用パッドおよび入出力用パッドと、前記基体の搭載部より上面もしくは側面にかけて導出されている第2配線導体と、導電性の線材と絶縁性の外囲体とから成り、線材が前記第2配線導体に電気的に接続され、前記基体における前記第2配線導体が形成された面と側面との間の切り欠きに、上側が開放されるように取着されたコネクターとで形成され、前記入出力用パッドの平面積が0.196mm以下であり、かつ前記基体の線膨張係数が9×10−6/℃乃至20×10−6/℃であることを特徴とする半導体素子収納用パッケージ。A base having a mounting portion on which a semiconductor element for transmitting and receiving electrical signals of 40 GHz to 80 GHz is mounted; a plurality of ground wiring conductors and first wiring conductors extending from the mounting portion to a lower surface of the base; and the base A plurality of ground pads and input / output pads that are electrically connected to the ground wiring conductor and the first wiring conductor, and are led out from the mounting portion of the base to the upper surface or the side surface. A surface and side surfaces of the second wiring conductor, a conductive wire and an insulating envelope, the wire is electrically connected to the second wiring conductor, and the second wiring conductor is formed on the base. And a connector attached so that the upper side is opened, and a plane area of the input / output pad is 0.196 mm 2 or less, and the base A package for housing a semiconductor element, wherein the body has a linear expansion coefficient of 9 × 10 −6 / ° C. to 20 × 10 −6 / ° C. 請求項1に記載の半導体素子収納用パッケージと40GHz〜80GHzの電気信号を送受信する半導体素子とから成り、前記パッケージの搭載部に半導体素子を搭載固定するとともに該半導体素子の各電極を第1配線導体および第2配線導体に電気的に接続したことを特徴とする半導体装置。A package for housing a semiconductor element according to claim 1 and a semiconductor element for transmitting and receiving an electrical signal of 40 GHz to 80 GHz. The semiconductor element is mounted and fixed on a mounting portion of the package, and each electrode of the semiconductor element is connected to a first wiring. A semiconductor device characterized by being electrically connected to a conductor and a second wiring conductor.
JP2002321750A 2002-11-05 2002-11-05 Semiconductor element storage package and semiconductor device using the same Expired - Fee Related JP3847248B2 (en)

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