[go: up one dir, main page]

JP3835584B2 - Electronic component equipment - Google Patents

Electronic component equipment Download PDF

Info

Publication number
JP3835584B2
JP3835584B2 JP02010598A JP2010598A JP3835584B2 JP 3835584 B2 JP3835584 B2 JP 3835584B2 JP 02010598 A JP02010598 A JP 02010598A JP 2010598 A JP2010598 A JP 2010598A JP 3835584 B2 JP3835584 B2 JP 3835584B2
Authority
JP
Japan
Prior art keywords
adhesive
connection terminal
electronic component
wiring layer
connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP02010598A
Other languages
Japanese (ja)
Other versions
JPH11219980A (en
Inventor
伊津夫 渡辺
賢三 竹村
義之 ▲つる▼
直之 浦崎
靖 島田
昭士 中祖
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Showa Denko Materials Co Ltd
Resonac Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd, Showa Denko Materials Co Ltd, Resonac Corp filed Critical Hitachi Chemical Co Ltd
Priority to JP02010598A priority Critical patent/JP3835584B2/en
Publication of JPH11219980A publication Critical patent/JPH11219980A/en
Application granted granted Critical
Publication of JP3835584B2 publication Critical patent/JP3835584B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Wire Bonding (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、例えばフリップチップ実装方式により半導体チップを実装基板と接着剤で接着固定すると共に両者の電極同士を電気的に接続することにより得られる電子部品装置に関する。
【0002】
【従来の技術】
半導体実装分野では、低コスト化・高精化に対応した新しい実装形態としてICチップを直接プリント基板やフレキシブル配線板に搭載するフリップチップ実装が注目されている。フリップチップ実装方式としては、チップの端子にはんだバンプを設け、はんだ接続を行う方式や導電性接着剤を介して電気的接続を行う方式が知られている。これらの方式では、接続するチップと基板の熱膨張係数差に基づくストレスが、各種環境下に曝した場合、接続界面で発生し接続信頼性が低下するという問題がある。このため、接続界面のストレスを緩和する目的で一般にエポキシ樹脂系のアンダフィル材をチップ/基板の間隙に注入する方式が検討されている。しかし、このアンダフィルの注入工程は、プロセスを煩雑化し、生産性、コストの面で不利になるという問題がある。このような問題を解決すべく最近では、チップと基板の間にあらかじめ接着剤や異方導電性と封止機能を有する異方導電性接着剤を介在し、加熱加圧してチップと基板をフリップチップ実装する方式が、プロセス簡易性という観点から注目されている。
【0003】
【発明が解決しようとする課題】
しかしながら、チップを接着剤を介して直接基板に搭載する場合、加熱、加圧による接続時、基板の端子電極が基板中に沈みこみ、基板の最外層の端子電極の底部と基板の内層回路との間隙が小さくなり、結果として高温・高湿下でのバイアス試験で絶縁不良を発生するという問題がある。
本発明は、半導体チップ等の電子部品と実装基板との接続信頼性に優れる半導体装置等の電子部品装置を提供するものである。
【0004】
【課題を解決するための手段】
本発明の電子部品装置は、第一の接続端子を有する電子部品と、第二の接続端子を有する実装基板とを、第一の接続端子と第二の接続端子を対向して配置し、前記対向配置した第一の接続端子と第二の接続端子の間に少なくともエポキシ樹脂、アクリルゴム、潜在性硬化剤および導電粒子を含有した接着後の40℃での弾性率が50〜2,000MPaである異方導電性接着剤を介在させ、加熱加圧して前記対向配置した第一の接続端子と第二の接続端子を電気的に接続させた電子部品装置であって、前記実装基板が、最外配線層を含む複数の配線層と、前記配線層間を電気的に接続する導体化された穴を有すると共に、最外配線層と最外配線層に最も近い配線層との間に貯蔵弾性率が25℃で10〜2,000MPaであり、170℃で1〜400MPaである絶縁層に用いる接着剤に無機フィラーを接着剤100体積部(樹脂成分と無機フィラー成分の和)に対して1〜50体積部充填された絶縁層が形成されている多層配線板であることを特徴とするものである。異方導電性の接着剤としては、少なくともエポキシ樹脂と、アクリルゴムと、潜在性硬化剤を含有しているものが使用され、アクリルゴムは、その分子中にグリシジルエーテル基を含有しているものが好ましい。接着剤には導電粒子を0.1〜20体積%含有することができる。電子部品としては、半導体チップが使用される。実装基板は電子部品より熱膨張係数が小さいものが使用出来る。
【0005】
【発明の実施の形態】
本発明において、電子部品としては半導体チップ、トランジスタ、ダイオ−ド、サイリスタ等の能動素子、コンデンサ、抵抗体、コイル等の受動素子等のチップ部品が用いられる。
電子部品を実装基板に加熱加圧することにより、対向配置した接続端子どうしは、直接接触により又は異方導電性接着剤の導電粒子を介して電気的に接続する。
半導体チップや実装基板の電極パッド上には、めっきで形成されるバンプや金ワイヤの先端をトーチ等により溶融させ、金ボールを形成し、このボールを電極パッド上に圧着した後、ワイヤを切断して得られるワイヤバンプなどの突起電極を設け、接続端子として用いることができる。
【0006】
実装基板として最外配線層を含む複数の配線層と、前記配線層間を電気的に接続する導体化された穴を有すると共に、最外配線層と最外配線層に最も近い配線層との間に貯蔵弾性率が25℃で10〜2,000MPaであり、170℃で1〜400MPaである接着剤に無機フィラが充填された絶縁層が形成されている多層配線板を用いる。
最外配線層に接する絶縁層は、25℃で10〜2,000MPaであり、170℃で1〜400MPaである接着剤に無機フィラが充填されている。
なお、ここで弾性率とは、動的粘弾性測定装置で測定した貯蔵弾性率を指し、その測定は、接着剤硬化物に引張り荷重をかけて、周波数10Hz、昇温速度5〜10℃/分で−50℃から300℃まで測定する温度依存性モードで行った。最外配線層に接する絶縁層に用いる接着剤としては、例えば、(1)アクリロニトリル18〜40重量%、(2)官能基モノマーとしてグリシジル(メタ)アクリレート2〜6重量%、及び残部が(3)エチル(メタ)アクリレートまたはブチル(メタ)アクリレート、からなる共重合体で、Tg(ガラス転移点)が−10℃以上でかつ重量平均分子量が10万以上であるエポキシ基含有アクリルゴムを含む接着剤が挙げられる。
【0007】
最外配線層に接する絶縁層に用いる接着剤には、無機フィラーを接着剤(樹脂成分と無機フィラー成分の和)100体積部に対して、1〜50体積部配合される。配合の効果の点から1体積部以上、配合量が多くなると、接着剤の貯蔵弾性率の上昇、接着性の低下、ボイド残存による電気特性の低下等の問題を起こすので50体積部以下が好ましい。
無機フィラーとしては、水酸化アルミニウム、水酸化マグネシウム、炭酸カルシウム、炭酸マグネシウム、ケイ酸カルシウム、ケイ酸マグネシウム、酸化カルシウム、酸化マグネシウム、アルミナ粉末、窒化アルミニウム粉末、窒化ホウ素粉末、結晶性シリカ、非結晶性シリカなどが挙げられる。
また、無機フィラとして電気絶縁性セラミックウィスカを用いることもでき、接着剤(樹脂成分とウィスカ成分の和)100体積部に対して、5〜50体積部配合することが好ましい。
電気絶縁性セラミックウィスカは、平均直径が0.3〜3μm、平均長さが平均直径の5倍以上であることが好ましい。平均直径が、0.3μm未満であると、接着剤へ分散させる工程において、破砕が起こりやすく、3μmを超えると、接着剤のフィルム化の工程で表面に凹凸が起こりやすく、好ましくない。
また、配線間の絶縁信頼性を確保するために、100μm以下であることが好ましい。
電気絶縁性セラミックウィスカとしては、ホウ酸アルミニウム、ウォラスナイト、チタン酸カリウム、塩基性硫酸マグネシウム、窒化ケイ素、α−アルミナ等などが挙げられる。
【0008】
実装基板の多層配線板としては、隣接する配線層間の導体のみを接続するインタースティシャルバイアホール(以下、IVHという。)や、ベリードバイアホール(以下、BVHという。)を用いたものが好ましい。このIVHやBVHを有する多層配線板としては、ビルドアップ多層配線板がある。
このビルドアップ多層配線板は、以下のような方法により製造できる。めっきスルーホールと内層回路とが形成された内層回路板のスルーホールにシルクスクリーン印刷法などによって、穴が完全に塞がるように熱硬化性樹脂を埋め、加熱して硬化した後、穴からはみ出した樹脂を研磨等により除去し、 Bステージ状態に硬化させた接着剤を有する導体箔を加熱加圧し、導体箔の層間接続用穴を設ける部分をエッチング除去し、その部分の絶縁層(硬化した前記接着剤)を除去し、めっきなどにより、その層間接続用穴の内壁の金属化を行い、表面の導体層の不要な部分をエッチングすることにより回路を形成する。接着剤を有する導体箔の代わりに接着フィルムと導体箔を用いてもよい。この手法により、絶縁層と配線層を1層づつ形成することができる。この回路を形成したものを内層回路板とすれば、上記と同様の手法によりさらに1層づつの絶縁層と配線層が形成でき、これを繰り返すことによって、必要とする内層回路板を得ることができる。そして、最外層には、前記絶縁層を有する導体箔を用いて、必要な回路を有する多層配線板を得ることができる。
本発明において、層間接続用穴を設ける部分の絶縁層は、レーザ光照射により除去できる。
【0009】
本発明において用いられる接着剤としては、エポキシ樹脂とイミダゾール系、ヒドラジド系、三フッ化ホウ素ーアミン錯体、スルホニウム塩、アミンイミド、ポリアミンの塩、ジシアンジアミド等の潜在性硬化剤の混合物が用いられ、回路部材の熱膨張係数差に基づくストレスを緩和するためには、接着後の40℃での弾性率が50〜2000MPaの接着樹脂組成物が好ましい。例えば、接続時の良好な流動性や高接続信頼性を得られる接着樹脂組成物として、エポキシ樹脂とイミダゾール系、ヒドラジド系、三フッ化ホウ素−アミン錯体、スルホニウム塩、アミンイミド、ポリアミンの塩、ジシアンジアミド等の潜在性硬化剤の混合物に、接着後の40℃での弾性率が50〜2000MPaになるようにアクリルゴムを配合した接着剤があげられる。接着フィルム硬化物の弾性率は、例えば、レオロジ(株)製レオスペクトラDVE−4(引っぱりモード、周波数10Hz、5℃/minで昇温)を使用して測定できる。
【0010】
本発明の接着剤に用いるアクリルゴムとしては、アクリル酸、アクリル酸エステル、メタクリル酸エステルまたはアクリロニトリルのうち少なくともひとつをモノマー成分とした重合体または共重合体があげられ、中でもグリシジルエーテル基を含有するグリシジルアクリレートやグリシジルメタクリレートを含む共重合体系アクリルゴムが好適に用いられる。
これらアクリルゴムの分子量は、接着剤の凝集力を高める点から20万以上が好ましい。アクリルゴムの接着剤中の配合量は、15wt%以下であると接着後の40℃での弾性率が2000MPaを越えてしまい、また40wt%以上になると低弾性率化は図れるが接続時の溶融粘度が高くなり接続電極界間、または接続電極と導電粒子界面の溶融接着剤の排除性が低下するため、接続電極間または接続電極と導電粒子間の電気的導通を確保できなくなる。このため、アクリル配合量としては15〜40wt%が好ましい。接着剤に配合されたこれらのアクリルゴムは、ゴム成分に起因する
【0011】
誘電正接のピーク温度が40〜60℃付近にあるため、接着剤の低弾性率化を図ることができる。また、接着剤にはフィルム形成性をより容易にするためにフェノキシ樹脂などの熱可塑性樹脂を配合することもできる。特に、フェノキシ樹脂は、エポキシ樹脂と構造が類似しているため、エポキシ樹脂との相溶性、接着性に優れるなどの特徴を有するので好ましい。フィルム形成は、これら少なくともエポキシ樹脂、アクリルゴム、フェノキシ樹脂、潜在性硬化剤からなる接着組成物と導電粒子を有機溶剤に溶解あるいは分散により液状化して、剥離性基材上に塗布し、硬化剤の活性温度以下で溶剤を除去することにより行われれる。この時用いる溶剤は、芳香族炭化水素系と含酸素系の混合溶剤が材料の溶解性を向上させるため好ましい。
【0012】
本発明の接着剤には、熱膨張係数を低減する目的で無機質充填材を配合できる。無機質充填材としては、特に限定するものではなく、例えば、溶融シリカ、結晶質シリカ、ケイ酸カルシウム、アルミナ、炭酸カルシウム等の粉体があげられる。無機充填材の配合量は、接着樹脂組成物に対して10〜90重量%であり、熱膨張係数を低下させるには配合量が大きいほど効果的であるが、多量に配合すると接着性や接続部での接着剤の排除性低下に基づく導通不良が発生するため、20〜60重量%が好ましい。また、その平均粒径は、接続部での導通不良を防止する目的でミクロン以下にするのが好ましい。また、接続時の樹脂の流動性の低下及びチップのパッシベーション膜のダメージを防ぐ目的で球状フィラを用いることが望ましい。
【0013】
本発明の接着剤には、チップのバンプや回路電極の高さばらつきを吸収するために、異方導電性を積極的に付与する目的で導電粒子を分散することもできる。本発明において導電粒子は例えばAu、Ni、Ag、Cu、Wやはんだなどの金属粒子またはこれらの金属粒子表面に金やパラジウムなどの薄膜をめっきや蒸着によって形成した金属粒子であり、ポリスチレン等の高分子の球状の核材にNi、Cu、Au、はんだ等の導電層を設けた導電粒子を用いることができる。粒径は基板の電極の最小の間隔よりも小さいことが必要で、電極の高さばらつきがある場合、高さばらつきよりも大きいことが好ましく、かつ無機質充填材の平均粒径より大きいことが好ましく、1μm〜10μmが好ましい。また、接着剤に分散される導電粒子量は、0.1〜30体積%であり、好ましくは0.1〜20体積%である。
【0014】
【実施例】
金ワイヤから作製したワイヤバンプ(直径:50μmΦ、スペース30μm、高さ:30μm、バンプ数288)付きチップ(10mm x10mm、厚み:0.5mm)を半導体チップとして用いた。
ガラスクロス・エポキシ樹脂両面銅張り積層板であるMCL−E−679(日立化成工業株式会社製、商品名)の表面銅はくを既存のサブトラクト法で内層回路加工、内層接着処理を施す。次に、該内層回路表面に先にドリル穴加工を施したエポキシ接着剤(貯蔵弾性率が25℃で500MPaであり、170℃で100MPa)に無機フィラを30体積%充填した絶縁層(膜厚:50ミクロン)を170℃、40kgf/cm2、60分プレス積層接着し、スルホール穴あけ、無電解銅めっき、サブトラクト法による外層回路加工及び無電解ニッケル/金めっきを施し多層基板を得た。
ニッケル粒子(直径:5μm)を2vol%分散したエポキシ系接着フィルムからなる異方導電フィルム(厚み:50ミクロン)を実装基板に80℃、10kgf/cm2で貼りつけた後、半導体チップのバンプと実装基板(厚み:0.8mm)の位置あわせを行った。ついで、180℃、30g/バンプ、20秒の条件でチップ上方から加熱、加圧を行い、本接続を行った。本接続後、半導体チップのバンプと電気的に接続された多層基板の最外配線層の電極は、接続前に比較し、5ミクロン絶縁層中に埋設した程度であり、基板内層回路とのショート発生は、高温・高湿試験(85℃/85%RH、1000h)下でのバイアス(100V)下においてもなかった。また、本接続後の接続抵抗は、1バンプあたり最高で6mΩ、平均で2mΩ、絶縁抵抗は108Ω以上であり、これらの値は−55〜125℃の熱衝撃試験1000サイクル処理、PCT試験(121℃、2気圧)200時間、260℃のはんだバス浸漬10秒後においても変化がなく、良好な接続信頼性を示した。
【0015】
【発明の効果】
本発明により、半導体チップ等の電子部品と実装基板との接続信頼性に優れる半導体装置等の電子部品装置を得ることができる。
本発明によれば、実装基板の最外層の絶縁層が低弾性率の接着剤と無機フィラからなるため、実装後、低弾性率化接着剤によってチップと基板の熱膨張係数差に基づく界面でのストレスを緩和できる他、接着剤中に分散した無機フィラによって基板電極が接続後基板中に大きく埋設するのを抑制でき、回路板の接続信頼性が大幅に向上する。
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an electronic component device obtained by bonding and fixing a semiconductor chip to a mounting substrate with an adhesive by, for example, a flip chip mounting method and electrically connecting both electrodes.
[0002]
[Prior art]
In the field of semiconductor mounting, flip chip mounting, in which an IC chip is directly mounted on a printed circuit board or a flexible wiring board, has attracted attention as a new mounting form corresponding to cost reduction and high precision. As the flip chip mounting method, there are known a method in which solder bumps are provided on the terminals of the chip and solder connection is made, and a method in which electrical connection is made through a conductive adhesive. In these methods, there is a problem that when the stress based on the difference in thermal expansion coefficient between the chip to be connected and the substrate is exposed to various environments, it is generated at the connection interface and connection reliability is lowered. For this reason, a method of injecting an epoxy resin-based underfill material into the gap between the chip and the substrate is generally studied for the purpose of alleviating the stress at the connection interface. However, the underfill injection process complicates the process and is disadvantageous in terms of productivity and cost. Recently, in order to solve such problems, an adhesive or an anisotropic conductive adhesive having an anisotropic conductive property and a sealing function is interposed between the chip and the substrate in advance, and the chip and the substrate are flipped by heating and pressing. A chip mounting method has attracted attention from the viewpoint of process simplicity.
[0003]
[Problems to be solved by the invention]
However, when the chip is directly mounted on the substrate via an adhesive, the terminal electrode of the substrate sinks into the substrate when connected by heating and pressurizing, and the bottom of the outermost terminal electrode of the substrate and the inner layer circuit of the substrate As a result, there is a problem that insulation failure occurs in a bias test under high temperature and high humidity.
The present invention provides an electronic component device such as a semiconductor device having excellent connection reliability between an electronic component such as a semiconductor chip and a mounting substrate.
[0004]
[Means for Solving the Problems]
The electronic component device according to the present invention includes an electronic component having a first connection terminal and a mounting substrate having a second connection terminal, the first connection terminal and the second connection terminal being opposed to each other, The elastic modulus at 40 ° C. after adhesion containing at least an epoxy resin, an acrylic rubber, a latent curing agent and conductive particles is 50 to 2,000 MPa between the first connection terminal and the second connection terminal arranged to face each other. An electronic component device in which an anisotropic conductive adhesive is interposed and heated and pressed to electrically connect the first connection terminal and the second connection terminal that face each other. Storage elastic modulus between a plurality of wiring layers including an outer wiring layer, and a conductor hole that electrically connects the wiring layers, and between the outermost wiring layer and the wiring layer closest to the outermost wiring layer Is 10 to 2,000 MPa at 25 ° C. and 1 at 170 ° C. Adhesive 100 parts by volume of the inorganic filler over the adhesive used in the is insulating layer 400MPa multilayer wiring board in which the insulating layer filled 1-50 parts by volume (the sum of the resin component and the inorganic filler component) is formed It is characterized by being. An anisotropic conductive adhesive that contains at least an epoxy resin, an acrylic rubber, and a latent curing agent is used. The acrylic rubber contains a glycidyl ether group in its molecule. Is preferred. The adhesive may contain 0.1 to 20% by volume of conductive particles. A semiconductor chip is used as the electronic component. Mounting substrate that has a smaller thermal expansion coefficient than the electronic component can be used.
[0005]
DETAILED DESCRIPTION OF THE INVENTION
In the present invention, chip parts such as active elements such as semiconductor chips, transistors, diodes, and thyristors, and passive elements such as capacitors, resistors, and coils are used as the electronic parts.
By heating and pressing the electronic component on the mounting substrate, the connection terminals arranged opposite to each other are electrically connected by direct contact or through conductive particles of an anisotropic conductive adhesive.
On the electrode pad of the semiconductor chip or mounting substrate, the tip of a bump or gold wire formed by plating is melted with a torch or the like to form a gold ball, and after this ball is pressed onto the electrode pad, the wire is cut Protruding electrodes such as wire bumps obtained in this way can be provided and used as connection terminals.
[0006]
A plurality of wiring layers including an outermost wiring layer as a mounting board, and a conductor hole for electrically connecting the wiring layers, and between the outermost wiring layer and a wiring layer closest to the outermost wiring layer In addition, a multilayer wiring board in which an insulating layer in which an inorganic filler is filled in an adhesive having a storage elastic modulus of 10 to 2,000 MPa at 25 ° C. and 1 to 400 MPa at 170 ° C. is used.
The insulating layer in contact with the outermost wiring layer is 10 to 2,000 MPa at 25 ° C., and an inorganic filler is filled in an adhesive that is 1 to 400 MPa at 170 ° C.
Here, the elastic modulus refers to a storage elastic modulus measured by a dynamic viscoelasticity measuring device, and the measurement is performed by applying a tensile load to the cured adhesive, a frequency of 10 Hz, and a heating rate of 5 to 10 ° C. / It was performed in a temperature dependent mode measuring from -50 ° C to 300 ° C in minutes. Examples of the adhesive used for the insulating layer in contact with the outermost wiring layer include: (1) 18 to 40% by weight of acrylonitrile, (2) 2 to 6% by weight of glycidyl (meth) acrylate as a functional group monomer, and (3) ) An adhesive comprising an epoxy group-containing acrylic rubber having a Tg (glass transition point) of −10 ° C. or more and a weight average molecular weight of 100,000 or more, which is a copolymer comprising ethyl (meth) acrylate or butyl (meth) acrylate. Agents.
[0007]
The adhesive used for the insulating layer in contact with the outermost wiring layer contains 1 to 50 parts by volume of an inorganic filler with respect to 100 parts by volume of the adhesive (the sum of the resin component and the inorganic filler component). From the viewpoint of the effect of blending, if the blending amount is increased by 1 volume part or more, problems such as an increase in storage elastic modulus of the adhesive, a decrease in adhesiveness, and a decrease in electrical characteristics due to residual voids are caused. .
As inorganic fillers, aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, alumina powder, aluminum nitride powder, boron nitride powder, crystalline silica, amorphous And silica.
Moreover, an electrically insulating ceramic whisker can also be used as the inorganic filler, and it is preferable to blend 5 to 50 parts by volume with respect to 100 parts by volume of the adhesive (the sum of the resin component and the whisker component).
The electrically insulating ceramic whisker preferably has an average diameter of 0.3 to 3 μm and an average length of 5 times or more the average diameter. If the average diameter is less than 0.3 μm, crushing is likely to occur in the step of dispersing in the adhesive, and if it exceeds 3 μm, unevenness is likely to occur on the surface in the step of forming the adhesive film, which is not preferable.
Moreover, in order to ensure the insulation reliability between wiring, it is preferable that it is 100 micrometers or less.
Examples of the electrically insulating ceramic whisker include aluminum borate, wollastonite, potassium titanate, basic magnesium sulfate, silicon nitride, α-alumina and the like.
[0008]
As the multilayer wiring board of the mounting substrate, an interstitial via hole (hereinafter referred to as IVH) that connects only conductors between adjacent wiring layers or a belly via hole (hereinafter referred to as BVH) is preferable. . As a multilayer wiring board having IVH or BVH, there is a build-up multilayer wiring board.
This build-up multilayer wiring board can be manufactured by the following method. The through hole of the inner layer circuit board on which the plated through hole and inner layer circuit were formed was filled with a thermosetting resin so that the hole was completely blocked by a silk screen printing method, etc., cured by heating, and then protruded from the hole The resin foil is removed by polishing or the like, the conductor foil having the adhesive cured in the B-stage state is heated and pressurized, and the portion of the conductor foil where the interlayer connection hole is provided is removed by etching. The adhesive is removed, the inner wall of the interlayer connection hole is metalized by plating or the like, and an unnecessary portion of the conductor layer on the surface is etched to form a circuit. An adhesive film and a conductive foil may be used instead of the conductive foil having an adhesive. By this method, the insulating layer and the wiring layer can be formed one by one. If this circuit is formed as an inner circuit board, an insulating layer and a wiring layer can be formed one by one by the same method as described above. By repeating this, the required inner circuit board can be obtained. it can. And the multilayer wiring board which has a required circuit can be obtained using the conductor foil which has the said insulating layer for the outermost layer.
In the present invention, the portion of the insulating layer in which the interlayer connection hole is provided can be removed by laser light irradiation.
[0009]
As the adhesive used in the present invention, a mixture of an epoxy resin and an imidazole-based, hydrazide-based, boron trifluoride-amine complex, sulfonium salt, amine imide, polyamine salt, dicyandiamide or the like is used, and a circuit member In order to relieve stress based on the difference in thermal expansion coefficient, an adhesive resin composition having an elastic modulus at 40 ° C. of 50 to 2000 MPa after bonding is preferable. For example, as an adhesive resin composition capable of obtaining good fluidity and high connection reliability at the time of connection, epoxy resin and imidazole, hydrazide, boron trifluoride-amine complex, sulfonium salt, amine imide, polyamine salt, dicyandiamide The adhesive which mix | blended acrylic rubber so that the elasticity modulus in 40 degreeC after adhesion | attachment might be set to 50-2000 MPa to the mixture of latent curing agents, such as. The elastic modulus of the cured adhesive film can be measured by using, for example, Rheospectra DVE-4 manufactured by Rheology Co., Ltd. (pull mode, temperature rising at 10 Hz, 5 ° C./min).
[0010]
Examples of the acrylic rubber used in the adhesive of the present invention include a polymer or copolymer having at least one of acrylic acid, acrylic acid ester, methacrylic acid ester or acrylonitrile as a monomer component, and particularly contains a glycidyl ether group. A copolymer acrylic rubber containing glycidyl acrylate or glycidyl methacrylate is preferably used.
The molecular weight of these acrylic rubbers is preferably 200,000 or more from the viewpoint of increasing the cohesive strength of the adhesive. If the blending amount of acrylic rubber in the adhesive is 15 wt% or less, the elastic modulus at 40 ° C. after bonding exceeds 2000 MPa, and if it exceeds 40 wt%, the elastic modulus can be reduced, but melting at the time of connection Since the viscosity increases and the exclusion of the molten adhesive between the connection electrode boundaries or at the interface between the connection electrode and the conductive particles is reduced, it becomes impossible to ensure electrical continuity between the connection electrodes or between the connection electrodes and the conductive particles. For this reason, as an acrylic compounding quantity, 15-40 wt% is preferable. These acrylic rubbers blended in the adhesive are attributed to the rubber component.
Since the peak temperature of dielectric loss tangent is in the vicinity of 40 to 60 ° C., the elastic modulus of the adhesive can be reduced. In addition, a thermoplastic resin such as a phenoxy resin can be blended in the adhesive in order to make film forming easier. In particular, the phenoxy resin is preferable because it has a similar structure to the epoxy resin and has characteristics such as excellent compatibility with the epoxy resin and excellent adhesion. For film formation, an adhesive composition composed of at least an epoxy resin, an acrylic rubber, a phenoxy resin, and a latent curing agent and a conductive particle are liquefied by dissolving or dispersing in an organic solvent, and applied onto a peelable substrate, and then a curing agent. This is done by removing the solvent below the activation temperature. The solvent used at this time is preferably an aromatic hydrocarbon-based and oxygen-containing mixed solvent because the solubility of the material is improved.
[0012]
In the adhesive of the present invention, an inorganic filler can be blended for the purpose of reducing the thermal expansion coefficient. The inorganic filler is not particularly limited, and examples thereof include powders such as fused silica, crystalline silica, calcium silicate, alumina, and calcium carbonate. The blending amount of the inorganic filler is 10 to 90% by weight with respect to the adhesive resin composition, and the larger the blending amount, the more effective it is to reduce the thermal expansion coefficient. Since the conduction | electrical_connection defect based on the exclusion property reduction of the adhesive agent in a part generate | occur | produces, 20 to 60 weight% is preferable. Further, the average particle diameter is preferably set to be not more than micron for the purpose of preventing poor conduction at the connecting portion. In addition, it is desirable to use a spherical filler for the purpose of preventing a decrease in resin fluidity at the time of connection and damage to the passivation film of the chip.
[0013]
In the adhesive of the present invention, conductive particles can be dispersed for the purpose of positively imparting anisotropic conductivity in order to absorb the height variation of the bumps of the chip and the circuit electrodes. In the present invention, the conductive particles are, for example, metal particles such as Au, Ni, Ag, Cu, W and solder or metal particles formed by plating or vapor deposition of a thin film such as gold or palladium on the surface of these metal particles, such as polystyrene. Conductive particles in which a polymer spherical core material is provided with a conductive layer such as Ni, Cu, Au, or solder can be used. The particle size needs to be smaller than the minimum distance between the electrodes on the substrate, and when there is a variation in the height of the electrodes, it is preferably larger than the variation in height, and preferably larger than the average particle size of the inorganic filler. 1 μm to 10 μm is preferable. The amount of conductive particles dispersed in the adhesive is 0.1 to 30% by volume, preferably 0.1 to 20% by volume.
[0014]
【Example】
A chip (10 mm × 10 mm, thickness: 0.5 mm) with wire bumps (diameter: 50 μmΦ, space 30 μm, height: 30 μm, number of bumps 288) produced from gold wire was used as a semiconductor chip.
The surface copper foil of MCL-E-679 (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is a glass cloth / epoxy resin double-sided copper-clad laminate, is subjected to inner layer circuit processing and inner layer adhesion treatment by the existing subtract method. Next, an insulating layer (film thickness) filled with 30% by volume of an inorganic filler in an epoxy adhesive (having a storage elastic modulus of 500 MPa at 25 ° C. and 100 MPa at 170 ° C.) having a drilled hole on the inner layer circuit surface. : 50 microns) at 170 ° C., 40 kgf / cm 2 , press lamination adhesion was performed for 60 minutes, through-hole drilling, electroless copper plating, outer layer circuit processing by subtracting method and electroless nickel / gold plating were performed to obtain a multilayer substrate.
An anisotropic conductive film (thickness: 50 microns) made of an epoxy-based adhesive film in which nickel particles (diameter: 5 μm) are dispersed at 2 vol% is affixed to a mounting substrate at 80 ° C. and 10 kgf / cm 2. The mounting substrate (thickness: 0.8 mm) was aligned. Next, the main connection was performed by heating and pressing from above the chip under the conditions of 180 ° C., 30 g / bump, and 20 seconds. After this connection, the electrodes on the outermost wiring layer of the multilayer substrate electrically connected to the bumps of the semiconductor chip are embedded in a 5-micron insulating layer compared to before connection, and are short-circuited with the substrate inner layer circuit. There was no generation even under a bias (100 V) under a high temperature and high humidity test (85 ° C./85% RH, 1000 h). In addition, the connection resistance after this connection is 6 mΩ maximum per bump, 2 mΩ on average, and the insulation resistance is 10 8 Ω or more. These values are the thermal shock test at −55 to 125 ° C., 1000 cycle treatment, PCT test (121 ° C., 2 atm) No change even after 10 seconds of immersion in a solder bath at 260 ° C. for 200 hours, showing good connection reliability.
[0015]
【The invention's effect】
According to the present invention, an electronic component device such as a semiconductor device having excellent connection reliability between an electronic component such as a semiconductor chip and a mounting substrate can be obtained.
According to the present invention, since the outermost insulating layer of the mounting substrate is made of the low elastic modulus adhesive and the inorganic filler, the low elastic modulus adhesive after the mounting is used at the interface based on the difference in thermal expansion coefficient between the chip and the substrate. In addition to relieving the stress of the circuit board, the inorganic filler dispersed in the adhesive can suppress the substrate electrode from being largely embedded in the substrate after the connection, thereby greatly improving the connection reliability of the circuit board.

Claims (1)

第一の接続端子を有する電子部品と、
第二の接続端子を有する実装基板とを、第一の接続端子と第二の接続端子を対向して配置し、
前記対向配置した第一の接続端子と第二の接続端子の間に少なくともエポキシ樹脂、アクリルゴム、潜在性硬化剤および導電粒子を含有した接着後の40℃での弾性率が50〜2,000MPaである異方導電性接着剤を介在させ、加熱加圧して前記対向配置した第一の接続端子と第二の接続端子を電気的に接続させた電子部品装置であって、
前記実装基板が、最外配線層を含む複数の配線層と、前記配線層間を電気的に接続する導体化された穴を有すると共に、最外配線層と最外配線層に最も近い配線層との間に貯蔵弾性率が25℃で10〜2,000MPaであり、170℃で1〜400MPaである絶縁層に用いる接着剤に無機フィラーを接着剤100体積部(樹脂成分と無機フィラー成分の和)に対して1〜50体積部充填された絶縁層が形成されている多層配線板であることを特徴とする電子部品装置。
An electronic component having a first connection terminal;
A mounting substrate having a second connection terminal, the first connection terminal and the second connection terminal are arranged to face each other,
The elastic modulus at 40 ° C. after adhesion containing at least epoxy resin, acrylic rubber, latent curing agent and conductive particles is 50 to 2,000 MPa between the first connection terminal and the second connection terminal arranged opposite to each other. It is an electronic component device in which an anisotropic conductive adhesive is interposed and heated and pressed to electrically connect the first connection terminal and the second connection terminal arranged opposite to each other,
The mounting substrate includes a plurality of wiring layers including an outermost wiring layer, and a conductor hole that electrically connects the wiring layers, and the outermost wiring layer and a wiring layer closest to the outermost wiring layer; a 10~2,000MPa storage modulus at 25 ° C. during the inorganic filler over the adhesive 100 parts by volume (of the resin component and the inorganic filler component in the adhesive used for the insulating layer is 1~400MPa at 170 ° C. The electronic component device is a multilayer wiring board on which an insulating layer filled with 1 to 50 parts by volume is formed.
JP02010598A 1998-02-02 1998-02-02 Electronic component equipment Expired - Fee Related JP3835584B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP02010598A JP3835584B2 (en) 1998-02-02 1998-02-02 Electronic component equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP02010598A JP3835584B2 (en) 1998-02-02 1998-02-02 Electronic component equipment

Publications (2)

Publication Number Publication Date
JPH11219980A JPH11219980A (en) 1999-08-10
JP3835584B2 true JP3835584B2 (en) 2006-10-18

Family

ID=12017842

Family Applications (1)

Application Number Title Priority Date Filing Date
JP02010598A Expired - Fee Related JP3835584B2 (en) 1998-02-02 1998-02-02 Electronic component equipment

Country Status (1)

Country Link
JP (1) JP3835584B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4916677B2 (en) * 1999-08-25 2012-04-18 日立化成工業株式会社 Wiring connecting material and wiring board manufacturing method using the same
JP4683770B2 (en) * 2001-05-31 2011-05-18 京セラ株式会社 Wiring board with built-in electric element and manufacturing method thereof
JP4973330B2 (en) * 2007-06-19 2012-07-11 富士電機リテイルシステムズ株式会社 Coin sorting device and manufacturing method thereof
WO2014087882A1 (en) * 2012-12-05 2014-06-12 住友ベークライト株式会社 Metal layer having resin layer attached thereto, laminated body, circuit board, and semiconductor device

Also Published As

Publication number Publication date
JPH11219980A (en) 1999-08-10

Similar Documents

Publication Publication Date Title
WO1998003047A1 (en) Film-like adhesive for connecting circuit and circuit board
WO2000009623A1 (en) Adhesive for bonding circuit members, circuit board, and method of producing the same
JP4178565B2 (en) Adhesive for connecting circuit members
JPH10226769A (en) Film adhesive and method for connection
JP4151081B2 (en) Adhesive for connecting circuit members
JP4928378B2 (en) Adhesive for connecting circuit members
JP3835584B2 (en) Electronic component equipment
JP2007113012A (en) Adhesive for connecting circuit members
JP4440352B2 (en) Adhesive for connecting circuit members
JP4514840B2 (en) Adhesive for connecting circuit members
JP4631984B2 (en) Circuit member connecting adhesive, circuit board, and manufacturing method thereof
JP4631979B2 (en) Circuit member connecting adhesive, circuit board and manufacturing method thereof
JP3801341B2 (en) Electronic component equipment
JP4815648B2 (en) Film adhesive for circuit connection
JP4631998B1 (en) Circuit member connecting adhesive, circuit board, and manufacturing method thereof
JP4492692B2 (en) Adhesive film for connecting circuit members
JP3925746B2 (en) Circuit board
JP3835583B2 (en) Electronic component equipment
JP3882967B2 (en) Circuit board manufacturing method
JP2919976B2 (en) Semiconductor device, wiring board for mounting semiconductor, and method of manufacturing semiconductor device
JPH10163254A (en) Circuit board
JP2007107008A (en) Film adhesive and method for producing laminate
JP2009203478A (en) Adhesive for connecting circuit member
JP2008115400A (en) Adhesive for connecting circuit members
JP5378261B2 (en) Adhesive for connecting circuit members

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050202

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20060120

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20060126

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060324

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20060412

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060612

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20060706

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20060719

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090804

Year of fee payment: 3

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100804

Year of fee payment: 4

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110804

Year of fee payment: 5

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110804

Year of fee payment: 5

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120804

Year of fee payment: 6

LAPS Cancellation because of no payment of annual fees